Re: Copper Thieving
Doug: A picture says a 1000 words. Well Done. Ralph Cameron - Original Message - From: "POWELL, DOUG" To: ; Sent: Monday, January 22, 2001 11:40 AM Subject: RE: Copper Thieving I would like to add a little more to this discussion. Last August we had a serious problem occur when a board house arbitrarily added thieving dots to one of our PCBs. This significantly reduced the spacing requirement in a safe-unsafe area. As it turned out, we did not catch the problem immediately because the hipot test did not uncover the problem. Eventually the PCB board house started using a different stamping ink on their inspection stamp that had organic content and it failed hipot. They were using stamp pad ink from the local office supply and could not immediately identify its content. As it turned out the basic board design had enough spacing (barely) because it was originally designed with 230V (L-N) systems in mind and is only used on 120V (L-N) products. We still insisted that they remove the dots from the Gerber files. In the process I learned that there are several things to watch for. 1) Thieving dots and thieving bars are used primarily for balancing copper during etch and plating and for balancing the wave during assembly. These dots may be added at the time Gerber files are generated or even edited into the Gerber files by the PCB house and never show up on a CAD system. 2) Venting of PCBs, I am not entirely clear on this but I understand that this is a modification to the ground plane and other copper fills, to allow process gases to escape from between the laminates on inner layers. Watch for changes in ground currents and reduced maximum current capability. This also has the Gerber files editing problems. 3) Inspection stamps should be epoxy based only, also adhesive labels often applied by companies to identify PCB's should not be printed with LaserJet toner! Toner is very conductive and should not be allowed to bridge safe/unsafe areas. Attached is a photo of a PCB with the thieving dots and triangular inspection stamp that failed hipot. If you look closely at the stamp you can see the trench created by the hipot test. -doug = Douglas E. Powell Regulatory Compliance Engineer Advanced Energy Industries, Inc. 1625 Sharp Point Dr. Ft. Collins, Co 80525 mailto:doug.pow...@aei.com www.advanced-energy.com = -Original Message- From: rehel...@mmm.com [mailto:rehel...@mmm.com] Sent: Thursday, January 18, 2001 7:15 AM To: emc-p...@majordomo.ieee.org Subject: Copper Thieving Please excuse my lack of knowledge..what is "copper thieving"? --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Copper Thieving
I would like to add a little more to this discussion. Last August we had a serious problem occur when a board house arbitrarily added thieving dots to one of our PCBs. This significantly reduced the spacing requirement in a safe-unsafe area. As it turned out, we did not catch the problem immediately because the hipot test did not uncover the problem. Eventually the PCB board house started using a different stamping ink on their inspection stamp that had organic content and it failed hipot. They were using stamp pad ink from the local office supply and could not immediately identify its content. As it turned out the basic board design had enough spacing (barely) because it was originally designed with 230V (L-N) systems in mind and is only used on 120V (L-N) products. We still insisted that they remove the dots from the Gerber files. In the process I learned that there are several things to watch for. 1) Thieving dots and thieving bars are used primarily for balancing copper during etch and plating and for balancing the wave during assembly. These dots may be added at the time Gerber files are generated or even edited into the Gerber files by the PCB house and never show up on a CAD system. 2) Venting of PCBs, I am not entirely clear on this but I understand that this is a modification to the ground plane and other copper fills, to allow process gases to escape from between the laminates on inner layers. Watch for changes in ground currents and reduced maximum current capability. This also has the Gerber files editing problems. 3) Inspection stamps should be epoxy based only, also adhesive labels often applied by companies to identify PCB's should not be printed with LaserJet toner! Toner is very conductive and should not be allowed to bridge safe/unsafe areas. Attached is a photo of a PCB with the thieving dots and triangular inspection stamp that failed hipot. If you look closely at the stamp you can see the trench created by the hipot test. -doug = Douglas E. Powell Regulatory Compliance Engineer Advanced Energy Industries, Inc. 1625 Sharp Point Dr. Ft. Collins, Co 80525 mailto:doug.pow...@aei.com www.advanced-energy.com = -Original Message- From: rehel...@mmm.com [mailto:rehel...@mmm.com] Sent: Thursday, January 18, 2001 7:15 AM To: emc-p...@majordomo.ieee.org Subject: Copper Thieving Please excuse my lack of knowledge..what is "copper thieving"? --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org <>
Re: Copper Thieving
When fabricating a printed wiring board, if the amount of copper per unit area differs from one side to anther, undesirable things can happen. One is, the action of etchant in one area will be less than in another,as etchant is used up fastest there, than in areas with less copper. This causes pads and traces whose width varies from place to place on the board. If you already are using minimum width traces, some may not be able to carry the design current, or even be etched open. And of course impedance depends on width and distance from a plane. Another is, since copper has a different thermal coefficient of expansion than the substrate, one part of the board will be subjected to a force (as the copper expands) that another part is not, and the board can actually warp during soldering. It may cool warped to beyond usable limits. To prevent these effects, it is common practice to leave copper to steal etchant away from other parts of the board. It's also common, for boards whose outer layers are planes, to add holes in the plane to equalize chemical and thermal effects much as above. And this scan be a real annoyance to an EMI engineer! Cortland == Original Message Follows >> Date: 18-Jan-01 06:20:01 MsgID: 1077-22149 ToID: 72146,373 From: rehel...@mmm.com >INTERNET:rehel...@mmm.com Subj: Copper Thieving Chrg: $0.00 Imp: Norm Sens: StdReceipt: NoParts: 1 From: rehel...@mmm.com Subject: Copper Thieving List-Post: emc-pstc@listserv.ieee.org Date: Thu, 18 Jan 2001 08:15:12 -0600 Reply-To: rehel...@mmm.com Please excuse my lack of knowledge..what is "copper thieving"? --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org == End of Original Message = --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
Re: Copper Thieving
Hi! Michael: Thank you for your suggestion. It seems that copper fill that you and several other guys mentioned does not applied in my board. For external layers, you can implement the copper ring or, as other people suggested, using copper fill but grounded it. In my case, I have a high-layer count (>20), big board (about 40x60 cm) and also thin dielectrics. The main problem is that certain area on internal layers (e.g., under DC converter) is void of copper and that cause lamination voids and warpage. Any suggestions on this ? Regards Perry Michael Mertinooke wrote: > >The question is, where do we find a compromised solution that makes > everyone > >happy ? > > The thieving areas are normally very rough, very wide (3/4 inch) borders > around > the boards, and are completely trimmed off when the bare boards are > separated > from the plating frames. > > Mike --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Copper Thieving
Capacitively. If your floating structure ends up being resonate at a fundamental or one of the harmonics it will become a very effective unintentional radiator. Dan -Original Message- From: David Gelfand [mailto:gelf...@memotec.com] Sent: Thursday, January 18, 2001 2:34 PM To: emc-p...@majordomo.ieee.org Subject: Re: Copper Thieving How does electrically floating copper interact with electromagnetic fields? David --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Copper Thieving
Why not achieve copper balance by adding extra grounded areas on the surface; ie, copper fill pegged to the normal ground layer(s) at multiple points? Large areas can be gridded in some fashion; it doesn't have to be solid copper. I'm one who does not like to see floating copper, of any size or shape, especially in high frequency areas of a board. Jack Cook Xerox Corp. -Original Message- From: Perry Qu [mailto:perry...@alcatel.com] Sent: Thursday, January 18, 2001 1:19 PM To: Roman, Dan Cc: 'Stephen Phillips'; rehel...@mmm.com; emc-p...@majordomo.ieee.org; DORIN OPREA Subject: Re: Copper Thieving Hi! Dan: I understand that EMC guys don't want to see the floating coppers on the PCB because of ESD and/or emission problem. But on the manufacture side, they claim that if you don't do copper balance on the layer where you have large area without copper, you will sure have over-eching in that area, plus warpage of the board. The question is, where do we find a compromised solution that makes everyone happy ? Regards Perry "Roman, Dan" wrote: > Remember that you can also cause yourself all kinds of EMI headaches if you > have electrically floating copper areas or patterns on the board. It has > lead to many arguments with the CAD department over the years! > > -- Dan > > -Original Message- > From: Stephen Phillips [mailto:step...@cisco.com] > Sent: Thursday, January 18, 2001 9:33 AM > To: rehel...@mmm.com; emc-p...@majordomo.ieee.org > Subject: Re: Copper Thieving > > Copper applied to the outer PCB layers, in a pattern, > to even out the copper placement so the board is less > likely to warp through soldering. Obviously, it would > be put where there is not etch, large open areas, to > somewhat offset where you might have planes of > copper elsewhere on the layer. > > Beware of Creepage and Clearance violations > (if applicable). Some PCB fab. houses have > carte-blanche to add this, we don't allow that - > and control it as part of our own PCB CAD > instead. > > Best regards, > Stephen > > At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: > > > >Please excuse my lack of knowledge..what is "copper > >thieving"? > > > > > >--- > >This message is from the IEEE EMC Society Product Safety > >Technical Committee emc-pstc discussion list. > > > >To cancel your subscription, send mail to: > > majord...@ieee.org > >with the single line: > > unsubscribe emc-pstc > > > >For help, send mail to the list administrators: > > Jim Bacher: jim_bac...@mail.monarch.com > > Michael Garretson:pstc_ad...@garretson.org > > > >For policy questions, send mail to: > > Richard Nute: ri...@ieee.org > > > > > > --- > This message is from the IEEE EMC Society Product Safety > Technical Committee emc-pstc discussion list. > > To cancel your subscription, send mail to: > majord...@ieee.org > with the single line: > unsubscribe emc-pstc > > For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > > For policy questions, send mail to: > Richard Nute: ri...@ieee.org > > --- > This message is from the IEEE EMC Society Product Safety > Technical Committee emc-pstc discussion list. > > To cancel your subscription, send mail to: > majord...@ieee.org > with the single line: > unsubscribe emc-pstc > > For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > > For policy questions, send mail to: > Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
Re: Copper Thieving
How does electrically floating copper interact with electromagnetic fields? David - Original Message - From: "Roman, Dan" To: "'Stephen Phillips'" ; ; Sent: Thursday, January 18, 2001 12:32 PM Subject: RE: Copper Thieving Remember that you can also cause yourself all kinds of EMI headaches if you have electrically floating copper areas or patterns on the board. It has lead to many arguments with the CAD department over the years! -- Dan -Original Message- From: Stephen Phillips [mailto:step...@cisco.com] Sent: Thursday, January 18, 2001 9:33 AM To: rehel...@mmm.com; emc-p...@majordomo.ieee.org Subject: Re: Copper Thieving Copper applied to the outer PCB layers, in a pattern, to even out the copper placement so the board is less likely to warp through soldering. Obviously, it would be put where there is not etch, large open areas, to somewhat offset where you might have planes of copper elsewhere on the layer. Beware of Creepage and Clearance violations (if applicable). Some PCB fab. houses have carte-blanche to add this, we don't allow that - and control it as part of our own PCB CAD instead. Best regards, Stephen At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: > >Please excuse my lack of knowledge..what is "copper >thieving"? > > >--- >This message is from the IEEE EMC Society Product Safety >Technical Committee emc-pstc discussion list. > >To cancel your subscription, send mail to: > majord...@ieee.org >with the single line: > unsubscribe emc-pstc > >For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > >For policy questions, send mail to: > Richard Nute: ri...@ieee.org > > --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
Re: Copper Thieving
Hi! Dan: I understand that EMC guys don't want to see the floating coppers on the PCB because of ESD and/or emission problem. But on the manufacture side, they claim that if you don't do copper balance on the layer where you have large area without copper, you will sure have over-eching in that area, plus warpage of the board. The question is, where do we find a compromised solution that makes everyone happy ? Regards Perry "Roman, Dan" wrote: > Remember that you can also cause yourself all kinds of EMI headaches if you > have electrically floating copper areas or patterns on the board. It has > lead to many arguments with the CAD department over the years! > > -- Dan > > -Original Message- > From: Stephen Phillips [mailto:step...@cisco.com] > Sent: Thursday, January 18, 2001 9:33 AM > To: rehel...@mmm.com; emc-p...@majordomo.ieee.org > Subject: Re: Copper Thieving > > Copper applied to the outer PCB layers, in a pattern, > to even out the copper placement so the board is less > likely to warp through soldering. Obviously, it would > be put where there is not etch, large open areas, to > somewhat offset where you might have planes of > copper elsewhere on the layer. > > Beware of Creepage and Clearance violations > (if applicable). Some PCB fab. houses have > carte-blanche to add this, we don't allow that - > and control it as part of our own PCB CAD > instead. > > Best regards, > Stephen > > At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: > > > >Please excuse my lack of knowledge..what is "copper > >thieving"? > > > > > >--- > >This message is from the IEEE EMC Society Product Safety > >Technical Committee emc-pstc discussion list. > > > >To cancel your subscription, send mail to: > > majord...@ieee.org > >with the single line: > > unsubscribe emc-pstc > > > >For help, send mail to the list administrators: > > Jim Bacher: jim_bac...@mail.monarch.com > > Michael Garretson:pstc_ad...@garretson.org > > > >For policy questions, send mail to: > > Richard Nute: ri...@ieee.org > > > > > > --- > This message is from the IEEE EMC Society Product Safety > Technical Committee emc-pstc discussion list. > > To cancel your subscription, send mail to: > majord...@ieee.org > with the single line: > unsubscribe emc-pstc > > For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > > For policy questions, send mail to: > Richard Nute: ri...@ieee.org > > --- > This message is from the IEEE EMC Society Product Safety > Technical Committee emc-pstc discussion list. > > To cancel your subscription, send mail to: > majord...@ieee.org > with the single line: > unsubscribe emc-pstc > > For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > > For policy questions, send mail to: > Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Copper Thieving
I agree - what is it? I tried looking it up in some of my PC design books at the start of this one and came up blank. Does it go by another name? -Original Message- From: rehel...@mmm.com [mailto:rehel...@mmm.com] Sent: Thursday, January 18, 2001 8:15 AM To: emc-p...@majordomo.ieee.org Subject: Copper Thieving Please excuse my lack of knowledge..what is "copper thieving"? --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Copper Thieving
I make them ground it with appropriately spaced vias. -Original Message- From: Perry Qu [mailto:perry...@alcatel.com] Sent: Thursday, January 18, 2001 4:19 PM To: Roman, Dan Cc: 'Stephen Phillips'; rehel...@mmm.com; emc-p...@majordomo.ieee.org; DORIN OPREA Subject: Re: Copper Thieving Hi! Dan: I understand that EMC guys don't want to see the floating coppers on the PCB because of ESD and/or emission problem. But on the manufacture side, they claim that if you don't do copper balance on the layer where you have large area without copper, you will sure have over-eching in that area, plus warpage of the board. The question is, where do we find a compromised solution that makes everyone happy ? Regards Perry --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Copper Thieving
Dan, Would you please point out what kinds of EMI headaches this would cause? Thanks, Abbas At 12:32 PM 1/18/01 -0500, Roman, Dan wrote: > >Remember that you can also cause yourself all kinds of EMI headaches if you >have electrically floating copper areas or patterns on the board. It has >lead to many arguments with the CAD department over the years! > >-- Dan > >-Original Message- >From: Stephen Phillips [mailto:step...@cisco.com] >Sent: Thursday, January 18, 2001 9:33 AM >To: rehel...@mmm.com; emc-p...@majordomo.ieee.org >Subject: Re: Copper Thieving > > > > Copper applied to the outer PCB layers, in a pattern, >to even out the copper placement so the board is less >likely to warp through soldering. Obviously, it would >be put where there is not etch, large open areas, to >somewhat offset where you might have planes of >copper elsewhere on the layer. > > Beware of Creepage and Clearance violations >(if applicable). Some PCB fab. houses have >carte-blanche to add this, we don't allow that - >and control it as part of our own PCB CAD >instead. > > Best regards, > Stephen > >At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: >> >>Please excuse my lack of knowledge..what is "copper >>thieving"? >> >> >>--- >>This message is from the IEEE EMC Society Product Safety >>Technical Committee emc-pstc discussion list. >> >>To cancel your subscription, send mail to: >> majord...@ieee.org >>with the single line: >> unsubscribe emc-pstc >> >>For help, send mail to the list administrators: >> Jim Bacher: jim_bac...@mail.monarch.com >> Michael Garretson:pstc_ad...@garretson.org >> >>For policy questions, send mail to: >> Richard Nute: ri...@ieee.org >> >> > > > >--- >This message is from the IEEE EMC Society Product Safety >Technical Committee emc-pstc discussion list. > >To cancel your subscription, send mail to: > majord...@ieee.org >with the single line: > unsubscribe emc-pstc > >For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > >For policy questions, send mail to: > Richard Nute: ri...@ieee.org > > >--- >This message is from the IEEE EMC Society Product Safety >Technical Committee emc-pstc discussion list. > >To cancel your subscription, send mail to: > majord...@ieee.org >with the single line: > unsubscribe emc-pstc > >For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > >For policy questions, send mail to: > Richard Nute: ri...@ieee.org >
RE: Copper Thieving
Remember that you can also cause yourself all kinds of EMI headaches if you have electrically floating copper areas or patterns on the board. It has lead to many arguments with the CAD department over the years! -- Dan -Original Message- From: Stephen Phillips [mailto:step...@cisco.com] Sent: Thursday, January 18, 2001 9:33 AM To: rehel...@mmm.com; emc-p...@majordomo.ieee.org Subject: Re: Copper Thieving Copper applied to the outer PCB layers, in a pattern, to even out the copper placement so the board is less likely to warp through soldering. Obviously, it would be put where there is not etch, large open areas, to somewhat offset where you might have planes of copper elsewhere on the layer. Beware of Creepage and Clearance violations (if applicable). Some PCB fab. houses have carte-blanche to add this, we don't allow that - and control it as part of our own PCB CAD instead. Best regards, Stephen At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: > >Please excuse my lack of knowledge..what is "copper >thieving"? > > >--- >This message is from the IEEE EMC Society Product Safety >Technical Committee emc-pstc discussion list. > >To cancel your subscription, send mail to: > majord...@ieee.org >with the single line: > unsubscribe emc-pstc > >For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > >For policy questions, send mail to: > Richard Nute: ri...@ieee.org > > --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
RE: Copper Thieving
.. and to maintain even etching and plating distribution over the whole board and thus avoid problems during PCB manufacture -Original Message- From: Stephen Phillips [mailto:step...@cisco.com] Sent: 18 January 2001 14:33 To: rehel...@mmm.com; emc-p...@majordomo.ieee.org Subject: Re: Copper Thieving Copper applied to the outer PCB layers, in a pattern, to even out the copper placement so the board is less likely to warp through soldering. Obviously, it would be put where there is not etch, large open areas, to somewhat offset where you might have planes of copper elsewhere on the layer. Beware of Creepage and Clearance violations (if applicable). Some PCB fab. houses have carte-blanche to add this, we don't allow that - and control it as part of our own PCB CAD instead. Best regards, Stephen At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: > >Please excuse my lack of knowledge..what is "copper >thieving"? > > >--- >This message is from the IEEE EMC Society Product Safety >Technical Committee emc-pstc discussion list. > >To cancel your subscription, send mail to: > majord...@ieee.org >with the single line: > unsubscribe emc-pstc > >For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > >For policy questions, send mail to: > Richard Nute: ri...@ieee.org > > --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
Re: Copper Thieving
Copper applied to the outer PCB layers, in a pattern, to even out the copper placement so the board is less likely to warp through soldering. Obviously, it would be put where there is not etch, large open areas, to somewhat offset where you might have planes of copper elsewhere on the layer. Beware of Creepage and Clearance violations (if applicable). Some PCB fab. houses have carte-blanche to add this, we don't allow that - and control it as part of our own PCB CAD instead. Best regards, Stephen At 09:15 AM 1/18/01 Thursday , rehel...@mmm.com wrote: > >Please excuse my lack of knowledge..what is "copper >thieving"? > > >--- >This message is from the IEEE EMC Society Product Safety >Technical Committee emc-pstc discussion list. > >To cancel your subscription, send mail to: > majord...@ieee.org >with the single line: > unsubscribe emc-pstc > >For help, send mail to the list administrators: > Jim Bacher: jim_bac...@mail.monarch.com > Michael Garretson:pstc_ad...@garretson.org > >For policy questions, send mail to: > Richard Nute: ri...@ieee.org > > --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org
