gEDA-user: gcshem to magic
I have some analog circuits in gschem that I want to layout in the magic vlsi tool. Is there a good way to go from gschem to magic? For example it would be nice to generate transistors automatically (give w, l, and m) and then add port names for S,D,G,B. Likewise it would be nice to produce a magic compatible netlist, so the interactive router can then be used once the cells are placed. Please let me know if there is a recommended way of doing this? If you think there is a better way to tackle this problem please let me know. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gcshem to magic
OK So I am trying to generate a netlist for magic (I know this is not quite gEDA), but I can't find any documentation on magic's netlist format. Does anyone know what the format is. It looks like it a net follows this format [instance]/[port] [instance]/[port] [instance]/[port] But how do I create a new net. Initially I thought it was a blank line, but the router appears to think these are all the same net. Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sun, August 1, 2010 7:20:28 PM Subject: Re: gEDA-user: gcshem to magic On Aug 1, 2010, at 12:19 PM, Oliver King-Smith wrote: I have some analog circuits in gschem that I want to layout in the magic vlsi tool. Is there a good way to go from gschem to magic? For example it would be nice to generate transistors automatically (give w, l, and m) and then add port names for S,D,G,B. Likewise it would be nice to produce a magic compatible netlist, so the interactive router can then be used once the cells are placed. Please let me know if there is a recommended way of doing this? If you think there is a better way to tackle this problem please let me know. gnetlist is the tool for exporting netlists to other tools, using back ends for the specific export problem. It appears nobody has written a back end for magic. Back ends are not terribly difficult to write. John Doty Noqsi Aerospace, Ltd. [1]http://www.noqsi.com/ [2]...@noqsi.com ___ geda-user mailing list [3]geda-u...@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://www.noqsi.com/ 2. mailto:j...@noqsi.com 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gcshem to magic
Thanks David, I have come to the conclusion that was how it worked. The netlist tool shows the correct netlist when I set up the file this way, but the router is merging some nets together for some reason. I sent an example to Tim so may be he can give me some guidance. Is there a tool that is preferred with gEDA? Oliver __ From: David W. Schultz david.schu...@earthlink.net To: geda-user@moria.seul.org Sent: Mon, August 2, 2010 4:13:58 PM Subject: Re: gEDA-user: gcshem to magic On 08/02/2010 11:47 AM, Oliver King-Smith wrote: OK So I am trying to generate a netlist for magic (I know this is not quite gEDA), but I can't find any documentation on magic's netlist format. Does anyone know what the format is. It looks like it a net follows this format [instance]/[port] [instance]/[port] [instance]/[port] But how do I create a new net. Initially I thought it was a blank line, but the router appears to think these are all the same net. Oliver It has been a long time since I used Magic but I dug up my hardcopy of the 1990 documentation. For details on the netlist format it refers to the manual page for net(5). (aka man 5 net) Which says that blank lines separate nets. -- David W. Schultz [1]http://home.earthlink.net/~david.schultz Life without stock is barely worth living... Anthony Bourdain ___ geda-user mailing list [2]geda-u...@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://home.earthlink.net/%7Edavid.schultz 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: edge4way rules in magic
I am trying to get some rules programmed into my magic tech file. In particular I want to require metal to encompass the vias by 2um if the metal is wide metal (10um x 10um). Otherwise I only need to encompass the vias by 0.8um. Does anyone know how to specify this in the drc section? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: edge4way rules in magic
What do folks use for ASIC layout here? I do have gnetlist producing the .mag and .net files for magic. I can't say I am wild about using guile. It would be nice to have the option to use ruby or some other scripting language. Oliver __ From: John Griessen j...@ecosensory.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, August 14, 2010 10:15:38 AM Subject: Re: gEDA-user: edge4way rules in magic Oliver King-Smith wrote: I am trying to get some rules programmed into my magic tech file. In particular I want to require metal to encompass the vias by 2um if the metal is wide metal (10um x 10um). Otherwise I only need to encompass the vias by 0.8um. Does anyone know how to specify this in the drc section? Oliver This sounds specific to magic. We might be able to help with netlist output for magic, but most on this list don't have a running copy of magic to refer to. I don't think the two or so chip designers here use magic. John ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Multiple pages
I am not sure what is the best way to handle multi-page schematics with gschem. I have schematic on one page where I have connected the power to VCC and GND symbols. I have connected the non power inputs and outputs to Input/Output Generic symbols. So imagine I want to just hook this page up to some spice primitives to test out the circuit. What is the best way of doing this. Should I convert this page to a symbol, or should I just have another page refer to it? How do people handle this with gschem? Whats the easiest way to reuse this page over the long term? What is the fastest way to use it in the short term? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Sub schematic power rails
I may be opening up a can of worms here, but I think it makes sense to have standard symbols for power rails in the sub schematics. Admittedly this is not hard to create within gschem. I know there has been some discussion about not having the power pins on the schematic for symbols, but I would argue that for larger more complex designs this is a bad idea. Here are my reasons: 1) It is useful for seeing the decoupling caps on various components and checking they have been done to spec. 2) Often there are multiple power rails in the schematic, and it is important to see which components are using which power rails both for load and isolation. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Multiple pages
I am using ltspice as well __ From: kai-martin knaak k...@familieknaak.de To: geda-u...@seul.org Sent: Tue, August 17, 2010 4:48:59 PM Subject: Re: gEDA-user: Multiple pages Oliver King-Smith wrote: I have schematic on one page where I have connected the power to VCC and GND symbols. I have connected the non power inputs and outputs to Input/Output Generic symbols. So imagine I want to just hook this page up to some spice primitives to test out the circuit. What is the best way of doing this. Should I convert this page to a symbol, or should I just have another page refer to it? Don't know about spice, since I tend to do simulation with ltspice. I'll tell you how I deliver power nets on my multi page schematics anyway :-) How do people handle this with gschem? Whats the easiest way to reuse this page over the long term? What is the fastest way to use it in the short term? I explicitly deliver power nets through subsheet symbols. I put attach them to the bottom of the subsheet symbol. So thesy are visually separated from the input and output signals. See my subsheet symbol template on [1]gedasymbols.org [2]http://www.gedasymbols.org/user/kai_martin_knaak/symbols/titleblock/ subsheet.sym For a new subsheet I just rename pins and remove the rest. ---)kaimartin(--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: [3]http://pgp.mit.edu:11371/pks/lookup?op=getsearch=0x6C0B9F53 ___ geda-user mailing list [4]geda-u...@moria.seul.org [5]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://gedasymbols.org/ 2. http://www.gedasymbols.org/user/kai_martin_knaak/symbols/titleblock/subsheet.sym 3. http://pgp.mit.edu:11371/pks/lookup?op=getsearch=0x6C0B9F53 4. mailto:geda-user@moria.seul.org 5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Multiple pages
Al, I am under the probably incorrect impression that LtSpice is actually a better than ngspice and gnucap. What do you think the benefits are gnucap vs Ltspice? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: the uber-scope (was: wishful UI)
The free FPGA compilers won't help much for an ASIC because they use the internal structure of the FPGA when compiling VHDL or Verilog. This doesn't exist on the ASIC. Oliver __ From: Peter Clifton pc...@cam.ac.uk To: gEDA user mailing list geda-user@moria.seul.org Sent: Fri, August 20, 2010 6:39:56 AM Subject: Re: gEDA-user: the uber-scope (was: wishful UI) On Fri, 2010-08-20 at 12:37 +0200, Armin Faltl wrote: VHDL - thats specs for a silicon compiler, right? - so you are using ASICs in hobby-project? VHDL / Verilog is also used for developing with FPGAs. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gnetlist quitting after execl call
I am extending gnetlist and I dislike scheme. To work around this I wrote a little program in C++ to do the heavy lifting and I am trying to call it from my scheme extension to gnetlist. I wrote the following function in scheme: (define magic:write_nmos_fet (lambda (w l m) (display (string-append in write_nmos_fet (number-string w) \n) ) (execl /sw/share/gEDA/scheme/subfunction --m= (number-string m) --w= (number-string w) --l= (number-string l) --type=nmos ) (display Finished C call\n ) )) This works and calls my C++ program (called subfunction right now). The C++ program runs without problems and produces the expected output. My problem is nothing seems to run in my scheme program after calling subfunction. For example the line: (display Finished C call\n ) does not run. Nothing else appears to run after this. However there are no error messages. Does anyone have any suggestions as to why this might be? Is there a better way to be calling external programs from gnetlist? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gnetlist quitting after execl call
John, Ah much improved. I tried using system* but now I don't seem to be getting my command line arguments. For example both (system* /sw/share/gEDA/scheme/subfunction (string-append --m= (number-string m) --w= (number-string w) --l= (number-string l) --type=nmos ) ) and (system* /sw/share/gEDA/scheme/subfunction --m= (number-string m) --w= (number-string w) --l= (number-string l) --type=nmos ) run my C++ program and return with guile continuing, but my program sees no signs of the command line arguments. The following code barfs out (system* (string-append /sw/share/gEDA/scheme/subfunction --m= (number-string m) --w= (number-string w) --l= (number-string l) --type=nmos ) ) with 1: 0* [magic-new small_amplifier] In /sw/share/gEDA/scheme/gnet-magic-new.scm: 816: 1 [magic:write-top-cell small_amplifier] 799: 2 (let* ((port (open-output-file #))) (display magic port) ...) 802: 3* [magic:components #output: small_amplifier.mag 12 (OUT VSS VCC ...)] 781: 4 (if (not #) (begin # #)) ... 782: 5 (begin (let # # # ...) (magic:components port #)) 783: 6* (let ((pattern #) (package #)) (display use port) ...) 788: 7* [magic:write-component M3] 762: 8 (let* ((device #)) (cond (# #) (# #) (else #))) ... 654: 9 [system* /sw/share/gEDA/scheme/subfunction --m=1 --w=30 --l=5 --type=pmos] Any suggestions? Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Mon, September 6, 2010 12:22:31 PM Subject: Re: gEDA-user: gnetlist quitting after execl call On Sep 6, 2010, at 1:08 PM, Oliver King-Smith wrote: I am extending gnetlist and I dislike scheme. To work around this I wrote a little program in C++ to do the heavy lifting and I am trying to call it from my scheme extension to gnetlist. I wrote the following function in scheme: (define magic:write_nmos_fet (lambda (w l m) (display (string-append in write_nmos_fet (number-string w) \n) ) (execl /sw/share/gEDA/scheme/subfunction --m= (number-string There's your problem: (execl) is not like a call. It replaces the current process, so it should never return unless something goes wrong. Like execl() in libc. You probably want (system) or (system*). m) --w= (number-string w) --l= (number-string l) --type=nmos ) (display Finished C call\n ) )) This works and calls my C++ program (called subfunction right now). The C++ program runs without problems and produces the expected output. My problem is nothing seems to run in my scheme program after calling subfunction. For example the line: (display Finished C call\n ) does not run. Nothing else appears to run after this. However there are no error messages. Does anyone have any suggestions as to why this might be? Is there a better way to be calling external programs from gnetlist? Oliver ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user John Doty Noqsi Aerospace, Ltd. [3]http://www.noqsi.com/ [4]...@noqsi.com ___ geda-user mailing list [5]geda-u...@moria.seul.org [6]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 3. http://www.noqsi.com/ 4. mailto:j...@noqsi.com 5. mailto:geda-user@moria.seul.org 6. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gnetlist quitting after execl call
Brilliant! That works Thanks, Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Mon, September 6, 2010 2:09:26 PM Subject: Re: gEDA-user: gnetlist quitting after execl call On Sep 6, 2010, at 2:49 PM, Oliver King-Smith wrote: John, Ah much improved. I tried using system* but now I don't seem to be getting my command line arguments. For example both (system* /sw/share/gEDA/scheme/subfunction (string-append --m= (number-string m) --w= (number-string w) --l= (number-string l) --type=nmos ) ) and (system* /sw/share/gEDA/scheme/subfunction --m= (number-string m) --w= (number-string w) --l= (number-string l) --type=nmos ) run my C++ program and return with guile continuing, but my program sees no signs of the command line arguments. The following code barfs out (system* (string-append /sw/share/gEDA/scheme/subfunction --m= (number-string m) --w= (number-string w) --l= (number-string l) --type=nmos ) ) with 1: 0* [magic-new small_amplifier] In /sw/share/gEDA/scheme/gnet-magic-new.scm: 816: 1 [magic:write-top-cell small_amplifier] 799: 2 (let* ((port (open-output-file #))) (display magic port) ...) 802: 3* [magic:components #output: small_amplifier.mag 12 (OUT VSS VCC ...)] 781: 4 (if (not #) (begin # #)) ... 782: 5 (begin (let # # # ...) (magic:components port #)) 783: 6* (let ((pattern #) (package #)) (display use port) ...) 788: 7* [magic:write-component M3] 762: 8 (let* ((device #)) (cond (# #) (# #) (else #))) ... 654: 9 [system* /sw/share/gEDA/scheme/subfunction --m=1 --w=30 --l=5 --type=pmos] Any suggestions? Use (system) if you want to use a single string for the whole command, or use a single string for each argument with (system*). Oliver __ From: John Doty [1]...@noqsi.com To: gEDA user mailing list [2]geda-u...@moria.seul.org Sent: Mon, September 6, 2010 12:22:31 PM Subject: Re: gEDA-user: gnetlist quitting after execl call On Sep 6, 2010, at 1:08 PM, Oliver King-Smith wrote: I am extending gnetlist and I dislike scheme. To work around this I wrote a little program in C++ to do the heavy lifting and I am trying to call it from my scheme extension to gnetlist. I wrote the following function in scheme: (define magic:write_nmos_fet (lambda (w l m) (display (string-append in write_nmos_fet (number-string w) \n) ) (execl /sw/share/gEDA/scheme/subfunction --m= (number-string There's your problem: (execl) is not like a call. It replaces the current process, so it should never return unless something goes wrong. Like execl() in libc. You probably want (system) or (system*). m) --w= (number-string w) --l= (number-string l) --type=nmos ) (display Finished C call\n ) )) This works and calls my C++ program (called subfunction right now). The C++ program runs without problems and produces the expected output. My problem is nothing seems to run in my scheme program after calling subfunction. For example the line: (display Finished C call\n ) does not run. Nothing else appears to run after this. However there are no error messages. Does anyone have any suggestions as to why this might be? Is there a better way to be calling external programs from gnetlist? Oliver ___ geda-user mailing list [1][3]geda-u...@moria.seul.org [2][4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user John Doty Noqsi Aerospace, Ltd. [3][5]http://www.noqsi.com/ [4][6]...@noqsi.com ___ geda-user mailing list [5][7]geda-u...@moria.seul.org [6][8]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:[9]geda-u...@moria.seul.org 2. [10]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 3. [11]http://www.noqsi.com/ 4. mailto:[12]...@noqsi.com 5. mailto:[13]geda-u...@moria.seul.org 6. [14]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list [15]geda-u...@moria.seul.org [16]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user John
gEDA-user: How do write an autorouter?
So I want to auto route a design for my ASIC, and magic is being a little flakey (It seems it connects some nets together that don't belong and fail to connect nets that do belong). I was wondering if anyone has any references on how auto routers get written. I know some stuff about my design. For example I want the router to avoid certain regions (rectangles that represent cells). I know the net list, and the connection points on the edge of cells. If this is 1000's of lines of code, well that is not practical in my time frame. But if folks have designed these things and the principle is straight forward, I should at least consider writing one. So what is the principle behind the routers and how hard have they been to implemented in the past? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: CDL Format
Can gschem convert schematics to cdl format? I am not sure which format that is, but a vendor is asking for it. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: CDL Format
John, I have not found a precise definition of the standard. Did you find one? Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Wed, September 15, 2010 8:44:32 PM Subject: Re: gEDA-user: CDL Format On Sep 15, 2010, at 4:51 PM, Oliver King-Smith wrote: Can gschem convert schematics to cdl format? I am not sure which format that is, but a vendor is asking for it. CDL appears to be a SPICE-like netlist format, so with a little Guile programming you should be able to generate it with gnetlist. Probably, a simple modification of one of the SPICE back ends could do the job. Of course, you'd need to obtain a specification... John Doty Noqsi Aerospace, Ltd. [1]http://www.noqsi.com/ [2]...@noqsi.com ___ geda-user mailing list [3]geda-u...@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://www.noqsi.com/ 2. mailto:j...@noqsi.com 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: CDL Format
I think this is a different unrelated file format. __ From: Thomas D. Dean tomd...@speakeasy.org To: gEDA user mailing list geda-user@moria.seul.org Sent: Thu, September 16, 2010 7:49:25 AM Subject: Re: gEDA-user: CDL Format On Thu, 2010-09-16 at 08:22 -0600, John Doty wrote: Does this help? [1]http://cyclicity-cdl.sourceforge.net/documentation/cdl/language_gram mar.php tomdean ___ geda-user mailing list [2]geda-u...@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://cyclicity-cdl.sourceforge.net/documentation/cdl/language_grammar.php 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Exporting symbols in gschem
John, I am not sure I am understanding this correctly. I tried running guile (hierarchy-traversal enabled) #t guile packages (isfet_out op_bias pFET_plate XRham1 XMham2 XMham1 XMham6 XMham4 XMham3 XMham5 XMham10 XMham8 XMham7 XMham9 VSS bias nwell VCC XMhampISFET Xamp_ham2/XMamp17 Xamp_ham2/XMamp18 Xamp_ham2/XMamp16 Xamp_ham2/XMamp15 Xamp_ham2/XMamp10 Xamp_ham2/XMamp8 Xamp_ham2/XMamp7 Xamp_ham2/XMamp9 Xamp_ham2/XMamp6 Xamp_ham2/XMamp5 Xamp_ham2/XMamp14 Xamp_ham2/XMamp12 Xamp_ham2/XMamp4 Xamp_ham2/XMamp2 Xamp_ham2/XMamp11 Xamp_ham2/XMamp13 Xamp_ham2/XMamp1 Xamp_ham2/XMamp3 Xamp_ham2/C1 Xamp_ham1/XMamp17 Xamp_ham1/XMamp18 Xamp_ham1/XMamp16 Xamp_ham1/XMamp15 Xamp_ham1/XMamp10 Xamp_ham1/XMamp8 Xamp_ham1/XMamp7 Xamp_ham1/XMamp9 Xamp_ham1/XMamp6 Xamp_ham1/XMamp5 Xamp_ham1/XMamp14 Xamp_ham1/XMamp12 Xamp_ham1/XMamp4 Xamp_ham1/XMamp2 Xamp_ham1/XMamp11 Xamp_ham1/XMamp13 Xamp_ham1/XMamp1 Xamp_ham1/XMamp3 Xamp_ham1/C1) guile (hierarchy-traversal disabled) #t guile packages (isfet_out op_bias pFET_plate XRham1 XMham2 XMham1 XMham6 XMham4 XMham3 XMham5 XMham10 XMham8 XMham7 XMham9 VSS bias nwell VCC XMhampISFET Xamp_ham2/XMamp17 Xamp_ham2/XMamp18 Xamp_ham2/XMamp16 Xamp_ham2/XMamp15 Xamp_ham2/XMamp10 Xamp_ham2/XMamp8 Xamp_ham2/XMamp7 Xamp_ham2/XMamp9 Xamp_ham2/XMamp6 Xamp_ham2/XMamp5 Xamp_ham2/XMamp14 Xamp_ham2/XMamp12 Xamp_ham2/XMamp4 Xamp_ham2/XMamp2 Xamp_ham2/XMamp11 Xamp_ham2/XMamp13 Xamp_ham2/XMamp1 Xamp_ham2/XMamp3 Xamp_ham2/C1 Xamp_ham1/XMamp17 Xamp_ham1/XMamp18 Xamp_ham1/XMamp16 Xamp_ham1/XMamp15 Xamp_ham1/XMamp10 Xamp_ham1/XMamp8 Xamp_ham1/XMamp7 Xamp_ham1/XMamp9 Xamp_ham1/XMamp6 Xamp_ham1/XMamp5 Xamp_ham1/XMamp14 Xamp_ham1/XMamp12 Xamp_ham1/XMamp4 Xamp_ham1/XMamp2 Xamp_ham1/XMamp11 Xamp_ham1/XMamp13 Xamp_ham1/XMamp1 Xamp_ham1/XMamp3 Xamp_ham1/C1) guile They look the same to me. Do I need to have the hierarchy-traversal property set before I run gnetlist? Or is packages the wrong way of getting the hierarchy? Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Tue, October 5, 2010 12:09:05 PM Subject: Re: gEDA-user: Exporting symbols in gschem On Oct 5, 2010, at 12:44 PM, Oliver King-Smith wrote: I have defined a symbol in gschem called small_amplifier.sym which has the following properties: source=small_amplifier.sch device=MAGIC_PART magic_cell_name=amp.mag Now when I run gnetlist I want to do a few things. When I am building my output file and I come across this symbol, I want to grab a reference to amp.mag and write it out into my ASIC file. Unfortunately when I looks at what I get when I run (display packages) in my scheme file I don't see the symbol. All I see is the components inside the symbol. I don't actually see the symbol on the list. Is there a way to see that symbol? The other thing I want to do is have the option of traversing through the objects inside the symbol (which is what happens now) so I can build a netlist for the entire design. However for building my layout file, I want to stop descending down the objects as I have already built the ASIC meta object (amp.mag) that I want to use. Do folks have any suggestions on how I can do this? See [1]http://archives.seul.org/geda/user/Nov-2008/msg00489.html John Doty Noqsi Aerospace, Ltd. [2]http://www.noqsi.com/ [3]...@noqsi.com ___ geda-user mailing list [4]geda-u...@moria.seul.org [5]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://archives.seul.org/geda/user/Nov-2008/msg00489.html 2. http://www.noqsi.com/ 3. mailto:j...@noqsi.com 4. mailto:geda-user@moria.seul.org 5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem guile scripting
Maciej, There is a small development script that allows you to drop into a guile shell on the gEDA website. The shell auto completes so you can see a list of all available commands. You can also try things live. I found this very helpful when I was starting out with gnetlist. Here is the development script in case you can't find it. (use-modules (ice-9 readline)) (activate-readline) (define (devel output-filename) (scm-style-repl) Oliver __ From: Maciej Pijanka maciej.pija...@gmail.com To: geda-u...@seul.org Sent: Sat, October 30, 2010 4:50:43 PM Subject: gEDA-user: gschem guile scripting Hello I wanted to traverse all symbols placed on current sheet from some script preferably invoked via ft, but so far found that even (add-menu) which worked before for example from pcb.scm, seems to not work on gEDA/gschem version 1.6.1.20100214 any hints where to look? i tried some simple scheme functions like adding (file-new) to my test.scm and this works fine, but i didn't found any routine allowing to get list of items neither some others which seem to require argument aren't working or i am not able to find right arguments for them. best regards Maciej -- Maciej Pijanka I don't fear computers, I fear lack of them -- Isaac Asimov ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Different slot types within on symbol
Is it possible to create a symbol with two types of slots. For example, in a 4 OR gates logic chip, one slot type would be the OR gate, while the other slot type would be the power connections. I see people typical wire the pins that are not part of a slot to nets, but that seems to hide them. I prefer to explicitly see the power on my chips so I can check the decoupling strategy. If you have any suggestions or examples please let me know. Thanks in advance Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Different slot types within on symbol
Peter, Different symbols for each slot is no problem. I will try that tomorrow. I was messing around with the slot=1 slot=2 trying to make things work and getting no where. Does the slot keyword do anything other than define the beginning of a slot? Oliver __ From: Peter Clifton pc...@cam.ac.uk To: gEDA user mailing list geda-user@moria.seul.org Sent: Sun, November 21, 2010 6:30:27 PM Subject: Re: gEDA-user: Different slot types within on symbol On Sun, 2010-11-21 at 16:52 -0800, Oliver King-Smith wrote: Is it possible to create a symbol with two types of slots. For example, in a 4 OR gates logic chip, one slot type would be the OR gate, while the other slot type would be the power connections. I see people typical wire the pins that are not part of a slot to nets, but that seems to hide them. I prefer to explicitly see the power on my chips so I can check the decoupling strategy. If you have any suggestions or examples please let me know. Thanks in advance Oliver Not exactly, but you can have multiple symbols all instantiated with the same refdes= to build up your part. You can have one symbol for the OR gate parts, another for the power. See for example 74power-1.sym in the library. That is a slightly bad example though, as all the 74* symbols in the library also have hidden net= attributes which wire up their power pins. The idea is solid though. Best regards, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: reference on good design practices for footprints
I am coming from the Eagle world, and I am trying the gEDA world for the first time. In Eagle you don't need to think solder masks vs pad sizes, or other such details. They were pretty much hardwired in the program. Is there a good tutorial / reference documentation for conservative guidelines for these items. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Clearance in fiducials blocking solder paste
I am trying to place down some fiducials with a 40mil round copper center with 88mills of clearance (from the center of the fiducial) and 80 mils of solder mask. I am doing it by using the following command inside my footprint file. Pad [-13188 -15000 -13188 -15000 4000 4800 8000 f1 ] Now when I run the autorouter it only respects the clearance I give for the net type, and not for the fiducials. The other problem is when I generate the gerbers for my file, I get solder paste on my fiducials which is not what I want. Is there a good way of doing this in gEDA? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Clearance in fiducials blocking solder paste
Is there a way to protect the fiducial? For example I could attempt to ring it with copper. Oliver __ From: DJ Delorie d...@delorie.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, December 4, 2010 11:29:28 PM Subject: Re: gEDA-user: Clearance in fiducials blocking solder paste Two notes: 1. Clearance is clearance in polygons, not the line/space rule. 2. Add the nopaste flag to the pad. ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Clearance in fiducials blocking solder paste
So I tried adding an Arc statement to my footprint, but I am getting a syntax error on import. Here is a snippet of the pcb file, that was generated from my footprint with an Arc inside it. Element[ soic-08-d.fp U? unknown 0 0 0 0 0 100 ] ( Pad [-12204 -15000 -12204 -15000 4000 8000 12800 f1 ] Arc [-13188 -15000 12800 12800 1000 1000 0 180 ] Pad [ 12204 15000 12204 15000 4000 8000 12800 f2 ] I am guessing Elements are not allowed Arcs. Is there another way to place an arc into a footprint? Oliver __ From: DJ Delorie d...@delorie.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, December 4, 2010 11:53:10 PM Subject: Re: gEDA-user: Clearance in fiducials blocking solder paste Ringing it with copper certainly would work. PCB doesn't have a generic keep out feature yet. ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Clearance in fiducials blocking solder paste
The problem with this approach is exactly what started off my quest for the Arc. Namely the autorouter is routing through the keepout space on the fiducials. Oliver __ From: John Luciani jluci...@gmail.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sun, December 5, 2010 9:54:00 AM Subject: Re: gEDA-user: Clearance in fiducials blocking solder paste Arcs aren't allowed in footprints. You can overlay rectangular pads along an arc if you need to. The footprint I use for fiducials is below. The request from the assembly house was 1mm pad with 3mm clearance. The board that assembled my last board did not mention any problems (and the board worked ;) (* jcl *) Element[0x0 FIDUCIAL 0 0 0 0 0 100 0x0] ( Pad[0 0 0 0 3937 7874 11811 1 0x0800] Pad[0 0 0 0 3937 7874 11811 1 0x0880] ) ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Seeing new symbols without restarting
I am sorry if this is a retarded question, but is there a way for gschem to see new created symbols (placed in a local symbol directory) without restarting? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Seeing new symbols without restarting
Brilliant! Just what I needed Oliver __ From: DJ Delorie d...@delorie.com To: gEDA user mailing list geda-user@moria.seul.org Cc: geda-user@moria.seul.org Sent: Mon, December 27, 2010 11:30:41 AM Subject: Re: gEDA-user: Seeing new symbols without restarting In the symbol chooser dialog, there's a arrow-circle icon that means refresh symbol lists off disk. ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Seeing pin numbers in PCB
Being lazy I am importing footprints other folks kindly made for pcb. Unfortunately, I am not very trusting, so I want to check they are correct. I can measure the size of stuff using gerbv (there may be a better way to do this in pcb), but I can't tell if the right pin numbers have been assigned very easily. Is there a way to see this in PCB? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Seeing pin numbers in PCB
Thank you for the info. Both the Ctrl-M idea from Levente and you suggestion for pin labels worked well for me. Oliver __ From: ge...@igor2.repo.hu ge...@igor2.repo.hu To: gEDA user mailing list geda-user@moria.seul.org Sent: Thu, December 30, 2010 12:27:28 AM Subject: Re: gEDA-user: Seeing pin numbers in PCB On Wed, Dec 29, 2010 at 11:48:00PM -0800, Oliver King-Smith wrote: Being lazy I am importing footprints other folks kindly made for pcb. Unfortunately, I am not very trusting, so I want to check they are correct. I can measure the size of stuff using gerbv (there may be a better way to do this in pcb), but I can't tell if the right pin numbers have been assigned very easily. Is there a way to see this in PCB? Oliver Place footprint, then: - hover mouse cursor over the component (not over pin), press d: all pin numebrs will appear - hover over a pin, press d: pin number of the given pin appears - hover over a pin or component and press shift+d: pin number dialog opens The above work with the gtk hid, I don't know if bindings are the same for the lesstif hid. Recent versions of PCB with gtk hid also displays pin numbers in the preview window while selecting footprints. hope this helps, Tibor Palinkas ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: garfc spice files directory
Is there a way of specifying where your local spice files are in the gafrc file, so gnetlist can pick them up, without giving the full path for the spice file in your symbol definition? Or do I do this somewhere else? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: garfc spice files directory
John, When gnetlist runs, does it assume relative paths from the directory it is run in, or the schematic directory? Can I say file=./spice-dir/opa333.lib in my symbol attributes and have gnetlist navigate to the file? Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Thu, December 30, 2010 9:08:48 AM Subject: Re: gEDA-user: garfc spice files directory On Dec 30, 2010, at 10:03 AM, Oliver King-Smith wrote: Is there a way of specifying where your local spice files are in the gafrc file, so gnetlist can pick them up, without giving the full path for the spice file in your symbol definition? Not as far as I know. Or do I do this somewhere else? I make links to the library directories in the project's main directory, then use paths like model-dir/lib-file. John Doty Noqsi Aerospace, Ltd. [1]http://www.noqsi.com/ [2]...@noqsi.com ___ geda-user mailing list [3]geda-u...@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://www.noqsi.com/ 2. mailto:j...@noqsi.com 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: TI-TINA Spice and gEDA
I have been having problems with LTSpice simulating some components from TI. I was thinking of looking at TINA-TI spice program. Has anyone tried going from gschem to TINA? Which back end are you using for this? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TI-TINA Spice and gEDA
Stefan, I use the spice-sdb back end for gnetlist. I was having some problems with simulating a circuit with a floating ground. It turns out when I set it up in LTSpice (which I run under Wine on OS X) it works fine. That is, I manually enter the schematic and components into the GUI frontend. So the most likely explanations are, I have an error in my schematic that I am not spotting, or the spice-sdb is outputting something that is upsetting LTSpice. The truth of the matter is I have modified the spice-sdb scheme file, so I may have made a boo-boo. Oliver __ From: Stefan Salewski m...@ssalewski.de To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, January 1, 2011 5:53:23 AM Subject: Re: gEDA-user: TI-TINA Spice and gEDA On Fri, 2010-12-31 at 16:30 -0800, Oliver King-Smith wrote: I have been having problems with LTSpice simulating some components from TI. Why, what was not working? LTSpice with wine and Linux? I was thinking of looking at TINA-TI spice program. Has anyone tried going from gschem to TINA? So gschem - LTSpice works fine? How did you do it? I have tried TINA-TI once with Windows-XP -- not too bad for evaluating properties missing in the datasheet. But you can not really trust the spice models, one was very wrong. You may still find my problem mentioned in sci.electronics.design, but they have fixed it now. ___ geda-user mailing list [1]geda-u...@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: TI-TINA Spice and gEDA
John, Thank you for the offer, but let me dig through the output I am generating with my modified spice-sdb. It might be something I changed in the spice-sdb that is breaking things. Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, January 1, 2011 11:23:18 AM Subject: Re: gEDA-user: TI-TINA Spice and gEDA On Jan 1, 2011, at 11:53 AM, Oliver King-Smith wrote: I was having some problems with simulating a circuit with a floating ground. It turns out when I set it up in LTSpice (which I run under Wine on OS X) it works fine. That is, I manually enter the schematic and components into the GUI frontend. If you post it one of us might be able to figure it out. John Doty Noqsi Aerospace, Ltd. [1]http://www.noqsi.com/ [2]...@noqsi.com ___ geda-user mailing list [3]geda-u...@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://www.noqsi.com/ 2. mailto:j...@noqsi.com 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Strange problems in multi part symbols
I am continuing to have problems with multi part symbols. Here
I have an op amp define as thus:
v 20100214 2
L 200 800 200 0 3 0 0 0 -1 -1
L 200 800 800 400 3 0 0 0 -1 -1
T 700 800 5 10 0 0 0 0 1
device=SUBCIRCUIT
T 600 1100 5 10 0 0 0 0 1
slot=1
T 600 1300 5 10 0 0 0 0 1
numslots=2
T 600 1500 5 10 0 0 0 0 1
slotdef=1:1,2,3
T 600 1700 5 10 0 0 0 0 1
slotdef=2:5,6,7
L 800 400 200 0 3 0 0 0 -1 -1
L 300 650 300 550 3 0 0 0 -1 -1
L 250 600 350 600 3 0 0 0 -1 -1
L 250 200 350 200 3 0 0 0 -1 -1
P 0 600 200 600 1 0 0
{
T 150 650 5 8 1 1 0 6 1
pinnumber=3
T 150 550 5 8 0 1 0 8 1
pinseq=1
T 250 600 9 8 0 1 0 0 1
pinlabel=in+
T 250 600 5 8 0 1 0 2 1
pintype=in
}
P 0 200 200 200 1 0 0
{
T 150 250 5 8 1 1 0 6 1
pinnumber=2
T 150 150 5 8 0 1 0 8 1
pinseq=2
T 250 200 9 8 0 1 0 0 1
pinlabel=in-
T 250 200 5 8 0 1 0 2 1
pintype=in
}
P 800 400 1000 400 1 0 1
{
T 800 450 5 8 1 1 0 0 1
pinnumber=1
T 800 350 5 8 0 1 0 2 1
pinseq=5
T 750 400 9 8 0 1 0 6 1
pinlabel=out
T 750 400 5 8 0 1 0 8 1
pintype=out
}
T 700 600 8 10 1 1 0 0 1
refdes=U?
T 700 1200 5 10 0 0 0 0 1
description=operational amplifier
T 700 1400 5 10 0 0 0 0 1
symversion=0.1
T 200 1450 8 10 0 0 0 0 1
footprint=soic-08-d.fp
T 700 1000 8 10 0 0 0 0 1
file=./spice/OPA333.lib
When I try to use this op amp, the pin number show up wrong on the
schematic. For slot 1 they show up as 1,2,1 (not 3,2,1). When I try
slot 2 I get 5,6,1 not 5,6,7. Likewise spice back end also blows a
gasket trying with the pinseq numbers. I thought the pin seq refers to
which position in the spice parameter list the pin refers to?
I was going to see if I could fix up the spice-sdb backend to handle
putting multi part symbols back together, but I think something might
be more fundamentally broken inside gschem. Do folks have any
thoughts?
Oliver
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gEDA-user: Voltage symbols and Spice
I am trying to use the generic-power.sym in my schematic. I am setting the net attribute to 5VA (for 5V analog). I was hoping this would make all the nets with such a symbol. When I try to run gnetlist with the spice-sdb backend I get this error printing out several times. Got an invalid net= attrib [net=5VA] Missing : in net= attrib The nets don't appear connected in the spice file. Do folks have any suggestions on how to solve this? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: MODEL statements
I have defined my diode with a model statement model=Is=1e-22 Rs=6 N=1.5 Cjo=50p Iave=20m Vpk=5 type=LED This works fine except the spice-sdb backend inserts a model statement every time it finds one of the diodes. Is there a way to have the model statement only once. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Voltage symbols and Spice
Different places have different standards, but it is not that uncommon to use the Blah Blah A designation in some form to indicate an analog supply as opposed to a digital supply. If you really want to get folks frothing about conventions, just bring up the split ground planes vs solid ground plane. Oliver __ From: Johnny Rosenberg gurus.knu...@gmail.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Mon, January 3, 2011 2:52:12 PM Subject: Re: gEDA-user: Voltage symbols and Spice Den 2011-01-03 23:37:23 skrev John Doty [1]...@noqsi.com: On Jan 3, 2011, at 3:31 PM, Oliver King-Smith wrote: I am trying to use the generic-power.sym in my schematic. I am setting the net attribute to 5VA (for 5V analog). I was hoping this would make all the nets with such a symbol. When I try to run gnetlist with the spice-sdb backend I get this error printing out several times. Got an invalid net= attrib [net=5VA] Missing : in net= attrib The nets don't appear connected in the spice file. Do folks have any suggestions on how to solve this? Oliver You must include the pin number in a net attribute, e.g.: net=5VA:1 John Doty Noqsi Aerospace, Ltd. [2]http://www.noqsi.com/ [3]...@noqsi.com A bit off topic, but is it recommended to call something �5VA� in this case? Couldn't it be confused with the fact that VA means Volt-Amperes, which is what you measure apparent power in? --Kind regards Johnny Rosenberg ___ geda-user mailing list [4]geda-u...@moria.seul.org [5]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:j...@noqsi.com 2. http://www.noqsi.com/ 3. mailto:j...@noqsi.com 4. mailto:geda-user@moria.seul.org 5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Rant about Make Inv Text Vis
What is the point of the command Make Inv Text Vis in gschem, other than aggravating me. I mean putting next to the Show Hide Inv Text is just plain mean. And there is no way to change a bunch of stuff back to invisible if you fail to notice your error. You have to go through every single thing and fix it (arghh)! Just curious? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA flow for chip design?
On 01/15/2011 10:52 AM, Florian E. Teply wrote: Hi folks, I seem to recall that some guys here use gEDA for chip design. John Doty comes to mind, but i think there are others too. I'd be interested in the workflow as i will have to make up some clever test chips in the next few years for PhD work and i'm not in the position to be able to sell my grandma for a full-fledged cadence seat, nor am i willing to. If reasonably possible, i'd want both simulation as well as generation of production-ready data (GDS or OASIS files, preferably OASIS), but have not the slightest idea on how to accomplish that or even if that's possible with open source software, let alone from whithin gEDA. Any suggestions? I have just made my first ASIC. I used gEDA and LTSpice for the front end. To get from gschem to Magic I wrote a gnetlist translator. I did this by writing a small scheme back end that called into a standard C++ program to do the heavy lifting. Inside Magic I did the layout with a crude DRC based on the process I was using. I extracted back out of Magic and reran the extract circuit in LTSpice as my LVS checker. You can also run a simple LVS in Magic, but I did not find that entirely reliable. I then use a tool call KLayout and wrote scripts in ruby (the automation language for KLayout) to manipulate the layer data to get the resulting files I want. Klayout can export to OASIS if you wish to use that format. I myself used GDSII. So to summarize my flow: gschem - gnetlist spice-oks - LTSpice (I use my own spice back end as well) For doing the designing, and then gschem - gnetlist magic - C++ code - Magic - KLayout - Ruby - GDSII to do the layout. There is no need to use the C++ code if you are a whiz at scheme, but I really don't like LISP. I am not anti functional languages, I just don't like the syntax of LISP. I find it hard to maintain and read. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA flow for chip design?
I looked at Toped quiet a bit and did not think it was as good as magic yet. I like the idea behind it, and it is much more modern feeling that Magic, but it is still pretty immature. Oliver __ From: Bob Paddock bob.padd...@gmail.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, January 15, 2011 9:45:05 AM Subject: Re: gEDA-user: gEDA flow for chip design? Any suggestions? There is also Toped: [1]http://code.google.com/p/toped/ ___ geda-user mailing list [2]geda-user@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://code.google.com/p/toped/ 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA flow for chip design?
I extracted back out of Magic and reran the extract circuit in LTSpice as my LVS checker. You can also run a simple LVS in Magic, but I did not find that entirely reliable. I'd like to hear more about this. Are you meaning functional simulation to decide on layout vs schematic match? You're saying the extract function of magic is fully reliable? I found the extraction from Magic to be very reliable, although getting the parasitics setup is hard. You can easily remove clearly bad parasitics. The LVS function in magic was a little buggy. Tim Edwards has some examples from me, and he is pondering why they might be failing. I reduced it to a pretty simple case. It unfortunately also breaks the auto-router so you should use that with care. Oliver ___ geda-user mailing list [1]geda-user@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA flow for chip design?
There isn't much to the glue script, but now that I think about it I might be able to make it more useful and general purpose. I don't think it would be appropriate in its current form for distribution to the general public. It was written specifically for my needs in a quick and dirty fashion. It also lacks any comments. Having issued my disclaimers, I am happy to post it. How do I do that? Oliver Oliver King-Smith wrote: There is no need to use the C++ code if you are a whiz at scheme, but I really don't like LISP. You are not alone :-) Would you contribute the scheme glue script to the project? Maybe it can even be added to the main distro of gnetlist. What do ye developers think? ---)kaimartin(--- -- Kai-Martin Knaak Email: [1]k...@familieknaak.de Öffentlicher PGP-Schlüssel: [2]http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 ___ geda-user mailing list [3]geda-user@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:k...@familieknaak.de 2. http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Converting text to element lines
I am trying to make a symbol with PCB. I followed the directions in the manual. However, my text objects don't seem to be converting. Is there a way to convert Text to ElementLines with PCB? Failing that, is there a way to take some text and auto generate footprint compatible output? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Alt and Ctrl keys not working under OS X in PCB
I am having trouble getting the alt and ctrl keys to have there intended effect on OS X. I am running inside of X-Quartz 2.5.1 on OS X 10.6. Does anyone know how to make these key work? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Drill baby drill
I am trying to figure out the best way to make the drill size for a footprint I am trying to make. The actual whole is^1/[4]-28 UNF 2A which is about 1/4 of an inch drill size. What is the best way to do this inside PCB? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Drill baby drill
How do I make a whole that size in PCB? Oliver __ From: DJ Delorie d...@delorie.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Fri, February 4, 2011 8:28:58 PM Subject: Re: gEDA-user: Drill baby drill Are you asking how to determine the hole size, or how to make a hole in pcb? ___ geda-user mailing list [1]geda-user@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Drill baby drill
So the :ChangeDrillSize(SelectedVias,=250,mil) would appear to be exactly what I want, but it does not seem to change anything. I tried selecting the vias and entering this, and I tried entering this when I had the via tool active and then placing a via. Any thoughts as to what I am doing wrong? Oliver __ From: DJ Delorie d...@delorie.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, February 5, 2011 10:16:25 AM Subject: Re: gEDA-user: Drill baby drill Two ways: To just add a hole, use the Via tool. Use Ctrl-h to make it unplated, and adjust the soldermask tenting by making the soldermask layer visible and using the clearance keys (k, shift-k). You can set the size by selecting it and typing :ChangeDrillSize(SelectedVias,=250,mil) Alternately, create a real symbol for your mounting holes, and a footprint that goes with it, that has the right size hole. Then you place it like any other element on the board. ___ geda-user mailing list [1]geda-user@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Drill baby drill
Ahh that helps, and the fact that I was specifying things in 0.01mils. Thanks Oliver __ From: DJ Delorie d...@delorie.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, February 5, 2011 10:34:29 AM Subject: Re: gEDA-user: Drill baby drill If your vias still have copper, make the copper bigger first. ___ geda-user mailing list [1]geda-user@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Text in footprints
I have asked this before, but I don't think I saw an answer. Basically I would like to create footprints that have text in them, so for example a transistor might use a Q? Or a connector might use a CONN? Is there an easy was to do this? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: ERC and DRC checking
So I have a 25 page schematic, and I want to do some rudimentary checks on it. For example I would like to know if I wired power pins to gnd pins or only have inputs or outputs on a given net. What tools does geda have for this type of checking? What ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gattrib not showing part_numbers
I have defined a number of symbols with an embedded part # for ease of ordering. An example of such a part # is T 700 1000 8 10 0 0 0 0 1 part_number=PMBS3904 This is visible on the schematic (if you turn on invisible text). However when I run gattrib on the schematic with this in it, I don't see the part number show up. I do see my part numbers show up for items where I entered it as an attribute for the particular part (such as a capacitor). Does anyone know if this is a feature or bug? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gattrib not showing part_numbers
It seems like gnetlist could be used to promote an attribute to the schematic. Does anyone know if someone has tried that? Oliver __ From: Stuart Brorson s...@cloud9.net To: gEDA user mailing list geda-user@moria.seul.org Sent: Wed, February 9, 2011 4:12:18 AM Subject: Re: gEDA-user: gattrib not showing part_numbers IIRC, gattrib will handle attributes embedded in the schematic, not the symbol. The reason is that gattrb cannot reach into a symbol and modify its attributes. It only edits attributs in the schematic. Therefore, this is a feature. Stuart On Tue, 8 Feb 2011, Oliver King-Smith wrote: I have defined a number of symbols with an embedded part # for ease of ordering. An example of such a part # is T 700 1000 8 10 0 0 0 0 1 part_number=PMBS3904 This is visible on the schematic (if you turn on invisible text). However when I run gattrib on the schematic with this in it, I don't see the part number show up. I do see my part numbers show up for items where I entered it as an attribute for the particular part (such as a capacitor). Does anyone know if this is a feature or bug? Oliver ___ geda-user mailing list [1]geda-user@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: drc2 crash
I am attempting to run the drc2 check with gnetlist. I have checked each individual schematic separately, and drc2 works fine. But when I tried to run them altogether I am getting the following crash: In /sw/share/gEDA/scheme/gnet-drc2.scm: 518: 647 (if (null? list) 0 ...) ... 525: 648 [+ 0 ... 525: 649* [drc2:count-reference-in-list FB17 (R116 C177 C176 ...)] 518: 650 (if (null? list) 0 ...) ... 525: 651 [+ 0 ... 525: 652* [drc2:count-reference-in-list FB17 (C177 C176 J36 ...)] 518: 653(if (null? list) 0 ...) ... 525: 654[+ 0 ... 525: 655*[drc2:count-reference-in-list FB17 (C176 J36 R115 ...)] 518: 656 (if (null? list) 0 ...) ... 525: 657 [+ 0 ... 525: 658* [drc2:count-reference-in-list FB17 (J36 R115 C175 ...)] 518: 659 (if (null? list) 0 ...) ... 525: 660 [+ 0 ... 525: 661* [drc2:count-reference-in-list FB17 (R115 C175 R114 ...)] 518: 662 (if (null? list) 0 ...) 520: 663 (let* ((comparison #)) (if comparison (+ 1 #) (+ 0 #))) 520: 664* (if (defined? #) (string-ci=? refdes #) (string=? refdes #)) 520: 665* [defined? ... 520: 666* (quote case_insensitive) /sw/share/gEDA/scheme/gnet-drc2.scm:520:42: In expression (quote case_insensitive): /sw/share/gEDA/scheme/gnet-drc2.scm:520:42: Stack overflow This appears to me to be a genuine stack overflow. That is the in the line (+ 0 (drc2:count-reference-in-list refdes (cdr list my list is so long it is crashing gnetlist. I suspect this is getting called from line 538: (if ( (drc2:count-reference-in-list refdes (gnetlist:get-non-unique-packages )) In my case: guile ( gnetlist:get-non-unique-packages ) (FB17 J66 R182 R181 R180 C249 C248 C247 C246 C245 C244 U89 C243 C242 C241 C240 R179 U88 C239 C238 R178 U87 J65 J64 U86 C237 C236 R177 R176 J63 R175 C235 R174 C234 FB16 J62 U85 Q12 R173 U84 R172 R171 J61 R170 C233 R169 C232 C231 C230 C229 C228 C227 C226 C225 C224 C223 C222 C221 C220 C219 FB15 FB14 C218 C217 J60 C216 J59 U83 C215 C214 J58 U82 R168 R167 R166 J57 J56 J55 J54 J53 J52 R165 R164 U81 C213 Q11 R163 U80 R162 R161 R160 J51 R159 C212 R158 Q10 Q9 R157 R156 U79 U78 C211 C210 C209 C208 C207 R155 R154 J50 R153 C206 R152 U77 J49 R151 R150 R149 R148 J48 R147 C205 R146 U76 U75 R145 R144 Q8 Q7 R143 R142 U74 U73 C204 C203 C202 C201 C200 R141 R140 J47 R139 C199 R138 U72 J46 R137 R136 R135 C198 FB13 J45 R134 J44 R133 C197 R132 U71 U70 CONN4 J43 J42 R131 R130 J41 J40 C196 FB12 J39 C195 FB11 J38 U69 R129 R128 C194 C193 C192 C191 U68 R127 R126 C190 C189 C188 C187 U67 R125 R124 C186 C185 C184 C183 U66 R123 R122 C182 C181 C180 C179 U65 C178 CONN3 CONN2 CONN1 U64 Q6 R121 U63 R120 R119 R118 R117 J37 R116 C177 C176 J36 R115 C175 R114 J35 R113 C174 R112 J34 R111 C173 C172 C171 FB10 J33 U62 U61 TP8 TP7 TP6 TP5 TP4 TP3 TP2 TP1 STAND4 STAND3 STAND2 STAND1 R110 Q5 R109 U60 R108 R107 R106 Q4 R105 U59 R104 R103 R102 C170 C169 C168 R101 J32 U58 J31 R100 C167 C166 FB9 J30 J29 R99 C165 C163 C162 C161 C160 C159 C158 C157 C156 C155 C154 C153 C152 C151 C150 C149 C148 C147 C146 C145 C144 C143 C142 C141 C140 C139 C138 C137 C136 C135 C134 C133 C132 C131 C130 FB8 J28 C129 FB7 J27 U57 U56 U55 U54 U53 U52 R98 U51 U50 U49 U48 U47 U46 U45 U44 R97 J26 J25 U43 U42 U41 R96 R95 R94 R93 J24 U40 U39 C128 C127 C126 C125 R92 R91 R90 R89 R88 U38 C124 C123 C122 C121 R87 R86 R85 R84 R83 U37 C120 C119 C118 C117 R82 R81 R80 R79 R78 C116 FB6 J23 U36 R77 R76 J22 R75 J21 R74 C115 C114 FB5 J20 C113 C112 U35 U34 U33 C111 U32 R73 U31 D2 D1 U30 U29 U28 R72 R71 C110 C109 C108 U27 C107 C106 C105 C104 R70 C103 J19 J18 J17 J16 R69 Q3 R68 U26 R67 R66 R65 J15 C102 C101 U25 J14 R64 R63 J13 J12 R62 R61 C100 FB4 J11 J10 R60 C99 R59 J9 J8 R58 R57 R56 R55 J7 R54 C98 R53 R52 R51 Q2 Q1 R50 R49 U24 U23 C97 C96 C95 C94 C93 R48 R47 J6 R46 C92 R45 U22 J5 R44 R43 R42 C91 FB3 J4 R41 J3 R40 C90 R39 U21 U20 C89 C88 C87 C86 C85 C84 C83 C82 C81 C80 C79 C78 C77 C76 C75 C74 C73 C72 C71 C70 C69 C68 R38 R37 C67 C66 C65 U19 C64 C63 C62 U18 C61 C60 C59 C58 FB2 J2 FB1 J1 C57 R36 C55 U17 C54 R35 C53 R34 C51 U16 C50 R33 C49 R32 C47 U15 C46 R31 C44 C43 R30 U14 C42 R29 C40 C39 R28 U13 C38 R27 C36 C35 R26 U12 C34 R25 C33 C32 R24 U11 C30 R23 X2 R22 R21 R20 C29 C28 U10 C27 R19 C26 C25 U9 R18 R17 R16 R15 R14 R13 R12 R11 C24 C23 C22 C21 X1 R10 R9 R8 C20 C19 U8 C18 C17 R7 C16 U7 C14 R6 C13 U6 C12 C11 R5 U5 C10 C9 R4 U4 C8 C7 R3 U3 C6 C5 R2 C4 U2 C3 C2 R1 C1 U1) So the recursion makes it less than half way through my list. I suppose I could disable dont-check-duplicated-references, but it is precisely these long part lists that make this feature useful. Does anyone know of a work
Re: gEDA-user: gattrib not showing part_numbers
So gnetlist does not know which schematic file it is operating on when it is processing data? Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Wed, February 9, 2011 6:48:02 AM Subject: Re: gEDA-user: gattrib not showing part_numbers On Feb 9, 2011, at 7:38 AM, Oliver King-Smith wrote: It seems like gnetlist could be used to promote an attribute to the schematic. No. Gnetlist can't do that kind of schematic to schematic translation. John Doty Noqsi Aerospace, Ltd. [1]http://www.noqsi.com/ [2]j...@noqsi.com ___ geda-user mailing list [3]geda-user@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://www.noqsi.com/ 2. mailto:j...@noqsi.com 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: drc2 crash
OK I have fixed my problem (well my scheme problem at least) by adding this line to the beginning of the gnet-drc2.scm file: ;; Give us more stack space (debug-set! stack 20) I don't know if there is a better fix. Oliver __ From: Oliver King-Smith oliver...@yahoo.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Wed, February 9, 2011 7:47:29 AM Subject: gEDA-user: drc2 crash I am attempting to run the drc2 check with gnetlist. I have checked each individual schematic separately, and drc2 works fine. But when I tried to run them altogether I am getting the following crash: In /sw/share/gEDA/scheme/gnet-drc2.scm: 518: 647 (if (null? list) 0 ...) ... 525: 648 [+ 0 ... 525: 649* [drc2:count-reference-in-list FB17 (R116 C177 C176 ...)] 518: 650 (if (null? list) 0 ...) ... 525: 651 [+ 0 ... 525: 652* [drc2:count-reference-in-list FB17 (C177 C176 J36 ...)] 518: 653(if (null? list) 0 ...) ... 525: 654[+ 0 ... 525: 655*[drc2:count-reference-in-list FB17 (C176 J36 R115 ...)] 518: 656(if (null? list) 0 ...) ... 525: 657[+ 0 ... 525: 658*[drc2:count-reference-in-list FB17 (J36 R115 C175 ...)] 518: 659 (if (null? list) 0 ...) ... 525: 660 [+ 0 ... 525: 661* [drc2:count-reference-in-list FB17 (R115 C175 R114 ...)] 518: 662 (if (null? list) 0 ...) 520: 663 (let* ((comparison #)) (if comparison (+ 1 #) (+ 0 #))) 520: 664* (if (defined? #) (string-ci=? refdes #) (string=? refdes #)) 520: 665* [defined? ... 520: 666* (quote case_insensitive) /sw/share/gEDA/scheme/gnet-drc2.scm:520:42: In expression (quote case_insensitive): /sw/share/gEDA/scheme/gnet-drc2.scm:520:42: Stack overflow This appears to me to be a genuine stack overflow. That is the in the line (+ 0 (drc2:count-reference-in-list refdes (cdr list my list is so long it is crashing gnetlist. I suspect this is getting called from line 538: (if ( (drc2:count-reference-in-list refdes (gnetlist:get-non-unique-packages )) In my case: guile ( gnetlist:get-non-unique-packages ) (FB17 J66 R182 R181 R180 C249 C248 C247 C246 C245 C244 U89 C243 C242 C241 C240 R179 U88 C239 C238 R178 U87 J65 J64 U86 C237 C236 R177 R176 J63 R175 C235 R174 C234 FB16 J62 U85 Q12 R173 U84 R172 R171 J61 R170 C233 R169 C232 C231 C230 C229 C228 C227 C226 C225 C224 C223 C222 C221 C220 C219 FB15 FB14 C218 C217 J60 C216 J59 U83 C215 C214 J58 U82 R168 R167 R166 J57 J56 J55 J54 J53 J52 R165 R164 U81 C213 Q11 R163 U80 R162 R161 R160 J51 R159 C212 R158 Q10 Q9 R157 R156 U79 U78 C211 C210 C209 C208 C207 R155 R154 J50 R153 C206 R152 U77 J49 R151 R150 R149 R148 J48 R147 C205 R146 U76 U75 R145 R144 Q8 Q7 R143 R142 U74 U73 C204 C203 C202 C201 C200 R141 R140 J47 R139 C199 R138 U72 J46 R137 R136 R135 C198 FB13 J45 R134 J44 R133 C197 R132 U71 U70 CONN4 J43 J42 R131 R130 J41 J40 C196 FB12 J39 C195 FB11 J38 U69 R129 R128 C194 C193 C192 C191 U68 R127 R126 C190 C189 C188 C187 U67 R125 R124 C186 C185 C184 C183 U66 R123 R122 C182 C181 C180 C179 U65 C178 CONN3 CONN2 CONN1 U64 Q6 R121 U63 R120 R119 R118 R117 J37 R116 C177 C176 J36 R115 C175 R114 J35 R113 C174 R112 J34 R111 C173 C172 C171 FB10 J33 U62 U61 TP8 TP7 TP6 TP5 TP4 TP3 TP2 TP1 STAND4 STAND3 STAND2 STAND1 R110 Q5 R109 U60 R108 R107 R106 Q4 R105 U59 R104 R103 R102 C170 C169 C168 R101 J32 U58 J31 R100 C167 C166 FB9 J30 J29 R99 C165 C163 C162 C161 C160 C159 C158 C157 C156 C155 C154 C153 C152 C151 C150 C149 C148 C147 C146 C145 C144 C143 C142 C141 C140 C139 C138 C137 C136 C135 C134 C133 C132 C131 C130 FB8 J28 C129 FB7 J27 U57 U56 U55 U54 U53 U52 R98 U51 U50 U49 U48 U47 U46 U45 U44 R97 J26 J25 U43 U42 U41 R96 R95 R94 R93 J24 U40 U39 C128 C127 C126 C125 R92 R91 R90 R89 R88 U38 C124 C123 C122 C121 R87 R86 R85 R84 R83 U37 C120 C119 C118 C117 R82 R81 R80 R79 R78 C116 FB6 J23 U36 R77 R76 J22 R75 J21 R74 C115 C114 FB5 J20 C113 C112 U35 U34 U33 C111 U32 R73 U31 D2 D1 U30 U29 U28 R72 R71 C110 C109 C108 U27 C107 C106 C105 C104 R70 C103 J19 J18 J17 J16 R69 Q3 R68 U26 R67 R66 R65 J15 C102 C101 U25 J14 R64 R63 J13 J12 R62 R61 C100 FB4 J11 J10 R60 C99 R59 J9 J8 R58 R57 R56 R55 J7 R54 C98 R53 R52 R51 Q2 Q1 R50 R49 U24 U23 C97 C96 C95 C94 C93 R48 R47 J6 R46 C92 R45 U22 J5 R44 R43 R42 C91 FB3 J4 R41 J3 R40 C90 R39 U21 U20 C89 C88 C87 C86 C85 C84 C83 C82 C81 C80 C79 C78 C77
gEDA-user: Pages symbol
Is there a way to get the pages symbol (or other equivalent symbol) to automatically give the other pages it connects to? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Open Collector Error Checking
I am getting this error when I run the DRC2 ERROR: Pin(s) with pintype 'open collector': U70:2 U70:4 are connected by net 'unnamed_net204' to pin(s) with pintype 'open collector': U70:2 U70:4 The above statement is absolutely correct, these two pins are both open collector, and indeed they are wire together. But why would I want to report this as an error? Isn't part of the idea behind open_collector outputs the concept of wiring them together? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Pages symbol
I would like either the page name(s) or page number(s) (if such a concepts exist) to be placed into the pages symbol Oliver __ From: Kai-Martin Knaak k...@lilalaser.de To: geda-u...@seul.org Sent: Thu, February 10, 2011 4:11:42 PM Subject: Re: gEDA-user: Pages symbol Oliver King-Smith wrote: Is there a way to get the pages symbol (or other equivalent symbol) to automatically give the other pages it connects to? What do you want to achieve? ---)kaimartin(--- -- Kai-Martin Knaak Email: [1]k...@familieknaak.de Öffentlicher PGP-Schlüssel: [2]http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 ___ geda-user mailing list [3]geda-user@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:k...@familieknaak.de 2. http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PGA 100 footprint
Does anyone have a PGA100 footprint made already? I think the footprints are pretty standardized, but in case they are not, this is the socket I am using: [1]http://www.mouser.com/ProductDetail/Mill-Max/510-93-100-13-062001/?q s=kJUkXSjFC7zF7XgyqhSPcw%3d%3d If I layout the footprint would folks recommend using PCB or is there a better way to do this style of footprint? Oliver References 1. http://www.mouser.com/ProductDetail/Mill-Max/510-93-100-13-062001/?qs=kJUkXSjFC7zF7XgyqhSPcw%3d%3d ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Strange resistor footprints
I am trying to generate a pcb from my schematic using gsch2pcb. It is
generating syntax errors when I try to load it into pcb. The line in
question is ).fp(0603.fp,R229,87K). Here is a snippet of the listing:
#ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval(
V2/2) CYW]
#ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2)
eval(-1*V2/2) CYW]
#ElementLine[eval( V1/2) eval( V2/2) eval( V1/2)
eval(-1*V2/2) CYW]
#ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval(
V2/2) CYW]
).fp(0603.fp,R229,87K)
# grab the input values and convert to 1/100 mil
My resistors look like:
C 50500 46500 1 90 0 resistor-1.sym
{
T 50100 46800 5 10 0 0 90 0 1
device=RESISTOR
T 50200 47000 5 10 1 1 90 0 1
refdes=R229
T 50500 46500 5 10 0 0 90 0 1
footprint=0603.fp
T 50700 47000 5 10 1 1 90 0 1
value=87K
T 50700 46500 5 10 1 1 90 0 1
precision=1%
}
in the schematic. What am I doing wrong here?
Oliver
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Re: gEDA-user: Strange resistor footprints
It is definitely happening when I try to use a newlib footprint. I solved my 603 problem, but I now have EIA3528 cap with the same issue. The syntax being generated by gsch2pcb is very different. I can't see any documentation in the PCB manual that shows Element( ... ).fp(...) type construction. Oliver __ From: Oliver King-Smith oliver...@yahoo.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Wed, February 16, 2011 7:29:41 AM Subject: Re: gEDA-user: Strange resistor footprints It might help if I post more of the file # element_flags, description, pcb-name, value, mark_x, mark_y, # text_x, text_y, text_direction, text_scale, text_flags Element[0x0 0 -3150 -3150 0 100 ] ( # # Pad[x1, y1, x2, y2, thickness, clearance, mask, name , pad number, flags] Pad[-2559 -492 -2559 492 2952 2000 3552 1 1 square] Pad[2559 -492 2559 492 2952 2000 3552 2 2 square] # # This draws a 1 mil placement courtyard outline in silk. It should probably # not be included since you wont want to try and fab a 1 mil silk line. Then # again, it is most useful during parts placement. It really is time for some # additional non-fab layers... #ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval( V2/2) CYW] #ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval( V1/2) eval(-1*V2/2) CYW] #ElementLine[eval( V1/2) eval( V2/2) eval( V1/2) eval(-1*V2/2) CYW] #ElementLine[eval( V1/2) eval( V2/2) eval(-1*V1/2) eval( V2/2) CYW] ).fp(0603.fp,R229,87K) So for generating resistors, the gsch2pcb uses a different format than an IC with a footprint I have defined. __ From: John Doty [1]j...@noqsi.com To: [2]k...@lilalaser.de; gEDA user mailing list [3]geda-user@moria.seul.org Sent: Wed, February 16, 2011 7:10:26 AM Subject: Re: gEDA-user: Strange resistor footprints On Feb 16, 2011, at 6:22 AM, Kai-Martin Knaak wrote: T 50700 46500 5 10 1 1 90 0 1 precision=1% } in the schematic. What am I doing wrong here? A stab in the dark: Maybe, gnetlist is unhappy with the % character. I don't think so. Gnetlist doesn't care about %: my schems are full of attributes like spec=1% 1/10W. John Doty Noqsi Aerospace, Ltd. [1][4]http://www.noqsi.com/ [2][5]j...@noqsi.com ___ geda-user mailing list [3][6]geda-user@moria.seul.org [4][7]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. [8]http://www.noqsi.com/ 2. mailto:[9]j...@noqsi.com 3. mailto:[10]geda-user@moria.seul.org 4. [11]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:j...@noqsi.com 2. mailto:k...@lilalaser.de 3. mailto:geda-user@moria.seul.org 4. http://www.noqsi.com/ 5. mailto:j...@noqsi.com 6. mailto:geda-user@moria.seul.org 7. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 8. http://www.noqsi.com/ 9. mailto:j...@noqsi.com 10. mailto:geda-user@moria.seul.org 11. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Strange resistor footprints
Is there a better work around for this rather than making my own footprints? __ From: DJ Delorie d...@delorie.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Wed, February 16, 2011 7:39:07 AM Subject: Re: gEDA-user: Strange resistor footprints footprint=0603.fp 0603 is a macro footprint name. It gets expanded by the macro preprocessor before gsch2pcb gets a chance to see the 0603.fp. ___ geda-user mailing list [1]geda-user@moria.seul.org [2]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:geda-user@moria.seul.org 2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Modifying pcb-menu.res
I am trying to add a keyboard shortcut for Select by Name - All
Objects.
I located my pcb-menu.res file and tried adding
{All objects Select(ObjectByName) active=have_regex a={Ctrl-N
CtrlKeyn}}
but it doesn't seem to do anything. Does anyone have any suggestions
as to what I might be doing wrong? It would be handy to have this for
doing placement on large designs.
Oliver
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Re: gEDA-user: Can you spot the selected object?
Has this been done with the traditional autorouter of PCB? ---)kaimartin(--- _ Yes, I was screwing around to see how it would work. Overall I think it might be better than the Eagle auto router. Do you recommend using some else? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Modifying pcb-menu.res
If you are using the gtk gui, you have to modify the gpcb-menu.res file. The pcb-menu.res file is for lesstif gui. This might be the reason for the missing function. The syntax looks right to me. Brilliant that was the problem! Thank you. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Help I can move by REFDES
I have managed to get my refdes for one component about 7 away from the component. When I select the refdes I can seem to move it. How do I get it back to my poor component? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Help I can move by REFDES
OK I see the error of my ways. I had to turn off the grid so I could click on the refdes. Oliver __ From: Ethan Swint eswint.r...@verizon.net To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, February 19, 2011 6:51:50 PM Subject: Re: gEDA-user: Help I can move by REFDES On 02/19/2011 09:41 PM, Oliver King-Smith wrote: I have managed to get my refdes for one component about 7 away from the component. When I select the refdes I can seem to move it. How do I get it back to my poor component? Oliver To move a refdes in the GUI, 1) make sure that it is not currently selected 2) click over refdes and drag to desired location. In a text editor, just manually set the XY coordinate of the refdes to 0 0 ([1]http://pcb.gpleda.org/pcb-cvs/pcb.html#File-Syntax). ___ geda-user mailing list [2]geda-user@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://pcb.gpleda.org/pcb-cvs/pcb.html#File-Syntax 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Help with board layout
I hope this is not considered list abuse, but I am looking for someone to layout a board in geda's PCB. The board consists of approximately 100 ICs and associated components. There is a lot of repetition on the board, and most of the ICs are single opamps, so the board is not as big or scary as it might seem. All the footprints have been made and the schematic was done in gschem. The design is mostly analog signals and these operate below 1KHz. The signals get digitized with a 20bit ADC. All the power supplies are linear regulars. These is no impedance control needed for the board. The digital section of the board is galvanically isolated from the analog section which makes grounding issues pretty straightforward. I don't have any space constraints, but I anticipate it should fit nicely onto a 10x10 inch or smaller board. I anticipate that a 6 layer design should be more than sufficient to get a good layout (an aggressive layout can probably get away with 4 layers. I am on a schedule. I would like to have the board laid out within the next 3 weeks. The board is testing an ASIC, and if I am going to meet the later summer shuttle run, I really need the board built by the early of April. I am located in northern California, but you can be located anywhere in the world. If you are interested in doing this contract, or if you have any questions, please email me directly. Please include any a brief description of any experience you have had with using PCB. Thank you in advance Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Get a pin or net list count
Is there a way to get a pin or netlist count for a multi-page schematic in gschem? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Get a pin or net list count
John, Thank you for sharing the gnetlist extension. That works very nicely. I got a slightly different count between the pins I did manually and the pins your package reported. Are you counting all pins, or just used pins? Oliver __ From: John Doty j...@noqsi.com To: gEDA user mailing list geda-user@moria.seul.org Sent: Sat, March 5, 2011 5:37:37 PM Subject: Re: gEDA-user: Get a pin or net list count On Mar 5, 2011, at 12:24 PM, Oliver King-Smith wrote: Is there a way to get a pin or netlist count for a multi-page schematic in gschem? Oliver Copy the attached file to wherever your gnetlist back ends go (e.g. /usr/local/share/gEDA/scheme/). Then: gnetlist -g stats -o wherever.txt whatever1.sch whatever1.sch ... will put the stats for the schematics in wherever.txt. Pin, package, and net counts. John Doty Noqsi Aerospace, Ltd. [1]http://www.noqsi.com/ [2]j...@noqsi.com References 1. http://www.noqsi.com/ 2. mailto:j...@noqsi.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Pages in gattrib
How do I get the page number to show up in gattrib? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Task list for: Solving the light/heavy symbol problem
If you give a 1,000,000 monkeys 1,000,000 typewriters, and give them 1,000,000 years to write stuff, one monkey will eventual write a Java program. The others just produce Perl scripts. I find perl unreadable. Python, Lua, Java, Ruby, ... I like all those types of languages. Isn't there an open source package that supports a bunch of automation with your favorite language (including Guile which would maintain a bunch of backward compatibility)? The main reason I don't like Guile is I find it hard to read and awkward to write in. My vision is not the best and I really get messed up on the parenthesis. Oliver __ From: Colin D Bennett co...@gibibit.com To: geda-user@moria.seul.org Sent: Thu, May 26, 2011 1:18:44 PM Subject: Re: gEDA-user: Task list for: Solving the light/heavy symbol problem On Thu, 26 May 2011 11:52:04 -0700 Andrew Poelstra [1]as...@sfu.ca wrote: On Thu, May 26, 2011 at 10:56:40AM -0400, DJ Delorie wrote: Opportunity to pick a more modern language, too. Something more os-agnostic, we've had issues with scheme on Windows before. I'm a Perl fan myself. Although Perl is probably better for string-handling, I think Python would be a better choice. It feels a lot more like a Lisp and quite a bit more well-known these days. It is also platform-agnostic, handles errors more cleanly, and is usually easier to read. +1 Python -32767 Perl I have written a lot of Perl code over the past 15 years, and still use it for quick one-liner text processing tasks, but even as a novice Python user I must say that my Python code is vastly more maintainable than Perl code. I have found that it always pays off to write clean and readable Python code rather than taking what seems at first to be the easy way and throwing some Perl together. Sure, you *can* write maintainable Perl code, but it takes tremendous effort because there are so many quick shortcuts that tempt the author or Perl code, and there are a million different ways to write the same code -- not necessarily good for maintainability. A project like gEDA would have to have some really tight style guidelines to get consistent and readable Perl code... Regards, Colin ___ geda-user mailing list [2]geda-user@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:as...@sfu.ca 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
