date:20211013

[gem5-dev] Change in gem5/gem5[develop]: misc: Using OS::off_t in syscall signature

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51490 )


Change subject: misc: Using OS::off_t in syscall signature
..

misc: Using OS::off_t in syscall signature

Change-Id: Iefa1e207a3e825959b0fe8df30e6be182d73a0f8
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51490
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Gabe Black 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/mips/linux/se_workload.cc
M src/arch/power/linux/se_workload.cc
M src/arch/riscv/linux/se_workload.cc
M src/arch/x86/linux/syscall_tbl32.cc
M src/sim/syscall_emul.cc
M src/sim/syscall_emul.hh
M src/arch/arm/linux/se_workload.cc
M src/arch/x86/linux/syscall_tbl64.cc
8 files changed, 97 insertions(+), 89 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/linux/se_workload.cc  
b/src/arch/arm/linux/se_workload.cc

index c715e1d..3755dec 100644
--- a/src/arch/arm/linux/se_workload.cc
+++ b/src/arch/arm/linux/se_workload.cc
@@ -223,8 +223,8 @@
 { base + 89, "readdir" },
 { base + 90, "mmap", mmapFunc },
 { base + 91, "munmap", munmapFunc },
-{ base + 92, "truncate", truncateFunc },
-{ base + 93, "ftruncate", ftruncateFunc },
+{ base + 92, "truncate", truncateFunc },
+{ base + 93, "ftruncate", ftruncateFunc },
 { base + 94, "fchmod" },
 { base + 95, "fchown", fchownFunc },
 { base + 96, "getpriority" },
@@ -545,7 +545,7 @@
 {   base + 44, "fstatfs64" },
 {   base + 45, "truncate64" },
 {   base + 46, "ftruncate64", ftruncate64Func },
-{   base + 47, "fallocate", fallocateFunc },
+{   base + 47, "fallocate", fallocateFunc },
 {   base + 48, "faccessat", faccessatFunc },
 {   base + 49, "chdir" },
 {   base + 50, "fchdir" },
@@ -781,8 +781,8 @@
 { base + 1044, "eventfd" },
 { base + 1045, "signalfd" },
 { base + 1046, "sendfile" },
-{ base + 1047, "ftruncate", ftruncateFunc },
-{ base + 1048, "truncate", truncateFunc },
+{ base + 1047, "ftruncate", ftruncateFunc },
+{ base + 1048, "truncate", truncateFunc },
 { base + 1049, "stat", statFunc },
 { base + 1050, "lstat" },
 { base + 1051, "fstat", fstatFunc },
diff --git a/src/arch/mips/linux/se_workload.cc  
b/src/arch/mips/linux/se_workload.cc

index 09752d1..6767bf7 100644
--- a/src/arch/mips/linux/se_workload.cc
+++ b/src/arch/mips/linux/se_workload.cc
@@ -250,8 +250,8 @@
 { 4089, "readdir" },
 { 4090, "mmap", mmapFunc },
 { 4091, "munmap",munmapFunc },
-{ 4092, "truncate", truncateFunc },
-{ 4093, "ftruncate", ftruncateFunc },
+{ 4092, "truncate", truncateFunc },
+{ 4093, "ftruncate", ftruncateFunc },
 { 4094, "fchmod", fchmodFunc },
 { 4095, "fchown", fchownFunc },
 { 4096, "getpriority" },
diff --git a/src/arch/power/linux/se_workload.cc  
b/src/arch/power/linux/se_workload.cc

index 975d5dd..9b54fd8 100644
--- a/src/arch/power/linux/se_workload.cc
+++ b/src/arch/power/linux/se_workload.cc
@@ -199,8 +199,8 @@
 { 89, "readdir" },
 { 90, "mmap", mmapFunc },
 { 91, "munmap",munmapFunc },
-{ 92, "truncate", truncateFunc },
-{ 93, "ftruncate", ftruncateFunc },
+{ 92, "truncate", truncateFunc },
+{ 93, "ftruncate", ftruncateFunc },
 { 94, "fchmod" },
 { 95, "fchown" },
 { 96, "getpriority" },
diff --git a/src/arch/riscv/linux/se_workload.cc  
b/src/arch/riscv/linux/se_workload.cc

index 3b0079d..2e2a7d2 100644
--- a/src/arch/riscv/linux/se_workload.cc
+++ b/src/arch/riscv/linux/se_workload.cc
@@ -169,9 +169,9 @@
 { 42,   "nfsservctl" },
 { 43,   "statfs", statfsFunc },
 { 44,   "fstatfs", fstatfsFunc },
-{ 45,   "truncate", truncateFunc },
+{ 45,   "truncate", truncateFunc },
 { 46,   "ftruncate", ftruncate64Func },
-{ 47,   "fallocate", fallocateFunc },
+{ 47,   "fallocate", fallocateFunc },
 { 48,   "faccessat", faccessatFunc },
 { 49,   "chdir" },
 { 50,   "fchdir" },
@@ -500,9 +500,9 @@
 { 42,   "nfsservctl" },
 { 43,   "statfs", statfsFunc },
 { 44,   "fstatfs", fstatfsFunc },
-{ 45,   "truncate", truncateFunc },
-{ 46,   "ftruncate", ftruncateFunc },
-{ 47,   "fallocate", fallocateFunc },
+{ 45,   "truncate", truncateFunc },
+{ 46,   "ftruncate", ftruncateFunc },
+{ 47,   "fallocate", fallocateFunc },
 { 48,   "faccessat", faccessatFunc },
 { 49,   "chdir" },
 { 50,   "fchdir" },
@@ -749,8 +749,8 @@
 { 1044, "eventfd" },
 { 1045, "signalfd" },
 { 1046, "sendfile" },
-{ 1047, "ftruncate", ftruncateFunc },
-{ 1048, "truncate",

[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add sendto and recvfrom implementations to the Syscall Table

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51487 )


Change subject: arch-arm: Add sendto and recvfrom implementations to the  
Syscall Table

..

arch-arm: Add sendto and recvfrom implementations to the Syscall Table

Change-Id: Id3fd65778ad3b5af8ec54381a0b8824115c309f6
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51487
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/arm/linux/se_workload.cc
1 file changed, 18 insertions(+), 4 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/linux/se_workload.cc  
b/src/arch/arm/linux/se_workload.cc

index fdbdbef..d3bf0ea 100644
--- a/src/arch/arm/linux/se_workload.cc
+++ b/src/arch/arm/linux/se_workload.cc
@@ -413,9 +413,9 @@
 { base + 287, "getpeername" },
 { base + 288, "socketpair" },
 { base + 289, "send" },
-{ base + 290, "sendto" },
+{ base + 290, "sendto", sendtoFunc },
 { base + 291, "recv" },
-{ base + 292, "recvfrom" },
+{ base + 292, "recvfrom", recvfromFunc },
 { base + 293, "shutdown" },
 { base + 294, "setsockopt" },
 { base + 295, "getsockopt" },
@@ -708,8 +708,8 @@
 {  base + 203, "connect" },
 {  base + 204, "getsockname" },
 {  base + 205, "getpeername" },
-{  base + 206, "sendto" },
-{  base + 207, "recvfrom" },
+{  base + 206, "sendto", sendtoFunc },
+{  base + 207, "recvfrom", recvfromFunc },
 {  base + 208, "setsockopt" },
 {  base + 209, "getsockopt" },
 {  base + 210, "shutdown" },

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id3fd65778ad3b5af8ec54381a0b8824115c309f6
Gerrit-Change-Number: 51487
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add ftruncate implementation to the Syscall Table

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51488 )


Change subject: arch-arm: Add ftruncate implementation to the Syscall Table
..

arch-arm: Add ftruncate implementation to the Syscall Table

Change-Id: I27c526c5c8107f888aee7c99b952f086d4fa0e35
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51488
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/arm/linux/se_workload.cc
1 file changed, 15 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/linux/se_workload.cc  
b/src/arch/arm/linux/se_workload.cc

index d3bf0ea..450d540 100644
--- a/src/arch/arm/linux/se_workload.cc
+++ b/src/arch/arm/linux/se_workload.cc
@@ -545,7 +545,7 @@
 {   base + 44, "fstatfs64" },
 {   base + 45, "truncate64" },
 {   base + 46, "ftruncate64", ftruncate64Func },
-{   base + 47, "fallocate" },
+{   base + 47, "fallocate", fallocateFunc },
 {   base + 48, "faccessat", faccessatFunc },
 {   base + 49, "chdir" },
 {   base + 50, "fchdir" },

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I27c526c5c8107f888aee7c99b952f086d4fa0e35
Gerrit-Change-Number: 51488
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Using OS::size_t in syscall signature

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51489 )


Change subject: misc: Using OS::size_t in syscall signature
..

misc: Using OS::size_t in syscall signature

Using the host size_t is confusing the guest ABI engine every time
the host and the guest adopt a different data model (ILP32 vs LP64)

For example when a LP64 machine is running an ILP32 application in SE
mode, "size_t" will wrongly inform the guest ABI engine to retrieve the
argument by loading a 64 bit (instead of 32) value from the stack

JIRA: https://gem5.atlassian.net/browse/GEM5-1074

Change-Id: Id7d7740ac429f534a4089331bedf21dc3951bbad
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51489
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Gabe Black 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/mips/linux/se_workload.cc
M src/arch/sparc/linux/syscalls.cc
M src/arch/power/linux/se_workload.cc
M src/arch/riscv/linux/se_workload.cc
M src/arch/x86/linux/syscall_tbl32.cc
M src/sim/syscall_emul.cc
M src/sim/syscall_emul.hh
M src/arch/arm/freebsd/se_workload.cc
M src/arch/arm/linux/se_workload.cc
M src/arch/x86/linux/syscall_tbl64.cc
10 files changed, 244 insertions(+), 236 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/freebsd/se_workload.cc  
b/src/arch/arm/freebsd/se_workload.cc

index 542510b..66e587e 100644
--- a/src/arch/arm/freebsd/se_workload.cc
+++ b/src/arch/arm/freebsd/se_workload.cc
@@ -136,7 +136,7 @@
 {4, "write", writeFunc },
 {   17, "obreak", brkFunc },
 {   54, "ioctl", ioctlFunc },
-{   58, "readlink", readlinkFunc },
+{   58, "readlink", readlinkFunc },
 {  117, "getrusage", getrusageFunc },
 {  189, "fstat", fstatFunc },
 #if !defined ( __GNU_LIBRARY__ )
diff --git a/src/arch/arm/linux/se_workload.cc  
b/src/arch/arm/linux/se_workload.cc

index 450d540..c715e1d 100644
--- a/src/arch/arm/linux/se_workload.cc
+++ b/src/arch/arm/linux/se_workload.cc
@@ -216,13 +216,13 @@
 { base + 81, "setgroups" },
 { base + 82, "reserved#82" },
 { base + 83, "symlink" },
-{ base + 85, "readlink", readlinkFunc },
+{ base + 85, "readlink", readlinkFunc },
 { base + 86, "uselib" },
 { base + 87, "swapon" },
 { base + 88, "reboot" },
 { base + 89, "readdir" },
 { base + 90, "mmap", mmapFunc },
-{ base + 91, "munmap", munmapFunc },
+{ base + 91, "munmap", munmapFunc },
 { base + 92, "truncate", truncateFunc },
 { base + 93, "ftruncate", ftruncateFunc },
 { base + 94, "fchmod" },
@@ -413,9 +413,9 @@
 { base + 287, "getpeername" },
 { base + 288, "socketpair" },
 { base + 289, "send" },
-{ base + 290, "sendto", sendtoFunc },
+{ base + 290, "sendto", sendtoFunc },
 { base + 291, "recv" },
-{ base + 292, "recvfrom", recvfromFunc },
+{ base + 292, "recvfrom", recvfromFunc },
 { base + 293, "shutdown" },
 { base + 294, "setsockopt" },
 { base + 295, "getsockopt" },
@@ -708,8 +708,8 @@
 {  base + 203, "connect" },
 {  base + 204, "getsockname" },
 {  base + 205, "getpeername" },
-{  base + 206, "sendto", sendtoFunc },
-{  base + 207, "recvfrom", recvfromFunc },
+{  base + 206, "sendto", sendtoFunc },
+{  base + 207, "recvfrom", recvfromFunc },
 {  base + 208, "setsockopt" },
 {  base + 209, "getsockopt" },
 {  base + 210, "shutdown" },
@@ -717,7 +717,7 @@
 {  base + 212, "recvmsg" },
 {  base + 213, "readahead" },
 {  base + 214, "brk", brkFunc },
-{  base + 215, "munmap", munmapFunc },
+{  base + 215, "munmap", munmapFunc },
 {  base + 216, "mremap", mremapFunc },
 {  base + 217, "add_key" },
 {  base + 218, "request_key" },
@@ -769,7 +769,7 @@
 { base + 1032, "lchown" },
 { base + 1033, "access", accessFunc },
 { base + 1034, "rename", renameFunc },
-{ base + 1035, "readlink", readlinkFunc },
+{ base + 1035, "readlink", readlinkFunc },
 { base + 1036, "symlink" },
 { base + 1037, "utimes" },
 { base + 1038, "stat64", stat64Func },
diff --git a/src/arch/mips/linux/se_workload.cc  
b/src/arch/mips/linux/se_workload.cc

index 647c0ca..09752d1 100644
--- a/src/arch/mips/linux/se_workload.cc
+++ b/src/arch/mips/linux/se_workload.cc
@@ -243,13 +243,13 @@
 { 4082, "reserved#82" },
 { 4083, "symlink" },
 { 4084, "unused#84" },
-{ 4085, "readlink", readlinkFunc },
+{ 4085, "readlink", readlinkFunc },
 { 4086, "uselib" },
 { 4087,

[gem5-dev] Change in gem5/gem5[develop]: sparc: Stop special casing FP enable checks for full system.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/48716 )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.
 )Change subject: sparc: Stop special casing FP enable checks for full  
system.

..

sparc: Stop special casing FP enable checks for full system.

Set the actual state which gets checked in full system, and then do that
all the time.

Change-Id: I27ea0939ad71f7399b676e22ec2e73e3e0dd6476
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48716
Tested-by: kokoro 
Reviewed-by: Boris Shingarov 
Maintainer: Gabe Black 
---
M src/arch/sparc/process.cc
M src/arch/sparc/isa/base.isa
2 files changed, 26 insertions(+), 9 deletions(-)

Approvals:
  Boris Shingarov: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa
index 89e48f0..9adc5ee 100644
--- a/src/arch/sparc/isa/base.isa
+++ b/src/arch/sparc/isa/base.isa
@@ -121,19 +121,15 @@
 /// Check "FP enabled" machine status bit.  Called when executing any  
FP

 /// instruction.
 /// @retval Full-system mode: NoFault if FP is enabled, FpDisabled
-/// if not.  Non-full-system mode: always returns NoFault.
+/// if not.
 static inline Fault
 checkFpEnableFault(ExecContext *xc)
 {
-if (FullSystem) {
-PSTATE pstate = xc->readMiscReg(MISCREG_PSTATE);
-if (pstate.pef && xc->readMiscReg(MISCREG_FPRS) & 0x4) {
-return NoFault;
-} else {
-return std::make_shared();
-}
-} else {
+PSTATE pstate = xc->readMiscReg(MISCREG_PSTATE);
+if (pstate.pef && xc->readMiscReg(MISCREG_FPRS) & 0x4) {
 return NoFault;
+} else {
+return std::make_shared();
 }
 }
 }};
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index e774b95..2ae9d4a 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -102,6 +102,9 @@
 // Set the MMU Primary Context Register to hold the process' pid
 tc->setMiscReg(MISCREG_MMU_P_CONTEXT, _pid);

+// Enable floating point.
+tc->setMiscReg(MISCREG_FPRS, 0x4);
+
 /*
  * T1 specific registers
  */
@@ -117,6 +120,7 @@
 ThreadContext *tc = system->threads[contextIds[0]];
 // The process runs in user mode with 32 bit addresses
 PSTATE pstate = 0;
+pstate.pef = 1;
 pstate.ie = 1;
 pstate.am = 1;
 tc->setMiscReg(MISCREG_PSTATE, pstate);
@@ -132,6 +136,7 @@
 ThreadContext *tc = system->threads[contextIds[0]];
 // The process runs in user mode
 PSTATE pstate = 0;
+pstate.pef = 1;
 pstate.ie = 1;
 tc->setMiscReg(MISCREG_PSTATE, pstate);


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I27ea0939ad71f7399b676e22ec2e73e3e0dd6476
Gerrit-Change-Number: 48716
Gerrit-PatchSet: 3
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Boris Shingarov 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch,sparc: Get rid of the unused checkVecEnableFault mechanism.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/48715 )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.
 )Change subject: arch,sparc: Get rid of the unused checkVecEnableFault  
mechanism.

..

arch,sparc: Get rid of the unused checkVecEnableFault mechanism.

The method was only defined in SPARC, and SPARC does not use the vector
register file.

Change-Id: I4112eadaecb1f1c6c6db12975bec0cd1fa245d6c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48715
Tested-by: kokoro 
Reviewed-by: Boris Shingarov 
Maintainer: Gabe Black 
---
M src/arch/isa_parser/isa_parser.py
M src/arch/sparc/isa/base.isa
2 files changed, 16 insertions(+), 8 deletions(-)

Approvals:
  Boris Shingarov: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/isa_parser/isa_parser.py  
b/src/arch/isa_parser/isa_parser.py

index a66059c..e084045 100755
--- a/src/arch/isa_parser/isa_parser.py
+++ b/src/arch/isa_parser/isa_parser.py
@@ -464,8 +464,6 @@
 # function (which should be provided by isa_desc via a declare)
 if 'IsFloating' in self.flags:
 self.fp_enable_check = 'fault = checkFpEnableFault(xc);'
-elif 'IsVector' in self.flags:
-self.fp_enable_check = 'fault = checkVecEnableFault(xc);'
 else:
 self.fp_enable_check = ''

diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa
index 5be3940..89e48f0 100644
--- a/src/arch/sparc/isa/base.isa
+++ b/src/arch/sparc/isa/base.isa
@@ -136,12 +136,6 @@
 return NoFault;
 }
 }
-
-static inline Fault
-checkVecEnableFault(ExecContext *xc)
-{
-return std::make_shared();
-}
 }};



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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4112eadaecb1f1c6c6db12975bec0cd1fa245d6c
Gerrit-Change-Number: 48715
Gerrit-PatchSet: 3
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Boris Shingarov 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Bobby R. Bruce 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem: Make ruby AbstractController compatible with XBar

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/50367 )


Change subject: mem: Make ruby AbstractController compatible with XBar
..

mem: Make ruby AbstractController compatible with XBar

At the moment the ruby AbstractController is trying to re-send the same
memory request every clock cycle until it finally succeeds [1]
(in other words it is not waiting for a recvReqRetry from the peer
port)

This polling behaviour is not compatible with the gem5 XBar, which is
panicking if it receives two consecutive requests to the same BUSY
layer [2]

This patch is fixing the incompatibility by inhibiting the
AbstractController retry until it gets a notification from the peer
response port

[1]: https://github.com/gem5/gem5/blob/v21.1.0.1/\
src/mem/ruby/slicc_interface/AbstractController.cc#L303
[2]: https://github.com/gem5/gem5/blob/v21.1.0.1/src/mem/xbar.cc#L196

Change-Id: I0ac38ce286051fb714844de569c2ebf85e71a523
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50367
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/mem/ruby/slicc_interface/AbstractController.cc
M src/mem/ruby/slicc_interface/AbstractController.hh
2 files changed, 36 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc  
b/src/mem/ruby/slicc_interface/AbstractController.cc

index c7f22a6..396b128 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -61,6 +61,7 @@
   m_transitions_per_cycle(p.transitions_per_cycle),
   m_buffer_size(p.buffer_size), m_recycle_latency(p.recycle_latency),
   m_mandatory_queue_latency(p.mandatory_queue_latency),
+  m_waiting_mem_retry(false),
   memoryPort(csprintf("%s.memory", name()), this),
   addrRanges(p.addr_ranges.begin(), p.addr_ranges.end()),
   stats(this)
@@ -255,7 +256,7 @@
 {
 auto mem_queue = getMemReqQueue();
 assert(mem_queue);
-if (!mem_queue->isReady(clockEdge())) {
+if (m_waiting_mem_retry || !mem_queue->isReady(clockEdge())) {
 return false;
 }

@@ -301,6 +302,7 @@
 scheduleEvent(Cycles(1));
 } else {
 scheduleEvent(Cycles(1));
+m_waiting_mem_retry = true;
 delete pkt;
 delete s;
 }
@@ -441,6 +443,7 @@
 void
 AbstractController::MemoryPort::recvReqRetry()
 {
+controller->m_waiting_mem_retry = false;
 controller->serviceMemoryQueue();
 }

diff --git a/src/mem/ruby/slicc_interface/AbstractController.hh  
b/src/mem/ruby/slicc_interface/AbstractController.hh

index 3fe2205..56c164f 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.hh
+++ b/src/mem/ruby/slicc_interface/AbstractController.hh
@@ -328,6 +328,7 @@
 const unsigned int m_buffer_size;
 Cycles m_recycle_latency;
 const Cycles m_mandatory_queue_latency;
+bool m_waiting_mem_retry;

 /**
  * Port that forwards requests and receives responses from the

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0ac38ce286051fb714844de569c2ebf85e71a523
Gerrit-Change-Number: 50367
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Bradford Beckmann 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base,arch-arm: Replace Stats namespace with statistics.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51528 )



Change subject: base,arch-arm: Replace Stats namespace with statistics.
..

base,arch-arm: Replace Stats namespace with statistics.

The Stats namespace is deprecated.

Change-Id: I17b1aa7fbced5db7b325e5339395281f3b3eda0b
---
M src/arch/arm/table_walker.cc
M src/base/stats/group.test.cc
2 files changed, 87 insertions(+), 76 deletions(-)



diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index ba1b4a4..73bcc5c 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -2519,8 +2519,8 @@
 parent.mmu->translateTiming(req, tc, this, mode, tranType, true);
 }

-TableWalker::TableWalkerStats::TableWalkerStats(Stats::Group *parent)
-: Stats::Group(parent),
+TableWalker::TableWalkerStats::TableWalkerStats(statistics::Group *parent)
+: statistics::Group(parent),
 ADD_STAT(walks, statistics::units::Count::get(),
  "Table walker walks requested"),
 ADD_STAT(walksShortDescriptor, statistics::units::Count::get(),
diff --git a/src/base/stats/group.test.cc b/src/base/stats/group.test.cc
index 92f125a..e2e0598 100644
--- a/src/base/stats/group.test.cc
+++ b/src/base/stats/group.test.cc
@@ -38,15 +38,15 @@
 /** Test that the constructor without a parent doesn't do anything. */
 TEST(StatsGroupTest, ConstructNoParent)
 {
-Stats::Group root(nullptr);
+statistics::Group root(nullptr);
 ASSERT_EQ(root.getStatGroups().size(), 0);
 }

 /** Test adding a single stat group to a root node. */
 TEST(StatsGroupTest, AddGetSingleStatGroup)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
 root.addStatGroup("Node1", );

 const auto root_map = root.getStatGroups();
@@ -59,9 +59,9 @@
 /** Test that group names are unique within a node's stat group. */
 TEST(StatsGroupDeathTest, AddUniqueNameStatGroup)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node2(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node2(nullptr);
 root.addStatGroup("Node1", );
 ASSERT_ANY_THROW(root.addStatGroup("Node1", ));
 }
@@ -69,10 +69,10 @@
 /** Test that group names are not unique among two nodes' stat groups. */
 TEST(StatsGroupTest, AddNotUniqueNameAmongGroups)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node2(nullptr);
-Stats::Group node1_1(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node2(nullptr);
+statistics::Group node1_1(nullptr);
 root.addStatGroup("Node1", );
 node1.addStatGroup("Node1_1", _1);
 ASSERT_NO_THROW(node1.addStatGroup("Node1", ));
@@ -81,23 +81,23 @@
 /** Test that a group cannot add a non-existent group. */
 TEST(StatsGroupDeathTest, AddNull)
 {
-Stats::Group root(nullptr);
+statistics::Group root(nullptr);
 ASSERT_ANY_THROW(root.addStatGroup("Node1", nullptr));
 }

 /** Test that a group cannot add itself. */
 TEST(StatsGroupDeathTest, AddItself)
 {
-Stats::Group root(nullptr);
+statistics::Group root(nullptr);
 ASSERT_ANY_THROW(root.addStatGroup("Node1", ));
 }

 /** @todo Test that a group cannot be added in a cycle. */
 TEST(StatsGroupDeathTest, DISABLED_AddCycle)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node1_1(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node1_1(nullptr);
 root.addStatGroup("Node1", );
 node1.addStatGroup("Node1_1", _1);
 ASSERT_ANY_THROW(node1_1.addStatGroup("Root", ));
@@ -106,9 +106,9 @@
 /** Test adding multiple stat groups to a root node. */
 TEST(StatsGroupTest, AddGetMultipleStatGroup)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node2(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node2(nullptr);
 root.addStatGroup("Node1", );
 root.addStatGroup("Node2", );

@@ -124,10 +124,10 @@
 /** Make sure that the groups are correctly assigned in the map. */
 TEST(StatsGroupTest, ConstructCorrectlyAssigned)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node1_1(nullptr);
-Stats::Group node1_1_1(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node1_1(nullptr);
+statistics::Group node1_1_1(nullptr);
 root.addStatGroup("Node1", );
 node1.addStatGroup("Node1_1", _1);
 node1_1.addStatGroup("Node1_1_1", _1_1);
@@ -146,8 +146,8 @@
  */
 TEST(StatsGroupTest, ConstructOneLevelLinear)
 {
-Stats::Group root(nullptr);
-Stats::Group

[gem5-dev] Change in gem5/gem5[develop]: mem: Stop using SlavePort as a base class.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51529 )



Change subject: mem: Stop using SlavePort as a base class.
..

mem: Stop using SlavePort as a base class.

There are other classes like "ExternalSlave" which still have the word
"Slave" in them, but at least this will make the build quit complaining
about the deprecated SlavePort.

Change-Id: I917c2880574cb77ea37c69dc2727ac5e84b83cd5
---
M src/mem/external_slave.hh
1 file changed, 16 insertions(+), 3 deletions(-)



diff --git a/src/mem/external_slave.hh b/src/mem/external_slave.hh
index 51c884b..17ab42a 100644
--- a/src/mem/external_slave.hh
+++ b/src/mem/external_slave.hh
@@ -69,7 +69,7 @@
 {
   public:
 /** Derive from this class to create an external port interface */
-class ExternalPort : public SlavePort
+class ExternalPort : public ResponsePort
 {
   protected:
 ExternalSlave 
@@ -77,7 +77,7 @@
   public:
 ExternalPort(const std::string _,
 ExternalSlave _) :
-SlavePort(name_, _), owner(owner_)
+ResponsePort(name_, _), owner(owner_)
 { }

 ~ExternalPort() { }
@@ -90,7 +90,7 @@

 /* Handlers are specific to *types* of port not specific port
  * instantiations.  A handler will typically build a bridge to the
- * external port from gem5 and provide gem5 with a SlavePort that can  
be
+ * external port from gem5 and provide gem5 with a ResponsePort that  
can be

  * bound to for each call to Handler::getExternalPort.*/
 class Handler
 {

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I917c2880574cb77ea37c69dc2727ac5e84b83cd5
Gerrit-Change-Number: 51529
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem: Replace SatCounter with SatCounter8 in the SHiP replacement policy.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51530 )



Change subject: mem: Replace SatCounter with SatCounter8 in the SHiP  
replacement policy.

..

mem: Replace SatCounter with SatCounter8 in the SHiP replacement policy.

Change-Id: Ibbc8e78df7119cdff62ad08b5c68f4237ca25cfe
---
M src/mem/cache/replacement_policies/ship_rp.cc
1 file changed, 10 insertions(+), 1 deletion(-)



diff --git a/src/mem/cache/replacement_policies/ship_rp.cc  
b/src/mem/cache/replacement_policies/ship_rp.cc

index 5243abb..853c107 100644
--- a/src/mem/cache/replacement_policies/ship_rp.cc
+++ b/src/mem/cache/replacement_policies/ship_rp.cc
@@ -71,7 +71,7 @@

 SHiP::SHiP(const Params )
   : BRRIP(p), insertionThreshold(p.insertion_threshold / 100.0),
-SHCT(p.shct_size, SatCounter(numRRPVBits))
+SHCT(p.shct_size, SatCounter8(numRRPVBits))
 {
 }


--
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Gerrit-Branch: develop
Gerrit-Change-Id: Ibbc8e78df7119cdff62ad08b5c68f4237ca25cfe
Gerrit-Change-Number: 51530
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: cpu: Eliminate the unused hasBranchTarget method in StaticInst.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51531 )



Change subject: cpu: Eliminate the unused hasBranchTarget method in  
StaticInst.

..

cpu: Eliminate the unused hasBranchTarget method in StaticInst.

This was once used to implement GDB single stepping back when it was
reimplemented for each ISA, but has not been used since 2014 when that
code was refactored.

Change-Id: If37ccfec2c43a33320d753c68892aa6fefd16b4f
---
M src/cpu/static_inst.cc
M src/cpu/static_inst.hh
2 files changed, 13 insertions(+), 24 deletions(-)



diff --git a/src/cpu/static_inst.cc b/src/cpu/static_inst.cc
index 903e3d7..1580759 100644
--- a/src/cpu/static_inst.cc
+++ b/src/cpu/static_inst.cc
@@ -33,23 +33,6 @@
 namespace gem5
 {

-bool
-StaticInst::hasBranchTarget(const TheISA::PCState , ThreadContext *tc,
-TheISA::PCState ) const
-{
-if (isDirectCtrl()) {
-tgt = branchTarget(pc);
-return true;
-}
-
-if (isIndirectCtrl()) {
-tgt = branchTarget(tc);
-return true;
-}
-
-return false;
-}
-
 StaticInstPtr
 StaticInst::fetchMicroop(MicroPC upc) const
 {
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index f63baf2..2039644 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -352,13 +352,6 @@
 virtual TheISA::PCState branchTarget(ThreadContext *tc) const;

 /**
- * Return true if the instruction is a control transfer, and if so,
- * return the target address as well.
- */
-bool hasBranchTarget(const TheISA::PCState , ThreadContext *tc,
-TheISA::PCState ) const;
-
-/**
  * Return string representation of disassembled instruction.
  * The default version of this function will call the internal
  * virtual generateDisassembly() function to get the string,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: If37ccfec2c43a33320d753c68892aa6fefd16b4f
Gerrit-Change-Number: 51531
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: arch-power: Replace the Loader namespace with loader.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51527 )



Change subject: arch-power: Replace the Loader namespace with loader.
..

arch-power: Replace the Loader namespace with loader.

The Loader namespace is deprecated, and is replaced with loader.

Change-Id: Ic973eefd55c6f8a43d3d41346b8b6e4795e19e55
---
M src/arch/power/insts/integer.cc
M src/arch/power/insts/integer.hh
M src/arch/power/insts/mem.cc
M src/arch/power/insts/mem.hh
4 files changed, 39 insertions(+), 28 deletions(-)



diff --git a/src/arch/power/insts/integer.cc  
b/src/arch/power/insts/integer.cc

index cf065a1..b1f10f4 100644
--- a/src/arch/power/insts/integer.cc
+++ b/src/arch/power/insts/integer.cc
@@ -117,7 +117,7 @@

 std::string
 IntArithOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = true;
@@ -175,7 +175,7 @@

 std::string
 IntImmArithOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool negateImm = false;
@@ -235,7 +235,7 @@

 std::string
 IntDispArithOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSrcs = true;
@@ -280,7 +280,7 @@

 std::string
 IntLogicOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = true;
@@ -344,7 +344,7 @@

 std::string
 IntImmLogicOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printRegs = true;
@@ -392,7 +392,7 @@

 std::string
 IntCompOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printFieldPrefix = false;
@@ -445,7 +445,7 @@

 std::string
 IntImmCompOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printFieldPrefix = false;
@@ -494,7 +494,7 @@

 std::string
 IntImmCompLogicOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printFieldPrefix = false;
@@ -604,7 +604,7 @@

 std::string
 IntConcatShiftOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = true;
@@ -751,7 +751,7 @@

 std::string
 IntConcatRotateOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = false;
@@ -832,7 +832,7 @@

 std::string
 IntTrapOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::string ext;
 std::stringstream ss;
@@ -883,7 +883,7 @@

 std::string
 IntImmTrapOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::string ext;
 std::stringstream ss;
diff --git a/src/arch/power/insts/integer.hh  
b/src/arch/power/insts/integer.hh

index 1c298a0..9417810 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -364,7 +364,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;
+Addr pc, const loader::SymbolTable *symtab) const override;
 };


@@ -385,7 +385,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;
+Addr pc, const loader::SymbolTable *symtab) const override;
 };


@@ -406,7 +406,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;
+Addr pc, const loader::SymbolTable *symtab) const override;
 };


@@ -429,7 +429,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;
+Addr pc, const loader::SymbolTable *symtab) const override;
 };


@@ -450,7 +450,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;

[gem5-dev] Change in gem5/gem5[develop]: sparc: Stop using fp_enable_check.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/48717 )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: sparc: Stop using fp_enable_check.
..

sparc: Stop using fp_enable_check.

SPARC and MIPS are the only ISAs using this mechanism. This is a step
towards making them self sufficient and simplifying the ISA parser, it's
interface to the rest of gem5, and it's assumptions about how ISAs are
structured.

Change-Id: Ied85d5012a806321fd717f654d940171da3450af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48717
Tested-by: kokoro 
Reviewed-by: Boris Shingarov 
Maintainer: Gabe Black 
---
M src/arch/sparc/isa/formats/mem/util.isa
M src/arch/sparc/isa/formats/mem/basicmem.isa
M src/arch/sparc/isa/formats/mem/blockmem.isa
M src/arch/sparc/isa/formats/mem/swap.isa
M src/arch/sparc/isa/decoder.isa
M src/arch/sparc/isa/formats/basic.isa
M src/arch/sparc/isa/base.isa
7 files changed, 122 insertions(+), 20 deletions(-)

Approvals:
  Boris Shingarov: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa
index 9adc5ee..8b118f4 100644
--- a/src/arch/sparc/isa/base.isa
+++ b/src/arch/sparc/isa/base.isa
@@ -123,10 +123,9 @@
 /// @retval Full-system mode: NoFault if FP is enabled, FpDisabled
 /// if not.
 static inline Fault
-checkFpEnableFault(ExecContext *xc)
+checkFpEnabled(PSTATE pstate, RegVal fprs)
 {
-PSTATE pstate = xc->readMiscReg(MISCREG_PSTATE);
-if (pstate.pef && xc->readMiscReg(MISCREG_FPRS) & 0x4) {
+if (pstate.pef && fprs & 0x4) {
 return NoFault;
 } else {
 return std::make_shared();
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index 9c85cdf..7296c1a 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -1258,7 +1258,7 @@
  }}, MEM_SWAP);

 format Trap {
-0x20: Load::ldf({{Frds_uw = Mem_uw;}});
+0x20: Loadf::ldf({{Frds_uw = Mem_uw;}});
 0x21: decode RD {
 0x0: Load::ldfsr({{fault = checkFpEnableFault(xc);
  if (fault)
@@ -1271,8 +1271,8 @@
 default: FailUnimpl::ldfsrOther();
 }
 0x22: ldqf({{fault = std::make_shared();}});
-0x23: Load::lddf({{Frd_udw = Mem_udw;}});
-0x24: Store::stf({{Mem_uw = Frds_uw;}});
+0x23: Loadf::lddf({{Frd_udw = Mem_udw;}});
+0x24: Storef::stf({{Mem_uw = Frds_uw;}});
 0x25: decode RD {
 0x0: StoreFsr::stfsr({{fault = checkFpEnableFault(xc);
if (fault)
@@ -1285,11 +1285,11 @@
 default: FailUnimpl::stfsrOther();
 }
 0x26: stqf({{fault = std::make_shared();}});
-0x27: Store::stdf({{Mem_udw = Frd_udw;}});
+0x27: Storef::stdf({{Mem_udw = Frd_udw;}});
 0x2D: Nop::prefetch();
-0x30: LoadAlt::ldfa({{Frds_uw = Mem_uw;}});
+0x30: LoadfAlt::ldfa({{Frds_uw = Mem_uw;}});
 0x32: ldqfa({{fault = std::make_shared();}});
-format LoadAlt {
+format LoadfAlt {
 0x33: decode EXT_ASI {
 // ASI_NUCLEUS
 0x04: FailUnimpl::lddfa_n();
@@ -1328,7 +1328,7 @@
 // ASI_SECONDARY_NO_FAULT_LITTLE
 0x8B: FailUnimpl::lddfa_snfl();

-format BlockLoad {
+format BlockLoadf {
 // LDBLOCKF
 // ASI_BLOCK_AS_IF_USER_PRIMARY
 0x16: FailUnimpl::ldblockf_aiup();
@@ -1370,9 +1370,9 @@
 {{fault =  
std::make_shared();}});

 }
 }
-0x34: Store::stfa({{Mem_uw = Frds_uw;}});
+0x34: Storef::stfa({{Mem_uw = Frds_uw;}});
 0x36: stqfa({{fault = std::make_shared();}});
-format StoreAlt {
+format StorefAlt {
 0x37: decode EXT_ASI {
 // ASI_NUCLEUS
 0x04: FailUnimpl::stdfa_n();
@@ -1411,7 +1411,7 @@
 // ASI_SECONDARY_NO_FAULT_LITTLE
 0x8B: FailUnimpl::stdfa_snfl();

-format BlockStore {
+format BlockStoref {
 // STBLOCKF
 // ASI_BLOCK_AS_IF_USER_PRIMARY
 0x16: FailUnimpl::stblockf_aiup();
diff --git a/src/arch/sparc/isa/formats/basic.isa  
b/src/arch/sparc/isa/formats/basic.isa

index e0441b3..0d2346d 100644
---

[gem5-dev] Build failed in Jenkins: nightly #10

2021-10-13 Thread jenkins-no-reply--- via gem5-dev

See 

Changes:

[quentin.forcioli] dev-arm: Added trusted DRAM to vexpress Realview

[giacomo.travaglini] sim-se: Rewrite some syscalls to use a syscallImpl function

[giacomo.travaglini] sim-se: Implement at suffixed syscalls

[giacomo.travaglini] arch-arm: Add existing at impl to ArmLinux32 Syscall Table

[giacomo.travaglini] sim-se: Implemnt fchownat syscall

[giacomo.travaglini] arch-arm: Add fchown implementation to the Syscall Table

[giacomo.travaglini] arch-arm: Add fchownat implementation to the Syscall Table

[mattdsinclair] dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA Queues

[mattdsinclair] tests: fix square and HeteroSync nightly regression command

[giacomo.travaglini] mem-ruby: HTMSequencer stats initialized twice

[gabe.black] scons: Pull the code which generates debug/flags.cc into a helper 
script.

[gabe.black] scons: Rearrange functions to be next to the code that uses them.

[Bobby R. Bruce] tests: Fix argparse description in simple_binary_run.py

[mail] python: Fix L1 data cache size in cache components


--
[...truncated 847.41 KB...]
 [ CXX] GCN3_X86/python/_m5/param_PciMemBar.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PciMemUpperBar.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PciVirtIO.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PerfectCompressor.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PioDevice.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_Platform.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PoolManager.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PowerDomain.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PowerModel.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PowerModelState.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PowerState.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_ProbeListenerObject.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_Process.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_ProtocolTester.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_PyTrafficGen.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSFixedPriorityPolicy.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSMemCtrl.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkCtrl.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkInterface.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSPolicy.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSPropFairPolicy.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSTurnaroundPolicy.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QoSTurnaroundPolicyIdeal.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_QueuedPrefetcher.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RandomRP.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RangeAddrMapper.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RawDiskImage.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RedirectPath.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RegisterFile.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RegisterManager.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RepeatedQwordsCompressor.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_Root.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyCache.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyController.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyDirectedTester.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyDirectoryMemory.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyGPUCoalescer.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyHTMSequencer.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyNetwork.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyPort.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyPortProxy.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyPrefetcher.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubySequencer.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubySystem.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyTester.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_RubyWireBuffer.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SBOOEPrefetcher.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SEWorkload.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SHiPMemRP.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SHiPPCRP.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SHiPRP.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SQC_Controller.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_STeMSPrefetcher.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_ScalarRegisterFile.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SecondChanceRP.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SectorTags.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SerialDevice.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SerialLink.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SerialNullDevice.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SeriesRequestGenerator.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_SetAssociative.cc -> .o
 [ CXX] GCN3_X86/python/_m5/param_Shader.cc -> .o
 [ CXX]

[gem5-dev] Re: Build failed in Jenkins: nightly #10

2021-10-13 Thread Bobby Bruce via gem5-dev

Ah, yeah, that's probably the problem. For clarity, all the nightly tests
do is run `./tests/nightly.sh 16` from the gem5 root. Likewise, all the
weekly tests do is run `./tests/weekly.sh 16` from the gem5 root. If you
can update the tests with this assumption in mind, they should pass.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Wed, Oct 13, 2021 at 10:36 AM Matt Sinclair via gem5-dev <
gem5-dev@gem5.org> wrote:

> (Resending as my prior email bounced)
>
> Matt
>
> On Wed, Oct 13, 2021 at 10:21 AM Matt Sinclair 
> wrote:
>
>> I believe the weekly tests will fail until this is merged in:
>> https://gem5-review.googlesource.com/c/public/gem5/+/51207
>>
>> Jason, I will follow-up with Kyle today about the additional change you
>> requested last night on 51207.
>>
>> Regarding the nightly tests, where is the test being run from?  I tested
>> that everything works correctly on my machine, but I'm running from the
>> GEM5_ROOT/tests/ folder.  Looking at the error:
>>
>> *06:03:29* + wget -qN 
>> http://dist.gem5.org/dist/develop/test-progs/square/square*06:03:31* + mkdir 
>> -p tests/testing-results*06:03:31* + docker run --rm -u 118: --volume 
>> /nobackup/jenkins/workspace/nightly/tests/..:/nobackup/jenkins/workspace/nightly/tests/..
>>  -w /nobackup/jenkins/workspace/nightly/tests/.. 
>> gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt 
>> configs/example/apu_se.py -n3 
>> --benchmark-root=/nobackup/jenkins/workspace/nightly/tests/../tests -c 
>> square*06:03:31* *fatal: square not found in 
>> ['/nobackup/jenkins/workspace/nightly/tests/../tests']*
>>
>> It seems like you must be assuming a different folder?  I can definitely
>> update the nightly tests to fix this, but need to understand where the test
>> is being run from first, since things are working for me locally with the
>> aforementioned assumption.
>>
>> Matt
>>
>> On Wed, Oct 13, 2021 at 9:30 AM Jason Lowe-Power via gem5-dev <
>> gem5-dev@gem5.org> wrote:
>>
>>> Looks like the failure is in the GPU tests (note: the weekly tests are
>>> also failing due to GPU errors).
>>>
>>> https://jenkins.gem5.org/job/nightly/10/console
>>>
>>> On Wed, Oct 13, 2021 at 4:03 AM jenkins-no-reply--- via gem5-dev <
>>> gem5-dev@gem5.org> wrote:
>>>
 See <
 https://jenkins.gem5.org/job/nightly/10/display/redirect?page=changes>

 Changes:

 [quentin.forcioli] dev-arm: Added trusted DRAM to vexpress Realview

 [giacomo.travaglini] sim-se: Rewrite some syscalls to use a syscallImpl
 function

 [giacomo.travaglini] sim-se: Implement at suffixed syscalls

 [giacomo.travaglini] arch-arm: Add existing at impl to ArmLinux32
 Syscall Table

 [giacomo.travaglini] sim-se: Implemnt fchownat syscall

 [giacomo.travaglini] arch-arm: Add fchown implementation to the Syscall
 Table

 [giacomo.travaglini] arch-arm: Add fchownat implementation to the
 Syscall Table

 [mattdsinclair] dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA
 Queues

 [mattdsinclair] tests: fix square and HeteroSync nightly regression
 command

 [giacomo.travaglini] mem-ruby: HTMSequencer stats initialized twice

 [gabe.black] scons: Pull the code which generates debug/flags.cc into a
 helper script.

 [gabe.black] scons: Rearrange functions to be next to the code that
 uses them.

 [Bobby R. Bruce] tests: Fix argparse description in simple_binary_run.py

 [mail] python: Fix L1 data cache size in cache components


 --
 [...truncated 847.41 KB...]
  [ CXX] GCN3_X86/python/_m5/param_PciMemBar.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PciMemUpperBar.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PciVirtIO.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PerfectCompressor.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PioDevice.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_Platform.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PoolManager.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PowerDomain.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PowerModel.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PowerModelState.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PowerState.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_ProbeListenerObject.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_Process.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_ProtocolTester.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_PyTrafficGen.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_QoSFixedPriorityPolicy.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_QoSMemCtrl.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkCtrl.cc -> .o
  [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkInterface.cc -> .o
  [ CXX]

[gem5-dev] Re: Build failed in Jenkins: nightly #10

2021-10-13 Thread Bobby Bruce via gem5-dev

Fix for the nightly tests here:
https://gem5-review.googlesource.com/c/public/gem5/+/51607

I've verified this fixes the issue.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Wed, Oct 13, 2021 at 10:50 AM Bobby Bruce  wrote:

> Ah, yeah, that's probably the problem. For clarity, all the nightly tests
> do is run `./tests/nightly.sh 16` from the gem5 root. Likewise, all the
> weekly tests do is run `./tests/weekly.sh 16` from the gem5 root. If you
> can update the tests with this assumption in mind, they should pass.
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Wed, Oct 13, 2021 at 10:36 AM Matt Sinclair via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
>> (Resending as my prior email bounced)
>>
>> Matt
>>
>> On Wed, Oct 13, 2021 at 10:21 AM Matt Sinclair 
>> wrote:
>>
>>> I believe the weekly tests will fail until this is merged in:
>>> https://gem5-review.googlesource.com/c/public/gem5/+/51207
>>>
>>> Jason, I will follow-up with Kyle today about the additional change you
>>> requested last night on 51207.
>>>
>>> Regarding the nightly tests, where is the test being run from?  I tested
>>> that everything works correctly on my machine, but I'm running from the
>>> GEM5_ROOT/tests/ folder.  Looking at the error:
>>>
>>> *06:03:29* + wget -qN 
>>> http://dist.gem5.org/dist/develop/test-progs/square/square*06:03:31* + 
>>> mkdir -p tests/testing-results*06:03:31* + docker run --rm -u 118: --volume 
>>> /nobackup/jenkins/workspace/nightly/tests/..:/nobackup/jenkins/workspace/nightly/tests/..
>>>  -w /nobackup/jenkins/workspace/nightly/tests/.. 
>>> gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt 
>>> configs/example/apu_se.py -n3 
>>> --benchmark-root=/nobackup/jenkins/workspace/nightly/tests/../tests -c 
>>> square*06:03:31* *fatal: square not found in 
>>> ['/nobackup/jenkins/workspace/nightly/tests/../tests']*
>>>
>>> It seems like you must be assuming a different folder?  I can definitely
>>> update the nightly tests to fix this, but need to understand where the test
>>> is being run from first, since things are working for me locally with the
>>> aforementioned assumption.
>>>
>>> Matt
>>>
>>> On Wed, Oct 13, 2021 at 9:30 AM Jason Lowe-Power via gem5-dev <
>>> gem5-dev@gem5.org> wrote:
>>>
 Looks like the failure is in the GPU tests (note: the weekly tests are
 also failing due to GPU errors).

 https://jenkins.gem5.org/job/nightly/10/console

 On Wed, Oct 13, 2021 at 4:03 AM jenkins-no-reply--- via gem5-dev <
 gem5-dev@gem5.org> wrote:

> See <
> https://jenkins.gem5.org/job/nightly/10/display/redirect?page=changes>
>
> Changes:
>
> [quentin.forcioli] dev-arm: Added trusted DRAM to vexpress Realview
>
> [giacomo.travaglini] sim-se: Rewrite some syscalls to use a
> syscallImpl function
>
> [giacomo.travaglini] sim-se: Implement at suffixed syscalls
>
> [giacomo.travaglini] arch-arm: Add existing at impl to ArmLinux32
> Syscall Table
>
> [giacomo.travaglini] sim-se: Implemnt fchownat syscall
>
> [giacomo.travaglini] arch-arm: Add fchown implementation to the
> Syscall Table
>
> [giacomo.travaglini] arch-arm: Add fchownat implementation to the
> Syscall Table
>
> [mattdsinclair] dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA
> Queues
>
> [mattdsinclair] tests: fix square and HeteroSync nightly regression
> command
>
> [giacomo.travaglini] mem-ruby: HTMSequencer stats initialized twice
>
> [gabe.black] scons: Pull the code which generates debug/flags.cc into
> a helper script.
>
> [gabe.black] scons: Rearrange functions to be next to the code that
> uses them.
>
> [Bobby R. Bruce] tests: Fix argparse description in
> simple_binary_run.py
>
> [mail] python: Fix L1 data cache size in cache components
>
>
> --
> [...truncated 847.41 KB...]
>  [ CXX] GCN3_X86/python/_m5/param_PciMemBar.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PciMemUpperBar.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PciVirtIO.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PerfectCompressor.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PioDevice.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_Platform.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PoolManager.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerDomain.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerModel.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerModelState.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerState.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_ProbeListenerObject.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_Process.cc -> .o
>  [ CXX]

[gem5-dev] Change in gem5/gem5[develop]: tests: Fix the nightly GPU tests

2021-10-13 Thread Bobby R. Bruce (Gerrit) via gem5-dev

Bobby R. Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51607 )



Change subject: tests: Fix the nightly GPU tests
..

tests: Fix the nightly GPU tests

The nightly tests failed:
https://www.mail-archive.com/gem5-dev@gem5.org/msg40828.html

This failure was due to new GPU tests assuming tests were executed from
the `tests` directory. They are actually executed from the gem5 root.
This patch fixes the error.

Change-Id: Ie5f86ef4eb13134a2a3d0291422f65c9ee355a92
---
M tests/nightly.sh
1 file changed, 21 insertions(+), 5 deletions(-)



diff --git a/tests/nightly.sh b/tests/nightly.sh
index 89c7005..30e2c58 100755
--- a/tests/nightly.sh
+++ b/tests/nightly.sh
@@ -101,7 +101,7 @@
 # basic GPU functionality is working.
 docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\
-configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" -c  
square

+configs/example/apu_se.py -n3 -c square

 # get HeteroSync
 wget -qN  
http://dist.gem5.org/dist/develop/test-progs/heterosync/gcn3/allSyncPrims-1kernel

@@ -112,8 +112,8 @@
 # atomics are tested.
 docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

-configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" \
--c allSyncPrims-1kernel --options="sleepMutex 10 16 4"
+configs/example/apu_se.py -n3  -c allSyncPrims-1kernel \
+--options="sleepMutex 10 16 4"

 # run HeteroSync LFBarr -- similar setup to sleepMutex above -- 16 WGs
 # accessing unique data and then joining a lock-free barrier, 10 Ld/St per
@@ -122,5 +122,5 @@
 # atomics are tested.
 docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

-configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" \
--c allSyncPrims-1kernel --options="lfTreeBarrUniq 10 16 4"
+configs/example/apu_se.py -n3  -c allSyncPrims-1kernel \
+--options="lfTreeBarrUniq 10 16 4"

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/51607
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie5f86ef4eb13134a2a3d0291422f65c9ee355a92
Gerrit-Change-Number: 51607
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby R. Bruce 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: python: Add check to SimObject for init

2021-10-13 Thread Jason Lowe-Power (Gerrit) via gem5-dev

Jason Lowe-Power has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51568 )



Change subject: python: Add check to SimObject for __init__
..

python: Add check to SimObject for __init__

When extending a SimObject by subclassing, if you don't call
`super().__init__()` you get a confusing infinite recursion error. The
infinite recursion occurs because SimObject overrides `__getattr__`. So,
if an attribute is accessed that is set in SimObject.__init__ but that
function hasn't been called there's a problem.

This patch adds another member variable to track if __init__ has been
called. This member variable is set to False in the *meta class*  so
that it will always be available, even if __init__ has not been called.
There is one check for whether init has been called in the __getattr__
function. This is where I have experienced prior issues. This function
could be called from other SimObject functions, if needed.

With this change, a helpful error is shown telling the user to be sure
to call super().__init__ in the specific class that is missing the call.

Note: I have been bitten by this an embarrassing number of times. A
helpful error message would have saved me many hours.

Change-Id: Id919c540b23fc2783e203ef625bce3000ba808a9
Signed-off-by: Jason Lowe-Power 
---
M src/python/m5/SimObject.py
1 file changed, 41 insertions(+), 0 deletions(-)



diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index d18d879..923700d 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -479,6 +479,7 @@
 cls._children = multidict() # SimObject children
 cls._port_refs = multidict() # port ref objects
 cls._instantiated = False # really instantiated, cloned, or  
subclassed

+cls._init_called = False # Used to check if __init__ overridden

 # We don't support multiple inheritance of sim objects.  If you  
want
 # to, you must fix multidict to deal with it properly. Non  
sim-objects

@@ -1323,6 +1324,7 @@
 self._ccObject = None  # pointer to C++ object
 self._ccParams = None
 self._instantiated = False # really "cloned"
+self._init_called = True # Checked so subclasses don't forget  
__init__


 # Clone children specified at class level.  No need for a
 # multidict here since we will be cloning everything.
@@ -1352,6 +1354,14 @@
 for key,val in kwargs.items():
 setattr(self, key, val)

+def _check_init(self):
+"""Utility function to check to make sure that all subclasses call
+__init__
+"""
+if not self._init_called:
+raise RuntimeError(f"{str(self.__class__)} is missing a call "
+"to super().__init__()")
+
 # "Clone" the current instance by creating another instance of
 # this instance's class, but that inherits its parameter values
 # and port mappings from the current instance.  If we're in a
@@ -1385,6 +1395,8 @@
 return ref

 def __getattr__(self, attr):
+self._check_init() # Check for inifinite recursion
+
 if attr in self._deprecated_params:
 dep_param = self._deprecated_params[attr]
 dep_param.printWarning(self._name, self.__class__.__name__)

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id919c540b23fc2783e203ef625bce3000ba808a9
Gerrit-Change-Number: 51568
Gerrit-PatchSet: 1
Gerrit-Owner: Jason Lowe-Power 
Gerrit-MessageType: newchange
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[gem5-dev] Re: Build failed in Jenkins: nightly #10

2021-10-13 Thread Matt Sinclair via gem5-dev

Thanks Bobby!  Good to know for future reference.  I suspect I need to
update the weekly tests accordingly too.

Matt

On Wed, Oct 13, 2021 at 1:15 PM Bobby Bruce  wrote:

> Fix for the nightly tests here:
> https://gem5-review.googlesource.com/c/public/gem5/+/51607
>
> I've verified this fixes the issue.
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Wed, Oct 13, 2021 at 10:50 AM Bobby Bruce  wrote:
>
>> Ah, yeah, that's probably the problem. For clarity, all the nightly tests
>> do is run `./tests/nightly.sh 16` from the gem5 root. Likewise, all the
>> weekly tests do is run `./tests/weekly.sh 16` from the gem5 root. If you
>> can update the tests with this assumption in mind, they should pass.
>>
>> --
>> Dr. Bobby R. Bruce
>> Room 3050,
>> Kemper Hall, UC Davis
>> Davis,
>> CA, 95616
>>
>> web: https://www.bobbybruce.net
>>
>>
>> On Wed, Oct 13, 2021 at 10:36 AM Matt Sinclair via gem5-dev <
>> gem5-dev@gem5.org> wrote:
>>
>>> (Resending as my prior email bounced)
>>>
>>> Matt
>>>
>>> On Wed, Oct 13, 2021 at 10:21 AM Matt Sinclair 
>>> wrote:
>>>
 I believe the weekly tests will fail until this is merged in:
 https://gem5-review.googlesource.com/c/public/gem5/+/51207

 Jason, I will follow-up with Kyle today about the additional change you
 requested last night on 51207.

 Regarding the nightly tests, where is the test being run from?  I
 tested that everything works correctly on my machine, but I'm running from
 the GEM5_ROOT/tests/ folder.  Looking at the error:

 *06:03:29* + wget -qN 
 http://dist.gem5.org/dist/develop/test-progs/square/square*06:03:31* + 
 mkdir -p tests/testing-results*06:03:31* + docker run --rm -u 118: 
 --volume 
 /nobackup/jenkins/workspace/nightly/tests/..:/nobackup/jenkins/workspace/nightly/tests/..
  -w /nobackup/jenkins/workspace/nightly/tests/.. 
 gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt 
 configs/example/apu_se.py -n3 
 --benchmark-root=/nobackup/jenkins/workspace/nightly/tests/../tests -c 
 square*06:03:31* *fatal: square not found in 
 ['/nobackup/jenkins/workspace/nightly/tests/../tests']*

 It seems like you must be assuming a different folder?  I can
 definitely update the nightly tests to fix this, but need to understand
 where the test is being run from first, since things are working for me
 locally with the aforementioned assumption.

 Matt

 On Wed, Oct 13, 2021 at 9:30 AM Jason Lowe-Power via gem5-dev <
 gem5-dev@gem5.org> wrote:

> Looks like the failure is in the GPU tests (note: the weekly tests are
> also failing due to GPU errors).
>
> https://jenkins.gem5.org/job/nightly/10/console
>
> On Wed, Oct 13, 2021 at 4:03 AM jenkins-no-reply--- via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
>> See <
>> https://jenkins.gem5.org/job/nightly/10/display/redirect?page=changes
>> >
>>
>> Changes:
>>
>> [quentin.forcioli] dev-arm: Added trusted DRAM to vexpress Realview
>>
>> [giacomo.travaglini] sim-se: Rewrite some syscalls to use a
>> syscallImpl function
>>
>> [giacomo.travaglini] sim-se: Implement at suffixed syscalls
>>
>> [giacomo.travaglini] arch-arm: Add existing at impl to ArmLinux32
>> Syscall Table
>>
>> [giacomo.travaglini] sim-se: Implemnt fchownat syscall
>>
>> [giacomo.travaglini] arch-arm: Add fchown implementation to the
>> Syscall Table
>>
>> [giacomo.travaglini] arch-arm: Add fchownat implementation to the
>> Syscall Table
>>
>> [mattdsinclair] dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA
>> Queues
>>
>> [mattdsinclair] tests: fix square and HeteroSync nightly regression
>> command
>>
>> [giacomo.travaglini] mem-ruby: HTMSequencer stats initialized twice
>>
>> [gabe.black] scons: Pull the code which generates debug/flags.cc into
>> a helper script.
>>
>> [gabe.black] scons: Rearrange functions to be next to the code that
>> uses them.
>>
>> [Bobby R. Bruce] tests: Fix argparse description in
>> simple_binary_run.py
>>
>> [mail] python: Fix L1 data cache size in cache components
>>
>>
>> --
>> [...truncated 847.41 KB...]
>>  [ CXX] GCN3_X86/python/_m5/param_PciMemBar.cc -> .o
>>  [ CXX] GCN3_X86/python/_m5/param_PciMemUpperBar.cc -> .o
>>  [ CXX] GCN3_X86/python/_m5/param_PciVirtIO.cc -> .o
>>  [ CXX] GCN3_X86/python/_m5/param_PerfectCompressor.cc -> .o
>>  [ CXX] GCN3_X86/python/_m5/param_PioDevice.cc -> .o
>>  [ CXX] GCN3_X86/python/_m5/param_Platform.cc -> .o
>>  [ CXX] GCN3_X86/python/_m5/param_PoolManager.cc -> .o
>>  [ CXX] GCN3_X86/python/_m5/param_PowerDomain.cc -> .o
>>  [ CXX]

[gem5-dev] Re: Build failed in Jenkins: nightly #10

2021-10-13 Thread Matt Sinclair via gem5-dev

(Resending as my prior email bounced)

Matt

On Wed, Oct 13, 2021 at 10:21 AM Matt Sinclair  wrote:

> I believe the weekly tests will fail until this is merged in:
> https://gem5-review.googlesource.com/c/public/gem5/+/51207
>
> Jason, I will follow-up with Kyle today about the additional change you
> requested last night on 51207.
>
> Regarding the nightly tests, where is the test being run from?  I tested
> that everything works correctly on my machine, but I'm running from the
> GEM5_ROOT/tests/ folder.  Looking at the error:
>
> *06:03:29* + wget -qN 
> http://dist.gem5.org/dist/develop/test-progs/square/square*06:03:31* + mkdir 
> -p tests/testing-results*06:03:31* + docker run --rm -u 118: --volume 
> /nobackup/jenkins/workspace/nightly/tests/..:/nobackup/jenkins/workspace/nightly/tests/..
>  -w /nobackup/jenkins/workspace/nightly/tests/.. 
> gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt 
> configs/example/apu_se.py -n3 
> --benchmark-root=/nobackup/jenkins/workspace/nightly/tests/../tests -c 
> square*06:03:31* *fatal: square not found in 
> ['/nobackup/jenkins/workspace/nightly/tests/../tests']*
>
> It seems like you must be assuming a different folder?  I can definitely
> update the nightly tests to fix this, but need to understand where the test
> is being run from first, since things are working for me locally with the
> aforementioned assumption.
>
> Matt
>
> On Wed, Oct 13, 2021 at 9:30 AM Jason Lowe-Power via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
>> Looks like the failure is in the GPU tests (note: the weekly tests are
>> also failing due to GPU errors).
>>
>> https://jenkins.gem5.org/job/nightly/10/console
>>
>> On Wed, Oct 13, 2021 at 4:03 AM jenkins-no-reply--- via gem5-dev <
>> gem5-dev@gem5.org> wrote:
>>
>>> See <
>>> https://jenkins.gem5.org/job/nightly/10/display/redirect?page=changes>
>>>
>>> Changes:
>>>
>>> [quentin.forcioli] dev-arm: Added trusted DRAM to vexpress Realview
>>>
>>> [giacomo.travaglini] sim-se: Rewrite some syscalls to use a syscallImpl
>>> function
>>>
>>> [giacomo.travaglini] sim-se: Implement at suffixed syscalls
>>>
>>> [giacomo.travaglini] arch-arm: Add existing at impl to ArmLinux32
>>> Syscall Table
>>>
>>> [giacomo.travaglini] sim-se: Implemnt fchownat syscall
>>>
>>> [giacomo.travaglini] arch-arm: Add fchown implementation to the Syscall
>>> Table
>>>
>>> [giacomo.travaglini] arch-arm: Add fchownat implementation to the
>>> Syscall Table
>>>
>>> [mattdsinclair] dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA Queues
>>>
>>> [mattdsinclair] tests: fix square and HeteroSync nightly regression
>>> command
>>>
>>> [giacomo.travaglini] mem-ruby: HTMSequencer stats initialized twice
>>>
>>> [gabe.black] scons: Pull the code which generates debug/flags.cc into a
>>> helper script.
>>>
>>> [gabe.black] scons: Rearrange functions to be next to the code that uses
>>> them.
>>>
>>> [Bobby R. Bruce] tests: Fix argparse description in simple_binary_run.py
>>>
>>> [mail] python: Fix L1 data cache size in cache components
>>>
>>>
>>> --
>>> [...truncated 847.41 KB...]
>>>  [ CXX] GCN3_X86/python/_m5/param_PciMemBar.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PciMemUpperBar.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PciVirtIO.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PerfectCompressor.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PioDevice.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_Platform.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PoolManager.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PowerDomain.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PowerModel.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PowerModelState.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PowerState.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_ProbeListenerObject.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_Process.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_ProtocolTester.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_PyTrafficGen.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSFixedPriorityPolicy.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSMemCtrl.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkCtrl.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkInterface.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSPolicy.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSPropFairPolicy.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSTurnaroundPolicy.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QoSTurnaroundPolicyIdeal.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_QueuedPrefetcher.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_RandomRP.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_RangeAddrMapper.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_RawDiskImage.cc -> .o
>>>  [ CXX] GCN3_X86/python/_m5/param_RedirectPath.cc -> .o
>>>  [ CXX]

[gem5-dev] Re: Build failed in Jenkins: nightly #10

2021-10-13 Thread Bobby Bruce via gem5-dev

In fairness, I think the tests should ideally pass regardless as to where
they are executed from, but that's not a priority right now :).

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Wed, Oct 13, 2021 at 11:19 AM Matt Sinclair 
wrote:

> Thanks Bobby!  Good to know for future reference.  I suspect I need to
> update the weekly tests accordingly too.
>
> Matt
>
> On Wed, Oct 13, 2021 at 1:15 PM Bobby Bruce  wrote:
>
>> Fix for the nightly tests here:
>> https://gem5-review.googlesource.com/c/public/gem5/+/51607
>>
>> I've verified this fixes the issue.
>>
>> --
>> Dr. Bobby R. Bruce
>> Room 3050,
>> Kemper Hall, UC Davis
>> Davis,
>> CA, 95616
>>
>> web: https://www.bobbybruce.net
>>
>>
>> On Wed, Oct 13, 2021 at 10:50 AM Bobby Bruce  wrote:
>>
>>> Ah, yeah, that's probably the problem. For clarity, all the nightly
>>> tests do is run `./tests/nightly.sh 16` from the gem5 root. Likewise, all
>>> the weekly tests do is run `./tests/weekly.sh 16` from the gem5 root. If
>>> you can update the tests with this assumption in mind, they should pass.
>>>
>>> --
>>> Dr. Bobby R. Bruce
>>> Room 3050,
>>> Kemper Hall, UC Davis
>>> Davis,
>>> CA, 95616
>>>
>>> web: https://www.bobbybruce.net
>>>
>>>
>>> On Wed, Oct 13, 2021 at 10:36 AM Matt Sinclair via gem5-dev <
>>> gem5-dev@gem5.org> wrote:
>>>
 (Resending as my prior email bounced)

 Matt

 On Wed, Oct 13, 2021 at 10:21 AM Matt Sinclair 
 wrote:

> I believe the weekly tests will fail until this is merged in:
> https://gem5-review.googlesource.com/c/public/gem5/+/51207
>
> Jason, I will follow-up with Kyle today about the additional change
> you requested last night on 51207.
>
> Regarding the nightly tests, where is the test being run from?  I
> tested that everything works correctly on my machine, but I'm running from
> the GEM5_ROOT/tests/ folder.  Looking at the error:
>
> *06:03:29* + wget -qN 
> http://dist.gem5.org/dist/develop/test-progs/square/square*06:03:31* + 
> mkdir -p tests/testing-results*06:03:31* + docker run --rm -u 118: 
> --volume 
> /nobackup/jenkins/workspace/nightly/tests/..:/nobackup/jenkins/workspace/nightly/tests/..
>  -w /nobackup/jenkins/workspace/nightly/tests/.. 
> gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt 
> configs/example/apu_se.py -n3 
> --benchmark-root=/nobackup/jenkins/workspace/nightly/tests/../tests -c 
> square*06:03:31* *fatal: square not found in 
> ['/nobackup/jenkins/workspace/nightly/tests/../tests']*
>
> It seems like you must be assuming a different folder?  I can
> definitely update the nightly tests to fix this, but need to understand
> where the test is being run from first, since things are working for me
> locally with the aforementioned assumption.
>
> Matt
>
> On Wed, Oct 13, 2021 at 9:30 AM Jason Lowe-Power via gem5-dev <
> gem5-dev@gem5.org> wrote:
>
>> Looks like the failure is in the GPU tests (note: the weekly tests
>> are also failing due to GPU errors).
>>
>> https://jenkins.gem5.org/job/nightly/10/console
>>
>> On Wed, Oct 13, 2021 at 4:03 AM jenkins-no-reply--- via gem5-dev <
>> gem5-dev@gem5.org> wrote:
>>
>>> See <
>>> https://jenkins.gem5.org/job/nightly/10/display/redirect?page=changes
>>> >
>>>
>>> Changes:
>>>
>>> [quentin.forcioli] dev-arm: Added trusted DRAM to vexpress Realview
>>>
>>> [giacomo.travaglini] sim-se: Rewrite some syscalls to use a
>>> syscallImpl function
>>>
>>> [giacomo.travaglini] sim-se: Implement at suffixed syscalls
>>>
>>> [giacomo.travaglini] arch-arm: Add existing at impl to ArmLinux32
>>> Syscall Table
>>>
>>> [giacomo.travaglini] sim-se: Implemnt fchownat syscall
>>>
>>> [giacomo.travaglini] arch-arm: Add fchown implementation to the
>>> Syscall Table
>>>
>>> [giacomo.travaglini] arch-arm: Add fchownat implementation to the
>>> Syscall Table
>>>
>>> [mattdsinclair] dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA
>>> Queues
>>>
>>> [mattdsinclair] tests: fix square and HeteroSync nightly regression
>>> command
>>>
>>> [giacomo.travaglini] mem-ruby: HTMSequencer stats initialized twice
>>>
>>> [gabe.black] scons: Pull the code which generates debug/flags.cc
>>> into a helper script.
>>>
>>> [gabe.black] scons: Rearrange functions to be next to the code that
>>> uses them.
>>>
>>> [Bobby R. Bruce] tests: Fix argparse description in
>>> simple_binary_run.py
>>>
>>> [mail] python: Fix L1 data cache size in cache components
>>>
>>>
>>> --
>>> [...truncated 847.41 KB...]
>>>  [ CXX] GCN3_X86/python/_m5/param_PciMemBar.cc -> .o
>>>  [ CXX]

[gem5-dev] Change in gem5/gem5[develop]: tests: convert all nightly GPU tests from GUID to GID

2021-10-13 Thread Matt Sinclair (Gerrit) via gem5-dev

Matt Sinclair has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51567 )



Change subject: tests: convert all nightly GPU tests from GUID to GID
..

tests: convert all nightly GPU tests from GUID to GID

As part of the docker commands for the nightly GPU regression tests,
earlier commits inadvertently used GUID instead of GID, where GUID does
not exist.  This causes some failures when run in Jenkins.  This patch
fixes this issue.

Change-Id: I429c079ae3df9fd97a956f23a2fc9baeed3f7377
---
M tests/nightly.sh
1 file changed, 18 insertions(+), 4 deletions(-)



diff --git a/tests/nightly.sh b/tests/nightly.sh
index 89c7005..4e7420d 100755
--- a/tests/nightly.sh
+++ b/tests/nightly.sh
@@ -86,7 +86,7 @@

 # For the GPU tests we compile and run GCN3_X86 inside a gcn-gpu container.
 docker pull gcr.io/gem5-test/gcn-gpu:latest
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest bash -c \
 "scons build/GCN3_X86/gem5.opt -j${threads} \
 || (rm -rf build && scons build/GCN3_X86/gem5.opt -j${threads})"
@@ -99,7 +99,7 @@
 # Square is the simplest, fastest, more heavily tested GPU application
 # Thus, we always want to run this in the nightly regressions to make sure
 # basic GPU functionality is working.
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\
 configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" -c  
square


@@ -110,7 +110,7 @@
 # 10 Ld/St per thread and 4 iterations of the critical section is a  
reasonable
 # moderate contention case for the default 4 CU GPU config and help ensure  
GPU

 # atomics are tested.
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

 configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" \
 -c allSyncPrims-1kernel --options="sleepMutex 10 16 4"
@@ -120,7 +120,7 @@
 # thread, 4 iterations of critical section.  Again this is representative  
of a
 # moderate contention case for the default 4 CU GPU config and help ensure  
GPU

 # atomics are tested.
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

 configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" \
 -c allSyncPrims-1kernel --options="lfTreeBarrUniq 10 16 4"

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/51567
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I429c079ae3df9fd97a956f23a2fc9baeed3f7377
Gerrit-Change-Number: 51567
Gerrit-PatchSet: 1
Gerrit-Owner: Matt Sinclair 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: sim-se: Define rmdirImpl helper

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51547 )



Change subject: sim-se: Define rmdirImpl helper
..

sim-se: Define rmdirImpl helper

This will be used by the following commit when properly reimplementing
unlinkat syscall

Signed-off-by: Giacomo Travaglini 
Change-Id: If207bed196ad467decaa1cfee70a538e6dfe8d1d
---
M src/sim/syscall_emul.cc
M src/sim/syscall_emul.hh
2 files changed, 24 insertions(+), 2 deletions(-)



diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index 35f047d..acf5dcd 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -963,11 +963,17 @@
 SyscallReturn
 rmdirFunc(SyscallDesc *desc, ThreadContext *tc, VPtr<> pathname)
 {
-auto p = tc->getProcessPtr();
 std::string path;
 if (!SETranslatingPortProxy(tc).tryReadString(path, pathname))
 return -EFAULT;

+return rmdirImpl(desc, tc, path);
+}
+
+SyscallReturn
+rmdirImpl(SyscallDesc *desc, ThreadContext *tc, std::string path)
+{
+auto p = tc->getProcessPtr();
 path = p->checkPathRedirect(path);

 auto result = rmdir(path.c_str());
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index be30797..77cdf58 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -206,7 +206,10 @@
 SyscallReturn chdirFunc(SyscallDesc *desc, ThreadContext *tc, VPtr<>  
pathname);


 // Target rmdir() handler.
-SyscallReturn rmdirFunc(SyscallDesc *desc, ThreadContext *tc, VPtr<>  
pathname);

+SyscallReturn rmdirFunc(SyscallDesc *desc, ThreadContext *tc,
+VPtr<> pathname);
+SyscallReturn rmdirImpl(SyscallDesc *desc, ThreadContext *tc,
+std::string path);

 /// Target rename() handler.
 SyscallReturn renameFunc(SyscallDesc *desc, ThreadContext *tc,

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: If207bed196ad467decaa1cfee70a538e6dfe8d1d
Gerrit-Change-Number: 51547
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Add chdir implementation to the Syscall Table

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51549 )



Change subject: arch-arm: Add chdir implementation to the Syscall Table
..

arch-arm: Add chdir implementation to the Syscall Table

Signed-off-by: Giacomo Travaglini 
Change-Id: I584d9269b0445347dd65071f7fc5569c8ac24b89
---
M src/arch/arm/linux/se_workload.cc
1 file changed, 12 insertions(+), 2 deletions(-)



diff --git a/src/arch/arm/linux/se_workload.cc  
b/src/arch/arm/linux/se_workload.cc

index 3755dec..b8236ec 100644
--- a/src/arch/arm/linux/se_workload.cc
+++ b/src/arch/arm/linux/se_workload.cc
@@ -158,7 +158,7 @@
 {  base + 9, "link" },
 { base + 10, "unlink", unlinkFunc },
 { base + 11, "execve", execveFunc },
-{ base + 12, "chdir" },
+{ base + 12, "chdir", chdirFunc },
 { base + 13, "time", timeFunc },
 { base + 14, "mknod" },
 { base + 15, "chmod", chmodFunc },
@@ -547,7 +547,7 @@
 {   base + 46, "ftruncate64", ftruncate64Func },
 {   base + 47, "fallocate", fallocateFunc },
 {   base + 48, "faccessat", faccessatFunc },
-{   base + 49, "chdir" },
+{   base + 49, "chdir", chdirFunc },
 {   base + 50, "fchdir" },
 {   base + 51, "chroot" },
 {   base + 52, "fchmod" },

--
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Gerrit-Change-Id: I584d9269b0445347dd65071f7fc5569c8ac24b89
Gerrit-Change-Number: 51549
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Gerrit-Owner: Giacomo Travaglini 
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[gem5-dev] Re: Build failed in Jenkins: nightly #10

2021-10-13 Thread Jason Lowe-Power via gem5-dev

Looks like the failure is in the GPU tests (note: the weekly tests are also
failing due to GPU errors).

https://jenkins.gem5.org/job/nightly/10/console

On Wed, Oct 13, 2021 at 4:03 AM jenkins-no-reply--- via gem5-dev <
gem5-dev@gem5.org> wrote:

> See  >
>
> Changes:
>
> [quentin.forcioli] dev-arm: Added trusted DRAM to vexpress Realview
>
> [giacomo.travaglini] sim-se: Rewrite some syscalls to use a syscallImpl
> function
>
> [giacomo.travaglini] sim-se: Implement at suffixed syscalls
>
> [giacomo.travaglini] arch-arm: Add existing at impl to ArmLinux32 Syscall
> Table
>
> [giacomo.travaglini] sim-se: Implemnt fchownat syscall
>
> [giacomo.travaglini] arch-arm: Add fchown implementation to the Syscall
> Table
>
> [giacomo.travaglini] arch-arm: Add fchownat implementation to the Syscall
> Table
>
> [mattdsinclair] dev-hsa,gpu-compute: fix bug with gfx8 VAs for HSA Queues
>
> [mattdsinclair] tests: fix square and HeteroSync nightly regression command
>
> [giacomo.travaglini] mem-ruby: HTMSequencer stats initialized twice
>
> [gabe.black] scons: Pull the code which generates debug/flags.cc into a
> helper script.
>
> [gabe.black] scons: Rearrange functions to be next to the code that uses
> them.
>
> [Bobby R. Bruce] tests: Fix argparse description in simple_binary_run.py
>
> [mail] python: Fix L1 data cache size in cache components
>
>
> --
> [...truncated 847.41 KB...]
>  [ CXX] GCN3_X86/python/_m5/param_PciMemBar.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PciMemUpperBar.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PciVirtIO.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PerfectCompressor.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PioDevice.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_Platform.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PoolManager.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerDomain.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerModel.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerModelState.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PowerState.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_ProbeListenerObject.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_Process.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_ProtocolTester.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_PyTrafficGen.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSFixedPriorityPolicy.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSMemCtrl.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkCtrl.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSMemSinkInterface.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSPolicy.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSPropFairPolicy.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSTurnaroundPolicy.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QoSTurnaroundPolicyIdeal.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_QueuedPrefetcher.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RandomRP.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RangeAddrMapper.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RawDiskImage.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RedirectPath.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RegisterFile.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RegisterManager.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RepeatedQwordsCompressor.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_Root.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyCache.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyController.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyDirectedTester.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyDirectoryMemory.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyGPUCoalescer.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyHTMSequencer.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyNetwork.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyPort.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyPortProxy.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyPrefetcher.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubySequencer.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubySystem.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyTester.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_RubyWireBuffer.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_SBOOEPrefetcher.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_SEWorkload.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_SHiPMemRP.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_SHiPPCRP.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_SHiPRP.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_SQC_Controller.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_STeMSPrefetcher.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_ScalarRegisterFile.cc -> .o
>  [ CXX] GCN3_X86/python/_m5/param_SecondChanceRP.cc -> .o
>  [ CXX]

[gem5-dev] Change in gem5/gem5[develop]: sim-se, kern: Add flags parameter to unlinkat

2021-10-13 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51548 )



Change subject: sim-se, kern: Add flags parameter to unlinkat
..

sim-se, kern: Add flags parameter to unlinkat

The unlinkat syscall expects a "third" flags parameter [1].

It is using it to implement a sort of rmdirat (in case the parameter
includes the AT_REMOVEDIR flag)

[1]: https://man7.org/linux/man-pages/man2/unlink.2.html

Signed-off-by: Giacomo Travaglini 
Change-Id: I38dd9268ae4de0f289abe779c4da03e969248065
---
M src/kern/linux/linux.hh
M src/sim/syscall_emul.hh
M src/kern/solaris/solaris.hh
M src/kern/freebsd/freebsd.hh
4 files changed, 66 insertions(+), 5 deletions(-)



diff --git a/src/kern/freebsd/freebsd.hh b/src/kern/freebsd/freebsd.hh
index 232d707..abbf32b 100644
--- a/src/kern/freebsd/freebsd.hh
+++ b/src/kern/freebsd/freebsd.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2021 Arm Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2015 Ruslan Bukin 
  * All rights reserved.
  *
@@ -116,7 +128,8 @@
 static const int TGT_RUSAGE_THREAD   = 1;

 // for *at syscalls
-static const int TGT_AT_FDCWD   = -100;
+static const int TGT_AT_FDCWD = -100;
+static const int TGT_AT_REMOVEDIR = 0x800;

 };  // class FreeBSD

diff --git a/src/kern/linux/linux.hh b/src/kern/linux/linux.hh
index 6232f61..19fb9b2 100644
--- a/src/kern/linux/linux.hh
+++ b/src/kern/linux/linux.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2021 Arm Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2004-2009 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -283,7 +295,8 @@
 static const unsigned TGT_FUTEX_OP_CMP_GE = 5;

 // for *at syscalls
-static const int TGT_AT_FDCWD   = -100;
+static const int TGT_AT_FDCWD = -100;
+static const int TGT_AT_REMOVEDIR = 0x200;

 // for MREMAP
 static const unsigned TGT_MREMAP_MAYMOVE= 0x1;
diff --git a/src/kern/solaris/solaris.hh b/src/kern/solaris/solaris.hh
index 0e6b72a..9b58813 100644
--- a/src/kern/solaris/solaris.hh
+++ b/src/kern/solaris/solaris.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2021 Arm Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2004-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -120,7 +132,8 @@
 };

 // for *at syscalls
-static const int TGT_AT_FDCWD   = -100;
+static const int TGT_AT_FDCWD = -100;
+static const int TGT_AT_REMOVEDIR = 0x800;

 };  // class Solaris

diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index 77cdf58..0f9b7b0 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -911,7 +911,8 @@
 /// Target unlinkat() handler.
 template 
 SyscallReturn
-unlinkatFunc(SyscallDesc *desc, ThreadContext *tc, int dirfd, VPtr<>  
pathname)

+unlinkatFunc(SyscallDesc *desc, ThreadContext *tc,
+ int dirfd, VPtr<> pathname, int flags)
 {
 std::string path;
 if (!SETranslatingPortProxy(tc).tryReadString(path, pathname))
@@ -922,7 +923,11 @@
 return res;
 }

-return unlinkImpl(desc, tc, path);
+if (flags & OS::TGT_AT_REMOVEDIR) {
+return rmdirImpl(desc, tc, path);
+} else {
+

[gem5-dev] Change in gem5/gem5[develop]: scons: Add tag support to GdbXml.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/50328 )


Change subject: scons: Add tag support to GdbXml.
..

scons: Add tag support to GdbXml.

Change-Id: I81c015fa8a5cc8f62aeb3f6cc409dc10fd3326e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50328
Reviewed-by: Andreas Sandberg 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/SConscript
1 file changed, 15 insertions(+), 2 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/SConscript b/src/SConscript
index 18f7d12..6b2f7e4 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -68,9 +68,9 @@

 from code_formatter import code_formatter

-def GdbXml(xml_id, symbol):
+def GdbXml(xml_id, symbol, tags=None, add_tags=None):
 cc, hh = env.Blob(symbol, xml_id)
-Source(cc)
+Source(cc, tags=tags, add_tags=add_tags)

 class Source(SourceFile):
 pass

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I81c015fa8a5cc8f62aeb3f6cc409dc10fd3326e7
Gerrit-Change-Number: 50328
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jui-min Lee 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem: Replace SatCounter with SatCounter8 in the SHiP replacement policy.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51530 )


Change subject: mem: Replace SatCounter with SatCounter8 in the SHiP  
replacement policy.

..

mem: Replace SatCounter with SatCounter8 in the SHiP replacement policy.

Change-Id: Ibbc8e78df7119cdff62ad08b5c68f4237ca25cfe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51530
Reviewed-by: Daniel Carvalho 
Maintainer: Daniel Carvalho 
Tested-by: kokoro 
---
M src/mem/cache/replacement_policies/ship_rp.cc
1 file changed, 14 insertions(+), 1 deletion(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/mem/cache/replacement_policies/ship_rp.cc  
b/src/mem/cache/replacement_policies/ship_rp.cc

index 5243abb..853c107 100644
--- a/src/mem/cache/replacement_policies/ship_rp.cc
+++ b/src/mem/cache/replacement_policies/ship_rp.cc
@@ -71,7 +71,7 @@

 SHiP::SHiP(const Params )
   : BRRIP(p), insertionThreshold(p.insertion_threshold / 100.0),
-SHCT(p.shct_size, SatCounter(numRRPVBits))
+SHCT(p.shct_size, SatCounter8(numRRPVBits))
 {
 }


--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibbc8e78df7119cdff62ad08b5c68f4237ca25cfe
Gerrit-Change-Number: 51530
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Jason Lowe-Power 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem: Adding PortTerminator

2021-10-13 Thread Mahyar Samani (Gerrit) via gem5-dev

Mahyar Samani has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51609 )



Change subject: mem: Adding PortTerminator
..

mem: Adding PortTerminator

This change adds the source code for the PortTerminator SimObject.
It could be used to connect request/response ports in the system
that can not be connected to any other ports. This will prevent
errors caused by orphan ports in the system.

Change-Id: I5e19cdd3ce064638ffabf29d29225eda77ffc146
---
A src/mem/PortTerminator.py
A src/mem/port_terminator.cc
A src/mem/port_terminator.hh
M src/mem/SConscript
4 files changed, 240 insertions(+), 0 deletions(-)



diff --git a/src/mem/PortTerminator.py b/src/mem/PortTerminator.py
new file mode 100644
index 000..d0b7169
--- /dev/null
+++ b/src/mem/PortTerminator.py
@@ -0,0 +1,53 @@
+# Copyright (c) 2012-2021 Arm Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Copyright (c) 2013 Amin Farmahini-Farahani
+# Copyright (c) 2015 University of Kaiserslautern
+# Copyright (c) 2015 The University of Bologna
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+from m5.params import *
+from m5.SimObject import SimObject
+
+class PortTerminator(SimObject):
+type = 'PortTerminator'
+abstract = False
+cxx_header = "mem/port_terminator.hh"
+cxx_class = 'gem5::PortTerminator'
+
+req_ports = VectorRequestPort("Vector port for connecting terminating "
+"response ports.")
+resp_ports = VectorResponsePort("Vector port for terminating "
+"request ports.")
\ No newline at end of file
diff --git a/src/mem/SConscript b/src/mem/SConscript
index 5d3c5e6..e200982 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -58,6 +58,7 @@
 SimObject('HMCController.py')
 SimObject('SerialLink.py')
 SimObject('MemDelay.py')
+SimObject('PortTerminator.py')

 Source('abstract_mem.cc')
 Source('addr_mapper.cc')
@@ -85,6 +86,7 @@
 Source('htm.cc')
 Source('serial_link.cc')
 Source('mem_delay.cc')
+Source('port_terminator.cc')

 if env['TARGET_ISA'] != 'null':
 Source('translating_port_proxy.cc')
diff --git a/src/mem/port_terminator.cc b/src/mem/port_terminator.cc
new file mode 100644
index 000..cd56c53
--- /dev/null
+++ b/src/mem/port_terminator.cc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2011-2015, 2018-2020 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+

[gem5-dev] Change in gem5/gem5[develop]: misc: Adding SimpleSingleChannelMemory

2021-10-13 Thread Mahyar Samani (Gerrit) via gem5-dev

Mahyar Samani has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51611 )



Change subject: misc: Adding SimpleSingleChannelMemory
..

misc: Adding SimpleSingleChannelMemory

This change adds SimpleSingleChannelMemory to the components
library.

Change-Id: Id633d207842106a7da8532d3ac64adf022d30d7c
---
M src/python/gem5/components/memory/single_channel.py
1 file changed, 54 insertions(+), 1 deletion(-)



diff --git a/src/python/gem5/components/memory/single_channel.py  
b/src/python/gem5/components/memory/single_channel.py

index 11a0b15..1ecdeda 100644
--- a/src/python/gem5/components/memory/single_channel.py
+++ b/src/python/gem5/components/memory/single_channel.py
@@ -31,7 +31,7 @@
 from .abstract_memory_system import AbstractMemorySystem
 from ...utils.override import overrides

-from m5.objects import AddrRange, DRAMInterface, MemCtrl, Port
+from m5.objects import AddrRange, DRAMInterface, MemCtrl, Port,  
SimpleMemory

 from m5.util.convert import toMemorySize

 from typing import List, Sequence, Tuple, Type, Optional
@@ -99,6 +99,47 @@
 self.mem_ctrl.dram.range = ranges[0]


+class SimpleSingleChannelMemory(AbstractMemorySystem):
+def __init__(
+self,
+latency: str,
+latency_var: str,
+bandwidth: str,
+size: Optional[str] = "1GB",
+):
+super().__init__()
+
+self.module = SimpleMemory(
+latency=latency, latency_var=latency_var, bandwidth=bandwidth
+)
+self._size = toMemorySize(size)
+
+@overrides(AbstractMemorySystem)
+def incorporate_memory(self, board: AbstractBoard) -> None:
+pass
+
+@overrides(AbstractMemorySystem)
+def get_mem_ports(self) -> Sequence[Tuple[AddrRange, Port]]:
+return [(self.module.range, self.module.port)]
+
+@overrides(AbstractMemorySystem)
+def get_memory_controllers(self) -> List[MemCtrl]:
+return [self.module]
+
+@overrides(AbstractMemorySystem)
+def get_size(self) -> int:
+return self._size
+
+@overrides(AbstractMemorySystem)
+def set_memory_range(self, ranges: List[AddrRange]) -> None:
+if len(ranges) != 1 or ranges[0].size() != self._size:
+print(ranges[0].size())
+raise Exception(
+"Simple single channel memory controller requires a  
single "

+"range which m atches the memory's size."
+)
+self.module.range = ranges[0]
+
 from .dram_interfaces.ddr3 import DDR3_1600_8x8, DDR3_2133_8x8
 from .dram_interfaces.ddr4 import DDR4_2400_8x8
 from .dram_interfaces.lpddr3 import LPDDR3_1600_1x32

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[gem5-dev] Change in gem5/gem5[develop]: misc: Updating AbstractGeneratorCore

2021-10-13 Thread Mahyar Samani (Gerrit) via gem5-dev

Mahyar Samani has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51610 )



Change subject: misc: Updating AbstractGeneratorCore
..

misc: Updating AbstractGeneratorCore

This change updates AbstractGeneratorCore so that it uses a
PortTerminator instead of a dummy PyTrafficGen. This PortTerminator
will be used to connect to icache, and walker ports.

Change-Id: Ic744003c3e633592449ec7d209e4fbb5242f11fa
---
M src/python/gem5/components/processors/abstract_generator_core.py
1 file changed, 21 insertions(+), 7 deletions(-)



diff --git  
a/src/python/gem5/components/processors/abstract_generator_core.py  
b/src/python/gem5/components/processors/abstract_generator_core.py

index 48049d8..8bde5a5 100644
--- a/src/python/gem5/components/processors/abstract_generator_core.py
+++ b/src/python/gem5/components/processors/abstract_generator_core.py
@@ -25,7 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


-from m5.objects import Port, PyTrafficGen
+from m5.objects import Port, PortTerminator
 from ...utils.override import overrides

 from .cpu_types import CPUTypes
@@ -52,24 +52,25 @@
 # TODO: Remove the CPU Type parameter. This not needed.
 # Jira issue here: https://gem5.atlassian.net/browse/GEM5-1031
 super(AbstractGeneratorCore, self).__init__(CPUTypes.TIMING)
-self.dummy_generator = PyTrafficGen()
+self.port_end = PortTerminator()

 @overrides(AbstractCore)
 def connect_icache(self, port: Port) -> None:
 """
 Generator cores only have one request port which we will connect to
-the data cache not the icache. Just connect the icache to the dummy
-generator here.
+the data cache not the icache. Just connect the icache to the
+PortTerminator here.
 """
-self.dummy_generator.port = port
+self.port_end.req_ports = port

 @overrides(AbstractCore)
 def connect_walker_ports(self, port1: Port, port2: Port) -> None:
 """
 Since generator cores are not used in full system mode, no need to
-connect them to walker ports. Just pass here.
+connect them to walker ports. connect them to PortTerminator here.
 """
-pass
+self.port_end.req_ports = port1
+self.port_end.req_ports = port2

 @overrides(AbstractCore)
 def set_workload(self, process: "Process") -> None:

--
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[gem5-dev] Change in gem5/gem5[develop]: tests: Re-enable 'Hello World' 32-bit tests

2021-10-13 Thread Bobby R. Bruce (Gerrit) via gem5-dev

Bobby R. Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51612 )



Change subject: tests: Re-enable 'Hello World' 32-bit tests
..

tests: Re-enable 'Hello World' 32-bit tests

Due to a faul recorded here:
https://gem5.atlassian.net/browse/GEM5-1074, running 32-bit binaries in
SE mode was causing a segfault to occur. These tests were therefore
disabled until a fix could be developed. A fix was submitted here:
https://gem5-review.googlesource.com/c/public/gem5/+/51489, and, as-such
the tests should be re-enabled.

Change-Id: Id01a6d85fb5e30319e53dda97f6247bcc5302477
---
M tests/gem5/hello_se/test_hello_se.py
1 file changed, 18 insertions(+), 4 deletions(-)



diff --git a/tests/gem5/hello_se/test_hello_se.py  
b/tests/gem5/hello_se/test_hello_se.py

index 4d3fb22..03ffd49 100644
--- a/tests/gem5/hello_se/test_hello_se.py
+++ b/tests/gem5/hello_se/test_hello_se.py
@@ -49,13 +49,11 @@
 static_progs = {
 constants.gcn3_x86_tag: (
 "x86-hello64-static",
-# "x86-hello32-static", # Running 32-bit binaries on gem5 is  
broken:
-#  
https://gem5.atlassian.net/browse/GEM5-1074

+"x86-hello32-static",
 ),
 constants.arm_tag: (
 "arm-hello64-static",
-# "arm-hello32-static", # Running 32-bit binaries on gem5 is  
broken.
-#  
https://gem5.atlassian.net/browse/GEM5-1074

+"arm-hello32-static",
 ),
 constants.mips_tag: ("mips-hello",),
 constants.riscv_tag: ("riscv-hello",),

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[gem5-dev] Change in gem5/gem5[develop]: misc: Adding GUPSGen to components library.

2021-10-13 Thread Mahyar Samani (Gerrit) via gem5-dev

Mahyar Samani has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51613 )



Change subject: misc: Adding GUPSGen to components library.
..

misc: Adding GUPSGen to components library.

This change adds GUPSGenCore, GUPSGen, GUPSGenEP, and GUPSGenPAR.
GUPSGenCore inherits from AbstractGeneratorCore. It is used for
implementing GUPSGen, GUPSGenEP, and GUPSGenPAR which inherit from
AbstractProcessor. GUPSGen does not implement a multi-core
generator as there are two ways to implement GUPS in parallel.
GUPSGenEP implement GUPS in it Embarrassingly Parallel variant
where multiple instances of GUPS update separate partitions of the
memory. GUPSGenPAR impelements GUPS in its Parallel variant where
multiple generators acccess the same partition of the memory in
parallel.

Change-Id: I57fb327a1ddefb6735ee59a0d7b4609e50af3517
---
A src/python/gem5/components/processors/gups_generator_core.py
A src/python/gem5/components/processors/gups_generator_par.py
M src/python/SConscript
A src/python/gem5/components/processors/gups_generator.py
A src/python/gem5/components/processors/gups_generator_ep.py
5 files changed, 343 insertions(+), 0 deletions(-)



diff --git a/src/python/SConscript b/src/python/SConscript
index f8a9136..2a51142 100644
--- a/src/python/SConscript
+++ b/src/python/SConscript
@@ -149,6 +149,14 @@
 PySource('gem5.components.processors',
 'gem5/components/processors/cpu_types.py')
 PySource('gem5.components.processors',
+'gem5/components/processors/gups_generator_core.py')
+PySource('gem5.components.processors',
+'gem5/components/processors/gups_generator.py')
+PySource('gem5.components.processors',
+'gem5/components/processors/gups_generator_ep.py')
+PySource('gem5.components.processors',
+'gem5/components/processors/gups_generator_par.py')
+PySource('gem5.components.processors',
 'gem5/components/processors/linear_generator_core.py')
 PySource('gem5.components.processors',
 'gem5/components/processors/linear_generator.py')
diff --git a/src/python/gem5/components/processors/gups_generator.py  
b/src/python/gem5/components/processors/gups_generator.py

new file mode 100644
index 000..08ff3fe
--- /dev/null
+++ b/src/python/gem5/components/processors/gups_generator.py
@@ -0,0 +1,75 @@
+# Copyright (c) 2021 The Regents of the University of California
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+from ...utils.override import overrides
+from m5.objects import Addr
+
+from ..boards.mem_mode import MemMode
+
+from .gups_generator_core import GUPSGeneratorCore
+
+from .abstract_processor import AbstractProcessor
+from ..boards.abstract_board import AbstractBoard
+
+
+class GUPSGenerator(AbstractProcessor):
+def __init__(
+self,
+start_addr: Addr = 0,
+mem_size: str = "32MB",
+update_limit: int = 0,
+):
+"""The GUPSGenerator class
+This class defines the interface for a single core GUPSGenerator,  
this
+generator could be used in place of a processor. For multicore  
versions
+of this generator look at GUPSGeneraorEP (EP stands for  
embarrassingly

+parallel) and GUPSGeneratorPAR (PAR stands for parallel). The two
+variants are specified by the HPCC benchmark.
+
+:param start_addr: The start address for allocating the update  
table.
+:param mem_size: The size of memory to allocate for the update  
table.

+Should be a

[gem5-dev] Change in gem5/gem5[develop]: scons: Add tag support to ISADesc.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/50329 )


Change subject: scons: Add tag support to ISADesc.
..

scons: Add tag support to ISADesc.

Change-Id: Icac027cc4df48d0a3c06911bd6fa0a8b5b72c60a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50329
Reviewed-by: Andreas Sandberg 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/arch/SConscript
1 file changed, 15 insertions(+), 2 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/SConscript b/src/arch/SConscript
index e1387d9..0803b07 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -127,7 +127,7 @@

 # ISAs should use this function to set up an IsaDescBuilder and not try to
 # set one up manually.
-def ISADesc(desc, decoder_splits=1, exec_splits=1):
+def ISADesc(desc, decoder_splits=1, exec_splits=1, tags=None,  
add_tags=None):

 '''Set up a builder for an ISA description.

 The decoder_splits and exec_splits parameters let us determine what
@@ -192,7 +192,7 @@
 append = {}
 if env['CLANG']:
 append['CCFLAGS'] = ['-Wno-self-assign']
-Source(gen_file(name), append=append)
+Source(gen_file(name), append=append, tags=tags, add_tags=add_tags)

 source_gen('decoder.cc')


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icac027cc4df48d0a3c06911bd6fa0a8b5b72c60a
Gerrit-Change-Number: 50329
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jui-min Lee 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: cpu: Stop excluding the protobuf tracer for x86.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/50332 )


Change subject: cpu: Stop excluding the protobuf tracer for x86.
..

cpu: Stop excluding the protobuf tracer for x86.

Change-Id: I71d9eca4b13809273cdddf8ae175379e382ab9d7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50332
Reviewed-by: Andreas Sandberg 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/cpu/SConscript
1 file changed, 15 insertions(+), 2 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index 83a78e2..f5b67d1 100644
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -84,8 +84,8 @@
 if env['TARGET_ISA'] == 'null':
 Return()

-# Only build the protocol buffer instructions tracer if we have protobuf  
support

-if env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86':
+# Only build the protobuf instructions tracer if we have protobuf support.
+if env['HAVE_PROTOBUF']:
 SimObject('InstPBTrace.py')
 Source('inst_pb_trace.cc')


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Gerrit-Branch: develop
Gerrit-Change-Id: I71d9eca4b13809273cdddf8ae175379e382ab9d7
Gerrit-Change-Number: 50332
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
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[gem5-dev] Change in gem5/gem5[develop]: base,arch-arm: Replace Stats namespace with statistics.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51528 )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: base,arch-arm: Replace Stats namespace with statistics.
..

base,arch-arm: Replace Stats namespace with statistics.

The Stats namespace is deprecated.

Change-Id: I17b1aa7fbced5db7b325e5339395281f3b3eda0b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51528
Reviewed-by: Giacomo Travaglini 
Reviewed-by: Daniel Carvalho 
Maintainer: Giacomo Travaglini 
Tested-by: kokoro 
---
M src/arch/arm/table_walker.cc
M src/base/stats/group.test.cc
2 files changed, 92 insertions(+), 76 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  Daniel Carvalho: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index ba1b4a4..73bcc5c 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -2519,8 +2519,8 @@
 parent.mmu->translateTiming(req, tc, this, mode, tranType, true);
 }

-TableWalker::TableWalkerStats::TableWalkerStats(Stats::Group *parent)
-: Stats::Group(parent),
+TableWalker::TableWalkerStats::TableWalkerStats(statistics::Group *parent)
+: statistics::Group(parent),
 ADD_STAT(walks, statistics::units::Count::get(),
  "Table walker walks requested"),
 ADD_STAT(walksShortDescriptor, statistics::units::Count::get(),
diff --git a/src/base/stats/group.test.cc b/src/base/stats/group.test.cc
index 92f125a..e2e0598 100644
--- a/src/base/stats/group.test.cc
+++ b/src/base/stats/group.test.cc
@@ -38,15 +38,15 @@
 /** Test that the constructor without a parent doesn't do anything. */
 TEST(StatsGroupTest, ConstructNoParent)
 {
-Stats::Group root(nullptr);
+statistics::Group root(nullptr);
 ASSERT_EQ(root.getStatGroups().size(), 0);
 }

 /** Test adding a single stat group to a root node. */
 TEST(StatsGroupTest, AddGetSingleStatGroup)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
 root.addStatGroup("Node1", );

 const auto root_map = root.getStatGroups();
@@ -59,9 +59,9 @@
 /** Test that group names are unique within a node's stat group. */
 TEST(StatsGroupDeathTest, AddUniqueNameStatGroup)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node2(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node2(nullptr);
 root.addStatGroup("Node1", );
 ASSERT_ANY_THROW(root.addStatGroup("Node1", ));
 }
@@ -69,10 +69,10 @@
 /** Test that group names are not unique among two nodes' stat groups. */
 TEST(StatsGroupTest, AddNotUniqueNameAmongGroups)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node2(nullptr);
-Stats::Group node1_1(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node2(nullptr);
+statistics::Group node1_1(nullptr);
 root.addStatGroup("Node1", );
 node1.addStatGroup("Node1_1", _1);
 ASSERT_NO_THROW(node1.addStatGroup("Node1", ));
@@ -81,23 +81,23 @@
 /** Test that a group cannot add a non-existent group. */
 TEST(StatsGroupDeathTest, AddNull)
 {
-Stats::Group root(nullptr);
+statistics::Group root(nullptr);
 ASSERT_ANY_THROW(root.addStatGroup("Node1", nullptr));
 }

 /** Test that a group cannot add itself. */
 TEST(StatsGroupDeathTest, AddItself)
 {
-Stats::Group root(nullptr);
+statistics::Group root(nullptr);
 ASSERT_ANY_THROW(root.addStatGroup("Node1", ));
 }

 /** @todo Test that a group cannot be added in a cycle. */
 TEST(StatsGroupDeathTest, DISABLED_AddCycle)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node1_1(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node1_1(nullptr);
 root.addStatGroup("Node1", );
 node1.addStatGroup("Node1_1", _1);
 ASSERT_ANY_THROW(node1_1.addStatGroup("Root", ));
@@ -106,9 +106,9 @@
 /** Test adding multiple stat groups to a root node. */
 TEST(StatsGroupTest, AddGetMultipleStatGroup)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group node2(nullptr);
+statistics::Group root(nullptr);
+statistics::Group node1(nullptr);
+statistics::Group node2(nullptr);
 root.addStatGroup("Node1", );
 root.addStatGroup("Node2", );

@@ -124,10 +124,10 @@
 /** Make sure that the groups are correctly assigned in the map. */
 TEST(StatsGroupTest, ConstructCorrectlyAssigned)
 {
-Stats::Group root(nullptr);
-Stats::Group node1(nullptr);
-Stats::Group

[gem5-dev] Change in gem5/gem5[develop]: arch-power: Replace the Loader namespace with loader.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51527 )


Change subject: arch-power: Replace the Loader namespace with loader.
..

arch-power: Replace the Loader namespace with loader.

The Loader namespace is deprecated, and is replaced with loader.

Change-Id: Ic973eefd55c6f8a43d3d41346b8b6e4795e19e55
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51527
Reviewed-by: Boris Shingarov 
Reviewed-by: Daniel Carvalho 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/arch/power/insts/integer.cc
M src/arch/power/insts/integer.hh
M src/arch/power/insts/mem.cc
M src/arch/power/insts/mem.hh
4 files changed, 44 insertions(+), 28 deletions(-)

Approvals:
  Boris Shingarov: Looks good to me, approved
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/power/insts/integer.cc  
b/src/arch/power/insts/integer.cc

index cf065a1..b1f10f4 100644
--- a/src/arch/power/insts/integer.cc
+++ b/src/arch/power/insts/integer.cc
@@ -117,7 +117,7 @@

 std::string
 IntArithOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = true;
@@ -175,7 +175,7 @@

 std::string
 IntImmArithOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool negateImm = false;
@@ -235,7 +235,7 @@

 std::string
 IntDispArithOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSrcs = true;
@@ -280,7 +280,7 @@

 std::string
 IntLogicOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = true;
@@ -344,7 +344,7 @@

 std::string
 IntImmLogicOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printRegs = true;
@@ -392,7 +392,7 @@

 std::string
 IntCompOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printFieldPrefix = false;
@@ -445,7 +445,7 @@

 std::string
 IntImmCompOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printFieldPrefix = false;
@@ -494,7 +494,7 @@

 std::string
 IntImmCompLogicOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printFieldPrefix = false;
@@ -604,7 +604,7 @@

 std::string
 IntConcatShiftOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = true;
@@ -751,7 +751,7 @@

 std::string
 IntConcatRotateOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::stringstream ss;
 bool printSecondSrc = false;
@@ -832,7 +832,7 @@

 std::string
 IntTrapOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::string ext;
 std::stringstream ss;
@@ -883,7 +883,7 @@

 std::string
 IntImmTrapOp::generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const
+Addr pc, const loader::SymbolTable *symtab) const
 {
 std::string ext;
 std::stringstream ss;
diff --git a/src/arch/power/insts/integer.hh  
b/src/arch/power/insts/integer.hh

index 1c298a0..9417810 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -364,7 +364,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;
+Addr pc, const loader::SymbolTable *symtab) const override;
 };


@@ -385,7 +385,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;
+Addr pc, const loader::SymbolTable *symtab) const override;
 };


@@ -406,7 +406,7 @@
 }

 std::string generateDisassembly(
-Addr pc, const Loader::SymbolTable *symtab) const override;
+Addr pc, const loader::SymbolTable *symtab) const override;
 };


@@ -429,7 +429,7 @@

[gem5-dev] Change in gem5/gem5[develop]: cpu: Adding GUPSGen ClockedObject.

2021-10-13 Thread Mahyar Samani (Gerrit) via gem5-dev

Mahyar Samani has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/47439 )


Change subject: cpu: Adding GUPSGen ClockedObject.
..

cpu: Adding GUPSGen ClockedObject.

This patch adds the code base to implement GUPSGen which is a
ClockedObject that creates read/write requests to the memory
to update elements in an array. The choosing of elements in
the array follow a random distribution. Each element is read
from and return as GUPSGen implements a key-value store program.
Specifications are found in HPCC website from RandomAccess
benchmark. link below.
https://icl.cs.utk.edu/projectsfiles/hpcc/RandomAccess/

Change-Id: I5c07f230bee317fff2cceec04d15d0218e8ede9a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47439
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Bobby R. Bruce 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
A src/cpu/testers/traffic_gen/GUPSGen.py
A src/cpu/testers/traffic_gen/gups_gen.cc
A src/cpu/testers/traffic_gen/gups_gen.hh
M src/cpu/testers/traffic_gen/SConscript
4 files changed, 795 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/cpu/testers/traffic_gen/GUPSGen.py  
b/src/cpu/testers/traffic_gen/GUPSGen.py

new file mode 100644
index 000..dafc86d
--- /dev/null
+++ b/src/cpu/testers/traffic_gen/GUPSGen.py
@@ -0,0 +1,60 @@
+# Copyright (c) 2021 The Regents of the University of California.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+from m5.params import *
+from m5.proxy import *
+from m5.objects.ClockedObject import ClockedObject
+
+class GUPSGen(ClockedObject):
+"""
+This ClockedObject implements the RandomAccess benchmark specified by  
HPCC

+benchmarks in https://icl.utk.edu/projectsfiles/hpcc/RandomAccess.
+"""
+type = 'GUPSGen'
+cxx_header = "cpu/testers/traffic_gen/gups_gen.hh"
+cxx_class = "gem5::GUPSGen"
+
+system = Param.System(Parent.any, 'System this generator is a part of')
+
+port = RequestPort('Port that should be connected to other components')
+
+start_addr = Param.Addr(0, 'Start address for allocating update table,'
+' should be a multiple of block_size')
+
+mem_size = Param.MemorySize('Size for allocating update table, based  
on'

+' randomAccess benchmark specification, this'
+' should be equal to half of total system  
memory'

+' ,also should be a power of 2')
+
+update_limit = Param.Int(0, 'The number of updates to issue before the'
+' simulation is over')
+
+request_queue_size = Param.Int(1024, 'Maximum number of parallel'
+' outstanding requests')
+
+init_memory = Param.Bool(False, 'Whether or not to initialize the  
memory,'

+' it does not effect the performance')
diff --git a/src/cpu/testers/traffic_gen/SConscript  
b/src/cpu/testers/traffic_gen/SConscript

index 640d81a..a2670e7 100644
--- a/src/cpu/testers/traffic_gen/SConscript
+++ b/src/cpu/testers/traffic_gen/SConscript
@@ -43,6 +43,7 @@
 Source('dram_gen.cc')
 Source('dram_rot_gen.cc')
 Source('exit_gen.cc')
+Source('gups_gen.cc')
 Source('hybrid_gen.cc')
 Source('idle_gen.cc')
 Source('linear_gen.cc')
@@

[gem5-dev] Change in gem5/gem5[develop]: tests: Fix the nightly GPU tests

2021-10-13 Thread Bobby R. Bruce (Gerrit) via gem5-dev

Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51607 )


Change subject: tests: Fix the nightly GPU tests
..

tests: Fix the nightly GPU tests

The nightly tests failed:
https://www.mail-archive.com/gem5-dev@gem5.org/msg40828.html

This failure was due to new GPU tests assuming tests were executed from
the `tests` directory. They are actually executed from the gem5 root.
This patch fixes the error.

Change-Id: Ie5f86ef4eb13134a2a3d0291422f65c9ee355a92
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51607
Maintainer: Bobby R. Bruce 
Maintainer: Matt Sinclair 
Reviewed-by: Matt Sinclair 
Tested-by: kokoro 
---
M tests/nightly.sh
1 file changed, 26 insertions(+), 5 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/tests/nightly.sh b/tests/nightly.sh
index 89c7005..30e2c58 100755
--- a/tests/nightly.sh
+++ b/tests/nightly.sh
@@ -101,7 +101,7 @@
 # basic GPU functionality is working.
 docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\
-configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" -c  
square

+configs/example/apu_se.py -n3 -c square

 # get HeteroSync
 wget -qN  
http://dist.gem5.org/dist/develop/test-progs/heterosync/gcn3/allSyncPrims-1kernel

@@ -112,8 +112,8 @@
 # atomics are tested.
 docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

-configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" \
--c allSyncPrims-1kernel --options="sleepMutex 10 16 4"
+configs/example/apu_se.py -n3  -c allSyncPrims-1kernel \
+--options="sleepMutex 10 16 4"

 # run HeteroSync LFBarr -- similar setup to sleepMutex above -- 16 WGs
 # accessing unique data and then joining a lock-free barrier, 10 Ld/St per
@@ -122,5 +122,5 @@
 # atomics are tested.
 docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

-configs/example/apu_se.py -n3 --benchmark-root="${gem5_root}/tests" \
--c allSyncPrims-1kernel --options="lfTreeBarrUniq 10 16 4"
+configs/example/apu_se.py -n3  -c allSyncPrims-1kernel \
+--options="lfTreeBarrUniq 10 16 4"

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie5f86ef4eb13134a2a3d0291422f65c9ee355a92
Gerrit-Change-Number: 51607
Gerrit-PatchSet: 2
Gerrit-Owner: Bobby R. Bruce 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: cpu: Updating stats for GUPSGen

2021-10-13 Thread Mahyar Samani (Gerrit) via gem5-dev

Mahyar Samani has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51608 )



Change subject: cpu: Updating stats for GUPSGen
..

cpu: Updating stats for GUPSGen

This changes deletes the deprecated stat types for GUPSGen and
replaces them with the namespaces.

Change-Id: I3a6f1bd65c0b5ebad613b8769553942d9b0d8e0c
---
M src/cpu/testers/traffic_gen/gups_gen.cc
1 file changed, 27 insertions(+), 12 deletions(-)



diff --git a/src/cpu/testers/traffic_gen/gups_gen.cc  
b/src/cpu/testers/traffic_gen/gups_gen.cc

index 837b234..615d4b0 100644
--- a/src/cpu/testers/traffic_gen/gups_gen.cc
+++ b/src/cpu/testers/traffic_gen/gups_gen.cc
@@ -326,29 +326,32 @@

 GUPSGen::GUPSGenStat::GUPSGenStat(GUPSGen* parent):
 Stats::Group(parent),
-ADD_STAT(totalUpdates, UNIT_COUNT,
+ADD_STAT(totalUpdates, statistics::units::Count::get(),
 "Total number of updates the generator made in the memory"),
-ADD_STAT(GUPS, UNIT_RATE(Stats::Units::Count, Stats::Units::Second),
+ADD_STAT(GUPS, statistics::units::Rate::get(),
 "Rate of billion updates per second"),
-ADD_STAT(totalReads, UNIT_COUNT,
+ADD_STAT(totalReads, statistics::units::Count::get(),
 "Total number of read requests"),
-ADD_STAT(totalBytesRead, UNIT_BYTE,
+ADD_STAT(totalBytesRead, statistics::units::Byte::get(),
 "Total number of bytes read"),
-ADD_STAT(avgReadBW, UNIT_RATE(Stats::Units::Byte,  
Stats::Units::Second),

+ADD_STAT(avgReadBW, statistics::units::Rate::get(),
 "Average read bandwidth received from memory"),
-ADD_STAT(totalReadLat, UNIT_TICK,
+ADD_STAT(totalReadLat, statistics::units::Tick::get(),
 "Total latency of read requests."),
-ADD_STAT(avgReadLat, UNIT_TICK,
+ADD_STAT(avgReadLat, statistics::units::Tick::get(),
 "Average latency for read requests"),
-ADD_STAT(totalWrites, UNIT_COUNT,
+ADD_STAT(totalWrites, statistics::units::Count::get(),
 "Total number of write requests"),
-ADD_STAT(totalBytesWritten, UNIT_BYTE,
+ADD_STAT(totalBytesWritten, statistics::units::Byte::get(),
 "Total number of bytes written"),
-ADD_STAT(avgWriteBW, UNIT_RATE(Stats::Units::Byte,  
Stats::Units::Second),

+ADD_STAT(avgWriteBW, statistics::units::Rate::get(),
 "Average write bandwidth received from memory"),
-ADD_STAT(totalWriteLat, UNIT_TICK,
+ADD_STAT(totalWriteLat, statistics::units::Tick::get(),
 "Total latency of write requests."),
-ADD_STAT(avgWriteLat, UNIT_TICK,
+ADD_STAT(avgWriteLat, statistics::units::Tick::get(),
 "Average latency for write requests")
 {}


--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3a6f1bd65c0b5ebad613b8769553942d9b0d8e0c
Gerrit-Change-Number: 51608
Gerrit-PatchSet: 1
Gerrit-Owner: Mahyar Samani 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: scons: Don't explicitly list include dependencies for the cxx config.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/49403 )


Change subject: scons: Don't explicitly list include dependencies for the  
cxx config.

..

scons: Don't explicitly list include dependencies for the cxx config.

SCons will scan c/c++ files for include dependencies itself, there's no
need to list them explicitly.

Change-Id: I295c22e52e38c53ab7705193f2fe2c98227ea70d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49403
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
Reviewed-by: Yu-hsin Wang 
---
M src/SConscript
1 file changed, 20 insertions(+), 13 deletions(-)

Approvals:
  Yu-hsin Wang: Looks good to me, approved
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/SConscript b/src/SConscript
index 76f29f3..db26415 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -701,16 +701,14 @@
 env.Command(cxx_config_cc_file, Value(name),
 MakeAction(createSimObjectCxxConfig(False),
 Transform("CXXCPRCC")))
-env.Depends(cxx_config_hh_file, depends + extra_deps +
-[File('params/%s.hh' % name),  
File('sim/cxx_config.hh')])

-env.Depends(cxx_config_cc_file, depends + extra_deps +
-[cxx_config_hh_file])
+env.Depends(cxx_config_hh_file, depends + extra_deps)
+env.Depends(cxx_config_cc_file, depends + extra_deps)
 Source(cxx_config_cc_file)

 cxx_config_init_cc_file = File('cxx_config/init.cc')

 def createCxxConfigInitCC(target, source, env):
-assert len(target) == 1 and len(source) == 1
+assert len(target) == 1

 code = code_formatter()

@@ -736,15 +734,8 @@
 code('} // namespace gem5')
 code.write(target[0].abspath)

-py_source = PySource.modules[simobj.__module__]
-extra_deps = [ py_source.tnode ]
-env.Command(cxx_config_init_cc_file, Value(name),
+env.Command(cxx_config_init_cc_file, [],
 MakeAction(createCxxConfigInitCC, Transform("CXXCINIT")))
-cxx_param_hh_files = ["cxx_config/%s.hh" % simobj
-for name,simobj in sorted(sim_objects.items())
-if not hasattr(simobj, 'abstract') or not simobj.abstract]
-Depends(cxx_config_init_cc_file, cxx_param_hh_files +
-[File('sim/cxx_config.hh')])
 Source(cxx_config_init_cc_file)

 # Generate all enum header files

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I295c22e52e38c53ab7705193f2fe2c98227ea70d
Gerrit-Change-Number: 49403
Gerrit-PatchSet: 22
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jui-min Lee 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Adding documentation on how to setup KVM.

2021-10-13 Thread Mahyar Samani (Gerrit) via gem5-dev

Mahyar Samani has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51615 )



Change subject: misc: Adding documentation on how to setup KVM.
..

misc: Adding documentation on how to setup KVM.

This change adds doumentation on how to setup KVM.

Change-Id: Ie3bb47b0f9c00e040ba9425018b5659a421fb1a0
---
A INSTALLING-KVM.md
1 file changed, 66 insertions(+), 0 deletions(-)



diff --git a/INSTALLING-KVM.md b/INSTALLING-KVM.md
new file mode 100644
index 000..3520e19
--- /dev/null
+++ b/INSTALLING-KVM.md
@@ -0,0 +1,55 @@
+## Installing KVM
+
+In order to be able to use gem5's KVMCPU or use packer, you need to have  
KVM

+and QEMU installed on your host system. First, you need a processor that
+supports hardware virtualization. In order to see if your processor  
supports

+hardware virtualization, run the command below:
+
+```console
+$ egrep -c '(vmx|svm)' /proc/cpuinfo
+```
+
+If it returns 0, it means that your processor does not support hardware
+virtualization.
+
+If it returns 1 or more, it does. Note: You still have to make sure it is
+enabled in your bios.
+
+I tried this with my GigaByte Aorus X570 Elite motherboard (AMD AM4  
socket) and

+this is how I enabled hardware virtualization for my motherboard.
+
+```console
+Tweaker->Advanced CPU Settings->SVM Mode->Enabled
+```
+
+Note: It is also recommended that you use a 64-bit kernel on your host  
machine.
+The limitations of using a 32-bit kernel on your host machine are as  
follows:

+
+* You can only allocate 2GB of memory for your VMs
+* You can only create 32-bit VMs.
+
+After, in order to install kvm run the following command on terminal  
(tested

+with Ubuntu 20.04 but should work for 18.10 or later):
+
+```console
+$ sudo apt-get install qemu-kvm libvirt-daemon-system libvirt-clients  
bridge-utils

+```
+
+Note: You might also want to install virt-viewer, for viewing instances.
+
+Now add your user to the kvm and libvirt (libvirtd depending on the  
version of

+your Ubuntu). Run the two commands below to do this (it's been tested with
+Ubuntu 20.04 but should work for 18.04 or higher).
+
+```console
+$ sudo adduser `id -un` libvirt
+$ sudo adduser `id -un` kvm
+```
+
+After this, you need to relogin to your account. If you are using SSH,
+disconnect all your session and relogin again. Now if you run the command  
below

+you should see kvm and libvirt (libvirtd).
+
+```console
+$ groups
+```
\ No newline at end of file

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[gem5-dev] Change in gem5/gem5[develop]: tests: convert all nightly GPU tests from GUID to GID

2021-10-13 Thread Matt Sinclair (Gerrit) via gem5-dev

Matt Sinclair has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51567 )


Change subject: tests: convert all nightly GPU tests from GUID to GID
..

tests: convert all nightly GPU tests from GUID to GID

As part of the docker commands for the nightly GPU regression tests,
earlier commits inadvertently used GUID instead of GID, where GUID does
not exist.  This causes some failures when run in Jenkins.  This patch
fixes this issue.

Change-Id: I429c079ae3df9fd97a956f23a2fc9baeed3f7377
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51567
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Bobby R. Bruce 
Maintainer: Jason Lowe-Power 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
M tests/nightly.sh
1 file changed, 24 insertions(+), 4 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/tests/nightly.sh b/tests/nightly.sh
index 30e2c58..b3708fd 100755
--- a/tests/nightly.sh
+++ b/tests/nightly.sh
@@ -86,7 +86,7 @@

 # For the GPU tests we compile and run GCN3_X86 inside a gcn-gpu container.
 docker pull gcr.io/gem5-test/gcn-gpu:latest
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest bash -c \
 "scons build/GCN3_X86/gem5.opt -j${threads} \
 || (rm -rf build && scons build/GCN3_X86/gem5.opt -j${threads})"
@@ -99,7 +99,7 @@
 # Square is the simplest, fastest, more heavily tested GPU application
 # Thus, we always want to run this in the nightly regressions to make sure
 # basic GPU functionality is working.
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

 configs/example/apu_se.py -n3 -c square

@@ -110,7 +110,7 @@
 # 10 Ld/St per thread and 4 iterations of the critical section is a  
reasonable
 # moderate contention case for the default 4 CU GPU config and help ensure  
GPU

 # atomics are tested.
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

 configs/example/apu_se.py -n3  -c allSyncPrims-1kernel \
 --options="sleepMutex 10 16 4"
@@ -120,7 +120,7 @@
 # thread, 4 iterations of critical section.  Again this is representative  
of a
 # moderate contention case for the default 4 CU GPU config and help ensure  
GPU

 # atomics are tested.
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

 configs/example/apu_se.py -n3  -c allSyncPrims-1kernel \
 --options="lfTreeBarrUniq 10 16 4"

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Gerrit-Change-Id: I429c079ae3df9fd97a956f23a2fc9baeed3f7377
Gerrit-Change-Number: 51567
Gerrit-PatchSet: 2
Gerrit-Owner: Matt Sinclair 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Kyle Roarty 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Adding instructions on how to setup a multi-channel memory.

2021-10-13 Thread Kaustav Goswami (Gerrit) via gem5-dev

Kaustav Goswami has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51614 )



Change subject: misc: Adding instructions on how to setup a multi-channel  
memory.

..

misc: Adding instructions on how to setup a multi-channel memory.

This change adds a readme file that explains how a multi-channel
memory is setup and how it works in gem5,

Change-Id: Iec53a11f115a81b30a56c3faf754e2539bf03be6
---
A src/python/gem5/components/memory/ReadMe_MultiChannel_Memory.md
1 file changed, 185 insertions(+), 0 deletions(-)



diff --git  
a/src/python/gem5/components/memory/ReadMe_MultiChannel_Memory.md  
b/src/python/gem5/components/memory/ReadMe_MultiChannel_Memory.md

new file mode 100644
index 000..a222e61
--- /dev/null
+++ b/src/python/gem5/components/memory/ReadMe_MultiChannel_Memory.md
@@ -0,0 +1,173 @@
+[![Build Status](https://)](https://)
+
+# Simulating Multi Channel Memories in gem5
+
+The classic main memory simulator cannot simulate multi-channel main  
memories.
+In this addition, we append the gem5 components library to  
add "multi\_channel.py",

+which implements a multi-channel memory device.
+
+### Directory Structure
+
+```
+├── build_opts
+├── build_tools
+├── configs
+├── ext
+├── include
+├── site_scons
+├── src ─┐
+│└─ python ─┐
+│   └─ gem5 ─┐
+│└─ components ─┐
+│   └─ memory
+│  multi_channel.py
+├── system
+├── tests
+└── utils
+
+```
+### Code Description
+
+The addition to the code base is the file "multi\_channel.py". In this
+section, we describe the aforementioned file.
+
+multi_channel.py:
+Defines a class named MultiChannelMemory, which accepts 5  
parameters:

+(a) dram_interface_class:
+The DRAM interface type to create with this memory controller.
+Currently tested versions are:
+DDR4_2400_8x8
+(b) num_channels:
+The number of channels that needs to be simulated.
+(c) size:
+Optionally define the size of the memory controller's address
+space. By default, it starts at 0 and ends at the size of DRAM
+device specified.
+(d) addr_mapping:
+Defines the address mapping scheme to be used. By default,
+the mapping scheme is RoRaBaCoCh. Other supported mapping
+schemes are:
+RoRaBaChCo
+RoCoRaBaCh
+RoRaBaCoCh [default]
+(e) interleaving_size:
+Defines the interleaving size of the multi-channel memory  
system.

+By default, it is equal to the atom size, i.e., 64 (bytes).
+
+### Working Example
+
+In this section, we demonstrate how a given address is decoded into its
+respective channel (Ch), rank (Ra), bank (Ba), Row (Ro) and Column (Co),
+when the address mapping scheme is given. There are three mapping schemes
+currently supported by gem5: (a) RoCoRaBaCh, (b) RoRaBaCoCh, and,
+(c) RoRaBaChCo. We provide examples of each of these aforementioned mapping
+schemes. But before that, we need to understand the key variables/terms  
that

+are used in this section.
+
+```
+─
+We define a few key variables:
+addr: A given address.
+chan: addr's corresponding channel
+rank: addr's corresponding rank
+bank: addr's corresponding bank
+row : addr's corresponding row
+col : addr's corresponding col
+
+intlv_size:
+intlv_bits:
+
+ranksPerChannel: the number of ranks per chan
+banksPerRanks  : the number of banks per rank
+rowsPerBanks   : the number of rows  per bank
+
+burstsPerRowBuffer:
+burstsPerStripe   :
+
+higherOrderColumnBits:
+lowerOrderColumnBits :
+
+We determine intlv_bits = lg (intlv_size)
+The row_buffer size for the memory system is given by:
+row_buffer_size = device_rowbuffer_size * devices_per_rank
+
+chan_bits: lg (chan)
+rank_bits: lg (rank)
+bank_bits: lg (bank)
+row_bits : lg (row)
+col_bits : lg (row_buffer_size)
+
+─
+
+Now consider the following:
+1. Assume that the given address is 0x3940
+2. Binary Address (35): 0b01110010100
+3. The MSB of the intlv\_bits will give us chan
+4. The remaining bits of the intlv\_bits gives us the
+lowerOrderColumnBits.
+5. Based on the mapping scheme, the bits for row (Ro), rank (Ra), and,
+Bank (Ba) will be determined.
+6. The remaining bits signify the higherOrderColumnBits.
+7. Assume that we are simulating a multi-channel DRAM device
+(DDR4_2400_8x8) with 2 channels, and, the total size of the DRAM
+is 32 GiB (16 GiB) per

[gem5-dev] Change in gem5/gem5[develop]: tests: add additional space in weekly DNNMark tests

2021-10-13 Thread Matt Sinclair (Gerrit) via gem5-dev

Matt Sinclair has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51453 )


Change subject: tests: add additional space in weekly DNNMark tests
..

tests: add additional space in weekly DNNMark tests

Add space between -c and binary name for all DNNMark tests to conform to
the other tests style and reduce confusion.

Change-Id: I6d0777ba2186f0eedfe7e99db51161106837a624
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51453
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Bobby R. Bruce 
Maintainer: Jason Lowe-Power 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
M tests/weekly.sh
1 file changed, 21 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/tests/weekly.sh b/tests/weekly.sh
index 33dd70b..1d14f4f 100755
--- a/tests/weekly.sh
+++ b/tests/weekly.sh
@@ -128,7 +128,7 @@
-w "${gem5_root}/gem5-resources/src/gpu/DNNMark"  
gcr.io/gem5-test/gcn-gpu \
"${gem5_root}/build/GCN3_X86/gem5.opt" "${gem5_root}/configs/example/apu_se.py"  
-n3  
\
 
--benchmark-root="${gem5_root}/gem5-resources/src/gpu/DNNMark/build/benchmarks/test_fwd_softmax"  
\

-   -cdnnmark_test_fwd_softmax \
+   -c dnnmark_test_fwd_softmax \
--options="-config  
${gem5_root}/gem5-resources/src/gpu/DNNMark/config_example/softmax_config.dnnmark  
\

-mmap ${gem5_root}/gem5-resources/src/gpu/DNNMark/mmap.bin"

@@ -137,7 +137,7 @@
-w "${gem5_root}/gem5-resources/src/gpu/DNNMark"  
gcr.io/gem5-test/gcn-gpu \
"${gem5_root}/build/GCN3_X86/gem5.opt" "${gem5_root}/configs/example/apu_se.py"  
-n3  
\
 
--benchmark-root="${gem5_root}/gem5-resources/src/gpu/DNNMark/build/benchmarks/test_fwd_pool"  
\

-   -cdnnmark_test_fwd_pool \
+   -c dnnmark_test_fwd_pool \
--options="-config  
${gem5_root}/gem5-resources/src/gpu/DNNMark/config_example/pool_config.dnnmark  
\

-mmap ${gem5_root}/gem5-resources/src/gpu/DNNMark/mmap.bin"

@@ -146,7 +146,7 @@
-w "${gem5_root}/gem5-resources/src/gpu/DNNMark"  
gcr.io/gem5-test/gcn-gpu \
"${gem5_root}/build/GCN3_X86/gem5.opt" "${gem5_root}/configs/example/apu_se.py"  
-n3  
\
 
--benchmark-root="${gem5_root}/gem5-resources/src/gpu/DNNMark/build/benchmarks/test_bwd_bn"  
\

-   -cdnnmark_test_bwd_bn \
+   -c dnnmark_test_bwd_bn \
--options="-config  
${gem5_root}/gem5-resources/src/gpu/DNNMark/config_example/bn_config.dnnmark  
\

-mmap ${gem5_root}/gem5-resources/src/gpu/DNNMark/mmap.bin"


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Gerrit-Change-Id: I6d0777ba2186f0eedfe7e99db51161106837a624
Gerrit-Change-Number: 51453
Gerrit-PatchSet: 2
Gerrit-Owner: Matt Sinclair 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: kokoro 
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[gem5-dev] Change in gem5/gem5[develop]: tests: fix LULESH weekly regression command

2021-10-13 Thread Matt Sinclair (Gerrit) via gem5-dev

Matt Sinclair has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51207 )


Change subject: tests: fix LULESH weekly regression command
..

tests: fix LULESH weekly regression command

7756c5e added LULESH to the weekly regression script.  However,
it assumed a local installation of gem5-resources which it should
not have.  This commit fixes that so the weekly regression builds the
LULESH binary and then runs it instead.

Change-Id: If91f4340f2d042b0bcb366c5da10f7d0dc5643c5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51207
Maintainer: Matt Sinclair 
Maintainer: Bobby R. Bruce 
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Bobby R. Bruce 
Tested-by: kokoro 
---
M tests/weekly.sh
1 file changed, 38 insertions(+), 4 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve
  Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
  Matt Sinclair: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/tests/weekly.sh b/tests/weekly.sh
index c699f65..33dd70b 100755
--- a/tests/weekly.sh
+++ b/tests/weekly.sh
@@ -46,21 +46,35 @@

 # For the GPU tests we compile and run GCN3_X86 inside a gcn-gpu container.
 docker pull gcr.io/gem5-test/gcn-gpu:latest
-docker run --rm -u $UID:$GUID --volume "${gem5_root}":"${gem5_root}" -w \
+docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest bash -c \
 "scons build/GCN3_X86/gem5.opt -j${threads} \
 || (rm -rf build && scons build/GCN3_X86/gem5.opt -j${threads})"

-# get LULESH
-wget -qN http://dist.gem5.org/dist/develop/test-progs/lulesh/lulesh
+# test LULESH
+# before pulling gem5 resources, make sure it doesn't exist already
+rm -rf ${gem5_root}/gem5-resources
+
+# Pull gem5 resources to the root of the gem5 directory -- currently the
+# pre-built binares for LULESH are out-of-date and won't run correctly with
+# ROCm 4.0.  In the meantime, we can build the binary as part of this  
script

+git clone -b develop https://gem5.googlesource.com/public/gem5-resources \
+"${gem5_root}/gem5-resources"

 mkdir -p tests/testing-results

+# build LULESH
+docker run --rm --volume "${gem5_root}":"${gem5_root}" -w \
+   "${gem5_root}/gem5-resources/src/gpu/lulesh" \
+   -u $UID:$GID gcr.io/gem5-test/gcn-gpu:latest bash -c \
+   "make"
+
 # LULESH is heavily used in the HPC community on GPUs, and does a good job  
of

 # stressing several GPU compute and memory components
 docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
 "${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest build/GCN3_X86/gem5.opt  
\

-configs/example/apu_se.py -n3 --mem-size=8GB -clulesh
+configs/example/apu_se.py -n3 --mem-size=8GB \
+--benchmark-root="${gem5_root}/gem5-resources/src/gpu/lulesh/bin" -c  
lulesh


 # get DNNMark
 # Delete gem5 resources repo if it already exists -- need to do in docker

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Gerrit-Change-Number: 51207
Gerrit-PatchSet: 7
Gerrit-Owner: Matt Sinclair 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Alex Dutu 
Gerrit-CC: Kyle Roarty 
Gerrit-CC: Matthew Poremba 
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[gem5-dev] Change in gem5/gem5[develop]: mem: Stop using SlavePort as a base class.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/51529 )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: mem: Stop using SlavePort as a base class.
..

mem: Stop using SlavePort as a base class.

There are other classes like "ExternalSlave" which still have the word
"Slave" in them, but at least this will make the build quit complaining
about the deprecated SlavePort.

Change-Id: I917c2880574cb77ea37c69dc2727ac5e84b83cd5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51529
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Daniel Carvalho 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/mem/external_slave.hh
1 file changed, 21 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Daniel Carvalho: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/mem/external_slave.hh b/src/mem/external_slave.hh
index 51c884b..17ab42a 100644
--- a/src/mem/external_slave.hh
+++ b/src/mem/external_slave.hh
@@ -69,7 +69,7 @@
 {
   public:
 /** Derive from this class to create an external port interface */
-class ExternalPort : public SlavePort
+class ExternalPort : public ResponsePort
 {
   protected:
 ExternalSlave 
@@ -77,7 +77,7 @@
   public:
 ExternalPort(const std::string _,
 ExternalSlave _) :
-SlavePort(name_, _), owner(owner_)
+ResponsePort(name_, _), owner(owner_)
 { }

 ~ExternalPort() { }
@@ -90,7 +90,7 @@

 /* Handlers are specific to *types* of port not specific port
  * instantiations.  A handler will typically build a bridge to the
- * external port from gem5 and provide gem5 with a SlavePort that can  
be
+ * external port from gem5 and provide gem5 with a ResponsePort that  
can be

  * bound to for each call to Handler::getExternalPort.*/
 class Handler
 {

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I917c2880574cb77ea37c69dc2727ac5e84b83cd5
Gerrit-Change-Number: 51529
Gerrit-PatchSet: 3
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nikos Nikoleris 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: scons: Make the SimObject list from the 'gem5 lib' tag.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/50331 )


Change subject: scons: Make the SimObject list from the 'gem5 lib' tag.
..

scons: Make the SimObject list from the 'gem5 lib' tag.

Only include SimObject files which match the gem5 lib tag. This way we
can declare SimObjects, and then filter them out based on tags.

Change-Id: I0aca1ef830bcc7beaee80c54d58ba8a188968491
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50331
Reviewed-by: Andreas Sandberg 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/SConscript
1 file changed, 19 insertions(+), 4 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/SConscript b/src/SConscript
index 6b2f7e4..76f29f3 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -141,7 +141,6 @@
 it to a list of sim object modules'''

 fixed = False
-modnames = []

 def __init__(self, source, tags=None, add_tags=None):
 '''Specify the source file and any tags (automatically in
@@ -150,8 +149,6 @@
 if self.fixed:
 raise AttributeError("Too late to call SimObject now.")

-bisect.insort_right(SimObject.modnames, self.modname)
-

 # This regular expression is simplistic and assumes that the import takes  
up
 # the entire line, doesn't have the keyword "public", uses double quotes,  
has

@@ -589,7 +586,9 @@

 # import all sim objects so we can populate the all_objects list
 # make sure that we're working with a list, then let's sort it
-for modname in SimObject.modnames:
+gem5_lib_simobjects = SimObject.all.with_tag(env, 'gem5 lib')
+gem5_lib_modnames = sorted(map(lambda so: so.modname, gem5_lib_simobjects))
+for modname in gem5_lib_modnames:
 exec('from m5.objects import %s' % modname)

 # we need to unload all of the currently imported modules so that they

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0aca1ef830bcc7beaee80c54d58ba8a188968491
Gerrit-Change-Number: 50331
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jui-min Lee 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: scons,arch: Make the gem5 lib tag imply the current arch tag.

2021-10-13 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/50330 )


Change subject: scons,arch: Make the gem5 lib tag imply the current arch  
tag.

..

scons,arch: Make the gem5 lib tag imply the current arch tag.

That way you can use the tag to specify when a source file should be
built, instead of conditionally declaring the file to SCons.

Change-Id: Ia3a23860d2ee39ec6b32ee2195648b4d88564c83
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50330
Reviewed-by: Andreas Sandberg 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/arch/SConscript
1 file changed, 18 insertions(+), 0 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/SConscript b/src/arch/SConscript
index 0803b07..ecc0ca5 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -55,6 +55,8 @@
 #
 #

+env.TagImplies('gem5 lib', env.subst('${TARGET_ISA} isa'))
+
 env.SwitchingHeaders(
 Split('''
 decoder.hh

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia3a23860d2ee39ec6b32ee2195648b4d88564c83
Gerrit-Change-Number: 50330
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jui-min Lee 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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