Re: [RFC 1/6] powerpc:/drc Define interface to acquire arch-specific drc info
On 1/25/19 10:09 AM, Michael Bringmann wrote: > Adding Nathan Lynch > > On 1/24/19 6:04 PM, Tyrel Datwyler wrote: >> On 12/14/2018 12:50 PM, Michael Bringmann wrote: >>> Define interface to acquire arch-specific drc info to match against >>> hotpluggable devices. The current implementation exposes several >>> pseries-specific dynamic memory properties in generic kernel code. >>> This patch set provides an interface to pull that code out of the >>> generic kernel. >>> >>> Signed-off-by: Michael Bringmann >>> --- >>> include/linux/topology.h |9 + >>> 1 file changed, 9 insertions(+) >>> >>> diff --git a/include/linux/topology.h b/include/linux/topology.h >>> index cb0775e..df97f5f 100644 >>> --- a/include/linux/topology.h >>> +++ b/include/linux/topology.h >>> @@ -44,6 +44,15 @@ >> >> As far as I know pseries is the only platform that uses DR connectors, and I >> highly doubt that any other powerpc platform or arch ever will. So, I'm not >> sure >> that this is really generic enough to belong in topology.h. If anything I >> would >> suggest putting this in an include in arch/powerpc/include/ named something >> like >> drcinfo.h or pseries-drc.h. That will make it visible to modules like rpaphp >> that want/need to use this functionality. It looks like the 'rpaphp' and 'rpadlpar_io' modules are also dependent upon the powerpc platform. Shouldn't the relevant source files be moved completely to the powerpc-specific directories out of drivers/pci/hotplug as well? drivers/pci/hotplug/Kconfig has: config HOTPLUG_PCI_RPA tristate "RPA PCI Hotplug driver" depends on PPC_PSERIES && EEH help Say Y here if you have a RPA system that supports PCI Hotplug. To compile this driver as a module, choose M here: the module will be called rpaphp. When in doubt, say N. config HOTPLUG_PCI_RPA_DLPAR tristate "RPA Dynamic Logical Partitioning for I/O slots" depends on HOTPLUG_PCI_RPA help Say Y here if your system supports Dynamic Logical Partitioning for I/O slots. To compile this driver as a module, choose M here: the module will be called rpadlpar_io. When in doubt, say N. Michael >> >> -Tyrel >> >>> >>> int arch_update_cpu_topology(void); >>> >>> +int arch_find_drc_match(struct device_node *dn, >>> + bool (*usercb)(struct device_node *dn, >>> + u32 drc_index, char *drc_name, >>> + char *drc_type, u32 drc_power_domain, >>> + void *data), >>> + char *opt_drc_type, char *opt_drc_name, >>> + bool match_drc_index, bool ck_php_type, >>> + void *data); >>> + >>> /* Conform to ACPI 2.0 SLIT distance definitions */ >>> #define LOCAL_DISTANCE 10 >>> #define REMOTE_DISTANCE20 >>> >> >> > -- Michael W. Bringmann Linux Technology Center IBM Corporation Tie-Line 363-5196 External: (512) 286-5196 Cell: (512) 466-0650 m...@linux.vnet.ibm.com
Re: [PATCH] mtd: rawnand: mark expected switch fall-throughs
Miquel, Boris,
On 1/28/19 3:13 AM, Miquel Raynal wrote:
> Hi Boris,
>
> Boris Brezillon wrote on Sat, 26 Jan 2019
> 17:54:29 +0100:
>
>> On Sat, 26 Jan 2019 07:48:50 -0600
>> "Gustavo A. R. Silva" wrote:
>>
>>> Hey Boris,
>>>
>>> On 1/26/19 3:52 AM, Boris Brezillon wrote:
On Fri, 25 Jan 2019 15:09:50 -0600
"Gustavo A. R. Silva" wrote:
> diff --git a/drivers/mtd/nand/raw/nandsim.c
> b/drivers/mtd/nand/raw/nandsim.c
> index 933d1a629c51..d33e15dc4cdc 100644
> --- a/drivers/mtd/nand/raw/nandsim.c
> +++ b/drivers/mtd/nand/raw/nandsim.c
> @@ -2251,9 +2251,10 @@ static int __init ns_init_module(void)
>
> switch (bbt) {
> case 2:
> - chip->bbt_options |= NAND_BBT_NO_OOB;
> + chip->bbt_options |= NAND_BBT_NO_OOB;
> + /* fall through */
> case 1:
> - chip->bbt_options |= NAND_BBT_USE_FLASH;
> + chip->bbt_options |= NAND_BBT_USE_FLASH;
You miss a '/* fall through */' here.
>>>
>>> Not really. Notice that in this case the code falls through
>>> to a break statement.
>>
>> Still find it weird to mandate fall through comments in all cases but
>> this one...
>
> Yes please, even if there is no GCC warning I think you can add one
> here.
>
Yep. I get your point.
I've just sent v2: https://lore.kernel.org/patchwork/patch/1036251/
Thanks for the feedback.
--
Gustavo
[PATCH 1/2] arm64: meson: remove COMMON_CLK_AMLOGIC selection
Selecting COMMON_CLK_AMLOGIC is not required as it is already selected by the SoC clock controller driver Signed-off-by: Jerome Brunet --- arch/arm64/Kconfig.platforms | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 251ecf34cb02..819e74ae9224 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -112,7 +112,6 @@ config ARCH_MESON bool "Amlogic Platforms" select PINCTRL select PINCTRL_MESON - select COMMON_CLK_AMLOGIC select COMMON_CLK_GXBB select COMMON_CLK_AXG select MESON_IRQ_GPIO -- 2.20.1
[PATCH 2/2] ARM: meson: remove COMMON_CLK_AMLOGIC selection
Selecting COMMON_CLK_AMLOGIC is not required as it is already selected by the SoC clock controller driver Signed-off-by: Jerome Brunet --- arch/arm/mach-meson/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index b16831697183..15e9cb75738e 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -9,7 +9,6 @@ menuconfig ARCH_MESON select PINCTRL select PINCTRL_MESON select COMMON_CLK - select COMMON_CLK_AMLOGIC select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP -- 2.20.1
[PATCH 0/2] ARM: meson: do not select COMMON_CLK_AMLOGIC
The patchset remove the selection of CONFIG_COMMON_CLK_AMLOGIC. This CONFIG symbol: * Is already selected by controller driver which requires it. * Is being removed by this changeset [0] Whether or not series [0] is merged, selecting CONFIG_COMMON_CLK_AMLOGIC is not necessary and it is safe to remove it. [0]: https://lkml.kernel.org/r/20190128180430.28689-1-jbru...@baylibre.com Jerome Brunet (2): arm64: meson: remove COMMON_CLK_AMLOGIC selection ARM: meson: remove COMMON_CLK_AMLOGIC selection arch/arm/mach-meson/Kconfig | 1 - arch/arm64/Kconfig.platforms | 1 - 2 files changed, 2 deletions(-) -- 2.20.1
Re: [PATCH v3 lora-next 3/4] dt-bindings: lora: sx125x: add clock bindings
On Thu, Jan 24, 2019 at 8:54 AM Ben Whitten wrote:
>
> From: Ben Whitten
>
> The SX125x consumes a clock (FXOSC) ranging from 32 to 36 MHz as its main
> XTAL. It may also consume a clock for the TX synthesizer or DAC input clock
> (FCLK_IN).
> If the radio is coupled with an SX130x the radio is therefor operating in
> master mode and it may also provide a gated version of FXOSC clock for the
> concentrator. In this case the concentrator is expecting a 32 MHz input
> clock.
>
> In the example we connect fxosc to the "txco" clock source, represented by a
> fixed clock. The radio also provides a clock output "fclk_out" for
> consumption by the SX130x concentrator.
>
> Signed-off-by: Ben Whitten
> ---
> v2 -> v3:
> * Name clock inputs and outputs
> * Add FCLK_IN
> v1 -> v2:
> * Fixed incorrect usage of clock cells
> * Fixed wording in commit and descriptions
> * Dropped enforced clock names
> ---
> .../bindings/net/lora/semtech,sx125x.yaml | 33 +++
> 1 file changed, 33 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml
> b/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml
> index fe2d2a23c28b..be45bcfd97be 100644
> --- a/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml
> +++ b/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml
> @@ -27,12 +27,41 @@ properties:
> description: The chip select on the SPI bus or radio number in
> concentrator
>, with radio A = 0 and radio B = 1.
>
> + clocks:
> +maxItems: 2
> +description: Input clock (FXOSC) provider with output ranging from 32 MHz
> + to 36 MHz. TX synthesizer or DAC input clock (FCLK_IN) provider with
> + output ranging from 32 MHz to 36 MHz.
> +
> + clock-names:
> +items:
> + - const: fxosc
> + - const: fclk_in
The example has a single clock. Is that valid? If so, then you need to
add minItems and maxItems.
> +description: Input clock (FXOSC), TX synthesizer or DAC input clock
> + (FCLK_IN)
> +
> + clock-output-names:
> +items:
> + - const: fclk_out
> +description: Output clock (FCLK_OUT) name, clock is gated version of the
> + input (FXOSC). Used in master mode operation.
> +
> + '#clock-cells':
> +const: 0
> +
> required:
>- compatible
>- reg
>
> examples:
>- |
> +tcxo: dummy32m {
> + compatible = "fixed-clock";
> + clock-frequency = <3200>;
> + clock-output-names = "tcxo";
> + #clock-cells = <0>;
> +};
> +
> spi {
>#address-cells = <1>;
>#size-cells = <0>;
> @@ -40,5 +69,9 @@ examples:
>radio0: radio@0 {
> compatible = "semtech,sx1257";
> reg = <0>;
> +clocks = <>;
> +clock-names = "fxosc";
> +clock-output-names = "fclk_out";
> +#clock-cells = <0>;
>};
> };
> --
> 2.17.1
>
Re: [PATCH] mm: Prevent mapping slab pages to userspace
On Fri, 25 Jan 2019 09:38:27 -0800 Matthew Wilcox wrote: > It's never appropriate to map a page allocated by SLAB into userspace. > A buggy device driver might try this, or an attacker might be able to > find a way to make it happen. It wouldn't surprise me if someone somewhere is doing this. Rather than mysteriously breaking their code, how about we emit a warning and still permit it to proceed, for a while?
Re: [PATCH v3 lora-next 2/4] dt-bindings: lora: sx125x: add basic documentation
On Thu, Jan 24, 2019 at 8:53 AM Ben Whitten wrote: > > From: Ben Whitten > > The SX125x family are IQ radio transceivers from Semtech configured over > SPI, they are typically connected to an SX130x series concentrator however > may be connected to a host directly. > > Required properties include the radio number of the host or concentrator > bus. > > Signed-off-by: Ben Whitten > --- > v2 -> v3: > * Renamed example node name to be consistent with concentrator > v1 -> v2: > * Dropped spi-max-frequency binding > * Wording changes to commit and descriptions > * Added spi wrapper suggested by Rob H > * Dual licence > --- > .../bindings/net/lora/semtech,sx125x.yaml | 44 +++ > 1 file changed, 44 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml Reviewed-by: Rob Herring
Re: [PATCH v2 3/3] Pinctrl: Ingenic: Unify the function name prefix to "ingenic_gpio_".
Le lun. 28 janv. 2019 à 12:19, Zhou Yanjie a
écrit :
From: Zhou Yanjie
In the original code, some function names begin with "ingenic_gpio_",
and some with "gpio_ingenic_". For the sake of uniform style,
all of them are changed to the beginning of "ingenic_gpio_".
Signed-off-by: Zhou Yanjie
Reviewed-by: Paul Cercueil
---
drivers/pinctrl/pinctrl-ingenic.c | 46
+++
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-ingenic.c
b/drivers/pinctrl/pinctrl-ingenic.c
index 6501f35..2b3f7e4 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b/drivers/pinctrl/pinctrl-ingenic.c
@@ -715,7 +715,7 @@ static const struct ingenic_chip_info
jz4780_chip_info = {
.pull_downs = jz4770_pull_downs,
};
-static u32 gpio_ingenic_read_reg(struct ingenic_gpio_chip *jzgc, u8
reg)
+static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8
reg)
{
unsigned int val;
@@ -724,7 +724,7 @@ static u32 gpio_ingenic_read_reg(struct
ingenic_gpio_chip *jzgc, u8 reg)
return (u32) val;
}
-static void gpio_ingenic_set_bit(struct ingenic_gpio_chip *jzgc,
+static void ingenic_gpio_set_bit(struct ingenic_gpio_chip *jzgc,
u8 reg, u8 offset, bool set)
{
if (set)
@@ -738,7 +738,7 @@ static void gpio_ingenic_set_bit(struct
ingenic_gpio_chip *jzgc,
static inline bool ingenic_gpio_get_value(struct ingenic_gpio_chip
*jzgc,
u8 offset)
{
- unsigned int val = gpio_ingenic_read_reg(jzgc, GPIO_PIN);
+ unsigned int val = ingenic_gpio_read_reg(jzgc, GPIO_PIN);
return !!(val & BIT(offset));
}
@@ -747,9 +747,9 @@ static void ingenic_gpio_set_value(struct
ingenic_gpio_chip *jzgc,
u8 offset, int value)
{
if (jzgc->jzpc->version >= ID_JZ4770)
- gpio_ingenic_set_bit(jzgc, JZ4770_GPIO_PAT0, offset, !!value);
+ ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_PAT0, offset, !!value);
else
- gpio_ingenic_set_bit(jzgc, JZ4740_GPIO_DATA, offset, !!value);
+ ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_DATA, offset, !!value);
}
static void irq_set_type(struct ingenic_gpio_chip *jzgc,
@@ -767,21 +767,21 @@ static void irq_set_type(struct
ingenic_gpio_chip *jzgc,
switch (type) {
case IRQ_TYPE_EDGE_RISING:
- gpio_ingenic_set_bit(jzgc, reg2, offset, true);
- gpio_ingenic_set_bit(jzgc, reg1, offset, true);
+ ingenic_gpio_set_bit(jzgc, reg2, offset, true);
+ ingenic_gpio_set_bit(jzgc, reg1, offset, true);
break;
case IRQ_TYPE_EDGE_FALLING:
- gpio_ingenic_set_bit(jzgc, reg2, offset, false);
- gpio_ingenic_set_bit(jzgc, reg1, offset, true);
+ ingenic_gpio_set_bit(jzgc, reg2, offset, false);
+ ingenic_gpio_set_bit(jzgc, reg1, offset, true);
break;
case IRQ_TYPE_LEVEL_HIGH:
- gpio_ingenic_set_bit(jzgc, reg2, offset, true);
- gpio_ingenic_set_bit(jzgc, reg1, offset, false);
+ ingenic_gpio_set_bit(jzgc, reg2, offset, true);
+ ingenic_gpio_set_bit(jzgc, reg1, offset, false);
break;
case IRQ_TYPE_LEVEL_LOW:
default:
- gpio_ingenic_set_bit(jzgc, reg2, offset, false);
- gpio_ingenic_set_bit(jzgc, reg1, offset, false);
+ ingenic_gpio_set_bit(jzgc, reg2, offset, false);
+ ingenic_gpio_set_bit(jzgc, reg1, offset, false);
break;
}
}
@@ -791,7 +791,7 @@ static void ingenic_gpio_irq_mask(struct irq_data
*irqd)
struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
- gpio_ingenic_set_bit(jzgc, GPIO_MSK, irqd->hwirq, true);
+ ingenic_gpio_set_bit(jzgc, GPIO_MSK, irqd->hwirq, true);
}
static void ingenic_gpio_irq_unmask(struct irq_data *irqd)
@@ -799,7 +799,7 @@ static void ingenic_gpio_irq_unmask(struct
irq_data *irqd)
struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
- gpio_ingenic_set_bit(jzgc, GPIO_MSK, irqd->hwirq, false);
+ ingenic_gpio_set_bit(jzgc, GPIO_MSK, irqd->hwirq, false);
}
static void ingenic_gpio_irq_enable(struct irq_data *irqd)
@@ -809,9 +809,9 @@ static void ingenic_gpio_irq_enable(struct
irq_data *irqd)
int irq = irqd->hwirq;
if (jzgc->jzpc->version >= ID_JZ4770)
- gpio_ingenic_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);
+ ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);
else
- gpio_ingenic_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, true);
+ ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, true);
ingenic_gpio_irq_unmask(irqd);
}
@@
Re: [PATCH v3 lora-next 1/4] dt-bindings: lora: sx130x: add basic documentation
On Thu, Jan 24, 2019 at 8:53 AM Ben Whitten wrote: > > From: Ben Whitten > > Add basic documentation in YAML format for the SX130x series concentrators > from Semtech. > Required is; the location on the SPI bus and the compatible string. > > Signed-off-by: Ben Whitten > --- > v2 -> v3: > * Corrected fallback notation > * Limited radio node names from anything to 'radio@' > v1 -> v2: > * Dropped reset-gpios, radio-spi from required. > * Dropped spi-max-frequency from binding. > * Changed compatible to allow fallback from SX1308 to SX1301. > * Wording changes in commit and descriptions. > * Dual licence > * Incorperate Robs comments on child node and spi wrapper > --- > .../bindings/net/lora/semtech,sx130x.yaml | 101 ++ > 1 file changed, 101 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml Reviewed-by: Rob Herring
Re: [PATCH v2 1/3] Pinctrl: Ingenic: Fix bugs caused by differences between JZ4770 and JZ4780.
Hi,
Le lun. 28 janv. 2019 à 12:19, Zhou Yanjie a
écrit :
From: Zhou Yanjie
Delete uart4 and i2c3/4 from JZ4770:
According to the datasheet, only JZ4780 have uart4 and i2c3/4. So we
remove it from the JZ4770 code and add a section corresponding the
JZ4780.
Fix bugs in i2c0/1:
The pin number was wrong in the original code.
Fix bugs in uart2:
JZ4770 and JZ4780 have different uart2 pins. So the original section
JZ4770
has been modified and the corresponding section of JZ4780 has been
added.
Fix bugs in mmc0:
JZ4770 and JZ4780 assigned different pins to mmc0's 4~7 data lines.
So the
original section JZ4770 has been modified and the corresponding
section of
JZ4780 has been added.
Fix bugs in mmc1:
JZ4770's mmc1 has 8bit mode, while JZ4780 doesn't. So the original
section JZ4770 has been modified and the corresponding section of
JZ4780 has been added.
Fix bugs in nemc:
JZ4770's nemc has 16bit mode, while JZ4780 doesn't. So the original
section
JZ4770 has been modified and the corresponding section of JZ4780 has
been
added. And add missing cs2~5 groups for JZ4770 and JZ4780.
Fix bugs in cim:
JZ4770's cim has 12bit mode, while JZ4780 doesn't. So the original
section JZ4770 has been modified and the corresponding section of
JZ4780 has been added.
Fix bugs in lcd:
Both JZ4770 and JZ4780 lcd should be 24bit instead of 32bit.
Signed-off-by: Zhou Yanjie
Reviewed-by: Paul Cercueil
---
drivers/pinctrl/pinctrl-ingenic.c | 249
+-
1 file changed, 191 insertions(+), 58 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-ingenic.c
b/drivers/pinctrl/pinctrl-ingenic.c
index db6b48e..710062b 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b/drivers/pinctrl/pinctrl-ingenic.c
@@ -321,23 +321,26 @@ static int jz4770_uart0_data_pins[] = { 0xa0,
0xa3, };
static int jz4770_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
static int jz4770_uart1_data_pins[] = { 0x7a, 0x7c, };
static int jz4770_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
-static int jz4770_uart2_data_pins[] = { 0x66, 0x67, };
-static int jz4770_uart2_hwflow_pins[] = { 0x65, 0x64, };
+static int jz4770_uart2_data_pins[] = { 0x5c, 0x5e, };
+static int jz4770_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
static int jz4770_uart3_data_pins[] = { 0x6c, 0x85, };
static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };
-static int jz4770_uart4_data_pins[] = { 0x54, 0x4a, };
-static int jz4770_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07,
0x18, };
-static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
-static int jz4770_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
+static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
-static int jz4770_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
+static int jz4770_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
+static int jz4770_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
static int jz4770_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
-static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
+static int jz4770_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
static int jz4770_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
-static int jz4770_nemc_data_pins[] = {
+static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
+static int jz4770_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
+static int jz4770_nemc_8bit_data_pins[] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
};
+static int jz4770_nemc_16bit_data_pins[] = {
+ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+};
static int jz4770_nemc_cle_ale_pins[] = { 0x20, 0x21, };
static int jz4770_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
static int jz4770_nemc_rd_we_pins[] = { 0x10, 0x11, };
@@ -348,20 +351,21 @@ static int jz4770_nemc_cs3_pins[] = { 0x17, };
static int jz4770_nemc_cs4_pins[] = { 0x18, };
static int jz4770_nemc_cs5_pins[] = { 0x19, };
static int jz4770_nemc_cs6_pins[] = { 0x1a, };
-static int jz4770_i2c0_pins[] = { 0x6e, 0x6f, };
-static int jz4770_i2c1_pins[] = { 0x8e, 0x8f, };
+static int jz4770_i2c0_pins[] = { 0x7e, 0x7f, };
+static int jz4770_i2c1_pins[] = { 0x9e, 0x9f, };
static int jz4770_i2c2_pins[] = { 0xb0, 0xb1, };
-static int jz4770_i2c3_pins[] = { 0x6a, 0x6b, };
-static int jz4770_i2c4_e_pins[] = { 0x8c, 0x8d, };
-static int jz4770_i2c4_f_pins[] = { 0xb9, 0xb8, };
-static int jz4770_cim_pins[] = {
- 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30,
0x31,
+static int jz4770_cim_8bit_pins[] = {
+ 0x26, 0x27, 0x28, 0x29,
+ 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31,
+};
+static int jz4770_cim_12bit_pins[] = {
+ 0x32, 0x33, 0xb0, 0xb1,
};
-static int jz4770_lcd_32bit_pins[] = {
+static int jz4770_lcd_24bit_pins[] = {
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
-
[PATCH v2] mtd: rawnand: mark expected switch fall-throughs
In preparation to enabling -Wimplicit-fallthrough, mark switch
cases where we are expecting to fall through.
This patch fixes the following warning:
drivers/mtd/nand/onenand/onenand_base.c:3264:6: warning: this statement may
fall through [-Wimplicit-fallthrough=]
drivers/mtd/nand/onenand/onenand_base.c:3288:17: warning: this statement may
fall through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/nand_base.c:5538:6: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/nand_base.c:5557:6: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/nand_base.c:5595:13: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/nand_legacy.c:332:6: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/nand_legacy.c:483:3: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/nandsim.c:2254:22: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/omap_elm.c:512:4: warning: this statement may fall through
[-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/omap_elm.c:517:4: warning: this statement may fall through
[-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/omap_elm.c:466:37: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/omap_elm.c:471:37: warning: this statement may fall
through [-Wimplicit-fallthrough=]
drivers/mtd/nand/raw/nuc900_nand.c: In function ‘nuc900_nand_command_lp’:
./arch/x86/include/asm/io.h:91:22: warning: this statement may fall through
[-Wimplicit-fallthrough=]
#define __raw_writel __writel
drivers/mtd/nand/raw/nuc900_nand.c:52:2: note: in expansion of macro
‘__raw_writel’
__raw_writel((val), (dev)->reg + REG_SMCMD)
^~~~
drivers/mtd/nand/raw/nuc900_nand.c:196:3: note: in expansion of macro
‘write_cmd_reg’
write_cmd_reg(nand, NAND_CMD_READSTART);
^
drivers/mtd/nand/raw/nuc900_nand.c:197:2: note: here
default:
^~~
Warning level 3 was used: -Wimplicit-fallthrough=3
This patch is part of the ongoing efforts to enabling
-Wimplicit-fallthrough.
Signed-off-by: Gustavo A. R. Silva
---
Changes in v2:
- Add extra /* fall through */ comment in nandsim.c file.
drivers/mtd/nand/onenand/onenand_base.c | 2 ++
drivers/mtd/nand/raw/diskonchip.c | 1 +
drivers/mtd/nand/raw/nand_base.c| 3 +++
drivers/mtd/nand/raw/nand_legacy.c | 3 ++-
drivers/mtd/nand/raw/nandsim.c | 6 --
drivers/mtd/nand/raw/nuc900_nand.c | 3 ++-
drivers/mtd/nand/raw/omap_elm.c | 4
7 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/onenand/onenand_base.c
b/drivers/mtd/nand/onenand/onenand_base.c
index 4ca4b194e7d7..e9b71ad24f50 100644
--- a/drivers/mtd/nand/onenand/onenand_base.c
+++ b/drivers/mtd/nand/onenand/onenand_base.c
@@ -3280,12 +3280,14 @@ static void onenand_check_features(struct mtd_info *mtd)
if ((this->version_id & 0xf) == 0xe)
this->options |= ONENAND_HAS_NOP_1;
}
+ /* fall through */
case ONENAND_DEVICE_DENSITY_2Gb:
/* 2Gb DDP does not have 2 plane */
if (!ONENAND_IS_DDP(this))
this->options |= ONENAND_HAS_2PLANE;
this->options |= ONENAND_HAS_UNLOCK_ALL;
+ /* fall through */
case ONENAND_DEVICE_DENSITY_1Gb:
/* A-Die has all block unlock */
diff --git a/drivers/mtd/nand/raw/diskonchip.c
b/drivers/mtd/nand/raw/diskonchip.c
index 53f57e0f007e..ead54c90f2d1 100644
--- a/drivers/mtd/nand/raw/diskonchip.c
+++ b/drivers/mtd/nand/raw/diskonchip.c
@@ -1477,6 +1477,7 @@ static int __init doc_probe(unsigned long physadr)
break;
case DOC_ChipID_DocMilPlus32:
pr_err("DiskOnChip Millennium Plus 32MB is not
supported, ignoring.\n");
+ /* fall through */
default:
ret = -ENODEV;
goto notfound;
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 96cadead262e..e05ecf2e4269 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5537,6 +5537,7 @@ static int nand_scan_tail(struct nand_chip *chip)
}
if (!ecc->read_page)
ecc->read_page = nand_read_page_hwecc_oob_first;
+ /* fall through */
case NAND_ECC_HW:
/* Use standard hwecc read page function? */
@@ -5556,6 +5557,7 @@ static int nand_scan_tail(struct nand_chip *chip)
ecc->read_subpage = nand_read_subpage;
if (!ecc->write_subpage && ecc->hwctl && ecc->calculate)
ecc->write_subpage = nand_write_subpage_hwecc;
+ /* fall through */
Re: [PATCH v3] oom, oom_reaper: do not enqueue same task twice
On Sun, 27 Jan 2019 23:57:38 +0900 Tetsuo Handa
wrote:
> Arkadiusz reported that enabling memcg's group oom killing causes
> strange memcg statistics where there is no task in a memcg despite
> the number of tasks in that memcg is not 0. It turned out that there
> is a bug in wake_oom_reaper() which allows enqueuing same task twice
> which makes impossible to decrease the number of tasks in that memcg
> due to a refcount leak.
>
> This bug existed since the OOM reaper became invokable from
> task_will_free_mem(current) path in out_of_memory() in Linux 4.7,
> but memcg's group oom killing made it easier to trigger this bug by
> calling wake_oom_reaper() on the same task from one out_of_memory()
> request.
>
> Fix this bug using an approach used by commit 855b018325737f76
> ("oom, oom_reaper: disable oom_reaper for oom_kill_allocating_task").
> As a side effect of this patch, this patch also avoids enqueuing
> multiple threads sharing memory via task_will_free_mem(current) path.
>
Do we think this is serious enough to warrant a -stable backport?
Re: [PATCH v2 2/3] Pinctrl: Ingenic: Add missing parts for JZ4770 and JZ4780.
Hi,
Le lun. 28 janv. 2019 à 12:19, Zhou Yanjie a
écrit :
From: Zhou Yanjie
Add mmc2 for JZ4770 and JZ4780:
According to the datasheet, both JZ4770 and JZ4780 have mmc2. But this
part of the original code is missing. It is worth noting that JZ4770's
mmc2 supports 8bit mode while JZ4780's does not, so we added the
corresponding code for both models.
Add nemc-wait for JZ4770 and JZ4780:
Both JZ4770 and JZ4780 have a nemc-wait pin. But this part of the
original code is missing.
Add mac for JZ4770:
JZ4770 have a mac. But this part of the original code is missing.
Signed-off-by: Zhou Yanjie
Reviewed-by: Paul Cercueil
Good job!
---
drivers/pinctrl/pinctrl-ingenic.c | 46
+--
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-ingenic.c
b/drivers/pinctrl/pinctrl-ingenic.c
index 710062b..6501f35 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b/drivers/pinctrl/pinctrl-ingenic.c
@@ -335,6 +335,11 @@ static int jz4770_mmc1_4bit_d_pins[] = { 0x75,
0x76, 0x77, };
static int jz4770_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
static int jz4770_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
+static int jz4770_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
+static int jz4770_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
+static int jz4770_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
+static int jz4770_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
+static int jz4770_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
static int jz4770_nemc_8bit_data_pins[] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
};
@@ -345,6 +350,7 @@ static int jz4770_nemc_cle_ale_pins[] = { 0x20,
0x21, };
static int jz4770_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
static int jz4770_nemc_rd_we_pins[] = { 0x10, 0x11, };
static int jz4770_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
+static int jz4770_nemc_wait_pins[] = { 0x1b, };
static int jz4770_nemc_cs1_pins[] = { 0x15, };
static int jz4770_nemc_cs2_pins[] = { 0x16, };
static int jz4770_nemc_cs3_pins[] = { 0x17, };
@@ -375,6 +381,10 @@ static int jz4770_pwm_pwm4_pins[] = { 0x84, };
static int jz4770_pwm_pwm5_pins[] = { 0x85, };
static int jz4770_pwm_pwm6_pins[] = { 0x6a, };
static int jz4770_pwm_pwm7_pins[] = { 0x6b, };
+static int jz4770_mac_rmii_pins[] = {
+ 0xa9, 0xab, 0xaa, 0xac, 0xa5, 0xa4, 0xad, 0xae, 0xa6, 0xa8,
+};
+static int jz4770_mac_mii_pins[] = { 0xa7, 0xaf, };
static int jz4770_uart0_data_funcs[] = { 0, 0, };
static int jz4770_uart0_hwflow_funcs[] = { 0, 0, };
@@ -394,12 +404,18 @@ static int jz4770_mmc1_4bit_d_funcs[] = { 0, 0,
0, };
static int jz4770_mmc1_1bit_e_funcs[] = { 1, 1, 1, };
static int jz4770_mmc1_4bit_e_funcs[] = { 1, 1, 1, };
static int jz4770_mmc1_8bit_e_funcs[] = { 1, 1, 1, 1, };
+static int jz4770_mmc2_1bit_b_funcs[] = { 0, 0, 0, };
+static int jz4770_mmc2_4bit_b_funcs[] = { 0, 0, 0, };
+static int jz4770_mmc2_1bit_e_funcs[] = { 2, 2, 2, };
+static int jz4770_mmc2_4bit_e_funcs[] = { 2, 2, 2, };
+static int jz4770_mmc2_8bit_e_funcs[] = { 2, 2, 2, 2, };
static int jz4770_nemc_8bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0,
};
static int jz4770_nemc_16bit_data_funcs[] = { 0, 0, 0, 0, 0, 0, 0,
0, };
static int jz4770_nemc_cle_ale_funcs[] = { 0, 0, };
static int jz4770_nemc_addr_funcs[] = { 0, 0, 0, 0, };
static int jz4770_nemc_rd_we_funcs[] = { 0, 0, };
static int jz4770_nemc_frd_fwe_funcs[] = { 0, 0, };
+static int jz4770_nemc_wait_funcs[] = { 0, };
static int jz4770_nemc_cs1_funcs[] = { 0, };
static int jz4770_nemc_cs2_funcs[] = { 0, };
static int jz4770_nemc_cs3_funcs[] = { 0, };
@@ -425,6 +441,8 @@ static int jz4770_pwm_pwm4_funcs[] = { 0, };
static int jz4770_pwm_pwm5_funcs[] = { 0, };
static int jz4770_pwm_pwm6_funcs[] = { 0, };
static int jz4770_pwm_pwm7_funcs[] = { 0, };
+static int jz4770_mac_rmii_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
};
+static int jz4770_mac_mii_funcs[] = { 0, 0, };
static const struct group_desc jz4770_groups[] = {
INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data),
@@ -445,12 +463,18 @@ static const struct group_desc jz4770_groups[]
= {
INGENIC_PIN_GROUP("mmc1-1bit-e", jz4770_mmc1_1bit_e),
INGENIC_PIN_GROUP("mmc1-4bit-e", jz4770_mmc1_4bit_e),
INGENIC_PIN_GROUP("mmc1-8bit-e", jz4770_mmc1_8bit_e),
+ INGENIC_PIN_GROUP("mmc2-1bit-b", jz4770_mmc2_1bit_b),
+ INGENIC_PIN_GROUP("mmc2-4bit-b", jz4770_mmc2_4bit_b),
+ INGENIC_PIN_GROUP("mmc2-1bit-e", jz4770_mmc2_1bit_e),
+ INGENIC_PIN_GROUP("mmc2-4bit-e", jz4770_mmc2_4bit_e),
+ INGENIC_PIN_GROUP("mmc2-8bit-e", jz4770_mmc2_8bit_e),
INGENIC_PIN_GROUP("nemc-8bit-data", jz4770_nemc_8bit_data),
INGENIC_PIN_GROUP("nemc-16bit-data", jz4770_nemc_16bit_data),
INGENIC_PIN_GROUP("nemc-cle-ale", jz4770_nemc_cle_ale),
INGENIC_PIN_GROUP("nemc-addr", jz4770_nemc_addr),
[PATCH v2 0/2] reset: meson: add g12a SoC support
This patchset adds new dt-bindings for the reset lines of amlogic g12a SoC and the related compatible in the driver. Changes since v1 [0]: * Correct patch 2 commit message. [0]: https://lkml.kernel.org/r/20190128141330.21927-1-jbru...@baylibre.com Jerome Brunet (2): dt-bindings: reset: meson: add g12a bindings reset: meson: add g12a compatible string .../bindings/reset/amlogic,meson-reset.txt| 7 +- drivers/reset/reset-meson.c | 1 + .../reset/amlogic,meson-g12a-reset.h | 134 ++ 3 files changed, 140 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/reset/amlogic,meson-g12a-reset.h -- 2.20.1
[PATCH v2 1/2] dt-bindings: reset: meson: add g12a bindings
Add device tree bindings for the reset controller of g12a SoC family. Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- .../bindings/reset/amlogic,meson-reset.txt| 7 +- .../reset/amlogic,meson-g12a-reset.h | 134 ++ 2 files changed, 139 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/reset/amlogic,meson-g12a-reset.h diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt index 28ef6c295c76..053cb1322ee3 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt @@ -5,8 +5,11 @@ Please also refer to reset.txt in this directory for common reset controller binding usage. Required properties: -- compatible: Should be "amlogic,meson8b-reset", "amlogic,meson-gxbb-reset" or - "amlogic,meson-axg-reset". +- compatible: Should be + * "amlogic,meson8b-reset" or + * "amlogic,meson-gxbb-reset" or + * "amlogic,meson-axg-reset" or + * "amlogic,meson-g12a-reset" - reg: should contain the register address base - #reset-cells: 1, see below diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h new file mode 100644 index ..8063e8314eef --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Jerome Brunet + * + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H + +/* RESET0 */ +#define RESET_HIU 0 +/* 1 */ +#define RESET_DOS 2 +/* 3-4 */ +#define RESET_VIU 5 +#define RESET_AFIFO6 +#define RESET_VID_PLL_DIV 7 +/* 8-9 */ +#define RESET_VENC 10 +#define RESET_ASSIST 11 +#define RESET_PCIE_CTRL_A 12 +#define RESET_VCBUS13 +#define RESET_PCIE_PHY 14 +#define RESET_PCIE_APB 15 +#define RESET_GIC 16 +#define RESET_CAPB3_DECODE 17 +/* 18 */ +#define RESET_HDMITX_CAPB3 19 +#define RESET_DVALIN_CAPB3 20 +#define RESET_DOS_CAPB321 +/* 22 */ +#define RESET_CBUS_CAPB3 23 +#define RESET_AHB_CNTL 24 +#define RESET_AHB_DATA 25 +#define RESET_VCBUS_CLK81 26 +/* 27-31 */ +/* RESET1 */ +/* 32 */ +#define RESET_DEMUX33 +#define RESET_USB 34 +#define RESET_DDR 35 +/* 36 */ +#define RESET_BT65637 +#define RESET_AHB_SRAM 38 +/* 39 */ +#define RESET_PARSER 40 +/* 41 */ +#define RESET_ISA 42 +#define RESET_ETHERNET 43 +#define RESET_SD_EMMC_A44 +#define RESET_SD_EMMC_B45 +#define RESET_SD_EMMC_C46 +/* 47-60 */ +#define RESET_AUDIO_CODEC 61 +/* 62-63 */ +/* RESET2 */ +/* 64 */ +#define RESET_AUDIO65 +#define RESET_HDMITX_PHY 66 +/* 67 */ +#define RESET_MIPI_DSI_HOST68 +#define RESET_ALOCKER 69 +#define RESET_GE2D 70 +#define RESET_PARSER_REG 71 +#define RESET_PARSER_FETCH 72 +#define RESET_CTL 73 +#define RESET_PARSER_TOP 74 +/* 75-77 */ +#define RESET_DVALIN 78 +#define RESET_HDMITX 79 +/* 80-95 */ +/* RESET3 */ +/* 96-95 */ +#define RESET_DEMUX_TOP105 +#define RESET_DEMUX_DES_PL 106 +#define RESET_DEMUX_S2P_0 107 +#define RESET_DEMUX_S2P_1 108 +#define RESET_DEMUX_0 109 +#define RESET_DEMUX_1 110 +#define RESET_DEMUX_2 111 +/*
Re: [PATCH lora-next 01/11] dt-bindings: net: lora: sx130x: add power lut binding
On Mon, Jan 28, 2019 at 10:13 AM Ben Whitten wrote: > > From: Ben Whitten > > Adding power lookup table for the concentrator specified in DT. > > These values are calibrated for the hardware and are unique to hardware > designs and certifications. > > First byte is signed power in dBm measured at the rf connector. > Second byte is unsigned value for DIGITAL gain. > Third byte is unsigned value for PA gain, 2 bits only. > Fourth byte is unsigned value for DAC gain, 2 bits only. > Fifth byte is unsigned value for MIXER gain, 4 bits only. > > Signed-off-by: Ben Whitten > --- > .../bindings/net/lora/semtech,sx130x.yaml | 13 + > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml > b/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml > index 24fad1218735..187fa2090a0b 100644 > --- a/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml > +++ b/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml > @@ -37,6 +37,15 @@ properties: > maxItems: 1 > description: A connection of the reset gpio line. > > + power-lut: > +description: Power lookup table for the concentrator. > + Consisting of maximum 16 entries, each entry having the following > format; > + First byte is signed power in dBm measured at the rf connector. > + Second byte is unsigned value for DIGITAL gain. > + Third byte is unsigned value for PA gain, 2 bits only. > + Fourth byte is unsigned value for DAC gain, 2 bits only. > + Fifth byte is unsigned value for MIXER gain, 4 bits only. Would you expect this to be a common lora property? If not it should have a vendor prefix. Either way, non-standard properties need to reference a type. That would be 'uint8-matrix' in this case. See the '$ref' in the examples. Though, I guess I need to add a signed type. We can write all the free form text above as a schema: minItems: 1 maxItems: 16 items: items: - description: ... range?? - description: ... range?? - description: ... maximum: 3 - description: ... maximum: 3 - description: ... maximum: 15 > + >radio-spi: > type: object > description: The concentrator can have two radios connected which are > @@ -83,6 +92,10 @@ examples: > reset-gpios = < 27 GPIO_ACTIVE_HIGH>; > spi-max-frequency = <800>; > > + power-lut = [ 00 00 00 03 09 > + 03 00 00 03 0C > + 04 00 00 03 0D ]; You may need to write this with '/bits/ 8' syntax so you can bracket each 5 byte entry. I don't think we can do that with [] notation. Rob
[PATCH v2 2/2] reset: meson: add g12a compatible string
Add a compatible for the new g12a SoC family.
Tested-by: Neil Armstrong
Signed-off-by: Jerome Brunet
---
drivers/reset/reset-meson.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 5242e0679df7..a8f6549b3af4 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -134,6 +134,7 @@ static const struct of_device_id meson_reset_dt_ids[] = {
{ .compatible = "amlogic,meson8b-reset" },
{ .compatible = "amlogic,meson-gxbb-reset" },
{ .compatible = "amlogic,meson-axg-reset" },
+{ .compatible = "amlogic,meson-g12a-reset" },
{ /* sentinel */ },
};
--
2.20.1
Re: [PATCH v6 11/13] KVM: s390: add functions to (un)register GISC with GISA
On Thu, 24 Jan 2019 13:59:37 +0100
Michael Mueller wrote:
> Add the Interruption Alert Mask (IAM) to the architecture specific
> kvm struct. This mask in the GISA is used to define for which ISC
> a GIB alert will be issued.
>
> The functions kvm_s390_gisc_register() and kvm_s390_gisc_unregister()
> are used to (un)register a GISC (guest ISC) with a virtual machine and
> its GISA.
>
> Upon successful completion, kvm_s390_gisc_register() returns the
> ISC to be used for GIB alert interruptions. A negative return code
> indicates an error during registration.
>
> Theses functions will be used by other adapter types like AP and PCI to
> request pass-through interruption support.
I'm not sure this interface is going to to fit PCI that well. But IMHO
no reason to delay the whole series -- we can think about zPCI later.
Same goes for some of the names.
Another idea for later would be to sanity check in gisa destroy that
alert.mask is back to all zero -- to catch any corresponding driver
bugs.
Acked-by: Halil Pasic
>
> Signed-off-by: Michael Mueller
[..]
> static inline void gisa_set_ipm_gisc(struct kvm_s390_gisa *gisa, u32 gisc)
> {
> set_bit_inv(IPM_BIT_OFFSET + gisc, (unsigned long *) gisa);
> @@ -2911,6 +2938,8 @@ void kvm_s390_gisa_init(struct kvm *kvm)
> if (!css_general_characteristics.aiv)
> return;
> gi->origin = >arch.sie_page2->gisa;
> + gi->alert.mask = 0;
I don't think this is necessary. Otherwise you would need to
zero the alert.ref[] too, or?
Regards,
Halil
> + spin_lock_init(>alert.ref_lock);
> kvm_s390_gisa_clear(kvm);
> VM_EVENT(kvm, 3, "gisa 0x%pK initialized", gi->origin);
> }
Re: [PATCH AUTOSEL 4.19 174/258] livepatch: check kzalloc return values
On Mon, Jan 28, 2019 at 06:28:14PM +0100, Miroslav Benes wrote:
On Mon, 28 Jan 2019, Sasha Levin wrote:
From: Nicholas Mc Guire
[ Upstream commit 5f30b2e823484ce6a79f2b59901b6351c15effa6 ]
kzalloc() return should always be checked - notably in example code
where this may be seen as reference. On failure of allocation in
livepatch_fix1_dummy_alloc() respectively dummy_alloc() previous
allocation is freed (thanks to Petr Mladek for
catching this) and NULL returned.
Signed-off-by: Nicholas Mc Guire
Fixes: 439e7271dc2b ("livepatch: introduce shadow variable API")
Acked-by: Joe Lawrence
Reviewed-by: Petr Mladek
Acked-by: Miroslav Benes
Signed-off-by: Jiri Kosina
Signed-off-by: Sasha Levin
Hi Sasha,
I am not sure what stable policy is, but the patch is for samples/
directory and I do not think it is something which should necessarily go
to stable. It is your call though.
The thing with samples/ is that (I'm hopefull that) the code that lives
in there is being used as a basis for userspace code and is copy
shamelessly.
So on one hand, yes, samples/ isn't exactly critical code, but on the
other hand it's also very unlikely to cause a regression, so I've been
treating it similarily to tools/testing/.
If anyone disagrees I'd be happy to discuss it.
--
Thanks,
Sasha
Re: [PATCH v3 1/2] spi: support inter-word delay requirement for devices
On Sat, Jan 26, 2019 at 05:32:19PM +0100, Jonas Bonn wrote:
> @@ -164,6 +166,7 @@ struct spi_device {
> charmodalias[SPI_NAME_SIZE];
> const char *driver_override;
> int cs_gpio;/* chip select gpio */
> + uint16_tword_delay; /* inter-word delay (us) */
This needs some code in the core joining it up with the per-transfer
word delay similar to what we have for speed_hz and bits_per_word in
__spi_validate(). Then the controller drivers can just look at the
per-transfer value and support both without having to duplicate logic.
signature.asc
Description: PGP signature
Re: [PATCH AUTOSEL 4.19 033/258] sctp: Fix SKB list traversal in sctp_intl_store_ordered().
On Mon, Jan 28, 2019 at 10:55:39AM -0500, Sasha Levin wrote: > From: "David S. Miller" > > [ Upstream commit e15e067d0656625c77c52b4e5f0cfbf0c0c3583f ] > > Same change as made to sctp_intl_store_reasm(). > > To be fully correct, an iterator has an undefined value when something > like skb_queue_walk() naturally terminates. > > This will actually matter when SKB queues are converted over to > list_head. > > Formalize what this code ends up doing with the current > implementation. Hi Sasha, This one too then. Thanks, Marcelo
[PATCH 12/14] clk: meson: clkc must die
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-aoclk.c | 1 -
drivers/clk/meson/axg.c | 1 -
drivers/clk/meson/clkc-audio.h | 3 ++-
drivers/clk/meson/clkc.h| 17 -
drivers/clk/meson/gxbb-aoclk.c | 1 -
drivers/clk/meson/gxbb.c| 1 -
drivers/clk/meson/meson-aoclk.h | 5 -
drivers/clk/meson/meson8b.c | 1 -
drivers/clk/meson/sclk-div.c| 1 +
9 files changed, 7 insertions(+), 24 deletions(-)
delete mode 100644 drivers/clk/meson/clkc.h
diff --git a/drivers/clk/meson/axg-aoclk.c b/drivers/clk/meson/axg-aoclk.c
index 6b408edb1608..0086f31288eb 100644
--- a/drivers/clk/meson/axg-aoclk.c
+++ b/drivers/clk/meson/axg-aoclk.c
@@ -12,7 +12,6 @@
#include
#include
#include
-#include "clkc.h"
#include "meson-aoclk.h"
#include "axg-aoclk.h"
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 12de206b82c2..cbbdd93b175d 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -17,7 +17,6 @@
#include
#include
-#include "clkc.h"
#include "clk-input.h"
#include "clk-regmap.h"
#include "clk-pll.h"
diff --git a/drivers/clk/meson/clkc-audio.h b/drivers/clk/meson/clkc-audio.h
index 8e1de2a72610..1eaf4ecac4f7 100644
--- a/drivers/clk/meson/clkc-audio.h
+++ b/drivers/clk/meson/clkc-audio.h
@@ -7,7 +7,8 @@
#ifndef __MESON_CLKC_AUDIO_H
#define __MESON_CLKC_AUDIO_H
-#include "clkc.h"
+#include
+#include "parm.h"
struct meson_sclk_div_data {
struct parm div;
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
deleted file mode 100644
index 3b167803a602..
--- a/drivers/clk/meson/clkc.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2015 Endless Mobile, Inc.
- * Author: Carlo Caione
- */
-
-#ifndef __CLKC_H
-#define __CLKC_H
-
-#include
-#include "clk-regmap.h"
-#include "parm.h"
-
-/* clk_ops */
-extern const struct clk_ops meson_clk_cpu_ops;
-
-#endif /* __CLKC_H */
diff --git a/drivers/clk/meson/gxbb-aoclk.c b/drivers/clk/meson/gxbb-aoclk.c
index 26578622fc91..449f6ac189d8 100644
--- a/drivers/clk/meson/gxbb-aoclk.c
+++ b/drivers/clk/meson/gxbb-aoclk.c
@@ -5,7 +5,6 @@
*/
#include
#include
-#include "clkc.h"
#include "meson-aoclk.h"
#include "gxbb-aoclk.h"
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 393472b5309b..3741db9a9fe1 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -12,7 +12,6 @@
#include
#include
-#include "clkc.h"
#include "gxbb.h"
#include "clk-input.h"
#include "clk-regmap.h"
diff --git a/drivers/clk/meson/meson-aoclk.h b/drivers/clk/meson/meson-aoclk.h
index 0758b35d4427..999cde3868f7 100644
--- a/drivers/clk/meson/meson-aoclk.h
+++ b/drivers/clk/meson/meson-aoclk.h
@@ -11,9 +11,12 @@
#ifndef __MESON_AOCLK_H__
#define __MESON_AOCLK_H__
+#include
#include
+#include
#include
-#include "clkc.h"
+
+#include "clk-regmap.h"
struct meson_aoclk_input {
const char *name;
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 91a5306b13f6..23b1e355a849 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -16,7 +16,6 @@
#include
#include
-#include "clkc.h"
#include "meson8b.h"
#include "clk-regmap.h"
#include "clk-pll.h"
diff --git a/drivers/clk/meson/sclk-div.c b/drivers/clk/meson/sclk-div.c
index bc64019b8eeb..d3eea53945e9 100644
--- a/drivers/clk/meson/sclk-div.c
+++ b/drivers/clk/meson/sclk-div.c
@@ -17,6 +17,7 @@
*/
#include "clkc-audio.h"
+#include "clk-regmap.h"
static inline struct meson_sclk_div_data *
meson_sclk_div_data(struct clk_regmap *clk)
--
2.20.1
[PATCH 07/14] clk: meson: take the mpll driver out of clkc
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c | 1 +
drivers/clk/meson/clk-mpll.c | 12 +++-
drivers/clk/meson/clk-mpll.h | 30 ++
drivers/clk/meson/clkc.h | 14 --
drivers/clk/meson/gxbb.c | 1 +
drivers/clk/meson/meson8b.c | 1 +
6 files changed, 44 insertions(+), 15 deletions(-)
create mode 100644 drivers/clk/meson/clk-mpll.h
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 8a3896fa343f..dc973b4324f3 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -20,6 +20,7 @@
#include "clkc.h"
#include "clk-regmap.h"
#include "clk-pll.h"
+#include "clk-mpll.h"
#include "axg.h"
#define IN_PREFIX "ee-in-"
diff --git a/drivers/clk/meson/clk-mpll.c b/drivers/clk/meson/clk-mpll.c
index 650f75cc15a9..f76850d99e59 100644
--- a/drivers/clk/meson/clk-mpll.c
+++ b/drivers/clk/meson/clk-mpll.c
@@ -12,7 +12,11 @@
*/
#include
-#include "clkc.h"
+#include
+#include
+
+#include "clk-regmap.h"
+#include "clk-mpll.h"
#define SDM_DEN 16384
#define N2_MIN 4
@@ -138,9 +142,15 @@ const struct clk_ops meson_clk_mpll_ro_ops = {
.recalc_rate= mpll_recalc_rate,
.round_rate = mpll_round_rate,
};
+EXPORT_SYMBOL_GPL(meson_clk_mpll_ro_ops);
const struct clk_ops meson_clk_mpll_ops = {
.recalc_rate= mpll_recalc_rate,
.round_rate = mpll_round_rate,
.set_rate = mpll_set_rate,
};
+EXPORT_SYMBOL_GPL(meson_clk_mpll_ops);
+
+MODULE_DESCRIPTION("Amlogic MPLL driver");
+MODULE_AUTHOR("Michael Turquette ");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/meson/clk-mpll.h b/drivers/clk/meson/clk-mpll.h
new file mode 100644
index ..cf79340006dd
--- /dev/null
+++ b/drivers/clk/meson/clk-mpll.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Jerome Brunet
+ */
+
+#ifndef __MESON_CLK_MPLL_H
+#define __MESON_CLK_MPLL_H
+
+#include
+#include
+
+#include "parm.h"
+
+struct meson_clk_mpll_data {
+ struct parm sdm;
+ struct parm sdm_en;
+ struct parm n2;
+ struct parm ssen;
+ struct parm misc;
+ spinlock_t *lock;
+ u8 flags;
+};
+
+#define CLK_MESON_MPLL_ROUND_CLOSEST BIT(0)
+
+extern const struct clk_ops meson_clk_mpll_ro_ops;
+extern const struct clk_ops meson_clk_mpll_ops;
+
+#endif /* __MESON_CLK_MPLL_H */
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index 4857c8fa1ac4..32947bd76bab 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -11,18 +11,6 @@
#include "clk-regmap.h"
#include "parm.h"
-struct meson_clk_mpll_data {
- struct parm sdm;
- struct parm sdm_en;
- struct parm n2;
- struct parm ssen;
- struct parm misc;
- spinlock_t *lock;
- u8 flags;
-};
-
-#define CLK_MESON_MPLL_ROUND_CLOSEST BIT(0)
-
struct meson_clk_phase_data {
struct parm ph;
};
@@ -54,8 +42,6 @@ struct meson_clk_dualdiv_data {
/* clk_ops */
extern const struct clk_ops meson_clk_cpu_ops;
-extern const struct clk_ops meson_clk_mpll_ro_ops;
-extern const struct clk_ops meson_clk_mpll_ops;
extern const struct clk_ops meson_clk_phase_ops;
extern const struct clk_ops meson_vid_pll_div_ro_ops;
extern const struct clk_ops meson_clk_dualdiv_ops;
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 813822ec5f57..6a8358f3e0ef 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -16,6 +16,7 @@
#include "gxbb.h"
#include "clk-regmap.h"
#include "clk-pll.h"
+#include "clk-mpll.h"
#define IN_PREFIX "ee-in-"
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 9b35d5e08378..91a5306b13f6 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -20,6 +20,7 @@
#include "meson8b.h"
#include "clk-regmap.h"
#include "clk-pll.h"
+#include "clk-mpll.h"
static DEFINE_SPINLOCK(meson_clk_lock);
--
2.20.1
[PATCH 09/14] clk: meson: take vid-pll-div out of clkc
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/clkc.h| 6 --
drivers/clk/meson/gxbb.c| 1 +
drivers/clk/meson/vid-pll-div.c | 10 +-
drivers/clk/meson/vid-pll-div.h | 20
4 files changed, 30 insertions(+), 7 deletions(-)
create mode 100644 drivers/clk/meson/vid-pll-div.h
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index e8e4067bfcd5..ece8ed82b11c 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -11,11 +11,6 @@
#include "clk-regmap.h"
#include "parm.h"
-struct meson_vid_pll_div_data {
- struct parm val;
- struct parm sel;
-};
-
struct meson_clk_dualdiv_param {
unsigned int n1;
unsigned int n2;
@@ -35,7 +30,6 @@ struct meson_clk_dualdiv_data {
/* clk_ops */
extern const struct clk_ops meson_clk_cpu_ops;
-extern const struct clk_ops meson_vid_pll_div_ro_ops;
extern const struct clk_ops meson_clk_dualdiv_ops;
extern const struct clk_ops meson_clk_dualdiv_ro_ops;
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 6a8358f3e0ef..f7b919b035ee 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -17,6 +17,7 @@
#include "clk-regmap.h"
#include "clk-pll.h"
#include "clk-mpll.h"
+#include "vid-pll-div.h"
#define IN_PREFIX "ee-in-"
diff --git a/drivers/clk/meson/vid-pll-div.c b/drivers/clk/meson/vid-pll-div.c
index 88af0e282ea0..08bcc01c0923 100644
--- a/drivers/clk/meson/vid-pll-div.c
+++ b/drivers/clk/meson/vid-pll-div.c
@@ -5,7 +5,10 @@
*/
#include
-#include "clkc.h"
+#include
+
+#include "clk-regmap.h"
+#include "vid-pll-div.h"
static inline struct meson_vid_pll_div_data *
meson_vid_pll_div_data(struct clk_regmap *clk)
@@ -89,3 +92,8 @@ static unsigned long meson_vid_pll_div_recalc_rate(struct
clk_hw *hw,
const struct clk_ops meson_vid_pll_div_ro_ops = {
.recalc_rate= meson_vid_pll_div_recalc_rate,
};
+EXPORT_SYMBOL_GPL(meson_vid_pll_div_ro_ops);
+
+MODULE_DESCRIPTION("Amlogic video pll divider driver");
+MODULE_AUTHOR("Neil Armstrong ");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/meson/vid-pll-div.h b/drivers/clk/meson/vid-pll-div.h
new file mode 100644
index ..c0128e33ccf9
--- /dev/null
+++ b/drivers/clk/meson/vid-pll-div.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Jerome Brunet
+ */
+
+#ifndef __MESON_VID_PLL_DIV_H
+#define __MESON_VID_PLL_DIV_H
+
+#include
+#include "parm.h"
+
+struct meson_vid_pll_div_data {
+ struct parm val;
+ struct parm sel;
+};
+
+extern const struct clk_ops meson_vid_pll_div_ro_ops;
+
+#endif /* __MESON_VID_PLL_DIV_H */
--
2.20.1
[PATCH 05/14] clk: meson: move parm out of clkc
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/clkc.h | 34 +
drivers/clk/meson/parm.h | 46
2 files changed, 47 insertions(+), 33 deletions(-)
create mode 100644 drivers/clk/meson/parm.h
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index 35768c2327ba..58a343fa94e6 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -9,39 +9,7 @@
#include
#include "clk-regmap.h"
-
-#define PMASK(width) GENMASK(width - 1, 0)
-#define SETPMASK(width, shift) GENMASK(shift + width - 1, shift)
-#define CLRPMASK(width, shift) (~SETPMASK(width, shift))
-
-#define PARM_GET(width, shift, reg)\
- (((reg) & SETPMASK(width, shift)) >> (shift))
-#define PARM_SET(width, shift, reg, val) \
- (((reg) & CLRPMASK(width, shift)) | ((val) << (shift)))
-
-#define MESON_PARM_APPLICABLE(p) (!!((p)->width))
-
-struct parm {
- u16 reg_off;
- u8 shift;
- u8 width;
-};
-
-static inline unsigned int meson_parm_read(struct regmap *map, struct parm *p)
-{
- unsigned int val;
-
- regmap_read(map, p->reg_off, );
- return PARM_GET(p->width, p->shift, val);
-}
-
-static inline void meson_parm_write(struct regmap *map, struct parm *p,
- unsigned int val)
-{
- regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift),
- val << p->shift);
-}
-
+#include "parm.h"
struct pll_params_table {
u16 m;
diff --git a/drivers/clk/meson/parm.h b/drivers/clk/meson/parm.h
new file mode 100644
index ..3c9ef1b505ce
--- /dev/null
+++ b/drivers/clk/meson/parm.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2015 Endless Mobile, Inc.
+ * Author: Carlo Caione
+ */
+
+#ifndef __MESON_PARM_H
+#define __MESON_PARM_H
+
+#include
+#include
+
+#define PMASK(width) GENMASK(width - 1, 0)
+#define SETPMASK(width, shift) GENMASK(shift + width - 1, shift)
+#define CLRPMASK(width, shift) (~SETPMASK(width, shift))
+
+#define PARM_GET(width, shift, reg)\
+ (((reg) & SETPMASK(width, shift)) >> (shift))
+#define PARM_SET(width, shift, reg, val) \
+ (((reg) & CLRPMASK(width, shift)) | ((val) << (shift)))
+
+#define MESON_PARM_APPLICABLE(p) (!!((p)->width))
+
+struct parm {
+ u16 reg_off;
+ u8 shift;
+ u8 width;
+};
+
+static inline unsigned int meson_parm_read(struct regmap *map, struct parm *p)
+{
+ unsigned int val;
+
+ regmap_read(map, p->reg_off, );
+ return PARM_GET(p->width, p->shift, val);
+}
+
+static inline void meson_parm_write(struct regmap *map, struct parm *p,
+ unsigned int val)
+{
+ regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift),
+ val << p->shift);
+}
+
+#endif /* __MESON_PARM_H */
+
--
2.20.1
[PATCH 02/14] clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory
Use CONFIG_ARCH_MESON to let make enter the meson clock directory. As part of a rework, CONFIG_COMMON_CLK_AMLOGIC is about to be removed. Signed-off-by: Jerome Brunet --- drivers/clk/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 8a9440a97500..8d780c4390f1 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -78,7 +78,7 @@ obj-$(CONFIG_ARCH_K3) += keystone/ obj-$(CONFIG_ARCH_KEYSTONE)+= keystone/ obj-$(CONFIG_MACH_LOONGSON32) += loongson1/ obj-y += mediatek/ -obj-$(CONFIG_COMMON_CLK_AMLOGIC) += meson/ +obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_MACH_PIC32) += microchip/ ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_ARCH_MMP) += mmp/ -- 2.20.1
[PATCH 06/14] clk: meson: take the pll driver out of clkc
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c | 1 +
drivers/clk/meson/clk-pll.c | 13 +++
drivers/clk/meson/clk-pll.h | 43 +
drivers/clk/meson/clkc.h| 30 --
drivers/clk/meson/gxbb.c| 1 +
drivers/clk/meson/meson8b.c | 1 +
6 files changed, 55 insertions(+), 34 deletions(-)
create mode 100644 drivers/clk/meson/clk-pll.h
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 474412234633..8a3896fa343f 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -19,6 +19,7 @@
#include "clkc.h"
#include "clk-regmap.h"
+#include "clk-pll.h"
#include "axg.h"
#define IN_PREFIX "ee-in-"
diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index afffc1547e20..4a8c68ae8801 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -32,11 +32,9 @@
#include
#include
#include
-#include
-#include
-#include
-#include "clkc.h"
+#include "clk-regmap.h"
+#include "clk-pll.h"
static inline struct meson_clk_pll_data *
meson_clk_pll_data(struct clk_regmap *clk)
@@ -309,8 +307,15 @@ const struct clk_ops meson_clk_pll_ops = {
.enable = meson_clk_pll_enable,
.disable= meson_clk_pll_disable
};
+EXPORT_SYMBOL_GPL(meson_clk_pll_ops);
const struct clk_ops meson_clk_pll_ro_ops = {
.recalc_rate= meson_clk_pll_recalc_rate,
.is_enabled = meson_clk_pll_is_enabled,
};
+EXPORT_SYMBOL_GPL(meson_clk_pll_ro_ops);
+
+MODULE_DESCRIPTION("Amlogic PLL driver");
+MODULE_AUTHOR("Carlo Caione ");
+MODULE_AUTHOR("Jerome Brunet ");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/meson/clk-pll.h b/drivers/clk/meson/clk-pll.h
new file mode 100644
index ..5ccf0854d932
--- /dev/null
+++ b/drivers/clk/meson/clk-pll.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Jerome Brunet
+ */
+
+#ifndef __MESON_CLK_PLL_H
+#define __MESON_CLK_PLL_H
+
+#include
+#include
+#include "parm.h"
+
+struct pll_params_table {
+ u16 m;
+ u16 n;
+};
+
+#define PLL_PARAMS(_m, _n) \
+ { \
+ .m = (_m), \
+ .n = (_n), \
+ }
+
+#define CLK_MESON_PLL_ROUND_CLOSESTBIT(0)
+
+struct meson_clk_pll_data {
+ struct parm en;
+ struct parm m;
+ struct parm n;
+ struct parm frac;
+ struct parm l;
+ struct parm rst;
+ const struct reg_sequence *init_regs;
+ unsigned int init_count;
+ const struct pll_params_table *table;
+ u8 flags;
+};
+
+extern const struct clk_ops meson_clk_pll_ro_ops;
+extern const struct clk_ops meson_clk_pll_ops;
+
+#endif /* __MESON_CLK_PLL_H */
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index 58a343fa94e6..4857c8fa1ac4 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -11,34 +11,6 @@
#include "clk-regmap.h"
#include "parm.h"
-struct pll_params_table {
- u16 m;
- u16 n;
-};
-
-#define PLL_PARAMS(_m, _n) \
- { \
- .m = (_m), \
- .n = (_n), \
- }
-
-#define CLK_MESON_PLL_ROUND_CLOSESTBIT(0)
-
-struct meson_clk_pll_data {
- struct parm en;
- struct parm m;
- struct parm n;
- struct parm frac;
- struct parm l;
- struct parm rst;
- const struct reg_sequence *init_regs;
- unsigned int init_count;
- const struct pll_params_table *table;
- u8 flags;
-};
-
-#define to_meson_clk_pll(_hw) container_of(_hw, struct meson_clk_pll, hw)
-
struct meson_clk_mpll_data {
struct parm sdm;
struct parm sdm_en;
@@ -81,8 +53,6 @@ struct meson_clk_dualdiv_data {
};
/* clk_ops */
-extern const struct clk_ops meson_clk_pll_ro_ops;
-extern const struct clk_ops meson_clk_pll_ops;
extern const struct clk_ops meson_clk_cpu_ops;
extern const struct clk_ops meson_clk_mpll_ro_ops;
extern const struct clk_ops meson_clk_mpll_ops;
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index ecf9a8f6281c..813822ec5f57 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -15,6 +15,7 @@
#include "clkc.h"
#include "gxbb.h"
#include "clk-regmap.h"
+#include "clk-pll.h"
#define IN_PREFIX "ee-in-"
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 748552c5f6c8..9b35d5e08378 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -19,6 +19,7 @@
#include "clkc.h"
#include
[PATCH 01/14] clk: export some clk_hw function symbols for module drivers
clk-provider.h provides clk_hw_is_prepared(), clk_hw_is_enabled() and
clk_hw_is_prepared() but these symbols are not exported for the
modules which prevents a clock driver using them to be compiled as
a module. Export them to fix the problem.
Signed-off-by: Jerome Brunet
---
drivers/clk/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 5a0551aba09e..91ae0e6e76e7 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -394,16 +394,19 @@ bool clk_hw_is_prepared(const struct clk_hw *hw)
{
return clk_core_is_prepared(hw->core);
}
+EXPORT_SYMBOL_GPL(clk_hw_is_prepared);
bool clk_hw_rate_is_protected(const struct clk_hw *hw)
{
return clk_core_rate_is_protected(hw->core);
}
+EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected);
bool clk_hw_is_enabled(const struct clk_hw *hw)
{
return clk_core_is_enabled(hw->core);
}
+EXPORT_SYMBOL_GPL(clk_hw_is_enabled);
bool __clk_is_enabled(struct clk *clk)
{
--
2.20.1
Re: [PATCH v2] sysctl: Add panic-fatal-signals
On Mon, 28 Jan 2019 09:49:59 +0100 Vincent Whitchurch wrote: > Add a sysctl which asks the kernel to panic when any userspace process > receives a fatal signal which would trigger a core dump. This has > proven to be quite useful when debugging problems seen during testing of > embedded systems: When combined with kernel core dumps (saved due to > the panic), it allows easier debugging of crashes which have their > origin in system-wide problems such as buggy drivers or other kernel or > hardware-related issues. > > The crashing process's core dump can be extracted from the kernel core > dump using tools such as the crash utility's gcore extension. > I can't speak to the usefulness of this, but the feature is small and simple. Some documentation would be appreciated. I assume in Documentation/sysctl/kernel.txt. Please also check that print-fatal-signals is appropriately documented while we're in there - it's documented in Documentation/admin-guide/kernel-parameters.rst but not Documentation/sysctl/kernel.txt. > v2: Put the sysctl behind a config option I suppose so... The option is root-only (surely?) so I'm not sure this is really needed. > ... > > --- a/init/Kconfig > +++ b/init/Kconfig > @@ -1242,6 +1242,20 @@ config SYSCTL_SYSCALL > > If unsure say N here. > > +config SYSCTL_PANIC_FATAL_SIGNALS > + bool "panic-fatal-signals sysctl" if EXPERT > + depends on PROC_SYSCTL > + help > + If you say Y here, a kernel.panic-fatal-signals sysctl will be > + offered. If this sysctl is turned on, the kernel will panic if any > + userspace process receives a fatal signal which would trigger a core > + dump. > + > + When used together with kernel core dumps, this can be useful for > + debugging some system-wide problems, primarily on embedded systems. > + > + If unsure, say N. I suggest that the Kconfig help and the forthcoming documentation should clearly explain the dangers of enabling this!
[PATCH 13/14] clk: meson: move sclk-div out of clkc-audio
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-audio.c | 2 +-
drivers/clk/meson/sclk-div.c | 9 -
drivers/clk/meson/{clkc-audio.h => sclk-div.h} | 6 +++---
3 files changed, 12 insertions(+), 5 deletions(-)
rename drivers/clk/meson/{clkc-audio.h => sclk-div.h} (79%)
diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index 8db0508ec6ab..7ab200b6c3bf 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -14,11 +14,11 @@
#include
#include
-#include "clkc-audio.h"
#include "axg-audio.h"
#include "clk-input.h"
#include "clk-regmap.h"
#include "clk-phase.h"
+#include "sclk-div.h"
#define AXG_MST_IN_COUNT 8
#define AXG_SLV_SCLK_COUNT 10
diff --git a/drivers/clk/meson/sclk-div.c b/drivers/clk/meson/sclk-div.c
index d3eea53945e9..3acf03780221 100644
--- a/drivers/clk/meson/sclk-div.c
+++ b/drivers/clk/meson/sclk-div.c
@@ -16,8 +16,11 @@
* duty_cycle = (1 + hi) / (1 + val)
*/
-#include "clkc-audio.h"
+#include
+#include
+
#include "clk-regmap.h"
+#include "sclk-div.h"
static inline struct meson_sclk_div_data *
meson_sclk_div_data(struct clk_regmap *clk)
@@ -242,3 +245,7 @@ const struct clk_ops meson_sclk_div_ops = {
.init = sclk_div_init,
};
EXPORT_SYMBOL_GPL(meson_sclk_div_ops);
+
+MODULE_DESCRIPTION("Amlogic Sample divider driver");
+MODULE_AUTHOR("Jerome Brunet ");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/meson/clkc-audio.h b/drivers/clk/meson/sclk-div.h
similarity index 79%
rename from drivers/clk/meson/clkc-audio.h
rename to drivers/clk/meson/sclk-div.h
index 1eaf4ecac4f7..b64b2a32005f 100644
--- a/drivers/clk/meson/clkc-audio.h
+++ b/drivers/clk/meson/sclk-div.h
@@ -4,8 +4,8 @@
* Author: Jerome Brunet
*/
-#ifndef __MESON_CLKC_AUDIO_H
-#define __MESON_CLKC_AUDIO_H
+#ifndef __MESON_SCLK_DIV_H
+#define __MESON_SCLK_DIV_H
#include
#include "parm.h"
@@ -19,4 +19,4 @@ struct meson_sclk_div_data {
extern const struct clk_ops meson_sclk_div_ops;
-#endif /* __MESON_CLKC_AUDIO_H */
+#endif /* __MESON_SCLK_DIV_H */
--
2.20.1
[PATCH 11/14] clk: meson: take clk-input out of clkc
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-audio.c | 1 +
drivers/clk/meson/axg.c | 1 +
drivers/clk/meson/clk-input.c | 7 ++-
drivers/clk/meson/clk-input.h | 19 +++
drivers/clk/meson/clkc.h| 5 -
drivers/clk/meson/gxbb.c| 1 +
drivers/clk/meson/meson-aoclk.c | 2 ++
7 files changed, 30 insertions(+), 6 deletions(-)
create mode 100644 drivers/clk/meson/clk-input.h
diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index 45d2abc3351f..8db0508ec6ab 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -16,6 +16,7 @@
#include "clkc-audio.h"
#include "axg-audio.h"
+#include "clk-input.h"
#include "clk-regmap.h"
#include "clk-phase.h"
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index dc973b4324f3..12de206b82c2 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -18,6 +18,7 @@
#include
#include "clkc.h"
+#include "clk-input.h"
#include "clk-regmap.h"
#include "clk-pll.h"
#include "clk-mpll.h"
diff --git a/drivers/clk/meson/clk-input.c b/drivers/clk/meson/clk-input.c
index 06b3e3bb6a66..086226e9dba6 100644
--- a/drivers/clk/meson/clk-input.c
+++ b/drivers/clk/meson/clk-input.c
@@ -7,7 +7,8 @@
#include
#include
#include
-#include "clkc.h"
+#include
+#include "clk-input.h"
static const struct clk_ops meson_clk_no_ops = {};
@@ -42,3 +43,7 @@ struct clk_hw *meson_clk_hw_register_input(struct device *dev,
return ret ? ERR_PTR(ret) : hw;
}
EXPORT_SYMBOL_GPL(meson_clk_hw_register_input);
+
+MODULE_DESCRIPTION("Amlogic clock input helper");
+MODULE_AUTHOR("Jerome Brunet ");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/meson/clk-input.h b/drivers/clk/meson/clk-input.h
new file mode 100644
index ..4a541b9685a6
--- /dev/null
+++ b/drivers/clk/meson/clk-input.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Jerome Brunet
+ */
+
+#ifndef __MESON_CLK_INPUT_H
+#define __MESON_CLK_INPUT_H
+
+#include
+
+struct device;
+
+struct clk_hw *meson_clk_hw_register_input(struct device *dev,
+ const char *of_name,
+ const char *clk_name,
+ unsigned long flags);
+
+#endif /* __MESON_CLK_INPUT_H */
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index 24918cc5fa58..3b167803a602 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -14,9 +14,4 @@
/* clk_ops */
extern const struct clk_ops meson_clk_cpu_ops;
-struct clk_hw *meson_clk_hw_register_input(struct device *dev,
- const char *of_name,
- const char *clk_name,
- unsigned long flags);
-
#endif /* __CLKC_H */
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index f7b919b035ee..393472b5309b 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -14,6 +14,7 @@
#include "clkc.h"
#include "gxbb.h"
+#include "clk-input.h"
#include "clk-regmap.h"
#include "clk-pll.h"
#include "clk-mpll.h"
diff --git a/drivers/clk/meson/meson-aoclk.c b/drivers/clk/meson/meson-aoclk.c
index 7b9d194ccc3b..b67951909e04 100644
--- a/drivers/clk/meson/meson-aoclk.c
+++ b/drivers/clk/meson/meson-aoclk.c
@@ -17,6 +17,8 @@
#include
#include "meson-aoclk.h"
+#include "clk-input.h"
+
static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev,
unsigned long id)
{
--
2.20.1
Re: [PATCH AUTOSEL 4.19 034/258] sctp: Fix SKB list traversal in sctp_intl_store_reasm().
On Mon, Jan 28, 2019 at 03:04:34PM -0200, Marcelo Ricardo Leitner wrote: On Mon, Jan 28, 2019 at 10:55:40AM -0500, Sasha Levin wrote: From: "David S. Miller" [ Upstream commit 348bbc25c40844c5efa083a3842c7f53d70a815e ] To be fully correct, an iterator has an undefined value when something like skb_queue_walk() naturally terminates. This will actually matter when SKB queues are converted over to list_head. Formalize what this code ends up doing with the current implementation. I don't think this patch is really needed for -stable without the SKB queue convertion, but okay. I'll drop it. I'm not sure why this sctp patch wasn't filtered out as davem deals with net/. Sorry for the noise. -- Thanks, Sasha
[PATCH 14/14] clk: meson: rework and clean drivers dependencies
Initially, the meson clock directory only hosted 2 controllers drivers, for meson8 and gxbb. At the time, both used the same set of clock drivers so managing the dependencies was not a big concern. Since this ancient time, entropy did its job, controllers with different requirement and specific clock drivers have been added. Unfortunately, we did not do a great job at managing the dependencies between the controllers and the different clock drivers. Some drivers, such as clk-phase or vid-pll-div, are compiled even if they are useless on the target (meson8). As we are adding new controllers, we need to be able to pick a driver w/o pulling the whole thing. The patch aims to clean things up by: * providing a dedicated CONFIG_ for each clock drivers * allowing clock drivers to be compiled as a modules, if possible * stating explicitly which drivers are required by each controller. Signed-off-by: Jerome Brunet --- drivers/clk/meson/Kconfig | 82 +++--- drivers/clk/meson/Makefile | 21 ++ 2 files changed, 71 insertions(+), 32 deletions(-) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 2479dab09d70..f2e757aea4f1 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -1,27 +1,47 @@ -config COMMON_CLK_AMLOGIC - bool - depends on ARCH_MESON || COMPILE_TEST - select COMMON_CLK_REGMAP_MESON +config COMMON_CLK_MESON_INPUT + tristate -config COMMON_CLK_AMLOGIC_AUDIO - bool - depends on ARCH_MESON || COMPILE_TEST - select COMMON_CLK_AMLOGIC +config COMMON_CLK_MESON_REGMAP + tristate + select REGMAP -config COMMON_CLK_MESON_AO - bool - depends on OF - depends on ARCH_MESON || COMPILE_TEST - select COMMON_CLK_REGMAP_MESON - select RESET_CONTROLLER +config COMMON_CLK_MESON_DUALDIV + tristate + select COMMON_CLK_MESON_REGMAP -config COMMON_CLK_REGMAP_MESON - bool - select REGMAP +config COMMON_CLK_MESON_MPLL + tristate + select COMMON_CLK_MESON_REGMAP + +config COMMON_CLK_MESON_PHASE + tristate + select COMMON_CLK_MESON_REGMAP + +config COMMON_CLK_MESON_PLL + tristate + select COMMON_CLK_MESON_REGMAP + +config COMMON_CLK_MESON_SCLK_DIV + tristate + select COMMON_CLK_MESON_REGMAP + +config COMMON_CLK_MESON_VID_PLL_DIV + tristate + select COMMON_CLK_MESON_REGMAP + +config COMMON_CLK_MESON_AO_CLKC + tristate + select COMMON_CLK_MESON_REGMAP + select COMMON_CLK_MESON_INPUT + select RESET_CONTROLLER config COMMON_CLK_MESON8B bool - select COMMON_CLK_AMLOGIC + depends on ARCH_MESON + select COMMON_CLK_MESON_REGMAP + select COMMON_CLK_MESON_MPLL + select COMMON_CLK_MESON_PLL + select MFD_SYSCON select RESET_CONTROLLER help Support for the clock controller on AmLogic S802 (Meson8), @@ -30,8 +50,14 @@ config COMMON_CLK_MESON8B config COMMON_CLK_GXBB bool - select COMMON_CLK_AMLOGIC - select COMMON_CLK_MESON_AO + depends on ARCH_MESON + select COMMON_CLK_MESON_INPUT + select COMMON_CLK_MESON_REGMAP + select COMMON_CLK_MESON_DUALDIV + select COMMON_CLK_MESON_VID_PLL_DIV + select COMMON_CLK_MESON_MPLL + select COMMON_CLK_MESON_PLL + select COMMON_CLK_MESON_AO_CLKC select MFD_SYSCON help Support for the clock controller on AmLogic S905 devices, aka gxbb. @@ -39,8 +65,13 @@ config COMMON_CLK_GXBB config COMMON_CLK_AXG bool - select COMMON_CLK_AMLOGIC - select COMMON_CLK_MESON_AO + depends on ARCH_MESON + select COMMON_CLK_MESON_INPUT + select COMMON_CLK_MESON_REGMAP + select COMMON_CLK_MESON_DUALDIV + select COMMON_CLK_MESON_MPLL + select COMMON_CLK_MESON_PLL + select COMMON_CLK_MESON_AO_CLKC select MFD_SYSCON help Support for the clock controller on AmLogic A113D devices, aka axg. @@ -48,8 +79,11 @@ config COMMON_CLK_AXG config COMMON_CLK_AXG_AUDIO tristate "Meson AXG Audio Clock Controller Driver" - depends on COMMON_CLK_AXG - select COMMON_CLK_AMLOGIC_AUDIO + depends on ARCH_MESON + select COMMON_CLK_MESON_INPUT + select COMMON_CLK_MESON_REGMAP + select COMMON_CLK_MESON_PHASE + select COMMON_CLK_MESON_SCLK_DIV select REGMAP_MMIO help Support for the audio clock controller on AmLogic A113D devices, diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 2b9490dd9878..8baec10a49a1 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -2,12 +2,17 @@ # Makefile for Meson specific clk # -obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-mpll.o clk-phase.o vid-pll-div.o -obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-input.o clk-dualdiv.o -obj-$(CONFIG_COMMON_CLK_AMLOGIC_AUDIO) +=
[PATCH 08/14] clk: meson: merge phase driver and remove from clkc
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Makefile | 2 +-
drivers/clk/meson/axg-audio.c| 2 +
drivers/clk/meson/clk-phase.c| 75 +---
drivers/clk/meson/clk-phase.h| 26 +++
drivers/clk/meson/clk-triphase.c | 68 -
drivers/clk/meson/clkc-audio.h | 7 ---
drivers/clk/meson/clkc.h | 8
7 files changed, 99 insertions(+), 89 deletions(-)
create mode 100644 drivers/clk/meson/clk-phase.h
delete mode 100644 drivers/clk/meson/clk-triphase.c
diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
index 8234e92eea38..2b9490dd9878 100644
--- a/drivers/clk/meson/Makefile
+++ b/drivers/clk/meson/Makefile
@@ -4,7 +4,7 @@
obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-mpll.o clk-phase.o
vid-pll-div.o
obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-input.o clk-dualdiv.o
-obj-$(CONFIG_COMMON_CLK_AMLOGIC_AUDIO) += clk-triphase.o sclk-div.o
+obj-$(CONFIG_COMMON_CLK_AMLOGIC_AUDIO) += sclk-div.o
obj-$(CONFIG_COMMON_CLK_MESON_AO) += meson-aoclk.o
obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o
obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o
diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index 8ac3a2295473..45d2abc3351f 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c
@@ -16,6 +16,8 @@
#include "clkc-audio.h"
#include "axg-audio.h"
+#include "clk-regmap.h"
+#include "clk-phase.h"
#define AXG_MST_IN_COUNT 8
#define AXG_SLV_SCLK_COUNT 10
diff --git a/drivers/clk/meson/clk-phase.c b/drivers/clk/meson/clk-phase.c
index cba43748ce3d..80c3ada193a4 100644
--- a/drivers/clk/meson/clk-phase.c
+++ b/drivers/clk/meson/clk-phase.c
@@ -5,7 +5,10 @@
*/
#include
-#include "clkc.h"
+#include
+
+#include "clk-regmap.h"
+#include "clk-phase.h"
#define phase_step(_width) (360 / (1 << (_width)))
@@ -15,13 +18,12 @@ meson_clk_phase_data(struct clk_regmap *clk)
return (struct meson_clk_phase_data *)clk->data;
}
-int meson_clk_degrees_from_val(unsigned int val, unsigned int width)
+static int meson_clk_degrees_from_val(unsigned int val, unsigned int width)
{
return phase_step(width) * val;
}
-EXPORT_SYMBOL_GPL(meson_clk_degrees_from_val);
-unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width)
+static unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width)
{
unsigned int val = DIV_ROUND_CLOSEST(degrees, phase_step(width));
@@ -31,7 +33,6 @@ unsigned int meson_clk_degrees_to_val(int degrees, unsigned
int width)
*/
return val % (1 << width);
}
-EXPORT_SYMBOL_GPL(meson_clk_degrees_to_val);
static int meson_clk_phase_get_phase(struct clk_hw *hw)
{
@@ -61,3 +62,67 @@ const struct clk_ops meson_clk_phase_ops = {
.set_phase = meson_clk_phase_set_phase,
};
EXPORT_SYMBOL_GPL(meson_clk_phase_ops);
+
+/*
+ * This is a special clock for the audio controller.
+ * The phase of mst_sclk clock output can be controlled independently
+ * for the outside world (ph0), the tdmout (ph1) and tdmin (ph2).
+ * Controlling these 3 phases as just one makes things simpler and
+ * give the same clock view to all the element on the i2s bus.
+ * If necessary, we can still control the phase in the tdm block
+ * which makes these independent control redundant.
+ */
+static inline struct meson_clk_triphase_data *
+meson_clk_triphase_data(struct clk_regmap *clk)
+{
+ return (struct meson_clk_triphase_data *)clk->data;
+}
+
+static void meson_clk_triphase_sync(struct clk_hw *hw)
+{
+ struct clk_regmap *clk = to_clk_regmap(hw);
+ struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
+ unsigned int val;
+
+ /* Get phase 0 and sync it to phase 1 and 2 */
+ val = meson_parm_read(clk->map, >ph0);
+ meson_parm_write(clk->map, >ph1, val);
+ meson_parm_write(clk->map, >ph2, val);
+}
+
+static int meson_clk_triphase_get_phase(struct clk_hw *hw)
+{
+ struct clk_regmap *clk = to_clk_regmap(hw);
+ struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
+ unsigned int val;
+
+ /* Phase are in sync, reading phase 0 is enough */
+ val = meson_parm_read(clk->map, >ph0);
+
+ return meson_clk_degrees_from_val(val, tph->ph0.width);
+}
+
+static int meson_clk_triphase_set_phase(struct clk_hw *hw, int degrees)
+{
+ struct clk_regmap *clk = to_clk_regmap(hw);
+ struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
+ unsigned int val;
+
+ val = meson_clk_degrees_to_val(degrees, tph->ph0.width);
+ meson_parm_write(clk->map, >ph0, val);
+ meson_parm_write(clk->map, >ph1, val);
+ meson_parm_write(clk->map, >ph2, val);
+
+ return 0;
+}
+
+const struct clk_ops meson_clk_triphase_ops = {
+ .init = meson_clk_triphase_sync,
+ .get_phase = meson_clk_triphase_get_phase,
+ .set_phase =
[PATCH 10/14] clk: meson: take dualdiv out of clkc
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg-aoclk.c | 3 +++
drivers/clk/meson/clk-dualdiv.c | 10 +-
drivers/clk/meson/clk-dualdiv.h | 33 +
drivers/clk/meson/clkc.h| 19 ---
drivers/clk/meson/gxbb-aoclk.c | 3 +++
5 files changed, 48 insertions(+), 20 deletions(-)
create mode 100644 drivers/clk/meson/clk-dualdiv.h
diff --git a/drivers/clk/meson/axg-aoclk.c b/drivers/clk/meson/axg-aoclk.c
index 5701f5840b75..6b408edb1608 100644
--- a/drivers/clk/meson/axg-aoclk.c
+++ b/drivers/clk/meson/axg-aoclk.c
@@ -16,6 +16,9 @@
#include "meson-aoclk.h"
#include "axg-aoclk.h"
+#include "clk-regmap.h"
+#include "clk-dualdiv.h"
+
#define IN_PREFIX "ao-in-"
/*
diff --git a/drivers/clk/meson/clk-dualdiv.c b/drivers/clk/meson/clk-dualdiv.c
index 4d9e161de627..c5ca23a5e3e8 100644
--- a/drivers/clk/meson/clk-dualdiv.c
+++ b/drivers/clk/meson/clk-dualdiv.c
@@ -22,7 +22,10 @@
*/
#include
-#include "clkc.h"
+#include
+
+#include "clk-regmap.h"
+#include "clk-dualdiv.h"
static inline struct meson_clk_dualdiv_data *
meson_clk_dualdiv_data(struct clk_regmap *clk)
@@ -128,3 +131,8 @@ const struct clk_ops meson_clk_dualdiv_ro_ops = {
.recalc_rate= meson_clk_dualdiv_recalc_rate,
};
EXPORT_SYMBOL_GPL(meson_clk_dualdiv_ro_ops);
+
+MODULE_DESCRIPTION("Amlogic dual divider driver");
+MODULE_AUTHOR("Neil Armstrong ");
+MODULE_AUTHOR("Jerome Brunet ");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/meson/clk-dualdiv.h b/drivers/clk/meson/clk-dualdiv.h
new file mode 100644
index ..4aa939018012
--- /dev/null
+++ b/drivers/clk/meson/clk-dualdiv.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Jerome Brunet
+ */
+
+#ifndef __MESON_CLK_DUALDIV_H
+#define __MESON_CLK_DUALDIV_H
+
+#include
+#include "parm.h"
+
+struct meson_clk_dualdiv_param {
+ unsigned int n1;
+ unsigned int n2;
+ unsigned int m1;
+ unsigned int m2;
+ unsigned int dual;
+};
+
+struct meson_clk_dualdiv_data {
+ struct parm n1;
+ struct parm n2;
+ struct parm m1;
+ struct parm m2;
+ struct parm dual;
+ const struct meson_clk_dualdiv_param *table;
+};
+
+extern const struct clk_ops meson_clk_dualdiv_ops;
+extern const struct clk_ops meson_clk_dualdiv_ro_ops;
+
+#endif /* __MESON_CLK_DUALDIV_H */
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index ece8ed82b11c..24918cc5fa58 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -11,27 +11,8 @@
#include "clk-regmap.h"
#include "parm.h"
-struct meson_clk_dualdiv_param {
- unsigned int n1;
- unsigned int n2;
- unsigned int m1;
- unsigned int m2;
- unsigned int dual;
-};
-
-struct meson_clk_dualdiv_data {
- struct parm n1;
- struct parm n2;
- struct parm m1;
- struct parm m2;
- struct parm dual;
- const struct meson_clk_dualdiv_param *table;
-};
-
/* clk_ops */
extern const struct clk_ops meson_clk_cpu_ops;
-extern const struct clk_ops meson_clk_dualdiv_ops;
-extern const struct clk_ops meson_clk_dualdiv_ro_ops;
struct clk_hw *meson_clk_hw_register_input(struct device *dev,
const char *of_name,
diff --git a/drivers/clk/meson/gxbb-aoclk.c b/drivers/clk/meson/gxbb-aoclk.c
index 510b6a7d2f18..26578622fc91 100644
--- a/drivers/clk/meson/gxbb-aoclk.c
+++ b/drivers/clk/meson/gxbb-aoclk.c
@@ -9,6 +9,9 @@
#include "meson-aoclk.h"
#include "gxbb-aoclk.h"
+#include "clk-regmap.h"
+#include "clk-dualdiv.h"
+
#define IN_PREFIX "ao-in-"
/* AO Configuration Clock registers offsets */
--
2.20.1
[PATCH 04/14] clk: meson: move MESON_GATE to clk-regmap.h
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/axg.c| 1 +
drivers/clk/meson/clk-regmap.c | 5 +
drivers/clk/meson/clk-regmap.h | 15 +++
drivers/clk/meson/clkc.h | 15 ---
4 files changed, 21 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 1c65397c..474412234633 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -18,6 +18,7 @@
#include
#include "clkc.h"
+#include "clk-regmap.h"
#include "axg.h"
#define IN_PREFIX "ee-in-"
diff --git a/drivers/clk/meson/clk-regmap.c b/drivers/clk/meson/clk-regmap.c
index c515f67322a3..dcd1757cc5df 100644
--- a/drivers/clk/meson/clk-regmap.c
+++ b/drivers/clk/meson/clk-regmap.c
@@ -4,6 +4,7 @@
* Author: Jerome Brunet
*/
+#include
#include "clk-regmap.h"
static int clk_regmap_gate_endisable(struct clk_hw *hw, int enable)
@@ -180,3 +181,7 @@ const struct clk_ops clk_regmap_mux_ro_ops = {
.get_parent = clk_regmap_mux_get_parent,
};
EXPORT_SYMBOL_GPL(clk_regmap_mux_ro_ops);
+
+MODULE_DESCRIPTION("Amlogic regmap backed clock driver");
+MODULE_AUTHOR("Jerome Brunet ");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/meson/clk-regmap.h b/drivers/clk/meson/clk-regmap.h
index e9c5728d40eb..b7a085bbf072 100644
--- a/drivers/clk/meson/clk-regmap.h
+++ b/drivers/clk/meson/clk-regmap.h
@@ -111,4 +111,19 @@ clk_get_regmap_mux_data(struct clk_regmap *clk)
extern const struct clk_ops clk_regmap_mux_ops;
extern const struct clk_ops clk_regmap_mux_ro_ops;
+#define MESON_GATE(_name, _reg, _bit) \
+struct clk_regmap _name = {\
+ .data = &(struct clk_regmap_gate_data){ \
+ .offset = (_reg), \
+ .bit_idx = (_bit), \
+ }, \
+ .hw.init = &(struct clk_init_data) {\
+ .name = #_name, \
+ .ops = _regmap_gate_ops,\
+ .parent_names = (const char *[]){ "clk81" },\
+ .num_parents = 1, \
+ .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \
+ }, \
+}
+
#endif /* __CLK_REGMAP_H */
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index e3cd442db739..35768c2327ba 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -95,21 +95,6 @@ struct meson_vid_pll_div_data {
struct parm sel;
};
-#define MESON_GATE(_name, _reg, _bit) \
-struct clk_regmap _name = {\
- .data = &(struct clk_regmap_gate_data){ \
- .offset = (_reg), \
- .bit_idx = (_bit), \
- }, \
- .hw.init = &(struct clk_init_data) {\
- .name = #_name, \
- .ops = _regmap_gate_ops,\
- .parent_names = (const char *[]){ "clk81" },\
- .num_parents = 1, \
- .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \
- }, \
-};
-
struct meson_clk_dualdiv_param {
unsigned int n1;
unsigned int n2;
--
2.20.1
[PATCH 03/14] clk: meson: axg-audio does not require syscon
The axg audio clock controller uses regmap mmio, not syscon.
Fixes: 1cd50181750f ("clk: meson: axg: add the audio clock controller driver")
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
index efaa70f682b4..2479dab09d70 100644
--- a/drivers/clk/meson/Kconfig
+++ b/drivers/clk/meson/Kconfig
@@ -50,7 +50,7 @@ config COMMON_CLK_AXG_AUDIO
tristate "Meson AXG Audio Clock Controller Driver"
depends on COMMON_CLK_AXG
select COMMON_CLK_AMLOGIC_AUDIO
- select MFD_SYSCON
+ select REGMAP_MMIO
help
Support for the audio clock controller on AmLogic A113D devices,
aka axg, Say Y if you want audio subsystem to work.
--
2.20.1
[PATCH 00/14] clk: meson: rework drivers dependencies
The goal of this patchset to clean-up the dependencies between
the controllers and the different clock drivers provided in the meson
directory. The expected result is that each controllers can pick the
the clock drivers they need, without necessarily pulling everything.
This is becoming important as we are adding more and more controllers
to support new amlogic SoC.
Patch 1 and 2 are out of the meson directory, so we need an Ack from
Stephen or Mike on this.
Patch 4 to 14 is the actual rework. The intermediate state are provided
to make it a little less painful to review. In the end, Patch 4 to 14
should be squashed, keeping the commit message of patch 14.
Jerome Brunet (14):
clk: export some clk_hw function symbols for module drivers
clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory
clk: meson: axg-audio does not require syscon
clk: meson: move MESON_GATE to clk-regmap.h
clk: meson: move parm out of clkc
clk: meson: take the pll driver out of clkc
clk: meson: take the mpll driver out of clkc
clk: meson: merge phase driver and remove from clkc
clk: meson: take vid-pll-div out of clkc
clk: meson: take dualdiv out of clkc
clk: meson: take clk-input out of clkc
clk: meson: clkc must die
clk: meson: move sclk-div out of clkc-audio
clk: meson: rework and clean drivers dependencies
drivers/clk/Makefile | 2 +-
drivers/clk/clk.c | 3 +
drivers/clk/meson/Kconfig | 84 +++---
drivers/clk/meson/Makefile| 21 ++-
drivers/clk/meson/axg-aoclk.c | 4 +-
drivers/clk/meson/axg-audio.c | 5 +-
drivers/clk/meson/axg.c | 5 +-
drivers/clk/meson/clk-dualdiv.c | 10 +-
drivers/clk/meson/clk-dualdiv.h | 33
drivers/clk/meson/clk-input.c | 7 +-
drivers/clk/meson/clk-input.h | 19 +++
drivers/clk/meson/clk-mpll.c | 12 +-
drivers/clk/meson/clk-mpll.h | 30
drivers/clk/meson/clk-phase.c | 75 -
drivers/clk/meson/clk-phase.h | 26
drivers/clk/meson/clk-pll.c | 13 +-
drivers/clk/meson/clk-pll.h | 43 ++
drivers/clk/meson/clk-regmap.c| 5 +
drivers/clk/meson/clk-regmap.h| 15 ++
drivers/clk/meson/clk-triphase.c | 68
drivers/clk/meson/clkc.h | 146 --
drivers/clk/meson/gxbb-aoclk.c| 4 +-
drivers/clk/meson/gxbb.c | 5 +-
drivers/clk/meson/meson-aoclk.c | 2 +
drivers/clk/meson/meson-aoclk.h | 5 +-
drivers/clk/meson/meson8b.c | 3 +-
drivers/clk/meson/parm.h | 46 ++
drivers/clk/meson/sclk-div.c | 10 +-
.../clk/meson/{clkc-audio.h => sclk-div.h}| 16 +-
drivers/clk/meson/vid-pll-div.c | 10 +-
drivers/clk/meson/vid-pll-div.h | 20 +++
31 files changed, 467 insertions(+), 280 deletions(-)
create mode 100644 drivers/clk/meson/clk-dualdiv.h
create mode 100644 drivers/clk/meson/clk-input.h
create mode 100644 drivers/clk/meson/clk-mpll.h
create mode 100644 drivers/clk/meson/clk-phase.h
create mode 100644 drivers/clk/meson/clk-pll.h
delete mode 100644 drivers/clk/meson/clk-triphase.c
delete mode 100644 drivers/clk/meson/clkc.h
create mode 100644 drivers/clk/meson/parm.h
rename drivers/clk/meson/{clkc-audio.h => sclk-div.h} (54%)
create mode 100644 drivers/clk/meson/vid-pll-div.h
--
2.20.1
Re: [PATCH AUTOSEL 4.20 035/304] serial: core: Allow processing sysrq at port unlock time
On Mon, Jan 28, 2019 at 09:21:31AM -0800, Doug Anderson wrote:
Hi,
On Mon, Jan 28, 2019 at 9:16 AM Sasha Levin wrote:
On Mon, Jan 28, 2019 at 08:05:13AM -0800, Doug Anderson wrote:
>Hi,
>
>On Mon, Jan 28, 2019 at 7:44 AM Sasha Levin wrote:
>>
>> From: Douglas Anderson
>>
>> [ Upstream commit d6e1935819db0c91ce4a5af82466f3ab50d17346 ]
>>
>> Right now serial drivers process sysrq keys deep in their character
>> receiving code. This means that they've already grabbed their
>> port->lock spinlock. This can end up getting in the way if we've go
>> to do serial stuff (especially kgdb) in response to the sysrq.
>>
>> Serial drivers have various hacks in them to handle this. Looking at
>> '8250_port.c' you can see that the console_write() skips locking if
>> we're in the sysrq handler. Looking at 'msm_serial.c' you can see
>> that the port lock is dropped around uart_handle_sysrq_char().
>>
>> It turns out that these hacks aren't exactly perfect. If you have
>> lockdep turned on and use something like the 8250_port hack you'll get
>> a splat that looks like:
>>
>> WARNING: possible circular locking dependency detected
>> [...] is trying to acquire lock:
>> ... (console_owner){-.-.}, at: console_unlock+0x2e0/0x5e4
>>
>> but task is already holding lock:
>> ... (_lock_key){-.-.}, at: serial8250_handle_irq+0x30/0xe4
>>
>> which lock already depends on the new lock.
>>
>> the existing dependency chain (in reverse order) is:
>>
>> -> #1 (_lock_key){-.-.}:
>> _raw_spin_lock_irqsave+0x58/0x70
>> serial8250_console_write+0xa8/0x250
>> univ8250_console_write+0x40/0x4c
>> console_unlock+0x528/0x5e4
>> register_console+0x2c4/0x3b0
>> uart_add_one_port+0x350/0x478
>> serial8250_register_8250_port+0x350/0x3a8
>> dw8250_probe+0x67c/0x754
>> platform_drv_probe+0x58/0xa4
>> really_probe+0x150/0x294
>> driver_probe_device+0xac/0xe8
>> __driver_attach+0x98/0xd0
>> bus_for_each_dev+0x84/0xc8
>> driver_attach+0x2c/0x34
>> bus_add_driver+0xf0/0x1ec
>> driver_register+0xb4/0x100
>> __platform_driver_register+0x60/0x6c
>> dw8250_platform_driver_init+0x20/0x28
>> ...
>>
>> -> #0 (console_owner){-.-.}:
>> lock_acquire+0x1e8/0x214
>> console_unlock+0x35c/0x5e4
>> vprintk_emit+0x230/0x274
>> vprintk_default+0x7c/0x84
>> vprintk_func+0x190/0x1bc
>> printk+0x80/0xa0
>> __handle_sysrq+0x104/0x21c
>> handle_sysrq+0x30/0x3c
>> serial8250_read_char+0x15c/0x18c
>> serial8250_rx_chars+0x34/0x74
>> serial8250_handle_irq+0x9c/0xe4
>> dw8250_handle_irq+0x98/0xcc
>> serial8250_interrupt+0x50/0xe8
>> ...
>>
>> other info that might help us debug this:
>>
>>Possible unsafe locking scenario:
>>
>> CPU0CPU1
>>
>> lock(_lock_key);
>> lock(console_owner);
>> lock(_lock_key);
>> lock(console_owner);
>>
>>*** DEADLOCK ***
>>
>> The hack used in 'msm_serial.c' doesn't cause the above splats but it
>> seems a bit ugly to unlock / lock our spinlock deep in our irq
>> handler.
>>
>> It seems like we could defer processing the sysrq until the end of the
>> interrupt handler right after we've unlocked the port. With this
>> scheme if a whole batch of sysrq characters comes in one irq then we
>> won't handle them all, but that seems like it should be a fine
>> compromise.
>>
>> Signed-off-by: Douglas Anderson
>> Signed-off-by: Greg Kroah-Hartman
>> Signed-off-by: Sasha Levin
>> ---
>> include/linux/serial_core.h | 37 -
>> 1 file changed, 36 insertions(+), 1 deletion(-)
>
>FWIW this patch shouldn't hurt to be backported (I haven't heard any
>problems report with it), but it is effectively a no-op unless you
>also pick a patch that uses the new API. For instance commit
>596f63da42b9 ("serial: 8250: Process sysrq at port unlock time").
>...and if you want that patch I think you also need commit
>3e6f88068314 ("serial: core: Include console.h from serial_core.h").
>
>In theory you could think about adding the "qcom_geni_serial" patches
>related to sysrq processing too--dunno if anyone really cares about
>those on 4.20 stable...
Since no one actually tagged it for stable, probably not... I'll drop
it, thanks!
OK. Whatever behavior you decide on, please apply it across the
board. I got pings that this same patch was being picked to lots and
lots of different stable kernels and it is equally a no-op (without
the followup patches) everywhere.
Yup, I send a mail for each branch it was added on. It was now dropped
from all of them.
--
Thanks,
Sasha
[PATCH v2] tty: increase the default flip buffer limit to 2*640K
From: Manfred Schlaegl We increase the default limit for buffer memory allocation by a factor of 10 to 640K to prevent data loss when using fast serial interfaces. For example when using RS485 without flow-control at speeds of 1Mbit/s an upwards we've run into problems such as applications being too slow to read out this buffer (on embedded devices based on imx53 or imx6). If you want to write transmitted data to a slow SD card and thus have realtime requirements, this limit can become a problem. That shouldn't be the case and 640K buffers fix such problems for us. This value is a maximum limit for allocation only. It has no effect on systems that currently run fine. When transmission is slow enough applications and hardware can keep up and increasing this limit doesn't change anything. It only _allows_ to allocate more than 2*64K in cases we currently fail to allocate memory despite having some. Signed-off-by: Manfred Schlaegl Signed-off-by: Martin Kepplinger --- revision history v2: more verbose commit message answering Greg's questions v1: initial post drivers/tty/tty_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c index 77070c2d1240..ec145a59f199 100644 --- a/drivers/tty/tty_buffer.c +++ b/drivers/tty/tty_buffer.c @@ -26,7 +26,7 @@ * Byte threshold to limit memory consumption for flip buffers. * The actual memory limit is > 2x this amount. */ -#define TTYB_DEFAULT_MEM_LIMIT 65536 +#define TTYB_DEFAULT_MEM_LIMIT (640 * 1024UL) /* * We default to dicing tty buffer allocations to this many characters -- 2.20.1
[PATCH AUTOSEL 4.20 005/304] pinctrl: bcm2835: Use raw spinlock for RT compatibility
From: Lukas Wunner
[ Upstream commit 3c7b30f704b6f5e53eed6bf89cf2c8d1b38b02c0 ]
The BCM2835 pinctrl driver acquires a spinlock in its ->irq_enable,
->irq_disable and ->irq_set_type callbacks. Spinlocks become sleeping
locks with CONFIG_PREEMPT_RT_FULL=y, therefore invocation of one of the
callbacks in atomic context may cause a hard lockup if at least two GPIO
pins in the same bank are used as interrupts. The issue doesn't occur
with just a single interrupt pin per bank because the lock is never
contended. I'm experiencing such lockups with GPIO 8 and 28 used as
level-triggered interrupts, i.e. with ->irq_disable being invoked on
reception of every IRQ.
The critical section protected by the spinlock is very small (one bitop
and one RMW of an MMIO register), hence converting to a raw spinlock
seems a better trade-off than converting the driver to threaded IRQ
handling (which would increase latency to handle an interrupt).
Cc: Mathias Duckeck
Signed-off-by: Lukas Wunner
Acked-by: Julia Cartwright
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
---
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index fa530913a2c8..08925d24180b 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -90,7 +90,7 @@ struct bcm2835_pinctrl {
struct gpio_chip gpio_chip;
struct pinctrl_gpio_range gpio_range;
- spinlock_t irq_lock[BCM2835_NUM_BANKS];
+ raw_spinlock_t irq_lock[BCM2835_NUM_BANKS];
};
/* pins are just named GPIO0..GPIO53 */
@@ -461,10 +461,10 @@ static void bcm2835_gpio_irq_enable(struct irq_data *data)
unsigned bank = GPIO_REG_OFFSET(gpio);
unsigned long flags;
- spin_lock_irqsave(>irq_lock[bank], flags);
+ raw_spin_lock_irqsave(>irq_lock[bank], flags);
set_bit(offset, >enabled_irq_map[bank]);
bcm2835_gpio_irq_config(pc, gpio, true);
- spin_unlock_irqrestore(>irq_lock[bank], flags);
+ raw_spin_unlock_irqrestore(>irq_lock[bank], flags);
}
static void bcm2835_gpio_irq_disable(struct irq_data *data)
@@ -476,12 +476,12 @@ static void bcm2835_gpio_irq_disable(struct irq_data
*data)
unsigned bank = GPIO_REG_OFFSET(gpio);
unsigned long flags;
- spin_lock_irqsave(>irq_lock[bank], flags);
+ raw_spin_lock_irqsave(>irq_lock[bank], flags);
bcm2835_gpio_irq_config(pc, gpio, false);
/* Clear events that were latched prior to clearing event sources */
bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
clear_bit(offset, >enabled_irq_map[bank]);
- spin_unlock_irqrestore(>irq_lock[bank], flags);
+ raw_spin_unlock_irqrestore(>irq_lock[bank], flags);
}
static int __bcm2835_gpio_irq_set_type_disabled(struct bcm2835_pinctrl *pc,
@@ -584,7 +584,7 @@ static int bcm2835_gpio_irq_set_type(struct irq_data *data,
unsigned int type)
unsigned long flags;
int ret;
- spin_lock_irqsave(>irq_lock[bank], flags);
+ raw_spin_lock_irqsave(>irq_lock[bank], flags);
if (test_bit(offset, >enabled_irq_map[bank]))
ret = __bcm2835_gpio_irq_set_type_enabled(pc, gpio, type);
@@ -596,7 +596,7 @@ static int bcm2835_gpio_irq_set_type(struct irq_data *data,
unsigned int type)
else
irq_set_handler_locked(data, handle_level_irq);
- spin_unlock_irqrestore(>irq_lock[bank], flags);
+ raw_spin_unlock_irqrestore(>irq_lock[bank], flags);
return ret;
}
@@ -1047,7 +1047,7 @@ static int bcm2835_pinctrl_probe(struct platform_device
*pdev)
for_each_set_bit(offset, , 32)
bcm2835_gpio_wr(pc, GPEDS0 + i * 4, BIT(offset));
- spin_lock_init(>irq_lock[i]);
+ raw_spin_lock_init(>irq_lock[i]);
}
err = gpiochip_add_data(>gpio_chip, pc);
--
2.19.1
[PATCH AUTOSEL 4.20 008/304] gpiolib: Fix possible use after free on label
From: Muchun Song
[ Upstream commit 18534df419041e6c1f4b41af56ee7d41f757815c ]
gpiod_request_commit() copies the pointer to the label passed as
an argument only to be used later. But there's a chance the caller
could immediately free the passed string(e.g., local variable).
This could trigger a use after free when we use gpio label(e.g.,
gpiochip_unlock_as_irq(), gpiochip_is_requested()).
To be on the safe side: duplicate the string with kstrdup_const()
so that if an unaware user passes an address to a stack-allocated
buffer, we won't get the arbitrary label.
Also fix gpiod_set_consumer_name().
Signed-off-by: Muchun Song
Signed-off-by: Linus Walleij
Signed-off-by: Sasha Levin
---
drivers/gpio/gpiolib.c| 25 +
include/linux/gpio/consumer.h | 6 --
2 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index a2cbb474901c..33266460e81c 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -2299,6 +2299,12 @@ static int gpiod_request_commit(struct gpio_desc *desc,
const char *label)
unsigned long flags;
unsignedoffset;
+ if (label) {
+ label = kstrdup_const(label, GFP_KERNEL);
+ if (!label)
+ return -ENOMEM;
+ }
+
spin_lock_irqsave(_lock, flags);
/* NOTE: gpio_request() can be called in early boot,
@@ -2309,6 +2315,7 @@ static int gpiod_request_commit(struct gpio_desc *desc,
const char *label)
desc_set_label(desc, label ? : "?");
status = 0;
} else {
+ kfree_const(label);
status = -EBUSY;
goto done;
}
@@ -2325,6 +2332,7 @@ static int gpiod_request_commit(struct gpio_desc *desc,
const char *label)
if (status < 0) {
desc_set_label(desc, NULL);
+ kfree_const(label);
clear_bit(FLAG_REQUESTED, >flags);
goto done;
}
@@ -2420,6 +2428,7 @@ static bool gpiod_free_commit(struct gpio_desc *desc)
chip->free(chip, gpio_chip_hwgpio(desc));
spin_lock_irqsave(_lock, flags);
}
+ kfree_const(desc->label);
desc_set_label(desc, NULL);
clear_bit(FLAG_ACTIVE_LOW, >flags);
clear_bit(FLAG_REQUESTED, >flags);
@@ -3375,11 +3384,19 @@ EXPORT_SYMBOL_GPL(gpiod_cansleep);
* @desc: gpio to set the consumer name on
* @name: the new consumer name
*/
-void gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
+int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
{
- VALIDATE_DESC_VOID(desc);
- /* Just overwrite whatever the previous name was */
- desc->label = name;
+ VALIDATE_DESC(desc);
+ if (name) {
+ name = kstrdup_const(name, GFP_KERNEL);
+ if (!name)
+ return -ENOMEM;
+ }
+
+ kfree_const(desc->label);
+ desc_set_label(desc, name);
+
+ return 0;
}
EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index f2f887795d43..ed070512b40e 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -162,7 +162,7 @@ int gpiod_is_active_low(const struct gpio_desc *desc);
int gpiod_cansleep(const struct gpio_desc *desc);
int gpiod_to_irq(const struct gpio_desc *desc);
-void gpiod_set_consumer_name(struct gpio_desc *desc, const char *name);
+int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name);
/* Convert between the old gpio_ and new gpiod_ interfaces */
struct gpio_desc *gpio_to_desc(unsigned gpio);
@@ -495,10 +495,12 @@ static inline int gpiod_to_irq(const struct gpio_desc
*desc)
return -EINVAL;
}
-static inline void gpiod_set_consumer_name(struct gpio_desc *desc, const char
*name)
+static inline int gpiod_set_consumer_name(struct gpio_desc *desc,
+ const char *name)
{
/* GPIO can never have been requested */
WARN_ON(1);
+ return -EINVAL;
}
static inline struct gpio_desc *gpio_to_desc(unsigned gpio)
--
2.19.1
[PATCH AUTOSEL 4.20 006/304] clk: sunxi-ng: h6: Set video PLLs limits
From: Jernej Skrabec
[ Upstream commit ed4433419d45bf8b58aef34c4450a27e1c8699e8 ]
Video PLL factors can be set in a way that final PLL rate is outside
stable range. H6 user manual specifically says that N factor should not
be below 12. While it doesn't says anything about maximum stable rate, it
is clear that PLL doesn't work at 6.096 GHz (254 * 24 MHz).
Set minimum allowed PLL video rate to 288 MHz (12 * 24 MHz) and maximum
to 2.4 GHz, which is maximum in BSP driver.
Signed-off-by: Jernej Skrabec
Signed-off-by: Maxime Ripard
Signed-off-by: Sasha Levin
---
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index 2193e1495086..19ff09f610e4 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -120,6 +120,8 @@ static struct ccu_nm pll_video0_clk = {
.n = _SUNXI_CCU_MULT_MIN(8, 8, 12),
.m = _SUNXI_CCU_DIV(1, 1), /* input divider */
.fixed_post_div = 4,
+ .min_rate = 28800,
+ .max_rate = 24UL,
.common = {
.reg= 0x040,
.features = CCU_FEATURE_FIXED_POSTDIV,
@@ -136,6 +138,8 @@ static struct ccu_nm pll_video1_clk = {
.n = _SUNXI_CCU_MULT_MIN(8, 8, 12),
.m = _SUNXI_CCU_DIV(1, 1), /* input divider */
.fixed_post_div = 4,
+ .min_rate = 28800,
+ .max_rate = 24UL,
.common = {
.reg= 0x048,
.features = CCU_FEATURE_FIXED_POSTDIV,
--
2.19.1
[PATCH AUTOSEL 4.20 003/304] staging: iio: adc: ad7280a: handle error from __ad7280_read32()
From: Slawomir Stepien
[ Upstream commit 0559ef7fde67bc6c83c6eb6329dbd6649528263e ]
Inside __ad7280_read32(), the spi_sync_transfer() can fail with negative
error code. This change will ensure that this error is being passed up
in the call stack, so it can be handled.
Signed-off-by: Slawomir Stepien
Signed-off-by: Jonathan Cameron
Signed-off-by: Sasha Levin
---
drivers/staging/iio/adc/ad7280a.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/iio/adc/ad7280a.c
b/drivers/staging/iio/adc/ad7280a.c
index 58420dcb406d..cbeb52485a31 100644
--- a/drivers/staging/iio/adc/ad7280a.c
+++ b/drivers/staging/iio/adc/ad7280a.c
@@ -256,7 +256,9 @@ static int ad7280_read(struct ad7280_state *st, unsigned
int devaddr,
if (ret)
return ret;
- __ad7280_read32(st, );
+ ret = __ad7280_read32(st, );
+ if (ret)
+ return ret;
if (ad7280_check_crc(st, tmp))
return -EIO;
@@ -294,7 +296,9 @@ static int ad7280_read_channel(struct ad7280_state *st,
unsigned int devaddr,
ad7280_delay(st);
- __ad7280_read32(st, );
+ ret = __ad7280_read32(st, );
+ if (ret)
+ return ret;
if (ad7280_check_crc(st, tmp))
return -EIO;
@@ -327,7 +331,9 @@ static int ad7280_read_all_channels(struct ad7280_state
*st, unsigned int cnt,
ad7280_delay(st);
for (i = 0; i < cnt; i++) {
- __ad7280_read32(st, );
+ ret = __ad7280_read32(st, );
+ if (ret)
+ return ret;
if (ad7280_check_crc(st, tmp))
return -EIO;
@@ -370,7 +376,10 @@ static int ad7280_chain_setup(struct ad7280_state *st)
return ret;
for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
- __ad7280_read32(st, );
+ ret = __ad7280_read32(st, );
+ if (ret)
+ return ret;
+
if (val == 0)
return n - 1;
--
2.19.1
[PATCH AUTOSEL 4.20 010/304] ath10k: fixup extended per sta tx statistics
From: Dan Carpenter
[ Upstream commit 539b44e70c5b4ad82d2c0c97a4dfb37523d891f6 ]
I had a couple concerns with this code. First, we definitely need to
set the error code if the kzalloc() fails. Secondly, I was worried that
if we didn't set "arsta->tx_stats" to NULL after freeing it, then it
looks to me like it might lead to a use after free. I can't test that,
but it's harmless to set it to NULL so I did.
Fixes: a904417fc876 ("ath10k: add extended per sta tx statistics support")
Signed-off-by: Dan Carpenter
Signed-off-by: Kalle Valo
Signed-off-by: Sasha Levin
---
drivers/net/wireless/ath/ath10k/mac.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath10k/mac.c
b/drivers/net/wireless/ath/ath10k/mac.c
index 7e49342bae38..b4764fee4751 100644
--- a/drivers/net/wireless/ath/ath10k/mac.c
+++ b/drivers/net/wireless/ath/ath10k/mac.c
@@ -6296,8 +6296,10 @@ static int ath10k_sta_state(struct ieee80211_hw *hw,
if (ath10k_debug_is_extd_tx_stats_enabled(ar)) {
arsta->tx_stats = kzalloc(sizeof(*arsta->tx_stats),
GFP_KERNEL);
- if (!arsta->tx_stats)
+ if (!arsta->tx_stats) {
+ ret = -ENOMEM;
goto exit;
+ }
}
num_tdls_stations = ath10k_mac_tdls_vif_stations_count(hw, vif);
@@ -6385,8 +6387,10 @@ static int ath10k_sta_state(struct ieee80211_hw *hw,
"mac vdev %d peer delete %pM sta %pK (sta gone)\n",
arvif->vdev_id, sta->addr, sta);
- if (ath10k_debug_is_extd_tx_stats_enabled(ar))
+ if (ath10k_debug_is_extd_tx_stats_enabled(ar)) {
kfree(arsta->tx_stats);
+ arsta->tx_stats = NULL;
+ }
if (sta->tdls) {
ret = ath10k_mac_tdls_peer_update(ar, arvif->vdev_id,
--
2.19.1
[PATCH AUTOSEL 4.20 009/304] drm/sun4i: Initialize registers in tcon-top driver
From: Jernej Skrabec [ Upstream commit c96d62215fb540e2ae61de44cb7caf4db50958e3 ] It turns out that TCON TOP registers in H6 SoC have non-zero reset value. This may cause issues if bits are not changed during configuration. To prevent that, initialize registers to 0. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-24-jernej.skra...@siol.net Signed-off-by: Sasha Levin --- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 3040a79f298f..37158548b447 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -167,6 +167,13 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, goto err_assert_reset; } + /* +* At least on H6, some registers have some bits set by default +* which may cause issues. Clear them here. +*/ + writel(0, regs + TCON_TOP_PORT_SEL_REG); + writel(0, regs + TCON_TOP_GATE_SRC_REG); + /* * TCON TOP has two muxes, which select parent clock for each TCON TV * channel clock. Parent could be either TCON TV or TVE clock. For now -- 2.19.1
[PATCH AUTOSEL 4.20 013/304] drm/amd/display: Fix potential nullptr error
From: Bhawanpreet Lakha
[ Upstream commit 4f7129112c2a30331f3045a42026fad82e6cb72b ]
[Why]
Fix surface/plane potential nullptr
[How]
add null check
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Aric Cyr
Acked-by: Leo Li
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 3118ae0e7a87..315a245aedc2 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -5333,6 +5333,12 @@ enum surface_update_type
dm_determine_update_type_for_commit(struct dc *dc, stru
struct dc_stream_update stream_update;
enum surface_update_type update_type = UPDATE_TYPE_FAST;
+ if (!updates || !surface) {
+ DRM_ERROR("Plane or surface update failed to allocate");
+ /* Set type to FULL to avoid crashing in DC*/
+ update_type = UPDATE_TYPE_FULL;
+ goto ret;
+ }
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
new_dm_crtc_state = to_dm_crtc_state(new_crtc_state);
--
2.19.1
Re: [PATCH v16 0/7] Parse ACPI table and limit KASLR to choosing immovable memory
On Wed, Jan 23, 2019 at 07:08:43PM +0800, Chao Fan wrote: > PATCH 1/7 Copy kstrtoull() to boot/string.c to instead of using > old simple_strtoull() > PATCH 2/7 Introduce get_acpi_rsdp() to parse RSDP in cmdline from KEXEC > PATCH 3/6 Introduce efi_get_rsdp_addr() to find RSDP from EFI table when > booting from EFI. > PATCH 4/7 Introduce bios_get_rsdp_addr() to search RSDP in memory when > booting from BIOS > PATCH 5/7 Parse RSDP and fill in boot_params->acpi_rsdp_addr before > KASLR. > PATCH 6/7 Compute SRAT from RSDP and walk SRAT to store the immovable > memory regions and store the immovable memory regions. > PATCH 7/7 Calculate the intersection between memory regions from e820/efi > memory table and immovable memory regions. Limit KASLR to > choosing these regions for randomization. Ok, I've massaged the whole pile and fixed a couple of things that sprang at me, see each commit message for details. Please run it and check whether I haven't broken anything: https://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git/log/?h=tip-x86-boot Thx. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.
[PATCH AUTOSEL 4.20 015/304] wil6210: fix reset flow for Talyn-mb
From: Alexei Avshalom Lazar
[ Upstream commit d083b2e2b7db5cca1791643d036e6597af27f49b ]
With current reset flow, Talyn sometimes get stuck causing PCIe
enumeration to fail. Fix this by removing some reset flow operations
that are not relevant for Talyn.
Setting bit 15 in RGF_HP_CTRL is WBE specific and is not in use for
all wil6210 devices.
For Sparrow, BIT_HPAL_PERST_FROM_PAD and BIT_CAR_PERST_RST were set
as a WA an HW issue.
Signed-off-by: Alexei Avshalom Lazar
Signed-off-by: Maya Erez
Signed-off-by: Kalle Valo
Signed-off-by: Sasha Levin
---
drivers/net/wireless/ath/wil6210/main.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/wil6210/main.c
b/drivers/net/wireless/ath/wil6210/main.c
index 398900a1c29e..c54b008996ee 100644
--- a/drivers/net/wireless/ath/wil6210/main.c
+++ b/drivers/net/wireless/ath/wil6210/main.c
@@ -998,10 +998,13 @@ static int wil_target_reset(struct wil6210_priv *wil, int
no_flash)
wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
- /* Clear MAC link up */
- wil_s(wil, RGF_HP_CTRL, BIT(15));
- wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_HPAL_PERST_FROM_PAD);
- wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
+ if (wil->hw_version < HW_VER_TALYN) {
+ /* Clear MAC link up */
+ wil_s(wil, RGF_HP_CTRL, BIT(15));
+ wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0,
+ BIT_HPAL_PERST_FROM_PAD);
+ wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
+ }
wil_halt_cpu(wil);
--
2.19.1
[PATCH] KVM: Ignore LBR MSRs with no effect
Win10 attempts to save these registers during KiSaveDebugRegisterState if LBR or BTF bits are set in MSR_IA32_DEBUGCTLMSR. It uses DR7 GE and LE flags for per-thread switching of these these features so zero value that is returned for MSR_IA32_DEBUGCTLMSR has no effect. These registers are used for debugging and shouldn't cause #GP and guest crash so just return zeroes just like we do for common x86 LBR MSRs (DEBUGCTLMSR, LAST[BRANCH|INT][TO|FROM]IP). Signed-off-by: Anton Kuchin --- arch/x86/kvm/vmx/vmx.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index f6915f10e584..8bc56cf027ed 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1769,6 +1769,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) else msr_info->data = vmx->pt_desc.guest.addr_a[index / 2]; break; + case MSR_LBR_TOS: + case MSR_LBR_NHM_FROM ... MSR_LBR_NHM_FROM + 31: + case MSR_LBR_NHM_TO ... MSR_LBR_NHM_TO + 31: + case MSR_LBR_CORE_FROM ... MSR_LBR_CORE_FROM + 7: + case MSR_LBR_CORE_TO ... MSR_LBR_CORE_TO + 7: + msr_info->data = 0; + break; case MSR_TSC_AUX: if (!msr_info->host_initiated && !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) -- 2.19.1
[PATCH AUTOSEL 4.20 020/304] scsi: mpt3sas: Call sas_remove_host before removing the target devices
From: Suganath Prabu
[ Upstream commit dc730212e8a378763cb182b889f90c8101331332 ]
Call sas_remove_host() before removing the target devices in the driver's
.remove() callback function(i.e. during driver unload time). So that
driver can provide a way to allow SYNC CACHE, START STOP unit commands
etc. (which are issued from SML) to the target drives during driver unload
time.
Once sas_remove_host() is called before removing the target drives then
driver can just clean up the resources allocated for target devices and no
need to call sas_port_delete_phy(), sas_port_delete() API's as these API's
internally called from sas_remove_host().
Signed-off-by: Suganath Prabu
Reviewed-by: Bjorn Helgaas
Reviewed-by: Andy Shevchenko
Signed-off-by: Martin K. Petersen
Signed-off-by: Sasha Levin
---
drivers/scsi/mpt3sas/mpt3sas_scsih.c | 2 +-
drivers/scsi/mpt3sas/mpt3sas_transport.c | 7 +--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
index 03c52847ed07..adac18ba84d4 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
@@ -9641,6 +9641,7 @@ static void scsih_remove(struct pci_dev *pdev)
/* release all the volumes */
_scsih_ir_shutdown(ioc);
+ sas_remove_host(shost);
list_for_each_entry_safe(raid_device, next, >raid_device_list,
list) {
if (raid_device->starget) {
@@ -9682,7 +9683,6 @@ static void scsih_remove(struct pci_dev *pdev)
ioc->sas_hba.num_phys = 0;
}
- sas_remove_host(shost);
mpt3sas_base_detach(ioc);
spin_lock(_lock);
list_del(>list);
diff --git a/drivers/scsi/mpt3sas/mpt3sas_transport.c
b/drivers/scsi/mpt3sas/mpt3sas_transport.c
index 6a8a3c09b4b1..8338b4db0e31 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_transport.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_transport.c
@@ -821,10 +821,13 @@ mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER
*ioc, u64 sas_address,
mpt3sas_port->remote_identify.sas_address,
mpt3sas_phy->phy_id);
mpt3sas_phy->phy_belongs_to_port = 0;
- sas_port_delete_phy(mpt3sas_port->port, mpt3sas_phy->phy);
+ if (!ioc->remove_host)
+ sas_port_delete_phy(mpt3sas_port->port,
+ mpt3sas_phy->phy);
list_del(_phy->port_siblings);
}
- sas_port_delete(mpt3sas_port->port);
+ if (!ioc->remove_host)
+ sas_port_delete(mpt3sas_port->port);
kfree(mpt3sas_port);
}
--
2.19.1
Re: [PATCH 0/2] mm, memory_hotplug: fix uninitialized pages fallouts.
On Mon, 28 Jan 2019 15:45:04 +0100 Michal Hocko wrote:
> Mikhail has posted fixes for the two bugs quite some time ago [1]. I
> have pushed back on those fixes because I believed that it is much
> better to plug the problem at the initialization time rather than play
> whack-a-mole all over the hotplug code and find all the places which
> expect the full memory section to be initialized. We have ended up with
> 2830bf6f05fb ("mm, memory_hotplug: initialize struct pages for the full
> memory section") merged and cause a regression [2][3]. The reason is
> that there might be memory layouts when two NUMA nodes share the same
> memory section so the merged fix is simply incorrect.
>
> In order to plug this hole we really have to be zone range aware in
> those handlers. I have split up the original patch into two. One is
> unchanged (patch 2) and I took a different approach for `removable'
> crash. It would be great if Mikhail could test it still works for his
> memory layout.
>
> [1] http://lkml.kernel.org/r/20181105150401.97287-2-zaslo...@linux.ibm.com
> [2] https://bugzilla.redhat.com/show_bug.cgi?id=1666948
> [3] http://lkml.kernel.org/r/20190125163938.ga20...@dhcp22.suse.cz
Any thoughts on which kernel version(s) need these patches?
[PATCH AUTOSEL 4.20 019/304] scsi: lpfc: Correct LCB RJT handling
From: James Smart [ Upstream commit b114d9009d386276bfc3352289fc235781ae3353 ] When LCB's are rejected, if beaconing was already in progress, the Reason Code Explanation was not being set. Should have been set to command in progress. Signed-off-by: Dick Kennedy Signed-off-by: James Smart Reviewed-by: Hannes Reinecke Signed-off-by: Martin K. Petersen Signed-off-by: Sasha Levin --- drivers/scsi/lpfc/lpfc_els.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c index f1c1faa74b46..96e2f542734a 100644 --- a/drivers/scsi/lpfc/lpfc_els.c +++ b/drivers/scsi/lpfc/lpfc_els.c @@ -5701,6 +5701,9 @@ error: stat = (struct ls_rjt *)(pcmd + sizeof(uint32_t)); stat->un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC; + if (shdr_add_status == ADD_STATUS_OPERATION_ALREADY_ACTIVE) + stat->un.b.lsRjtRsnCodeExp = LSEXP_CMD_IN_PROGRESS; + elsiocb->iocb_cmpl = lpfc_cmpl_els_rsp; phba->fc_stat.elsXmitLSRJT++; rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, elsiocb, 0); -- 2.19.1
[PATCH AUTOSEL 4.20 023/304] ARM: 8808/1: kexec:offline panic_smp_self_stop CPU
From: Yufen Wang
[ Upstream commit 82c08c3e7f171aa7f579b231d0abbc1d62e91974 ]
In case panic() and panic() called at the same time on different CPUS.
For example:
CPU 0:
panic()
__crash_kexec
machine_crash_shutdown
crash_smp_send_stop
machine_kexec
BUG_ON(num_online_cpus() > 1);
CPU 1:
panic()
local_irq_disable
panic_smp_self_stop
If CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop(), kdump
fails. CPU1 can't receive the ipi irq, CPU1 will be always online.
To fix this problem, this patch split out the panic_smp_self_stop()
and add set_cpu_online(smp_processor_id(), false).
Signed-off-by: Yufen Wang
Signed-off-by: Russell King
Signed-off-by: Sasha Levin
---
arch/arm/kernel/smp.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 12a6172263c0..3bf82232b1be 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -724,6 +724,21 @@ void smp_send_stop(void)
pr_warn("SMP: failed to stop secondary CPUs\n");
}
+/* In case panic() and panic() called at the same time on CPU1 and CPU2,
+ * and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
+ * CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
+ * kdump fails. So split out the panic_smp_self_stop() and add
+ * set_cpu_online(smp_processor_id(), false).
+ */
+void panic_smp_self_stop(void)
+{
+ pr_debug("CPU %u will stop doing anything useful since another CPU has
paniced\n",
+smp_processor_id());
+ set_cpu_online(smp_processor_id(), false);
+ while (1)
+ cpu_relax();
+}
+
/*
* not supported here
*/
--
2.19.1
[PATCH AUTOSEL 4.20 033/304] drm/vc4: ->x_scaling[1] should never be set to VC4_SCALING_NONE
From: Boris Brezillon
[ Upstream commit 0560054da5673b25d56bea6c57c8d069673af73b ]
For the YUV conversion to work properly, ->x_scaling[1] should never
be set to VC4_SCALING_NONE, but vc4_get_scaling_mode() might return
VC4_SCALING_NONE if the horizontal scaling ratio exactly matches the
horizontal subsampling factor. Add a test to turn VC4_SCALING_NONE
into VC4_SCALING_PPF when that happens.
The old ->x_scaling[0] adjustment is dropped as I couldn't find any
mention to this constraint in the spec and it's proven to be
unnecessary (I tested various multi-planar YUV formats with scaling
disabled, and all of them worked fine without this adjustment).
Fixes: fc04023fafec ("drm/vc4: Add support for YUV planes.")
Signed-off-by: Boris Brezillon
Reviewed-by: Eric Anholt
Link:
https://patchwork.freedesktop.org/patch/msgid/20181109102633.32603-1-boris.brezil...@bootlin.com
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/vc4/vc4_plane.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index ae6254b0b1ae..ed8b0fc170ee 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -314,12 +314,14 @@ static int vc4_plane_setup_clipping_and_scaling(struct
drm_plane_state *state)
vc4_get_scaling_mode(vc4_state->src_h[1],
vc4_state->crtc_h);
- /* YUV conversion requires that horizontal scaling be enabled,
-* even on a plane that's otherwise 1:1. Looks like only PPF
-* works in that case, so let's pick that one.
+ /* YUV conversion requires that horizontal scaling be enabled
+* on the UV plane even if vc4_get_scaling_mode() returned
+* VC4_SCALING_NONE (which can happen when the down-scaling
+* ratio is 0.5). Let's force it to VC4_SCALING_PPF in this
+* case.
*/
- if (vc4_state->is_unity)
- vc4_state->x_scaling[0] = VC4_SCALING_PPF;
+ if (vc4_state->x_scaling[1] == VC4_SCALING_NONE)
+ vc4_state->x_scaling[1] = VC4_SCALING_PPF;
} else {
vc4_state->is_yuv = false;
vc4_state->x_scaling[1] = VC4_SCALING_NONE;
--
2.19.1
[PATCH AUTOSEL 4.20 027/304] powerpc/pseries: add of_node_put() in dlpar_detach_node()
From: Frank Rowand
[ Upstream commit 5b3f5c408d8cc59b87e47f1ab9803dbd006e4a91 ]
The previous commit, "of: overlay: add missing of_node_get() in
__of_attach_node_sysfs" added a missing of_node_get() to
__of_attach_node_sysfs(). This results in a refcount imbalance
for nodes attached with dlpar_attach_node(). The calling sequence
from dlpar_attach_node() to __of_attach_node_sysfs() is:
dlpar_attach_node()
of_attach_node()
__of_attach_node_sysfs()
For more detailed description of the node refcount, see
commit 68baf692c435 ("powerpc/pseries: Fix of_node_put() underflow
during DLPAR remove").
Tested-by: Alan Tull
Acked-by: Michael Ellerman
Signed-off-by: Frank Rowand
Signed-off-by: Sasha Levin
---
arch/powerpc/platforms/pseries/dlpar.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/dlpar.c
b/arch/powerpc/platforms/pseries/dlpar.c
index 7625546caefd..17958043e7f7 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -270,6 +270,8 @@ int dlpar_detach_node(struct device_node *dn)
if (rc)
return rc;
+ of_node_put(dn);
+
return 0;
}
--
2.19.1
[PATCH AUTOSEL 4.20 028/304] srcu: Prevent __call_srcu() counter wrap with read-side critical section
From: "Paul E. McKenney"
[ Upstream commit 0607ba8403c4cdb253f8c5200ecf654dfb7790cc ]
Ever since cdf7abc4610a ("srcu: Allow use of Tiny/Tree SRCU from
both process and interrupt context"), it has been permissible
to use SRCU read-side critical sections in interrupt context.
This allows __call_srcu() to use SRCU read-side critical sections to
prevent a new SRCU grace period from ending before the call to either
srcu_funnel_gp_start() or srcu_funnel_exp_start completes, thus preventing
SRCU grace-period counter overflow during that time.
Note that this does not permit removal of the counter-wrap checks in
srcu_gp_end(). These check are necessary to handle the case where
a given CPU does not interact at all with SRCU for an extended time
period.
This commit therefore adds an SRCU read-side critical section to
__call_srcu() in order to prevent grace period counter wrap during
the funnel-locking process.
Signed-off-by: Paul E. McKenney
Signed-off-by: Sasha Levin
---
kernel/rcu/srcutree.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/kernel/rcu/srcutree.c b/kernel/rcu/srcutree.c
index a180abc8c925..697a2d7e8e8a 100644
--- a/kernel/rcu/srcutree.c
+++ b/kernel/rcu/srcutree.c
@@ -860,6 +860,7 @@ void __call_srcu(struct srcu_struct *sp, struct rcu_head
*rhp,
rcu_callback_t func, bool do_norm)
{
unsigned long flags;
+ int idx;
bool needexp = false;
bool needgp = false;
unsigned long s;
@@ -873,6 +874,7 @@ void __call_srcu(struct srcu_struct *sp, struct rcu_head
*rhp,
return;
}
rhp->func = func;
+ idx = srcu_read_lock(sp);
local_irq_save(flags);
sdp = this_cpu_ptr(sp->sda);
spin_lock_rcu_node(sdp);
@@ -894,6 +896,7 @@ void __call_srcu(struct srcu_struct *sp, struct rcu_head
*rhp,
srcu_funnel_gp_start(sp, sdp, s, do_norm);
else if (needexp)
srcu_funnel_exp_start(sp, sdp->mynode, s);
+ srcu_read_unlock(sp, idx);
}
/**
--
2.19.1
[PATCH AUTOSEL 4.20 025/304] dlm: Don't swamp the CPU with callbacks queued during recovery
From: Bob Peterson
[ Upstream commit 216f0efd19b9cc32207934fd1b87a45f2c4c593e ]
Before this patch, recovery would cause all callbacks to be delayed,
put on a queue, and afterward they were all queued to the callback
work queue. This patch does the same thing, but occasionally takes
a break after 25 of them so it won't swamp the CPU at the expense
of other RT processes like corosync.
Signed-off-by: Bob Peterson
Signed-off-by: David Teigland
Signed-off-by: Sasha Levin
---
fs/dlm/ast.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/fs/dlm/ast.c b/fs/dlm/ast.c
index 562fa8c3edff..47ee66d70109 100644
--- a/fs/dlm/ast.c
+++ b/fs/dlm/ast.c
@@ -292,6 +292,8 @@ void dlm_callback_suspend(struct dlm_ls *ls)
flush_workqueue(ls->ls_callback_wq);
}
+#define MAX_CB_QUEUE 25
+
void dlm_callback_resume(struct dlm_ls *ls)
{
struct dlm_lkb *lkb, *safe;
@@ -302,15 +304,23 @@ void dlm_callback_resume(struct dlm_ls *ls)
if (!ls->ls_callback_wq)
return;
+more:
mutex_lock(>ls_cb_mutex);
list_for_each_entry_safe(lkb, safe, >ls_cb_delay, lkb_cb_list) {
list_del_init(>lkb_cb_list);
queue_work(ls->ls_callback_wq, >lkb_cb_work);
count++;
+ if (count == MAX_CB_QUEUE)
+ break;
}
mutex_unlock(>ls_cb_mutex);
if (count)
log_rinfo(ls, "dlm_callback_resume %d", count);
+ if (count == MAX_CB_QUEUE) {
+ count = 0;
+ cond_resched();
+ goto more;
+ }
}
--
2.19.1
[PATCH AUTOSEL 4.20 026/304] x86/PCI: Fix Broadcom CNB20LE unintended sign extension (redux)
From: Colin Ian King
[ Upstream commit 53bb565fc5439f2c8c57a786feea5946804aa3e9 ]
In the expression "word1 << 16", word1 starts as u16, but is promoted to a
signed int, then sign-extended to resource_size_t, which is probably not
what was intended. Cast to resource_size_t to avoid the sign extension.
This fixes an identical issue as fixed by commit 0b2d70764bb3 ("x86/PCI:
Fix Broadcom CNB20LE unintended sign extension") back in 2014.
Detected by CoverityScan, CID#138749, 138750 ("Unintended sign extension")
Fixes: 3f6ea84a3035 ("PCI: read memory ranges out of Broadcom CNB20LE host
bridge")
Signed-off-by: Colin Ian King
Signed-off-by: Bjorn Helgaas
Signed-off-by: Sasha Levin
---
arch/x86/pci/broadcom_bus.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c
index 526536c81ddc..ca1e8e6dccc8 100644
--- a/arch/x86/pci/broadcom_bus.c
+++ b/arch/x86/pci/broadcom_bus.c
@@ -50,8 +50,8 @@ static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
word1 = read_pci_config_16(bus, slot, func, 0xc0);
word2 = read_pci_config_16(bus, slot, func, 0xc2);
if (word1 != word2) {
- res.start = (word1 << 16) | 0x;
- res.end = (word2 << 16) | 0x;
+ res.start = ((resource_size_t) word1 << 16) | 0x;
+ res.end = ((resource_size_t) word2 << 16) | 0x;
res.flags = IORESOURCE_MEM;
update_res(info, res.start, res.end, res.flags, 0);
}
--
2.19.1
[PATCH AUTOSEL 4.20 036/304] ptp: check gettime64 return code in PTP_SYS_OFFSET ioctl
From: Miroslav Lichvar [ Upstream commit 83d0bdc7390b890905634186baaa294475cd6a06 ] If a gettime64 call fails, return the error and avoid copying data back to user. Cc: Richard Cochran Cc: Jacob Keller Signed-off-by: Miroslav Lichvar Signed-off-by: David S. Miller Signed-off-by: Sasha Levin --- drivers/ptp/ptp_chardev.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/ptp/ptp_chardev.c b/drivers/ptp/ptp_chardev.c index 2012551d93e0..796eeffdf93b 100644 --- a/drivers/ptp/ptp_chardev.c +++ b/drivers/ptp/ptp_chardev.c @@ -228,7 +228,9 @@ long ptp_ioctl(struct posix_clock *pc, unsigned int cmd, unsigned long arg) pct->sec = ts.tv_sec; pct->nsec = ts.tv_nsec; pct++; - ptp->info->gettime64(ptp->info, ); + err = ptp->info->gettime64(ptp->info, ); + if (err) + goto out; pct->sec = ts.tv_sec; pct->nsec = ts.tv_nsec; pct++; @@ -281,6 +283,7 @@ long ptp_ioctl(struct posix_clock *pc, unsigned int cmd, unsigned long arg) break; } +out: kfree(sysoff); return err; } -- 2.19.1
[PATCH AUTOSEL 4.20 032/304] crypto: aes_ti - disable interrupts while accessing S-box
From: Eric Biggers
[ Upstream commit 0a6a40c2a8c184a2fb467efacfb1cd338d719e0b ]
In the "aes-fixed-time" AES implementation, disable interrupts while
accessing the S-box, in order to make cache-timing attacks more
difficult. Previously it was possible for the CPU to be interrupted
while the S-box was loaded into L1 cache, potentially evicting the
cachelines and causing later table lookups to be time-variant.
In tests I did on x86 and ARM, this doesn't affect performance
significantly. Responsiveness is potentially a concern, but interrupts
are only disabled for a single AES block.
Note that even after this change, the implementation still isn't
necessarily guaranteed to be constant-time; see
https://cr.yp.to/antiforgery/cachetiming-20050414.pdf for a discussion
of the many difficulties involved in writing truly constant-time AES
software. But it's valuable to make such attacks more difficult.
Reviewed-by: Ard Biesheuvel
Signed-off-by: Eric Biggers
Signed-off-by: Herbert Xu
Signed-off-by: Sasha Levin
---
crypto/Kconfig | 3 ++-
crypto/aes_ti.c | 18 ++
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 05c91eb10ca1..4f24acac3d48 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -1006,7 +1006,8 @@ config CRYPTO_AES_TI
8 for decryption), this implementation only uses just two S-boxes of
256 bytes each, and attempts to eliminate data dependent latencies by
prefetching the entire table into the cache at the start of each
- block.
+ block. Interrupts are also disabled to avoid races where cachelines
+ are evicted when the CPU is interrupted to do something else.
config CRYPTO_AES_586
tristate "AES cipher algorithms (i586)"
diff --git a/crypto/aes_ti.c b/crypto/aes_ti.c
index 03023b2290e8..1ff9785b30f5 100644
--- a/crypto/aes_ti.c
+++ b/crypto/aes_ti.c
@@ -269,6 +269,7 @@ static void aesti_encrypt(struct crypto_tfm *tfm, u8 *out,
const u8 *in)
const u32 *rkp = ctx->key_enc + 4;
int rounds = 6 + ctx->key_length / 4;
u32 st0[4], st1[4];
+ unsigned long flags;
int round;
st0[0] = ctx->key_enc[0] ^ get_unaligned_le32(in);
@@ -276,6 +277,12 @@ static void aesti_encrypt(struct crypto_tfm *tfm, u8 *out,
const u8 *in)
st0[2] = ctx->key_enc[2] ^ get_unaligned_le32(in + 8);
st0[3] = ctx->key_enc[3] ^ get_unaligned_le32(in + 12);
+ /*
+* Temporarily disable interrupts to avoid races where cachelines are
+* evicted when the CPU is interrupted to do something else.
+*/
+ local_irq_save(flags);
+
st0[0] ^= __aesti_sbox[ 0] ^ __aesti_sbox[128];
st0[1] ^= __aesti_sbox[32] ^ __aesti_sbox[160];
st0[2] ^= __aesti_sbox[64] ^ __aesti_sbox[192];
@@ -300,6 +307,8 @@ static void aesti_encrypt(struct crypto_tfm *tfm, u8 *out,
const u8 *in)
put_unaligned_le32(subshift(st1, 1) ^ rkp[5], out + 4);
put_unaligned_le32(subshift(st1, 2) ^ rkp[6], out + 8);
put_unaligned_le32(subshift(st1, 3) ^ rkp[7], out + 12);
+
+ local_irq_restore(flags);
}
static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
@@ -308,6 +317,7 @@ static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out,
const u8 *in)
const u32 *rkp = ctx->key_dec + 4;
int rounds = 6 + ctx->key_length / 4;
u32 st0[4], st1[4];
+ unsigned long flags;
int round;
st0[0] = ctx->key_dec[0] ^ get_unaligned_le32(in);
@@ -315,6 +325,12 @@ static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out,
const u8 *in)
st0[2] = ctx->key_dec[2] ^ get_unaligned_le32(in + 8);
st0[3] = ctx->key_dec[3] ^ get_unaligned_le32(in + 12);
+ /*
+* Temporarily disable interrupts to avoid races where cachelines are
+* evicted when the CPU is interrupted to do something else.
+*/
+ local_irq_save(flags);
+
st0[0] ^= __aesti_inv_sbox[ 0] ^ __aesti_inv_sbox[128];
st0[1] ^= __aesti_inv_sbox[32] ^ __aesti_inv_sbox[160];
st0[2] ^= __aesti_inv_sbox[64] ^ __aesti_inv_sbox[192];
@@ -339,6 +355,8 @@ static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out,
const u8 *in)
put_unaligned_le32(inv_subshift(st1, 1) ^ rkp[5], out + 4);
put_unaligned_le32(inv_subshift(st1, 2) ^ rkp[6], out + 8);
put_unaligned_le32(inv_subshift(st1, 3) ^ rkp[7], out + 12);
+
+ local_irq_restore(flags);
}
static struct crypto_alg aes_alg = {
--
2.19.1
[PATCH AUTOSEL 4.20 042/304] staging:iio:ad2s90: Make probe handle spi_setup failure
From: Matheus Tavares
[ Upstream commit b3a3eafeef769c6982e15f83631dcbf8d1794efb ]
Previously, ad2s90_probe ignored the return code from spi_setup, not
handling its possible failure. This patch makes ad2s90_probe check if
the code is an error code and, if so, do the following:
- Call dev_err with an appropriate error message.
- Return the spi_setup's error code.
Note: The 'return ret' statement could be out of the 'if' block, but
this whole block will be moved up in the function in the patch:
'staging:iio:ad2s90: Move device registration to the end of probe'.
Signed-off-by: Matheus Tavares
Signed-off-by: Jonathan Cameron
Signed-off-by: Sasha Levin
---
drivers/staging/iio/resolver/ad2s90.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/iio/resolver/ad2s90.c
b/drivers/staging/iio/resolver/ad2s90.c
index 59586947a936..51cda9151412 100644
--- a/drivers/staging/iio/resolver/ad2s90.c
+++ b/drivers/staging/iio/resolver/ad2s90.c
@@ -85,7 +85,12 @@ static int ad2s90_probe(struct spi_device *spi)
/* need 600ns between CS and the first falling edge of SCLK */
spi->max_speed_hz = 83;
spi->mode = SPI_MODE_3;
- spi_setup(spi);
+ ret = spi_setup(spi);
+
+ if (ret < 0) {
+ dev_err(>dev, "spi_setup failed!\n");
+ return ret;
+ }
return 0;
}
--
2.19.1
[PATCH AUTOSEL 4.20 043/304] fpga: altera-cvp: Fix registration for CvP incapable devices
From: Andreas Puhm
[ Upstream commit 68f60538daa4bc3da5d0764d46f391916fba20fd ]
The probe function needs to verify the CvP enable bit in order to
properly determine if FPGA Manager functionality can be safely
enabled.
Fixes: 34d1dc17ce97 ("fpga manager: Add Altera CvP driver")
Signed-off-by: Andreas Puhm
Signed-off-by: Anatolij Gustschin
Reviewed-by: Moritz Fischer
Acked-by: Alan Tull
Signed-off-by: Greg Kroah-Hartman
Signed-off-by: Sasha Levin
---
drivers/fpga/altera-cvp.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c
index d9fa7d4bf11f..36d79b039c57 100644
--- a/drivers/fpga/altera-cvp.c
+++ b/drivers/fpga/altera-cvp.c
@@ -403,6 +403,7 @@ static int altera_cvp_probe(struct pci_dev *pdev,
struct altera_cvp_conf *conf;
struct fpga_manager *mgr;
u16 cmd, val;
+ u32 regval;
int ret;
/*
@@ -416,6 +417,14 @@ static int altera_cvp_probe(struct pci_dev *pdev,
return -ENODEV;
}
+ pci_read_config_dword(pdev, VSE_CVP_STATUS, );
+ if (!(regval & VSE_CVP_STATUS_CVP_EN)) {
+ dev_err(>dev,
+ "CVP is disabled for this device: CVP_STATUS Reg
0x%x\n",
+ regval);
+ return -ENODEV;
+ }
+
conf = devm_kzalloc(>dev, sizeof(*conf), GFP_KERNEL);
if (!conf)
return -ENOMEM;
--
2.19.1
[PATCH AUTOSEL 4.20 038/304] dpaa2-ptp: defer probe when portal allocation failed
From: Ioana Ciornei
[ Upstream commit 5500598abbfb5b46201b9768bd9ea873a5eeaece ]
The fsl_mc_portal_allocate can fail when the requested MC portals are
not yet probed by the fsl_mc_allocator. In this situation, the driver
should defer the probe.
Signed-off-by: Ioana Ciornei
Signed-off-by: David S. Miller
Signed-off-by: Sasha Levin
---
drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c
b/drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c
index 84b942b1eccc..9b150db3b510 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c
@@ -140,7 +140,10 @@ static int dpaa2_ptp_probe(struct fsl_mc_device *mc_dev)
err = fsl_mc_portal_allocate(mc_dev, 0, _dev->mc_io);
if (err) {
- dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
+ if (err == -ENXIO)
+ err = -EPROBE_DEFER;
+ else
+ dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
goto err_exit;
}
--
2.19.1
[PATCH AUTOSEL 4.20 050/304] scsi: hisi_sas: change the time of SAS SSP connection
From: Xiang Chen [ Upstream commit 15bc43f31a074076f114e0b87931e3b220b7bff1 ] Currently the time of SAS SSP connection is 1ms, which means the link connection will fail if no IO response after this period. For some disks handling large IO (such as 512k), 1ms is not enough, so change it to 5ms. Signed-off-by: Xiang Chen Signed-off-by: John Garry Signed-off-by: Martin K. Petersen Signed-off-by: Sasha Levin --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index a369450a1fa7..c3e0be90e19f 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -494,7 +494,7 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba) hisi_sas_phy_write32(hisi_hba, i, PHYCTRL_OOB_RESTART_MSK, 0x1); hisi_sas_phy_write32(hisi_hba, i, STP_LINK_TIMER, 0x7f7a120); hisi_sas_phy_write32(hisi_hba, i, CON_CFG_DRIVER, 0x2a0a01); - + hisi_sas_phy_write32(hisi_hba, i, SAS_SSP_CON_TIMER_CFG, 0x32); /* used for 12G negotiate */ hisi_sas_phy_write32(hisi_hba, i, COARSETUNE_TIME, 0x1e); hisi_sas_phy_write32(hisi_hba, i, AIP_LIMIT, 0x2); -- 2.19.1
[PATCH AUTOSEL 4.20 041/304] iwlwifi: fw: do not set sgi bits for HE connection
From: Naftali Goldstein
[ Upstream commit 5c2dbebb446539eb9640bf59a02756d6e7f1fc53 ]
If the association supports HE, HT/VHT rates will never be used for Tx
and therefore there's no need to set the sgi-per-channel-width-support
bits, so don't set them in this case.
Fixes: 110b32f065f3 ("iwlwifi: mvm: rs: add basic implementation of the new RS
API handlers")
Signed-off-by: Naftali Goldstein
Signed-off-by: Luca Coelho
Signed-off-by: Sasha Levin
---
drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c
b/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c
index 7a98e1a1dc40..dabbc04853ac 100644
--- a/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c
+++ b/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c
@@ -98,8 +98,12 @@ static u8 rs_fw_sgi_cw_support(struct ieee80211_sta *sta)
{
struct ieee80211_sta_ht_cap *ht_cap = >ht_cap;
struct ieee80211_sta_vht_cap *vht_cap = >vht_cap;
+ struct ieee80211_sta_he_cap *he_cap = >he_cap;
u8 supp = 0;
+ if (he_cap && he_cap->has_he)
+ return 0;
+
if (ht_cap->cap & IEEE80211_HT_CAP_SGI_20)
supp |= BIT(IWL_TLC_MNG_CH_WIDTH_20MHZ);
if (ht_cap->cap & IEEE80211_HT_CAP_SGI_40)
--
2.19.1
[PATCH AUTOSEL 4.20 047/304] platform/chrome: don't report EC_MKBP_EVENT_SENSOR_FIFO as wakeup
From: Brian Norris
[ Upstream commit 6ad16b78a039b45294b1ad5d69c14ac57b2fe706 ]
EC_MKBP_EVENT_SENSOR_FIFO events can be triggered for a variety of
reasons, and there are very few cases in which they should be treated as
wakeup interrupts (particularly, when a certain
MOTIONSENSE_MODULE_FLAG_* is set, but this is not even supported in the
mainline cros_ec_sensor driver yet). Most of the time, they are benign
sensor readings. In any case, the top-level cros_ec device doesn't know
enough to determine that they should wake the system, and so it should
not report the event. This would be the job of the cros_ec_sensors
driver to parse.
This patch adds checks to cros_ec_get_next_event() such that it doesn't
signal 'wakeup' for events of type EC_MKBP_EVENT_SENSOR_FIFO.
This patch is particularly relevant on devices like Scarlet (Rockchip
RK3399 tablet, known as Acer Chromebook Tab 10), where the EC firmware
reports sensor events much more frequently. This was causing
/sys/power/wakeup_count to increase very frequently, often needlessly
interrupting our ability to suspend the system.
Signed-off-by: Brian Norris
Signed-off-by: Benson Leung
Signed-off-by: Sasha Levin
---
drivers/platform/chrome/cros_ec_proto.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_proto.c
b/drivers/platform/chrome/cros_ec_proto.c
index b6fd4838f60f..e5d5b1adb5a9 100644
--- a/drivers/platform/chrome/cros_ec_proto.c
+++ b/drivers/platform/chrome/cros_ec_proto.c
@@ -575,6 +575,7 @@ static int get_keyboard_state_event(struct cros_ec_device
*ec_dev)
int cros_ec_get_next_event(struct cros_ec_device *ec_dev, bool *wake_event)
{
+ u8 event_type;
u32 host_event;
int ret;
@@ -594,11 +595,22 @@ int cros_ec_get_next_event(struct cros_ec_device *ec_dev,
bool *wake_event)
return ret;
if (wake_event) {
+ event_type = ec_dev->event_data.event_type;
host_event = cros_ec_get_host_event(ec_dev);
- /* Consider non-host_event as wake event */
- *wake_event = !host_event ||
- !!(host_event & ec_dev->host_event_wake_mask);
+ /*
+* Sensor events need to be parsed by the sensor sub-device.
+* Defer them, and don't report the wakeup here.
+*/
+ if (event_type == EC_MKBP_EVENT_SENSOR_FIFO)
+ *wake_event = false;
+ /* Masked host-events should not count as wake events. */
+ else if (host_event &&
+!(host_event & ec_dev->host_event_wake_mask))
+ *wake_event = false;
+ /* Consider all other events as wake events. */
+ else
+ *wake_event = true;
}
return ret;
--
2.19.1
[PATCH AUTOSEL 4.20 044/304] Tools: hv: kvp: Fix a warning of buffer overflow with gcc 8.0.1
From: Dexuan Cui
[ Upstream commit 4fcba7802c3e15a6e56e255871d6c72f829b9dd8 ]
The patch fixes:
hv_kvp_daemon.c: In function 'kvp_set_ip_info':
hv_kvp_daemon.c:1305:2: note: 'snprintf' output between 41 and 4136 bytes
into a destination of size 4096
The "(unsigned int)str_len" is to avoid:
hv_kvp_daemon.c:1309:30: warning: comparison of integer expressions of
different signedness: 'int' and 'long unsigned int' [-Wsign-compare]
Signed-off-by: Dexuan Cui
Cc: K. Y. Srinivasan
Cc: Haiyang Zhang
Cc: Stephen Hemminger
Signed-off-by: K. Y. Srinivasan
Signed-off-by: Greg Kroah-Hartman
Signed-off-by: Sasha Levin
---
tools/hv/hv_kvp_daemon.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/tools/hv/hv_kvp_daemon.c b/tools/hv/hv_kvp_daemon.c
index bbb2a8ef367c..d7e06fe0270e 100644
--- a/tools/hv/hv_kvp_daemon.c
+++ b/tools/hv/hv_kvp_daemon.c
@@ -1178,6 +1178,7 @@ static int kvp_set_ip_info(char *if_name, struct
hv_kvp_ipaddr_value *new_val)
FILE *file;
char cmd[PATH_MAX];
char *mac_addr;
+ int str_len;
/*
* Set the configuration for the specified interface with
@@ -1301,8 +1302,18 @@ static int kvp_set_ip_info(char *if_name, struct
hv_kvp_ipaddr_value *new_val)
* invoke the external script to do its magic.
*/
- snprintf(cmd, sizeof(cmd), KVP_SCRIPTS_PATH "%s %s",
-"hv_set_ifconfig", if_file);
+ str_len = snprintf(cmd, sizeof(cmd), KVP_SCRIPTS_PATH "%s %s",
+ "hv_set_ifconfig", if_file);
+ /*
+* This is a little overcautious, but it's necessary to suppress some
+* false warnings from gcc 8.0.1.
+*/
+ if (str_len <= 0 || (unsigned int)str_len >= sizeof(cmd)) {
+ syslog(LOG_ERR, "Cmd '%s' (len=%d) may be too long",
+ cmd, str_len);
+ return HV_E_FAIL;
+ }
+
if (system(cmd)) {
syslog(LOG_ERR, "Failed to execute cmd '%s'; error: %d %s",
cmd, errno, strerror(errno));
--
2.19.1
Re: [PATCH 2/2] mm: Consider subtrees in memory.events
Hello, Michal. On Mon, Jan 28, 2019 at 06:05:26PM +0100, Michal Hocko wrote: > Yeah, that is quite clear. But it also assumes that the hierarchy is > pretty stable but cgroups might go away at any time. I am not saying > that the aggregated events are not useful I am just saying that it is > quite non-trivial to use and catch all potential corner cases. Maybe I It really isn't complicated and doesn't require stable subtree. > am overcomplicating it but one thing is quite clear to me. The existing > semantic is really useful to watch for the reclaim behavior at the > current level of the tree. You really do not have to care what is > happening in the subtree when it is clear that the workload itself > is underprovisioned etc. Considering that such a semantic already > existis, somebody might depend on it and we likely want also aggregated > semantic then I really do not see why to risk regressions rather than > add a new memory.hierarchy_events and have both. The problem then is that most other things are hierarchical including some fields in .events files, so if we try to add local stats and events, there's no good way to add them. Thanks. -- tejun
[PATCH AUTOSEL 4.20 046/304] vbox: fix link error with 'gcc -Og'
From: Arnd Bergmann [ Upstream commit b8ae30a7020d61e0504529adf45abb08fa5c59f5 ] With the new CONFIG_CC_OPTIMIZE_FOR_DEBUGGING option, we get a link error in the vboxguest driver, when that fails to optimize out the call to the compat handler: drivers/virt/vboxguest/vboxguest_core.o: In function `vbg_ioctl_hgcm_call': vboxguest_core.c:(.text+0x1f6e): undefined reference to `vbg_hgcm_call32' Another compile-time check documents better what we want and avoids the error. Acked-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Arnd Bergmann Reviewed-by: Hans de Goede Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- drivers/virt/vboxguest/vboxguest_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/virt/vboxguest/vboxguest_core.c b/drivers/virt/vboxguest/vboxguest_core.c index 3093655c7b92..1475ed5ffcde 100644 --- a/drivers/virt/vboxguest/vboxguest_core.c +++ b/drivers/virt/vboxguest/vboxguest_core.c @@ -1312,7 +1312,7 @@ static int vbg_ioctl_hgcm_call(struct vbg_dev *gdev, return -EINVAL; } - if (f32bit) + if (IS_ENABLED(CONFIG_COMPAT) && f32bit) ret = vbg_hgcm_call32(gdev, client_id, call->function, call->timeout_ms, VBG_IOCTL_HGCM_CALL_PARMS32(call), -- 2.19.1
[PATCH AUTOSEL 4.20 048/304] i40e: suppress bogus error message
From: Mitch Williams
[ Upstream commit 7cd8eb0861981ad212ce4242a1870c4b5831ceff ]
The i40e driver complains about unprivileged VFs trying to configure
promiscuous mode each time a VF reset occurs. This isn't the fault of
the poor VF driver - the PF driver itself is making the request.
To fix this, skip the privilege check if the request is to disable all
promiscuous activity. This gets rid of the bogus message, but doesn't
affect privilege checks, since we really only care if the unprivileged
VF is trying to enable promiscuous mode.
Signed-off-by: Mitch Williams
Tested-by: Andrew Bowers
Signed-off-by: Jeff Kirsher
Signed-off-by: Sasha Levin
---
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
index ac5698ed0b11..c41e8ada23d1 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
@@ -1112,7 +1112,8 @@ static i40e_status i40e_config_vf_promiscuous_mode(struct
i40e_vf *vf,
if (!i40e_vc_isvalid_vsi_id(vf, vsi_id) || !vsi)
return I40E_ERR_PARAM;
- if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, >vf_caps)) {
+ if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, >vf_caps) &&
+ (allmulti || alluni)) {
dev_err(>pdev->dev,
"Unprivileged VF %d is attempting to configure
promiscuous mode\n",
vf->vf_id);
--
2.19.1
[PATCH AUTOSEL 4.20 049/304] i40e: prevent overlapping tx_timeout recover
From: Alan Brady
[ Upstream commit d5585b7b6846a6d0f9517afe57be3843150719da ]
If a TX hang occurs, we attempt to recover by incrementally resetting.
If we're starved for CPU time, it's possible the reset doesn't actually
complete (or even fire) before another tx_timeout fires causing us to
fly through the different resets without actually doing them.
This adds a bit to set and check if a timeout recovery is already
pending and, if so, bail out of tx_timeout. The bit will get cleared at
the end of i40e_rebuild when reset is complete.
Signed-off-by: Alan Brady
Tested-by: Andrew Bowers
Signed-off-by: Jeff Kirsher
Signed-off-by: Sasha Levin
---
drivers/net/ethernet/intel/i40e/i40e.h | 1 +
drivers/net/ethernet/intel/i40e/i40e_main.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/intel/i40e/i40e.h
b/drivers/net/ethernet/intel/i40e/i40e.h
index 876cac317e79..8245ff12fd64 100644
--- a/drivers/net/ethernet/intel/i40e/i40e.h
+++ b/drivers/net/ethernet/intel/i40e/i40e.h
@@ -122,6 +122,7 @@ enum i40e_state_t {
__I40E_MDD_EVENT_PENDING,
__I40E_VFLR_EVENT_PENDING,
__I40E_RESET_RECOVERY_PENDING,
+ __I40E_TIMEOUT_RECOVERY_PENDING,
__I40E_MISC_IRQ_REQUESTED,
__I40E_RESET_INTR_RECEIVED,
__I40E_REINIT_REQUESTED,
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c
b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 0e5dc74b4ef2..419cf3faada6 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -338,6 +338,10 @@ static void i40e_tx_timeout(struct net_device *netdev)
(pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
return; /* don't do any new action before the next timeout */
+ /* don't kick off another recovery if one is already pending */
+ if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
+ return;
+
if (tx_ring) {
head = i40e_get_head(tx_ring);
/* Read interrupt register */
@@ -9632,6 +9636,7 @@ end_core_reset:
clear_bit(__I40E_RESET_FAILED, pf->state);
clear_recovery:
clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
+ clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
}
/**
--
2.19.1
[PATCH AUTOSEL 4.20 051/304] staging: iio: ad7780: update voltage on read
From: Renato Lui Geh
[ Upstream commit 336650c785b62c3bea7c8cf6061c933a90241f67 ]
The ad7780 driver previously did not read the correct device output, as
it read an outdated value set at initialization. It now updates its
voltage on read.
Signed-off-by: Renato Lui Geh
Acked-by: Alexandru Ardelean
Signed-off-by: Jonathan Cameron
Signed-off-by: Sasha Levin
---
drivers/staging/iio/adc/ad7780.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/iio/adc/ad7780.c b/drivers/staging/iio/adc/ad7780.c
index b67412db0318..c7cb05cedbbc 100644
--- a/drivers/staging/iio/adc/ad7780.c
+++ b/drivers/staging/iio/adc/ad7780.c
@@ -87,12 +87,16 @@ static int ad7780_read_raw(struct iio_dev *indio_dev,
long m)
{
struct ad7780_state *st = iio_priv(indio_dev);
+ int voltage_uv;
switch (m) {
case IIO_CHAN_INFO_RAW:
return ad_sigma_delta_single_conversion(indio_dev, chan, val);
case IIO_CHAN_INFO_SCALE:
- *val = st->int_vref_mv * st->gain;
+ voltage_uv = regulator_get_voltage(st->reg);
+ if (voltage_uv < 0)
+ return voltage_uv;
+ *val = (voltage_uv / 1000) * st->gain;
*val2 = chan->scan_type.realbits - 1;
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_OFFSET:
--
2.19.1
[PATCH AUTOSEL 4.20 053/304] drm/rockchip: fix for mailbox read size
From: Damian Kos
[ Upstream commit fa68d4f8476bea4cdf441062b614b41bb85ef1da ]
Some of the functions (like cdn_dp_dpcd_read, cdn_dp_get_edid_block)
allow to read 64KiB, but the cdn_dp_mailbox_read_receive, that is
used by them, can read only up to 255 bytes at once. Normally, it's
not a big issue as DPCD or EDID reads won't (hopefully) exceed that
value.
The real issue here is the revocation list read during the HDCP
authentication process. (problematic use case:
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.4/drivers/gpu/drm/rockchip/cdn-dp-reg.c#1152)
The list can reach 127*5+4 bytes (num devs * 5 bytes per ID/Bksv +
4 bytes of an additional info).
In other words - CTSes with HDCP Repeater won't pass without this
fix. Oh, and the driver will most likely stop working (best case
scenario).
Signed-off-by: Damian Kos
Signed-off-by: Heiko Stuebner
Link:
https://patchwork.freedesktop.org/patch/msgid/1541518625-25984-1-git-send-email-d...@cadence.com
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/rockchip/cdn-dp-reg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
index 3105965fc260..5a485489a1e2 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c
@@ -147,7 +147,7 @@ static int cdn_dp_mailbox_validate_receive(struct
cdn_dp_device *dp,
}
static int cdn_dp_mailbox_read_receive(struct cdn_dp_device *dp,
- u8 *buff, u8 buff_size)
+ u8 *buff, u16 buff_size)
{
u32 i;
int ret;
--
2.19.1
Re: [PATCH v9 1/3] Bluetooth: hci_qca: use wait_until_sent() for power pulses
On Mon, Jan 28, 2019 at 07:19:56PM +0530, Balakrishna Godavarthi wrote:
> Hi Matthias,
>
> On 2019-01-25 06:44, Matthias Kaehlcke wrote:
> > On Thu, Jan 24, 2019 at 05:38:06PM +0530, Balakrishna Godavarthi wrote:
> > > wcn3990 requires a power pulse to turn ON/OFF along with
> > > regulators. Sometimes we are observing the power pulses are sent
> > > out with some time delay, due to queuing these commands. This is
> > > causing synchronization issues with chip, which intern delay the
> > > chip setup or may end up with communication issues.
> > >
> > > Signed-off-by: Balakrishna Godavarthi
> > > ---
> > > Changes in v9:
> > > * Reverted to 100us sleep.
> > > * used inline call msecs_to_jiffies()
> > >
> > > Changes in v8:
> > > * Updated 1 second timeout instead of indefinite wait.
> > >
> > > Changes in v7:
> > > * updated the wait time to 5 ms after sending power pulses.
> > >
> > > Changes in v6:
> > > * added serdev_device_write_flush() in qca_send_power_pulse
> > >instead during the power off pulse.
> > >
> > > Changes in v5:
> > > * added serdev_device_write_flush() in qca_power_off().
> > > ---
> > > drivers/bluetooth/hci_qca.c | 40
> > > +++--
> > > 1 file changed, 16 insertions(+), 24 deletions(-)
> > >
> > > diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
> > > index f036c8f98ea3..c08f4d105e73 100644
> > > --- a/drivers/bluetooth/hci_qca.c
> > > +++ b/drivers/bluetooth/hci_qca.c
> > > @@ -60,6 +60,7 @@
> > > #define IBS_WAKE_RETRANS_TIMEOUT_MS 100
> > > #define IBS_TX_IDLE_TIMEOUT_MS 2000
> > > #define BAUDRATE_SETTLE_TIMEOUT_MS 300
> > > +#define POWER_PULSE_TRANS_TIMEOUT_MS 1000
> >
> > I still doubt that this mega-timeout of 1s is needed, but it shouldn't
> > do any harm either, so whatever ...
> >
>
> [Bala]: for now let us have it. we can improve it in the improvement patch
> based on the results.
Fine.
With the UART buffer flushed and flow control disabled I wonder though
what makes you think that it could take longer than a few milliseconds
for the byte being put on the wire, short of a bug in the UART driver
or hardware, which (if it existed) shouldn't be worked around here.
> > > /* susclk rate */
> > > #define SUSCLK_RATE_32KHZ32768
> > > @@ -1013,11 +1014,10 @@ static inline void host_set_baudrate(struct
> > > hci_uart *hu, unsigned int speed)
> > > hci_uart_set_baudrate(hu, speed);
> > > }
> > >
> > > -static int qca_send_power_pulse(struct hci_dev *hdev, u8 cmd)
> > > +static int qca_send_power_pulse(struct hci_uart *hu, u8 cmd)
> > > {
> > > - struct hci_uart *hu = hci_get_drvdata(hdev);
> > > - struct qca_data *qca = hu->priv;
> > > - struct sk_buff *skb;
> > > + int ret;
> > > + int timeout = msecs_to_jiffies(POWER_PULSE_TRANS_TIMEOUT_MS);
> > >
> > > /* These power pulses are single byte command which are sent
> > >* at required baudrate to wcn3990. On wcn3990, we have an external
> > > @@ -1029,21 +1029,19 @@ static int qca_send_power_pulse(struct
> > > hci_dev *hdev, u8 cmd)
> > >* save power. Disabling hardware flow control is mandatory while
> > >* sending power pulses to SoC.
> > >*/
> > > - bt_dev_dbg(hdev, "sending power pulse %02x to SoC", cmd);
> > > -
> > > - skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
> > > - if (!skb)
> > > - return -ENOMEM;
> > > + bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
> > >
> > > + serdev_device_write_flush(hu->serdev);
> > > hci_uart_set_flow_control(hu, true);
> > > + ret = serdev_device_write_buf(hu->serdev, , sizeof(cmd));
> > > + if (ret < 0) {
> > > + bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
> > > + return ret;
> > > + }
> > >
> > > - skb_put_u8(skb, cmd);
> > > - hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
> > > -
> > > - skb_queue_tail(>txq, skb);
> > > - hci_uart_tx_wakeup(hu);
> > > + serdev_device_wait_until_sent(hu->serdev, timeout);
> > >
> > > - /* Wait for 100 uS for SoC to settle down */
> > > + /* Wait for 100 uS for SoC to settle down for the received byte. */
> >
> > I don't think 'for the received byte' adds much value here. If you
> > respin anyway I'd suggest to leave the comment as is.
> >
>
> [Bala]: will update.
>
> > > usleep_range(100, 200);
> > > hci_uart_set_flow_control(hu, false);
> > >
> > > @@ -1116,7 +1114,6 @@ static int qca_set_speed(struct hci_uart *hu,
> > > enum qca_speed_type speed_type)
> > >
> > > static int qca_wcn3990_init(struct hci_uart *hu)
> > > {
> > > - struct hci_dev *hdev = hu->hdev;
> > > struct qca_serdev *qcadev;
> > > int ret;
> > >
> > > @@ -1139,12 +1136,12 @@ static int qca_wcn3990_init(struct hci_uart
> > > *hu)
> > >
> > > /* Forcefully enable wcn3990 to enter in to boot mode. */
> > > host_set_baudrate(hu, 2400);
> > > - ret = qca_send_power_pulse(hdev, QCA_WCN3990_POWEROFF_PULSE);
> > > + ret = qca_send_power_pulse(hu,
[PATCH AUTOSEL 4.20 057/304] bpf: libbpf: retry map creation without the name
From: Stanislav Fomichev
[ Upstream commit 23499442c319412aa8e54e7a939e2eb531bdd77d ]
Since commit 88cda1c9da02 ("bpf: libbpf: Provide basic API support
to specify BPF obj name"), libbpf unconditionally sets bpf_attr->name
for maps. Pre v4.14 kernels don't know about map names and return an
error about unexpected non-zero data. Retry sys_bpf without a map
name to cover older kernels.
v2 changes:
* check for errno == EINVAL as suggested by Daniel Borkmann
Signed-off-by: Stanislav Fomichev
Signed-off-by: Daniel Borkmann
Signed-off-by: Sasha Levin
---
tools/lib/bpf/bpf.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/tools/lib/bpf/bpf.c b/tools/lib/bpf/bpf.c
index 03f9bcc4ef50..961e1b9fc592 100644
--- a/tools/lib/bpf/bpf.c
+++ b/tools/lib/bpf/bpf.c
@@ -69,6 +69,7 @@ int bpf_create_map_xattr(const struct bpf_create_map_attr
*create_attr)
{
__u32 name_len = create_attr->name ? strlen(create_attr->name) : 0;
union bpf_attr attr;
+ int ret;
memset(, '\0', sizeof(attr));
@@ -86,7 +87,15 @@ int bpf_create_map_xattr(const struct bpf_create_map_attr
*create_attr)
attr.map_ifindex = create_attr->map_ifindex;
attr.inner_map_fd = create_attr->inner_map_fd;
- return sys_bpf(BPF_MAP_CREATE, , sizeof(attr));
+ ret = sys_bpf(BPF_MAP_CREATE, , sizeof(attr));
+ if (ret < 0 && errno == EINVAL && create_attr->name) {
+ /* Retry the same syscall, but without the name.
+* Pre v4.14 kernels don't support map names.
+*/
+ memset(attr.map_name, 0, sizeof(attr.map_name));
+ return sys_bpf(BPF_MAP_CREATE, , sizeof(attr));
+ }
+ return ret;
}
int bpf_create_map_node(enum bpf_map_type map_type, const char *name,
--
2.19.1
[PATCH AUTOSEL 4.20 065/304] media: mtk-vcodec: Release device nodes in mtk_vcodec_init_enc_pm()
From: Alexey Khoroshilov
[ Upstream commit 8ea0f2ba0fa3f91ea1b8d823a54b042026ada6b3 ]
of_parse_phandle() returns the device node with refcount incremented.
There are two nodes that are used temporary in mtk_vcodec_init_enc_pm(),
but their refcounts are not decremented.
The patch adds one of_node_put() and fixes returning error codes.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Alexey Khoroshilov
Signed-off-by: Hans Verkuil
Signed-off-by: Mauro Carvalho Chehab
Signed-off-by: Sasha Levin
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c
b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c
index 3e73e9db781f..7c025045ea90 100644
--- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c
+++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c
@@ -41,25 +41,27 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev)
node = of_parse_phandle(dev->of_node, "mediatek,larb", 0);
if (!node) {
mtk_v4l2_err("no mediatek,larb found");
- return -1;
+ return -ENODEV;
}
pdev = of_find_device_by_node(node);
+ of_node_put(node);
if (!pdev) {
mtk_v4l2_err("no mediatek,larb device found");
- return -1;
+ return -ENODEV;
}
pm->larbvenc = >dev;
node = of_parse_phandle(dev->of_node, "mediatek,larb", 1);
if (!node) {
mtk_v4l2_err("no mediatek,larb found");
- return -1;
+ return -ENODEV;
}
pdev = of_find_device_by_node(node);
+ of_node_put(node);
if (!pdev) {
mtk_v4l2_err("no mediatek,larb device found");
- return -1;
+ return -ENODEV;
}
pm->larbvenclt = >dev;
--
2.19.1
Re: [PATCH 04/13] dt-bindings: mailbox: qcom: Add clock-name optional property
On 1/28/19 17:57, Jorge Ramirez wrote:
> On 1/17/19 07:44, Bjorn Andersson wrote:
>> On Mon 17 Dec 01:46 PST 2018, Jorge Ramirez-Ortiz wrote:
>>
>>> When the APCS clock is registered (platform dependent), it retrieves
>>> its parent names from hardcoded values in the driver.
>>>
>>> The following commit allows the DT node to provide such clock names to
>>> the platform data based clock driver therefore avoiding having to
>>> explicitly embed those names in the clock driver source code.
>>>
>>> Co-developed-by: Niklas Cassel
>>> Signed-off-by: Niklas Cassel
>>> Signed-off-by: Jorge Ramirez-Ortiz
>>> ---
>>> .../bindings/mailbox/qcom,apcs-kpss-global.txt | 21
>>> +
>>> 1 file changed, 21 insertions(+)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
>>> b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
>>> index 1232fc9..f252439 100644
>>> --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
>>> +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
>>> @@ -23,6 +23,10 @@ platforms.
>>> Value type:
>>> Definition: phandle to the input PLL, which feeds the APCS mux/divider
>>>
>>> + Usage: required if #clock-names property is present
>>> + Value type:
>>> + Definition: phandles to the two parent clocks of the clock driver.
>>
>> I presume you meant to replace the existing definition of "clocks"?
>
> I am sorry didn't reply to this earlier. Yes this is not very clear.
>
> This is required as an extension to the apcs-msm8916.c driver also used
> on the qcs404; since it is an extension, the previous definition should
> still be applicable.
>
> In the case of the msm8916 the #clock-names property is NOT necessary
> (it would be ignored by the driver), so having it should not mean that
> we need to have #clocks.
>
> In the case of the qcs404, having clock-names means that we do need to
> have #clocks (hence the additional if)
>
> and not quite sure how to word this condition in the bindings..
>
> I am going to post v2 with some updates and if required will post a v3
> with more clarifications.
In the version that I am about to post I ended up following your
suggestion: replaced the existing definition (and the apcs mailbox node
msm8916.dts) but kept bacwards compatibility in the driver (so old
bindings will still work).
That should enable migration to the new bindings -as per the
documentation - for new platforms (something that IIRC sboyd also asked for)
>
>>
>> I think the purpose of "required if #clock-cells" comes from that
>> meaning that it represents a clock-controller if #clock-cells is
>> specified, in which case it requires the upstream clock(s).
>>
>> Regards,
>> Bjorn
>>
>>> +
>>> - #mbox-cells:
>>> Usage: required
>>> Value type:
>>> @@ -33,6 +37,12 @@ platforms.
>>> Value type:
>>> Definition: as described in clock.txt, must be 0
>>>
>>> +- clock-names:
>>> + Usage: required if the platform data based clock driver needs to
>>> + retrieve the parent clock names from device tree.
>>> + This will requires two mandatory clocks to be defined.
>>> + Value type:
>>> + Definition: must be "aux" and "pll"
>>>
>>> = EXAMPLE
>>> The following example describes the APCS HMSS found in MSM8996 and part of
>>> the
>>> @@ -65,3 +75,14 @@ Below is another example of the APCS binding on MSM8916
>>> platforms:
>>> clocks = <>;
>>> #clock-cells = <0>;
>>> };
>>> +
>>> +Below is another example of the APCS binding on QCS404 platforms:
>>> +
>>> + apcs_glb: mailbox@b011000 {
>>> + compatible = "qcom,qcs404-apcs-apps-global", "syscon";
>>> + reg = <0x0b011000 0x1000>;
>>> + #mbox-cells = <1>;
>>> + clocks = < GCC_GPLL0_AO_OUT_MAIN>, <_hfpll>;
>>> + clock-names = "aux", "pll";
>>> + #clock-cells = <0>;
>>> + };
>>> --
>>> 2.7.4
>>>
>>
>
[PATCH AUTOSEL 4.20 063/304] media: rc: ensure close() is called on rc_unregister_device
From: Sean Young [ Upstream commit 8e782fcf78275f505194e767c515202d4fd274bc ] If userspace has an open file descriptor on the rc input device or lirc device when rc_unregister_device() is called, then the rc close() is never called. This ensures that the receiver is turned off on the nuvoton-cir driver during shutdown. Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Sasha Levin --- drivers/media/rc/rc-main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c index 877978dbd409..66a174979b3c 100644 --- a/drivers/media/rc/rc-main.c +++ b/drivers/media/rc/rc-main.c @@ -1952,6 +1952,8 @@ void rc_unregister_device(struct rc_dev *dev) rc_free_rx_device(dev); mutex_lock(>lock); + if (dev->users && dev->close) + dev->close(dev); dev->registered = false; mutex_unlock(>lock); -- 2.19.1
[PATCH AUTOSEL 4.20 064/304] media: video-i2c: avoid accessing released memory area when removing driver
From: Akinobu Mita
[ Upstream commit c764da98a600a4b068d25c77164f092f159cecec ]
The video device release() callback for video-i2c driver frees the whole
struct video_i2c_data. If there is no user left for the video device
when video_unregister_device() is called, the release callback is executed.
However, in video_i2c_remove() some fields (v4l2_dev, lock, and queue_lock)
in struct video_i2c_data are still accessed after video_unregister_device()
is called.
This fixes the use after free by moving the code from video_i2c_remove()
to the release() callback.
Fixes: 5cebaac60974 ("media: video-i2c: add video-i2c driver")
Reviewed-by: Matt Ranostay
Signed-off-by: Akinobu Mita
Acked-by: Sakari Ailus
Signed-off-by: Hans Verkuil
Signed-off-by: Mauro Carvalho Chehab
Signed-off-by: Sasha Levin
---
drivers/media/i2c/video-i2c.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/media/i2c/video-i2c.c b/drivers/media/i2c/video-i2c.c
index 4d49af86c15e..ec0758dca2fc 100644
--- a/drivers/media/i2c/video-i2c.c
+++ b/drivers/media/i2c/video-i2c.c
@@ -510,7 +510,12 @@ static const struct v4l2_ioctl_ops video_i2c_ioctl_ops = {
static void video_i2c_release(struct video_device *vdev)
{
- kfree(video_get_drvdata(vdev));
+ struct video_i2c_data *data = video_get_drvdata(vdev);
+
+ v4l2_device_unregister(>v4l2_dev);
+ mutex_destroy(>lock);
+ mutex_destroy(>queue_lock);
+ kfree(data);
}
static int video_i2c_probe(struct i2c_client *client,
@@ -608,10 +613,6 @@ static int video_i2c_remove(struct i2c_client *client)
struct video_i2c_data *data = i2c_get_clientdata(client);
video_unregister_device(>vdev);
- v4l2_device_unregister(>v4l2_dev);
-
- mutex_destroy(>lock);
- mutex_destroy(>queue_lock);
return 0;
}
--
2.19.1
[PATCH AUTOSEL 4.20 075/304] clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL
From: Martin Blumenstingl
[ Upstream commit 0dad1ec65bc30a549aba38d34a727309bbf41bc8 ]
We don't want the common clock framework to disable the "cpu_clk" if
it's not used by any device. The cpufreq-dt driver does not enable the
CPU clocks. However, even if it would we would still want the CPU clock
to be enabled at all times because the CPU clock is also required even
if we disable CPU frequency scaling on a specific board.
The reason why we want the CPU clock to be enabled is a clock further up
in the tree:
Since commit 6f888e7bc7bd58 ("clk: meson: clk-pll: add enable bit") the
sys_pll can be disabled. However, since the CPU clock is derived from
sys_pll we don't want sys_pll to get disabled. The common clock
framework takes care of that for us by enabling all parent clocks of our
CPU clock when we mark the CPU clock with CLK_IS_CRITICAL.
Until now this is not a problem yet because all clocks in the CPU
clock's tree (including sys_pll) are read-only. However, once we allow
modifications to the clocks in that tree we will need this.
Signed-off-by: Martin Blumenstingl
Acked-by: Jerome Brunet
Signed-off-by: Neil Armstrong
Link:
https://lkml.kernel.org/r/20181115224048.13511-4-martin.blumensti...@googlemail.com
Signed-off-by: Sasha Levin
---
drivers/clk/meson/meson8b.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 9160a3b2e668..a3a826419c16 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -650,7 +650,8 @@ static struct clk_regmap meson8b_cpu_clk = {
"cpu_scale_out_sel" },
.num_parents = 2,
.flags = (CLK_SET_RATE_PARENT |
- CLK_SET_RATE_NO_REPARENT),
+ CLK_SET_RATE_NO_REPARENT |
+ CLK_IS_CRITICAL),
},
};
--
2.19.1
[PATCH AUTOSEL 4.20 074/304] clk: meson: meson8b: fix the width of the cpu_scale_div clock
From: Martin Blumenstingl
[ Upstream commit a8662eadd1032018f31e37deda811790b2326662 ]
According to the public S805 datasheet HHI_SYS_CPU_CLK_CNTL1[29:20] is
the register for the CPU scale_div clock. This matches the code in
Amlogic's 3.10 GPL kernel sources:
N = (aml_read_reg32(P_HHI_SYS_CPU_CLK_CNTL1) >> 20) & 0x3FF;
This means that the divider register is 10 bit wide instead of 9 bits.
So far this is not a problem since all u-boot versions I have seen are
not using the cpu_scale_div clock at all (instead they are configuring
the CPU clock to run off cpu_in_sel directly).
The fixes tag points to the latest rework of the CPU clocks. However,
even before the rework it was wrong. Commit 7a29a869434e8b ("clk: meson:
Add support for Meson clock controller") defines MESON_N_WIDTH as 9 (in
drivers/clk/meson/clk-cpu.c). But since the old clk-cpu implementation
this only carries the fixes tag for the CPU clock rewordk.
Fixes: 251b6fd38bcb9c ("clk: meson: rework meson8b cpu clock")
Signed-off-by: Martin Blumenstingl
Signed-off-by: Neil Armstrong
Link:
https://lkml.kernel.org/r/20180927085921.24627-3-martin.blumensti...@googlemail.com
Signed-off-by: Sasha Levin
---
drivers/clk/meson/meson8b.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 328fcf50d9e8..9160a3b2e668 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -599,7 +599,7 @@ static struct clk_regmap meson8b_cpu_scale_div = {
.data = &(struct clk_regmap_div_data){
.offset = HHI_SYS_CPU_CLK_CNTL1,
.shift = 20,
- .width = 9,
+ .width = 10,
.table = cpu_scale_table,
.flags = CLK_DIVIDER_ALLOW_ZERO,
},
--
2.19.1
[PATCH AUTOSEL 4.20 073/304] clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel
From: Martin Blumenstingl
[ Upstream commit a5ac1ead32c9aac285f6436e09b4f6111996e9b8 ]
The cpu_div3 clock (cpu_in divided by 3) generates a signal with a duty
cycle of 33%. The CPU clock however requires a clock signal with a duty
cycle of 50% to run stable.
cpu_div3 was observed to be problematic when cycling through all
available CPU frequencies (with additional patches on top of this one)
while running "stress --cpu 4" in the background. This caused sporadic
hangs where the whole system would fully lock up.
Amlogic's 3.10 kernel code also does not use the cpu_div3 clock either
when changing the CPU clock.
Signed-off-by: Martin Blumenstingl
Reviewed-by: Jerome Brunet
Signed-off-by: Neil Armstrong
Link:
https://lkml.kernel.org/r/20181115224048.13511-3-martin.blumensti...@googlemail.com
Signed-off-by: Sasha Levin
---
drivers/clk/meson/meson8b.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 1d39273d7a04..328fcf50d9e8 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -612,20 +612,27 @@ static struct clk_regmap meson8b_cpu_scale_div = {
},
};
+static u32 mux_table_cpu_scale_out_sel[] = { 0, 1, 3 };
static struct clk_regmap meson8b_cpu_scale_out_sel = {
.data = &(struct clk_regmap_mux_data){
.offset = HHI_SYS_CPU_CLK_CNTL0,
.mask = 0x3,
.shift = 2,
+ .table = mux_table_cpu_scale_out_sel,
},
.hw.init = &(struct clk_init_data){
.name = "cpu_scale_out_sel",
.ops = _regmap_mux_ro_ops,
+ /*
+* NOTE: We are skipping the parent with value 0x2 (which is
+* "cpu_div3") because it results in a duty cycle of 33% which
+* makes the system unstable and can result in a lockup of the
+* whole system.
+*/
.parent_names = (const char *[]) { "cpu_in_sel",
"cpu_div2",
- "cpu_div3",
"cpu_scale_div" },
- .num_parents = 4,
+ .num_parents = 3,
.flags = CLK_SET_RATE_PARENT,
},
};
--
2.19.1
[PATCH AUTOSEL 4.20 077/304] dmaengine: xilinx_dma: Remove __aligned attribute on zynqmp_dma_desc_ll
From: Nathan Chancellor
[ Upstream commit aeaebcc17cdf37065d2693865eeb1ff1c7dc5bf3 ]
Clang warns:
drivers/dma/xilinx/zynqmp_dma.c:166:4: warning: attribute 'aligned' is
ignored, place it after "struct" to apply attribute to type declaration
[-Wignored-attributes]
}; __aligned(64)
^
./include/linux/compiler_types.h:200:38: note: expanded from macro
'__aligned'
^
1 warning generated.
As Nick pointed out in the previous version of this patch, the author
likely intended for this struct to be 8-byte (64-bit) aligned, not
64-byte, which is the default. Remove the hanging __aligned attribute.
Fixes: b0cc417c1637 ("dmaengine: Add Xilinx zynqmp dma engine driver support")
Reported-by: Nick Desaulniers
Suggested-by: Nick Desaulniers
Signed-off-by: Nathan Chancellor
Reviewed-by: Nick Desaulniers
Signed-off-by: Vinod Koul
Signed-off-by: Sasha Levin
---
drivers/dma/xilinx/zynqmp_dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
index c74a88b65039..73de6a6179fc 100644
--- a/drivers/dma/xilinx/zynqmp_dma.c
+++ b/drivers/dma/xilinx/zynqmp_dma.c
@@ -163,7 +163,7 @@ struct zynqmp_dma_desc_ll {
u32 ctrl;
u64 nxtdscraddr;
u64 rsvd;
-}; __aligned(64)
+};
/**
* struct zynqmp_dma_desc_sw - Per Transaction structure
--
2.19.1
[PATCH AUTOSEL 4.20 080/304] iio: adc: meson-saradc: fix internal clock names
From: Martin Blumenstingl
[ Upstream commit 50314f98b0ac468218e7c9af8c99f215a35436df ]
Before this patch we are registering the internal clocks (for example on
Meson8b, where the SAR ADC IP block implements the divider and gate
clocks) with the following names:
- /soc/cbus@c110/adc@8680#adc_div
- /soc/cbus@c110/adc@8680#adc_en
This is bad because the common clock framework uses the clock to create
a directory in /clk. With such name, the directory creation
(silently) fails and the debugfs entry ends up being created at the
debugfs root.
With this change, the new clock names are:
- c1108680.adc#adc_div
- c1108680.adc#adc_en
This matches the clock naming scheme used in the PWM, Ethernet and MMC
drivers. It also fixes the problem with debugfs.
The idea is shamelessly taken from commit b96e9eb62841c5 ("pwm: meson:
Fix mux clock names").
Fixes: 3921db46a8c5bc ("iio: Convert to using %pOF instead of full_name")
Signed-off-by: Martin Blumenstingl
Signed-off-by: Jonathan Cameron
Signed-off-by: Sasha Levin
---
drivers/iio/adc/meson_saradc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
index 672a5dee4a9d..ba4b42429a2a 100644
--- a/drivers/iio/adc/meson_saradc.c
+++ b/drivers/iio/adc/meson_saradc.c
@@ -587,8 +587,8 @@ static int meson_sar_adc_clk_init(struct iio_dev *indio_dev,
struct clk_init_data init;
const char *clk_parents[1];
- init.name = devm_kasprintf(_dev->dev, GFP_KERNEL, "%pOF#adc_div",
- indio_dev->dev.of_node);
+ init.name = devm_kasprintf(_dev->dev, GFP_KERNEL, "%s#adc_div",
+ dev_name(indio_dev->dev.parent));
if (!init.name)
return -ENOMEM;
@@ -609,8 +609,8 @@ static int meson_sar_adc_clk_init(struct iio_dev *indio_dev,
if (WARN_ON(IS_ERR(priv->adc_div_clk)))
return PTR_ERR(priv->adc_div_clk);
- init.name = devm_kasprintf(_dev->dev, GFP_KERNEL, "%pOF#adc_en",
- indio_dev->dev.of_node);
+ init.name = devm_kasprintf(_dev->dev, GFP_KERNEL, "%s#adc_en",
+ dev_name(indio_dev->dev.parent));
if (!init.name)
return -ENOMEM;
--
2.19.1
[PATCH AUTOSEL 4.20 087/304] f2fs: avoid build warn of fall_through
From: Jaegeuk Kim [ Upstream commit f5d5510e7389fa264337fb524346bac9eb93adc8 ] After merging the f2fs tree, today's linux-next build (x86_64_allmodconfig) produced this warning: In file included from fs/f2fs/dir.c:11: fs/f2fs/f2fs.h: In function '__mark_inode_dirty_flag': fs/f2fs/f2fs.h:2388:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (set) ^ fs/f2fs/f2fs.h:2390:2: note: here case FI_DATA_EXIST: ^~~~ Exposed by my use of -Wimplicit-fallthrough Reported-by: Stephen Rothwell Signed-off-by: Jaegeuk Kim Signed-off-by: Sasha Levin --- fs/f2fs/f2fs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h index 1e031971a466..ebad864c031c 100644 --- a/fs/f2fs/f2fs.h +++ b/fs/f2fs/f2fs.h @@ -2370,6 +2370,7 @@ static inline void __mark_inode_dirty_flag(struct inode *inode, case FI_NEW_INODE: if (set) return; + /* fall through */ case FI_DATA_EXIST: case FI_INLINE_DOTS: case FI_PIN_FILE: -- 2.19.1
[PATCH AUTOSEL 4.20 085/304] f2fs: avoid GC causing encrypted file corrupted
From: Yunlong Song
[ Upstream commit 9bf1a3f73927492c8be127b642197125e9d52be8 ]
The encrypted file may be corrupted by GC in following case:
Time 1: | segment 1 blkaddr = A | GC -> | segment 2 blkaddr = B |
Encrypted block 1 is moved from blkaddr A of segment 1 to blkaddr B of
segment 2,
Time 2: | segment 1 blkaddr = B | GC -> | segment 3 blkaddr = C |
Before page 1 is written back and if segment 2 become a victim, then
page 1 is moved from blkaddr B of segment 2 to blkaddr Cof segment 3,
during the GC process of Time 2, f2fs should wait for page 1 written back
before reading it, or move_data_block will read a garbage block from
blkaddr B since page is not written back to blkaddr B yet.
Commit 6aa58d8a ("f2fs: readahead encrypted block during GC") introduce
ra_data_block to read encrypted block, but it forgets to add
f2fs_wait_on_page_writeback to avoid racing between GC and flush.
Signed-off-by: Yunlong Song
Reviewed-by: Chao Yu
Signed-off-by: Jaegeuk Kim
Signed-off-by: Sasha Levin
---
fs/f2fs/gc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/fs/f2fs/gc.c b/fs/f2fs/gc.c
index a07241fb8537..c96e7c6354ef 100644
--- a/fs/f2fs/gc.c
+++ b/fs/f2fs/gc.c
@@ -658,6 +658,14 @@ got_it:
fio.page = page;
fio.new_blkaddr = fio.old_blkaddr = dn.data_blkaddr;
+ /*
+* don't cache encrypted data into meta inode until previous dirty
+* data were writebacked to avoid racing between GC and flush.
+*/
+ f2fs_wait_on_page_writeback(page, DATA, true);
+
+ f2fs_wait_on_block_writeback(inode, dn.data_blkaddr);
+
fio.encrypted_page = f2fs_pagecache_get_page(META_MAPPING(sbi),
dn.data_blkaddr,
FGP_LOCK | FGP_CREAT, GFP_NOFS);
@@ -745,6 +753,8 @@ static int move_data_block(struct inode *inode, block_t
bidx,
*/
f2fs_wait_on_page_writeback(page, DATA, true);
+ f2fs_wait_on_block_writeback(inode, dn.data_blkaddr);
+
err = f2fs_get_node_info(fio.sbi, dn.nid, );
if (err)
goto put_out;
--
2.19.1
[PATCH AUTOSEL 4.20 089/304] f2fs: fix wrong return value of f2fs_acl_create
From: Tiezhu Yang
[ Upstream commit f6176473a0c7472380eef72ebeb330cf9485bf0a ]
When call f2fs_acl_create_masq() failed, the caller f2fs_acl_create()
should return -EIO instead of -ENOMEM, this patch makes it consistent
with posix_acl_create() which has been fixed in commit beaf226b863a
("posix_acl: don't ignore return value of posix_acl_create_masq()").
Fixes: 83dfe53c185e ("f2fs: fix reference leaks in f2fs_acl_create")
Signed-off-by: Tiezhu Yang
Reviewed-by: Chao Yu
Signed-off-by: Jaegeuk Kim
Signed-off-by: Sasha Levin
---
fs/f2fs/acl.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/fs/f2fs/acl.c b/fs/f2fs/acl.c
index fa707cdd4120..22f0d17cde43 100644
--- a/fs/f2fs/acl.c
+++ b/fs/f2fs/acl.c
@@ -352,12 +352,14 @@ static int f2fs_acl_create(struct inode *dir, umode_t
*mode,
return PTR_ERR(p);
clone = f2fs_acl_clone(p, GFP_NOFS);
- if (!clone)
- goto no_mem;
+ if (!clone) {
+ ret = -ENOMEM;
+ goto release_acl;
+ }
ret = f2fs_acl_create_masq(clone, mode);
if (ret < 0)
- goto no_mem_clone;
+ goto release_clone;
if (ret == 0)
posix_acl_release(clone);
@@ -371,11 +373,11 @@ static int f2fs_acl_create(struct inode *dir, umode_t
*mode,
return 0;
-no_mem_clone:
+release_clone:
posix_acl_release(clone);
-no_mem:
+release_acl:
posix_acl_release(p);
- return -ENOMEM;
+ return ret;
}
int f2fs_init_acl(struct inode *inode, struct inode *dir, struct page *ipage,
--
2.19.1
[PATCH AUTOSEL 4.20 091/304] arm64: io: Ensure calls to delay routines are ordered against prior readX()
From: Will Deacon
[ Upstream commit 6460d32014717686d3b7963595950ba2c6d1bb5e ]
A relatively standard idiom for ensuring that a pair of MMIO writes to a
device arrive at that device with a specified minimum delay between them
is as follows:
writel_relaxed(42, dev_base + CTL1);
readl(dev_base + CTL1);
udelay(10);
writel_relaxed(42, dev_base + CTL2);
the intention being that the read-back from the device will push the
prior write to CTL1, and the udelay will hold up the write to CTL1 until
at least 10us have elapsed.
Unfortunately, on arm64 where the underlying delay loop is implemented
as a read of the architected counter, the CPU does not guarantee
ordering from the readl() to the delay loop and therefore the delay loop
could in theory be speculated and not provide the desired interval
between the two writes.
Fix this in a similar manner to PowerPC by introducing a dummy control
dependency on the output of readX() which, combined with the ISB in the
read of the architected counter, guarantees that a subsequent delay loop
can not be executed until the readX() has returned its result.
Cc: Benjamin Herrenschmidt
Cc: Arnd Bergmann
Signed-off-by: Will Deacon
Signed-off-by: Sasha Levin
---
arch/arm64/include/asm/io.h | 31 +++
1 file changed, 23 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 9f8b915af3a7..d42d00d8d5b6 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -104,7 +104,22 @@ static inline u64 __raw_readq(const volatile void __iomem
*addr)
}
/* IO barriers */
-#define __iormb() rmb()
+#define __iormb(v) \
+({ \
+ unsigned long tmp; \
+ \
+ rmb(); \
+ \
+ /* \
+* Create a dummy control dependency from the IO read to any\
+* later instructions. This ensures that a subsequent call to \
+* udelay() will be ordered due to the ISB in get_cycles(). \
+*/ \
+ asm volatile("eor %0, %1, %1\n" \
+"cbnz %0, ." \
+: "=r" (tmp) : "r" (v) : "memory");\
+})
+
#define __iowmb() wmb()
#define mmiowb() do { } while (0)
@@ -129,10 +144,10 @@ static inline u64 __raw_readq(const volatile void __iomem
*addr)
* following Normal memory access. Writes are ordered relative to any prior
* Normal memory access.
*/
-#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v;
})
-#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v;
})
-#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v;
})
-#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v;
})
+#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(__v);
__v; })
+#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(__v);
__v; })
+#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(__v);
__v; })
+#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(__v);
__v; })
#define writeb(v,c)({ __iowmb(); writeb_relaxed((v),(c)); })
#define writew(v,c)({ __iowmb(); writew_relaxed((v),(c)); })
@@ -183,9 +198,9 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr,
size_t size);
/*
* io{read,write}{16,32,64}be() macros
*/
-#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force
__be16)__raw_readw(p)); __iormb(); __v; })
-#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force
__be32)__raw_readl(p)); __iormb(); __v; })
-#define ioread64be(p) ({ __u64 __v = be64_to_cpu((__force
__be64)__raw_readq(p)); __iormb(); __v; })
+#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force
__be16)__raw_readw(p)); __iormb(__v); __v; })
+#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force
__be32)__raw_readl(p)); __iormb(__v); __v; })
+#define ioread64be(p) ({ __u64 __v = be64_to_cpu((__force
__be64)__raw_readq(p)); __iormb(__v); __v; })
#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force
__u16)cpu_to_be16(v), p); })
#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force
__u32)cpu_to_be32(v), p); })
--
2.19.1
[PATCH AUTOSEL 4.20 110/304] ARM: mmp/mmp2: dt: enable the clock
From: Lubomir Rintel
[ Upstream commit f36797ee43802b367e59f0f9a9805304a4ff0c98 ]
The device-tree booted MMP2 needs to enable the timer clock, otherwise
it would stop ticking when the boot finishes.
It can also use the clock rate from the clk, the non-DT boards need to
keep using the hardcoded rates.
Signed-off-by: Lubomir Rintel
Acked-by: Pavel Machek
Signed-off-by: Olof Johansson
Signed-off-by: Sasha Levin
---
arch/arm/mach-mmp/common.h | 2 +-
arch/arm/mach-mmp/mmp2.c | 2 +-
arch/arm/mach-mmp/pxa168.c | 2 +-
arch/arm/mach-mmp/time.c | 32
4 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index 7e284d9c429f..5ac2851ef5d3 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -2,7 +2,7 @@
#include
#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
-extern void timer_init(int irq);
+extern void timer_init(int irq, unsigned long rate);
extern void __init mmp_map_io(void);
extern void mmp_restart(enum reboot_mode, const char *);
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index afba5460cdaf..fb3e7e32c882 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -134,7 +134,7 @@ void __init mmp2_timer_init(void)
clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
__raw_writel(clk_rst, APBC_TIMERS);
- timer_init(IRQ_MMP2_TIMER1);
+ timer_init(IRQ_MMP2_TIMER1, 650);
}
/* on-chip devices */
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 0f5f16fb8c66..77a358165a56 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -79,7 +79,7 @@ void __init pxa168_timer_init(void)
/* 3.25MHz, bus/functional clock enabled, release reset */
__raw_writel(TIMER_CLK_RST, APBC_TIMERS);
- timer_init(IRQ_PXA168_TIMER1);
+ timer_init(IRQ_PXA168_TIMER1, 650);
}
void pxa168_clear_keypad_wakeup(void)
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 96ad1db0b04b..eab0fd8a7343 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
@@ -38,12 +39,6 @@
#include "cputype.h"
#include "clock.h"
-#ifdef CONFIG_CPU_MMP2
-#define MMP_CLOCK_FREQ 650
-#else
-#define MMP_CLOCK_FREQ 325
-#endif
-
#define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE
#define MAX_DELTA (0xfffe)
@@ -189,19 +184,18 @@ static struct irqaction timer_irq = {
.dev_id = ,
};
-void __init timer_init(int irq)
+void __init timer_init(int irq, unsigned long rate)
{
timer_config();
- sched_clock_register(mmp_read_sched_clock, 32, MMP_CLOCK_FREQ);
+ sched_clock_register(mmp_read_sched_clock, 32, rate);
ckevt.cpumask = cpumask_of(0);
setup_irq(irq, _irq);
- clocksource_register_hz(, MMP_CLOCK_FREQ);
- clockevents_config_and_register(, MMP_CLOCK_FREQ,
- MIN_DELTA, MAX_DELTA);
+ clocksource_register_hz(, rate);
+ clockevents_config_and_register(, rate, MIN_DELTA, MAX_DELTA);
}
#ifdef CONFIG_OF
@@ -213,7 +207,9 @@ static const struct of_device_id mmp_timer_dt_ids[] = {
void __init mmp_dt_init_timer(void)
{
struct device_node *np;
+ struct clk *clk;
int irq, ret;
+ unsigned long rate;
np = of_find_matching_node(NULL, mmp_timer_dt_ids);
if (!np) {
@@ -221,6 +217,18 @@ void __init mmp_dt_init_timer(void)
goto out;
}
+ clk = of_clk_get(np, 0);
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ if (ret)
+ goto out;
+ rate = clk_get_rate(clk) / 2;
+ } else if (cpu_is_pj4()) {
+ rate = 650;
+ } else {
+ rate = 325;
+ }
+
irq = irq_of_parse_and_map(np, 0);
if (!irq) {
ret = -EINVAL;
@@ -231,7 +239,7 @@ void __init mmp_dt_init_timer(void)
ret = -ENOMEM;
goto out;
}
- timer_init(irq);
+ timer_init(irq, rate);
return;
out:
pr_err("Failed to get timer from device tree with error:%d\n", ret);
--
2.19.1
[PATCH AUTOSEL 4.20 100/304] Thermal: do not clear passive state during system sleep
From: Wei Wang
[ Upstream commit 964f4843a455d2ffb199512b08be8d5f077c4cac ]
commit ff140fea847e ("Thermal: handle thermal zone device properly
during system sleep") added PM hook to call thermal zone reset during
sleep. However resetting thermal zone will also clear the passive state
and thus cancel the polling queue which leads the passive cooling device
state not being cleared properly after sleep.
thermal_pm_notify => thermal_zone_device_reset set passive to 0
thermal_zone_trip_update will skip update passive as `old_target ==
instance->target'.
monitor_thermal_zone => thermal_zone_device_set_polling will cancel
tz->poll_queue, so the cooling device state will not be changed
afterwards.
Reported-by: Kame Wang
Signed-off-by: Wei Wang
Signed-off-by: Zhang Rui
Signed-off-by: Sasha Levin
---
drivers/thermal/thermal_core.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c
index d6ebc1cf6aa9..3a014cd8daf0 100644
--- a/drivers/thermal/thermal_core.c
+++ b/drivers/thermal/thermal_core.c
@@ -453,16 +453,20 @@ static void update_temperature(struct thermal_zone_device
*tz)
tz->last_temperature, tz->temperature);
}
-static void thermal_zone_device_reset(struct thermal_zone_device *tz)
+static void thermal_zone_device_init(struct thermal_zone_device *tz)
{
struct thermal_instance *pos;
-
tz->temperature = THERMAL_TEMP_INVALID;
- tz->passive = 0;
list_for_each_entry(pos, >thermal_instances, tz_node)
pos->initialized = false;
}
+static void thermal_zone_device_reset(struct thermal_zone_device *tz)
+{
+ tz->passive = 0;
+ thermal_zone_device_init(tz);
+}
+
void thermal_zone_device_update(struct thermal_zone_device *tz,
enum thermal_notify_event event)
{
@@ -1504,7 +1508,7 @@ static int thermal_pm_notify(struct notifier_block *nb,
case PM_POST_SUSPEND:
atomic_set(_suspend, 0);
list_for_each_entry(tz, _tz_list, node) {
- thermal_zone_device_reset(tz);
+ thermal_zone_device_init(tz);
thermal_zone_device_update(tz,
THERMAL_EVENT_UNSPECIFIED);
}
--
2.19.1
Re: [PATCH] lib/div64: off by one in shift
On Mon, 28 Jan 2019 15:49:04 +0100 Stanislaw Gruszka wrote: > fls counts bits starting from 1 to 32 (returns 0 for zero argument). > If we add 1 we shift right one bit more and loose precision from > divisor, what cause function incorect results with some numbers. > > Corrected code was tested in user-space, see bugzilla: > https://bugzilla.kernel.org/show_bug.cgi?id=202391 What are the usersoace-visible runtime effects of this change? Thanks.
[PATCH AUTOSEL 4.20 099/304] arm64: io: Ensure value passed to __iormb() is held in a 64-bit register
From: Will Deacon
[ Upstream commit 1b57ec8c75279b873639eb44a215479236f93481 ]
As of commit 6460d3201471 ("arm64: io: Ensure calls to delay routines
are ordered against prior readX()"), MMIO reads smaller than 64 bits
fail to compile under clang because we end up mixing 32-bit and 64-bit
register operands for the same data processing instruction:
./include/asm-generic/io.h:695:9: warning: value size does not match register
size specified by the constraint and modifier [-Wasm-operand-widths]
return readb(addr);
^
./arch/arm64/include/asm/io.h:147:58: note: expanded from macro 'readb'
^
./include/asm-generic/io.h:695:9: note: use constraint modifier "w"
./arch/arm64/include/asm/io.h:147:50: note: expanded from macro 'readb'
^
./arch/arm64/include/asm/io.h:118:24: note: expanded from macro '__iormb'
asm volatile("eor %0, %1, %1\n" \
^
Fix the build by casting the macro argument to 'unsigned long' when used
as an input to the inline asm.
Reported-by: Nick Desaulniers
Reported-by: Nathan Chancellor
Signed-off-by: Will Deacon
Signed-off-by: Sasha Levin
---
arch/arm64/include/asm/io.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index d42d00d8d5b6..ee723835c1f4 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -117,7 +117,8 @@ static inline u64 __raw_readq(const volatile void __iomem
*addr)
*/ \
asm volatile("eor %0, %1, %1\n" \
"cbnz %0, ." \
-: "=r" (tmp) : "r" (v) : "memory");\
+: "=r" (tmp) : "r" ((unsigned long)(v))\
+: "memory"); \
})
#define __iowmb() wmb()
--
2.19.1
[PATCH AUTOSEL 4.20 096/304] drm: Clear state->acquire_ctx before leaving drm_atomic_helper_commit_duplicated_state()
From: Sean Paul
[ Upstream commit aa394b0dd68cb00c483e151dcd84713d4d517ed1 ]
drm_atomic_helper_commit_duplicated_state() sets state->acquire_ctx to
the context given in the argument and leaves it in state after it
quits. The lifetime of state and context are not guaranteed to be the
same, so we shouldn't leave that pointer hanging around. This patch
resets the context to NULL to avoid any oopses.
Changes in v2:
- Added to the set
Suggested-by: Daniel Vetter
Reviewed-by: Daniel Vetter
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20181129150423.239081-1-s...@poorly.run
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/drm_atomic_helper.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index b4e292a56046..df86c2ebfc12 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -3212,7 +3212,7 @@ EXPORT_SYMBOL(drm_atomic_helper_suspend);
int drm_atomic_helper_commit_duplicated_state(struct drm_atomic_state *state,
struct drm_modeset_acquire_ctx
*ctx)
{
- int i;
+ int i, ret;
struct drm_plane *plane;
struct drm_plane_state *new_plane_state;
struct drm_connector *connector;
@@ -3231,7 +3231,11 @@ int drm_atomic_helper_commit_duplicated_state(struct
drm_atomic_state *state,
for_each_new_connector_in_state(state, connector, new_conn_state, i)
state->connectors[i].old_state = connector->state;
- return drm_atomic_commit(state);
+ ret = drm_atomic_commit(state);
+
+ state->acquire_ctx = NULL;
+
+ return ret;
}
EXPORT_SYMBOL(drm_atomic_helper_commit_duplicated_state);
--
2.19.1
[PATCH AUTOSEL 4.20 094/304] soc: bcm: brcmstb: Don't leak device tree node reference
From: Yangtao Li
[ Upstream commit 1861a7f07e02292830a1ca256328d370deefea30 ]
of_find_node_by_path() acquires a reference to the node returned by it
and that reference needs to be dropped by its caller. soc_is_brcmstb()
doesn't do that, so fix it.
[treding: slightly rewrite to avoid inline comparison]
Fixes: d52fad262041 ("soc: add stubs for brcmstb SoC's")
Signed-off-by: Yangtao Li
Signed-off-by: Florian Fainelli
Signed-off-by: Sasha Levin
---
drivers/soc/bcm/brcmstb/common.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/bcm/brcmstb/common.c b/drivers/soc/bcm/brcmstb/common.c
index 14185451901d..bf9123f727e8 100644
--- a/drivers/soc/bcm/brcmstb/common.c
+++ b/drivers/soc/bcm/brcmstb/common.c
@@ -31,13 +31,17 @@ static const struct of_device_id brcmstb_machine_match[] = {
bool soc_is_brcmstb(void)
{
+ const struct of_device_id *match;
struct device_node *root;
root = of_find_node_by_path("/");
if (!root)
return false;
- return of_match_node(brcmstb_machine_match, root) != NULL;
+ match = of_match_node(brcmstb_machine_match, root);
+ of_node_put(root);
+
+ return match != NULL;
}
u32 brcmstb_get_family_id(void)
--
2.19.1
[PATCH AUTOSEL 4.20 095/304] nfsd4: fix crash on writing v4_end_grace before nfsd startup
From: "J. Bruce Fields" [ Upstream commit 62a063b8e7d1db684db3f207261a466fa3194e72 ] Anatoly Trosinenko reports that this: 1) Checkout fresh master Linux branch (tested with commit e195ca6cb) 2) Copy x84_64-config-4.14 to .config, then enable NFS server v4 and build 3) From `kvm-xfstests shell`: results in NULL dereference in locks_end_grace. Check that nfsd has been started before trying to end the grace period. Reported-by: Anatoly Trosinenko Signed-off-by: J. Bruce Fields Signed-off-by: Sasha Levin --- fs/nfsd/nfsctl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fs/nfsd/nfsctl.c b/fs/nfsd/nfsctl.c index 6384c9b94898..b33f9785b756 100644 --- a/fs/nfsd/nfsctl.c +++ b/fs/nfsd/nfsctl.c @@ -1126,6 +1126,8 @@ static ssize_t write_v4_end_grace(struct file *file, char *buf, size_t size) case 'Y': case 'y': case '1': + if (nn->nfsd_serv) + return -EBUSY; nfsd4_end_grace(nn); break; default: -- 2.19.1
[PATCH AUTOSEL 4.20 107/304] drm/v3d: Fix prime imports of buffers from other drivers.
From: Eric Anholt
[ Upstream commit 62d1a752874962f072de8a779e960fcd2ab4847b ]
v3d_bo_get_pages() checks this to decide to map the imported buffer
instead of the backing shmem file. The caller was about to set this
value anyway, and there's no error path in between. Ideally we
wouldn't even allocate the shmem file for our imports, but that's a
more invasive fix.
Signed-off-by: Eric Anholt
Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D
V3.x+")
Link:
https://patchwork.freedesktop.org/patch/msgid/20181128230927.10951-3-e...@anholt.net
Acked-by: Daniel Vetter
Reviewed-by: Dave Emett
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/v3d/v3d_bo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/v3d/v3d_bo.c b/drivers/gpu/drm/v3d/v3d_bo.c
index 54d96518a131..a08766d39eab 100644
--- a/drivers/gpu/drm/v3d/v3d_bo.c
+++ b/drivers/gpu/drm/v3d/v3d_bo.c
@@ -293,6 +293,7 @@ v3d_prime_import_sg_table(struct drm_device *dev,
bo->resv = attach->dmabuf->resv;
bo->sgt = sgt;
+ obj->import_attach = attach;
v3d_bo_get_pages(bo);
v3d_mmu_insert_ptes(bo);
--
2.19.1
[PATCH AUTOSEL 4.20 116/304] platform/x86: Fix config space access for intel_atomisp2_pm
From: Ville Syrjälä
[ Upstream commit 6a31061833a52a79c99221b6251db08cf377470e ]
We lose even config space access when we power gate the ISP
via the PUNIT. That makes lspci & co. produce gibberish.
To fix that let's try to implement actual runtime pm hooks
and inform the pci core that the device always goes to
D3cold. That will cause the pci core to resume the device
before attempting config space access.
This introduces another annoyance though. We get the
following error every time we try to resume the device:
intel_atomisp2_pm :00:03.0: Refused to change power state, currently in D3
The reason being that the pci core tries to put the device
back into D0 via the standard PCI PM mechanism before
calling the driver resume hook. To fix this properly
we'd need to infiltrate the platform pm hooks (could
turn ugly real fast), or use pm domains (which don't
seem to exist on x86), or some extra early resume
hook for the driver (which doesn't exist either).
So maybe we just choose to live with the error?
Cc: Hans de Goede
Cc: Alan Cox
Cc: Andy Shevchenko
Cc: Darren Hart
Signed-off-by: Ville Syrjälä
Signed-off-by: Andy Shevchenko
Reviewed-by: Hans de Goede
Signed-off-by: Sasha Levin
---
drivers/platform/x86/intel_atomisp2_pm.c | 68 +---
1 file changed, 48 insertions(+), 20 deletions(-)
diff --git a/drivers/platform/x86/intel_atomisp2_pm.c
b/drivers/platform/x86/intel_atomisp2_pm.c
index 9371603a0ac9..2a8c7a4cea35 100644
--- a/drivers/platform/x86/intel_atomisp2_pm.c
+++ b/drivers/platform/x86/intel_atomisp2_pm.c
@@ -33,46 +33,45 @@
#define ISPSSPM0_IUNIT_POWER_ON0x0
#define ISPSSPM0_IUNIT_POWER_OFF 0x3
-static int isp_probe(struct pci_dev *dev, const struct pci_device_id *id)
+static int isp_set_power(struct pci_dev *dev, bool enable)
{
unsigned long timeout;
- u32 val;
-
- pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, 0);
-
- /*
-* MRFLD IUNIT DPHY is located in an always-power-on island
-* MRFLD HW design need all CSI ports are disabled before
-* powering down the IUNIT.
-*/
- pci_read_config_dword(dev, PCI_CSI_CONTROL, );
- val |= PCI_CSI_CONTROL_PORTS_OFF_MASK;
- pci_write_config_dword(dev, PCI_CSI_CONTROL, val);
+ u32 val = enable ? ISPSSPM0_IUNIT_POWER_ON :
+ ISPSSPM0_IUNIT_POWER_OFF;
- /* Write 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */
+ /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0,
- ISPSSPM0_IUNIT_POWER_OFF, ISPSSPM0_ISPSSC_MASK);
+ val, ISPSSPM0_ISPSSC_MASK);
/*
* There should be no IUNIT access while power-down is
* in progress HW sighting: 4567865
* Wait up to 50 ms for the IUNIT to shut down.
+* And we do the same for power on.
*/
timeout = jiffies + msecs_to_jiffies(50);
while (1) {
- /* Wait until ISPSSPM0 bit[25:24] shows 0x3 */
- iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0, );
- val = (val & ISPSSPM0_ISPSSS_MASK) >> ISPSSPM0_ISPSSS_OFFSET;
- if (val == ISPSSPM0_IUNIT_POWER_OFF)
+ u32 tmp;
+
+ /* Wait until ISPSSPM0 bit[25:24] shows the right value */
+ iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0, );
+ tmp = (tmp & ISPSSPM0_ISPSSS_MASK) >> ISPSSPM0_ISPSSS_OFFSET;
+ if (tmp == val)
break;
if (time_after(jiffies, timeout)) {
- dev_err(>dev, "IUNIT power-off timeout.\n");
+ dev_err(>dev, "IUNIT power-%s timeout.\n",
+ enable ? "on" : "off");
return -EBUSY;
}
usleep_range(1000, 2000);
}
+ return 0;
+}
+
+static int isp_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
pm_runtime_allow(>dev);
pm_runtime_put_sync_suspend(>dev);
@@ -87,11 +86,40 @@ static void isp_remove(struct pci_dev *dev)
static int isp_pci_suspend(struct device *dev)
{
+ struct pci_dev *pdev = to_pci_dev(dev);
+ u32 val;
+
+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, 0);
+
+ /*
+* MRFLD IUNIT DPHY is located in an always-power-on island
+* MRFLD HW design need all CSI ports are disabled before
+* powering down the IUNIT.
+*/
+ pci_read_config_dword(pdev, PCI_CSI_CONTROL, );
+ val |= PCI_CSI_CONTROL_PORTS_OFF_MASK;
+ pci_write_config_dword(pdev, PCI_CSI_CONTROL, val);
+
+ /*
+* We lose config space access when punit power gates
+* the ISP. Can't use pci_set_power_state() because
+* pmcsr won't actually change when we write to it.
+*/
+ pci_save_state(pdev);
+
[PATCH AUTOSEL 4.20 127/304] mac80211: fix deauth TX when we disconnect
From: Emmanuel Grumbach
[ Upstream commit f6c7f03f69f7422bc237bc79599e152d390b74e0 ]
The iTXQs stop/wake queue mechanism involves a whole bunch
of locks and this is probably why the call to
ieee80211_wake_txqs is deferred to a tasklet when called from
__ieee80211_wake_queue.
Another advantage of that is that ieee80211_wake_txqs might
call the wake_tx_queue() callback and then the driver may
call mac80211 which will call it back in the same context.
The bug I saw is that when we send a deauth frame as a
station we do:
flush(drop=1)
tx deauth
flush(drop=0)
While we flush we stop the queues and wake them up
immediately after we finished flushing. The problem here is
that the tasklet that de-facto enables the queue may not have
run until we send the deauth. Then the deauth frame is sent
to the driver (which is surprising by itself), but the driver
won't get anything useful from ieee80211_tx_dequeue because
the queue is stopped (or more precisely because
vif->txqs_stopped[0] is true).
Then the deauth is not sent. Later on, the tasklet will run,
but that'll be too late. We'll already have removed all the
vif etc...
Fix this by calling ieee80211_wake_txqs synchronously if we
are not waking up the queues from the driver (we check the
reason to determine that). This makes the code really
convoluted because we may call ieee80211_wake_txqs from
__ieee80211_wake_queue. The latter assumes that
queue_stop_reason_lock has been taken by the caller and
ieee80211_wake_txqs may release the lock to send the frames.
Signed-off-by: Emmanuel Grumbach
Signed-off-by: Johannes Berg
Signed-off-by: Sasha Levin
---
net/mac80211/util.c | 49 -
1 file changed, 35 insertions(+), 14 deletions(-)
diff --git a/net/mac80211/util.c b/net/mac80211/util.c
index bec424316ea4..dddfff7cf44f 100644
--- a/net/mac80211/util.c
+++ b/net/mac80211/util.c
@@ -299,16 +299,16 @@ out:
spin_unlock_bh(>lock);
}
-void ieee80211_wake_txqs(unsigned long data)
+static void
+__releases(>queue_stop_reason_lock)
+__acquires(>queue_stop_reason_lock)
+_ieee80211_wake_txqs(struct ieee80211_local *local, unsigned long *flags)
{
- struct ieee80211_local *local = (struct ieee80211_local *)data;
struct ieee80211_sub_if_data *sdata;
int n_acs = IEEE80211_NUM_ACS;
- unsigned long flags;
int i;
rcu_read_lock();
- spin_lock_irqsave(>queue_stop_reason_lock, flags);
if (local->hw.queues < IEEE80211_NUM_ACS)
n_acs = 1;
@@ -317,7 +317,7 @@ void ieee80211_wake_txqs(unsigned long data)
if (local->queue_stop_reasons[i])
continue;
- spin_unlock_irqrestore(>queue_stop_reason_lock, flags);
+ spin_unlock_irqrestore(>queue_stop_reason_lock, *flags);
list_for_each_entry_rcu(sdata, >interfaces, list) {
int ac;
@@ -329,13 +329,22 @@ void ieee80211_wake_txqs(unsigned long data)
__ieee80211_wake_txqs(sdata, ac);
}
}
- spin_lock_irqsave(>queue_stop_reason_lock, flags);
+ spin_lock_irqsave(>queue_stop_reason_lock, *flags);
}
- spin_unlock_irqrestore(>queue_stop_reason_lock, flags);
rcu_read_unlock();
}
+void ieee80211_wake_txqs(unsigned long data)
+{
+ struct ieee80211_local *local = (struct ieee80211_local *)data;
+ unsigned long flags;
+
+ spin_lock_irqsave(>queue_stop_reason_lock, flags);
+ _ieee80211_wake_txqs(local, );
+ spin_unlock_irqrestore(>queue_stop_reason_lock, flags);
+}
+
void ieee80211_propagate_queue_wake(struct ieee80211_local *local, int queue)
{
struct ieee80211_sub_if_data *sdata;
@@ -371,7 +380,8 @@ void ieee80211_propagate_queue_wake(struct ieee80211_local
*local, int queue)
static void __ieee80211_wake_queue(struct ieee80211_hw *hw, int queue,
enum queue_stop_reason reason,
- bool refcounted)
+ bool refcounted,
+ unsigned long *flags)
{
struct ieee80211_local *local = hw_to_local(hw);
@@ -405,8 +415,19 @@ static void __ieee80211_wake_queue(struct ieee80211_hw
*hw, int queue,
} else
tasklet_schedule(>tx_pending_tasklet);
- if (local->ops->wake_tx_queue)
- tasklet_schedule(>wake_txqs_tasklet);
+ /*
+* Calling _ieee80211_wake_txqs here can be a problem because it may
+* release queue_stop_reason_lock which has been taken by
+* __ieee80211_wake_queue's caller. It is certainly not very nice to
+* release someone's lock, but it is fine because all the callers of
+* __ieee80211_wake_queue call it right before releasing the lock.
+*/
+ if (local->ops->wake_tx_queue) {
+ if (reason ==
