Re: rx51: omapfb: no driver for display
On Sun, 2011-03-27 at 04:39 +0200, Sebastian Reichel wrote: Hi, I've got problems getting a working tty with the mainline 2.6.38 kernel on my Nokia N900. Here is the related output from dmesg: $ grep -E (omapdss|omapfb|acx565akm) dmesg [0.890899] omapdss CORE: clk ick, rate 8300 [0.890930] omapdss CORE: clk dss1_fck, rate 9600 [0.890991] omapdss CORE: clk dss2_fck, rate 1920 [0.891021] omapdss CORE: clk tv_fck, rate 5400 [0.891052] omapdss CORE: clk video_fck, rate 9600 [0.891143] omapdss CORE: initial ctx id 0 [0.950469] omapdss CORE: save context [0.950714] omapdss CORE: bus_match. dev display0/panel-acx565akm, drv panel-acx565akm [0.950775] omapdss CORE: driver_probe: dev display0/panel-acx565akm, drv panel-acx565akm [0.950805] omapdss SDI: SDI init [1.004455] omapdss CORE: save context [1.059173] omapdss CORE: save context [1.113830] omapdss CORE: save context [1.129608] acx565akm spi1.2: omapfb: acx565akm rev 8b LCD detected [1.130065] omapdss CORE: probe done for device display0 [1.130096] omapdss CORE: bus_match. dev display1/venc, drv panel-acx565akm [1.303741] OMAPFB: omapfb_init [1.303894] OMAPFB: omapfb_probe [1.303924] omapfb omapfb: no driver for display [1.304016] omapfb omapfb: failed to setup omapfb You can find the full dmesg and the full kernel config at [0] and [1]. Can you tell me the reason for the no driver for display message? I thought acx565akm has been registered as display driver directly before. You also need VENC driver for the tv-out: CONFIG_OMAP2_DSS_VENC Granted, DSS could handle this case a bit better, by continuing but refusing to let the user enable the tv-out... Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] isp1704_charger: fix powering for N900
This patch set enables powering down the isp1704 usb tranceiver when not in use. Tested on RX-51. Kalle Jokiniemi (2): isp1704_charger: allow board specific powering routine RX-51: Enable isp1704 power on/off arch/arm/mach-omap2/board-rx51-peripherals.c | 27 ++- drivers/power/isp1704_charger.c | 25 +- include/linux/power/isp1704_charger.h| 29 ++ 3 files changed, 78 insertions(+), 3 deletions(-) create mode 100644 include/linux/power/isp1704_charger.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] isp1704_charger: allow board specific powering routine
The ISP1704/1707 chip can be put to full power down
state by asserting the CHIP_SEL line. This patch enables
platform or board specific hooks to put the device into
power down mode in case not needed.
These patches are preparatio for enabling this powering
routine in n900 (rx-51) devices.
Thanks to Heikki Krogerus for helping out with the patch.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
Cc: Heikki Krogerus heikki.kroge...@nokia.com
---
drivers/power/isp1704_charger.c | 23 +++
include/linux/power/isp1704_charger.h | 29 +
2 files changed, 52 insertions(+), 0 deletions(-)
create mode 100644 include/linux/power/isp1704_charger.h
diff --git a/drivers/power/isp1704_charger.c b/drivers/power/isp1704_charger.c
index 2ad9b14..06f69c7 100644
--- a/drivers/power/isp1704_charger.c
+++ b/drivers/power/isp1704_charger.c
@@ -33,6 +33,7 @@
#include linux/usb/ulpi.h
#include linux/usb/ch9.h
#include linux/usb/gadget.h
+#include linux/power/isp1704_charger.h
/* Vendor specific Power Control register */
#define ISP1704_PWR_CTRL 0x3d
@@ -71,6 +72,18 @@ struct isp1704_charger {
};
/*
+ * Disable/enable the power from the isp1704 if a function for it
+ * has been provided with platform data.
+ */
+static void isp1704_charger_set_power(struct isp1704_charger *isp, bool on)
+{
+ struct isp1704_charger_data *board = isp-dev-platform_data;
+
+ if (board-set_power)
+ board-set_power(on);
+}
+
+/*
* Determine is the charging port DCP (dedicated charger) or CDP (Host/HUB
* chargers).
*
@@ -222,6 +235,9 @@ static void isp1704_charger_work(struct work_struct *data)
mutex_lock(lock);
+ if (event != USB_EVENT_NONE)
+ isp1704_charger_set_power(isp, 1);
+
switch (event) {
case USB_EVENT_VBUS:
isp-online = true;
@@ -269,6 +285,8 @@ static void isp1704_charger_work(struct work_struct *data)
*/
if (isp-otg-gadget)
usb_gadget_disconnect(isp-otg-gadget);
+ /* As last thing, disable the power from the charger */
+ isp1704_charger_set_power(isp, 0);
break;
case USB_EVENT_ENUMERATED:
if (isp-present)
@@ -394,6 +412,8 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
isp-dev = pdev-dev;
platform_set_drvdata(pdev, isp);
+ isp1704_charger_set_power(isp, 1);
+
ret = isp1704_test_ulpi(isp);
if (ret 0)
goto fail1;
@@ -437,6 +457,8 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
if ((ret ULPI_INT_VBUS_VALID) !isp-otg-default_a) {
isp-event = USB_EVENT_VBUS;
schedule_work(isp-work);
+ } else {
+ isp1704_charger_set_power(isp, 0);
}
return 0;
@@ -459,6 +481,7 @@ static int __devexit isp1704_charger_remove(struct
platform_device *pdev)
otg_unregister_notifier(isp-otg, isp-nb);
power_supply_unregister(isp-psy);
otg_put_transceiver(isp-otg);
+ isp1704_charger_set_power(isp, 0);
kfree(isp);
return 0;
diff --git a/include/linux/power/isp1704_charger.h
b/include/linux/power/isp1704_charger.h
new file mode 100644
index 000..68096a6
--- /dev/null
+++ b/include/linux/power/isp1704_charger.h
@@ -0,0 +1,29 @@
+/*
+ * ISP1704 USB Charger Detection driver
+ *
+ * Copyright (C) 2011 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+
+#ifndef __ISP1704_CHARGER_H
+#define __ISP1704_CHARGER_H
+
+struct isp1704_charger_data {
+ void(*set_power)(bool on);
+};
+
+#endif
--
1.7.1
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RE: [PATCH 0/2] isp1704_charger: fix powering for N900
Ugh, Monday morning :( Managed to send old version of the patch, this has a boot issue. Please disregard this patch set, I'll send V2 set soon... - Kalle -Original Message- From: Jokiniemi Kalle (Nokia-MS/Tampere) Sent: 28. maaliskuuta 2011 9:33 To: linux-...@vger.kernel.org; linux-omap@vger.kernel.org; ba...@ti.com Cc: Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; khil...@ti.com; Jokiniemi Kalle (Nokia-MS/Tampere) Subject: [PATCH 0/2] isp1704_charger: fix powering for N900 This patch set enables powering down the isp1704 usb tranceiver when not in use. Tested on RX-51. Kalle Jokiniemi (2): isp1704_charger: allow board specific powering routine RX-51: Enable isp1704 power on/off arch/arm/mach-omap2/board-rx51-peripherals.c | 27 ++- drivers/power/isp1704_charger.c | 25 +- include/linux/power/isp1704_charger.h| 29 ++ 3 files changed, 78 insertions(+), 3 deletions(-) create mode 100644 include/linux/power/isp1704_charger.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] isp1704_charger: allow board specific powering routine
The ISP1704/1707 chip can be put to full power down
state by asserting the CHIP_SEL line. This patch enables
platform or board specific hooks to put the device into
power down mode in case not needed.
These patches are preparatio for enabling this powering
routine in n900 (rx-51) devices.
Thanks to Heikki Krogerus for helping out with the patch.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
Cc: Heikki Krogerus heikki.kroge...@nokia.com
---
drivers/power/isp1704_charger.c | 26 ++
include/linux/power/isp1704_charger.h | 29 +
2 files changed, 55 insertions(+), 0 deletions(-)
create mode 100644 include/linux/power/isp1704_charger.h
diff --git a/drivers/power/isp1704_charger.c b/drivers/power/isp1704_charger.c
index 2ad9b14..c796b9f 100644
--- a/drivers/power/isp1704_charger.c
+++ b/drivers/power/isp1704_charger.c
@@ -33,6 +33,7 @@
#include linux/usb/ulpi.h
#include linux/usb/ch9.h
#include linux/usb/gadget.h
+#include linux/power/isp1704_charger.h
/* Vendor specific Power Control register */
#define ISP1704_PWR_CTRL 0x3d
@@ -63,6 +64,7 @@ struct isp1704_charger {
charmodel[8];
unsignedpresent:1;
unsignedonline:1;
+ unsignedinit_done;
unsignedcurrent_max;
/* temp storage variables */
@@ -71,6 +73,18 @@ struct isp1704_charger {
};
/*
+ * Disable/enable the power from the isp1704 if a function for it
+ * has been provided with platform data.
+ */
+static void isp1704_charger_set_power(struct isp1704_charger *isp, bool on)
+{
+ struct isp1704_charger_data *board = isp-dev-platform_data;
+
+ if (board-set_power)
+ board-set_power(on);
+}
+
+/*
* Determine is the charging port DCP (dedicated charger) or CDP (Host/HUB
* chargers).
*
@@ -222,6 +236,9 @@ static void isp1704_charger_work(struct work_struct *data)
mutex_lock(lock);
+ if (event != USB_EVENT_NONE)
+ isp1704_charger_set_power(isp, 1);
+
switch (event) {
case USB_EVENT_VBUS:
isp-online = true;
@@ -269,6 +286,9 @@ static void isp1704_charger_work(struct work_struct *data)
*/
if (isp-otg-gadget)
usb_gadget_disconnect(isp-otg-gadget);
+ /* If we're initialized, we can power down the isp */
+ if (isp-init_done)
+ isp1704_charger_set_power(isp, 0);
break;
case USB_EVENT_ENUMERATED:
if (isp-present)
@@ -394,6 +414,8 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
isp-dev = pdev-dev;
platform_set_drvdata(pdev, isp);
+ isp1704_charger_set_power(isp, 1);
+
ret = isp1704_test_ulpi(isp);
if (ret 0)
goto fail1;
@@ -437,8 +459,11 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
if ((ret ULPI_INT_VBUS_VALID) !isp-otg-default_a) {
isp-event = USB_EVENT_VBUS;
schedule_work(isp-work);
+ } else {
+ isp1704_charger_set_power(isp, 0);
}
+ isp-init_done = 1;
return 0;
fail2:
power_supply_unregister(isp-psy);
@@ -459,6 +484,7 @@ static int __devexit isp1704_charger_remove(struct
platform_device *pdev)
otg_unregister_notifier(isp-otg, isp-nb);
power_supply_unregister(isp-psy);
otg_put_transceiver(isp-otg);
+ isp1704_charger_set_power(isp, 0);
kfree(isp);
return 0;
diff --git a/include/linux/power/isp1704_charger.h
b/include/linux/power/isp1704_charger.h
new file mode 100644
index 000..68096a6
--- /dev/null
+++ b/include/linux/power/isp1704_charger.h
@@ -0,0 +1,29 @@
+/*
+ * ISP1704 USB Charger Detection driver
+ *
+ * Copyright (C) 2011 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+
+#ifndef __ISP1704_CHARGER_H
+#define __ISP1704_CHARGER_H
+
+struct isp1704_charger_data {
+ void(*set_power)(bool on);
+};
+
+#endif
--
1.7.1
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[PATCH v2 2/2] RX-51: Enable isp1704 power on/off
The isp1704 usb tranceiver is used for charging and can be
disabled when not in use. Provide the powering routine to
the driver via platform data.
Loosely based on earlier patches from Heikki Krogerus in
Nokia N900 maemo kernel.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
Cc: Heikki Krogerus heikki.kroge...@nokia.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 27 -
1 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index e75e240..8584dd8 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -23,6 +23,7 @@
#include linux/gpio.h
#include linux/gpio_keys.h
#include linux/mmc/host.h
+#include linux/power/isp1704_charger.h
#include plat/mcspi.h
#include plat/board.h
@@ -48,6 +49,8 @@
#define RX51_WL1251_POWER_GPIO 87
#define RX51_WL1251_IRQ_GPIO 42
+#define RX51_USB_TRANSCEIVER_RST_GPIO 67
+
/* list all spi devices here */
enum {
RX51_SPI_WL1251,
@@ -106,10 +109,30 @@ static struct spi_board_info
rx51_peripherals_spi_board_info[] __initdata = {
},
};
+static void rx51_charger_set_power(bool on)
+{
+ gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
+}
+
+static struct isp1704_charger_data rx51_charger_data = {
+ .set_power = rx51_charger_set_power,
+};
+
static struct platform_device rx51_charger_device = {
- .name = isp1704_charger,
+ .name = isp1704_charger,
+ .dev= {
+ .platform_data = rx51_charger_data,
+ },
};
+static void __init rx51_charger_init(void)
+{
+ BUG_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
+ GPIOF_OUT_INIT_LOW, isp1704_reset));
+
+ platform_device_register(rx51_charger_device);
+}
+
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
#define RX51_GPIO_CAMERA_LENS_COVER110
@@ -928,6 +951,6 @@ void __init rx51_peripherals_init(void)
if (partition)
omap2_hsmmc_init(mmc);
- platform_device_register(rx51_charger_device);
+ rx51_charger_init();
}
--
1.7.1
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[PATCH v2 0/2] isp1704_charger: fix powering for N900
This patch set enables powering down the isp1704 usb tranceiver when not in use. Tested on RX-51 and MeeGo. v2: fixed a boot issue in the 1/2 patch. Kalle Jokiniemi (2): isp1704_charger: allow board specific powering routine RX-51: Enable isp1704 power on/off arch/arm/mach-omap2/board-rx51-peripherals.c | 27 ++- drivers/power/isp1704_charger.c | 25 +- include/linux/power/isp1704_charger.h| 29 ++ 3 files changed, 78 insertions(+), 3 deletions(-) create mode 100644 include/linux/power/isp1704_charger.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
+
static struct platform_device rx51_charger_device = {
- .name = isp1704_charger,
+ .name = isp1704_charger,
Both are same; you don’t need this change!
+ .dev= {
+ .platform_data = rx51_charger_data,
+ },
};
+static void __init rx51_charger_init(void)
+{
+ BUG_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
+ GPIOF_OUT_INIT_LOW, isp1704_reset));
+
+ platform_device_register(rx51_charger_device);
+}
+
#if defined(CONFIG_KEYBOARD_GPIO) ||
defined(CONFIG_KEYBOARD_GPIO_MODULE)
#define RX51_GPIO_CAMERA_LENS_COVER 110
@@ -928,6 +951,6 @@ void __init rx51_peripherals_init(void)
if (partition)
omap2_hsmmc_init(mmc);
- platform_device_register(rx51_charger_device);
+ rx51_charger_init();
}
--
1.7.1
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RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
-Original Message-
From: ext Keshava Munegowda [mailto:keshava_mgo...@ti.com]
Sent: 28. maaliskuuta 2011 10:19
To: Jokiniemi Kalle (Nokia-MS/Tampere); linux-...@vger.kernel.org; linux-
o...@vger.kernel.org; Felipe Balbi
Cc: Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; Kevin Hilman
Subject: RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
+
static struct platform_device rx51_charger_device = {
- .name = isp1704_charger,
+ .name = isp1704_charger,
Both are same; you don't need this change!
No, actually they are not same. I added tab instead of space to match
indentation with the .dev member. This is the correct way IMHO.
- Kalle
+ .dev= {
+ .platform_data = rx51_charger_data,
+ },
};
+static void __init rx51_charger_init(void)
+{
+ BUG_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
+ GPIOF_OUT_INIT_LOW, isp1704_reset));
+
+ platform_device_register(rx51_charger_device);
+}
+
#if defined(CONFIG_KEYBOARD_GPIO) ||
defined(CONFIG_KEYBOARD_GPIO_MODULE)
#define RX51_GPIO_CAMERA_LENS_COVER 110
@@ -928,6 +951,6 @@ void __init rx51_peripherals_init(void)
if (partition)
omap2_hsmmc_init(mmc);
- platform_device_register(rx51_charger_device);
+ rx51_charger_init();
}
--
1.7.1
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Re: [PATCH v2 1/2] isp1704_charger: allow board specific powering routine
Hello.
On 28-03-2011 10:51, Kalle Jokiniemi wrote:
The ISP1704/1707 chip can be put to full power down
state by asserting the CHIP_SEL line. This patch enables
platform or board specific hooks to put the device into
power down mode in case not needed.
These patches are preparatio for enabling this powering
Preparation.
routine in n900 (rx-51) devices.
Thanks to Heikki Krogerus for helping out with the patch.
Signed-off-by: Kalle Jokiniemikalle.jokini...@nokia.com
Cc: Heikki Krogerusheikki.kroge...@nokia.com
[...]
diff --git a/include/linux/power/isp1704_charger.h
b/include/linux/power/isp1704_charger.h
new file mode 100644
index 000..68096a6
--- /dev/null
+++ b/include/linux/power/isp1704_charger.h
@@ -0,0 +1,29 @@
+/*
+ * ISP1704 USB Charger Detection driver
+ *
+ * Copyright (C) 2011 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+
+#ifndef __ISP1704_CHARGER_H
+#define __ISP1704_CHARGER_H
+
+struct isp1704_charger_data {
+ void(*set_power)(bool on);
+};
+
+#endif
There should be include/linux/platform_data/ directory now, specifically
for such headers...
WBR, Sergei
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Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
On 28-03-2011 10:51, Kalle Jokiniemi wrote:
The isp1704 usb tranceiver is used for charging and can be
disabled when not in use. Provide the powering routine to
the driver via platform data.
Loosely based on earlier patches from Heikki Krogerus in
Nokia N900 maemo kernel.
Signed-off-by: Kalle Jokiniemikalle.jokini...@nokia.com
Cc: Heikki Krogerusheikki.kroge...@nokia.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 27 -
1 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index e75e240..8584dd8 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
[...]
@@ -106,10 +109,30 @@ static struct spi_board_info
rx51_peripherals_spi_board_info[] __initdata = {
},
};
+static void rx51_charger_set_power(bool on)
+{
+ gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
+}
+
+static struct isp1704_charger_data rx51_charger_data = {
+ .set_power = rx51_charger_set_power,
+};
+
static struct platform_device rx51_charger_device = {
- .name = isp1704_charger,
+ .name = isp1704_charger,
+ .dev= {
+ .platform_data =rx51_charger_data,
+ },
};
+static void __init rx51_charger_init(void)
+{
+ BUG_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
+ GPIOF_OUT_INIT_LOW, isp1704_reset));
I'm not sure we should kill the machine if this fails...
WBR, Sergei
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Re: [PATCH] OMAP3: l3: fix for irq 10: nobody cared message
Hello. On 28-03-2011 5:49, Ramirez Luna, Omar wrote: If an error occurs in the L3 on any other initiator than MPU, the interrupt goes unhandled given that the 'base' register was calculated with the initialized err_base value (which coincidentally points to MPU) and not with the actual source of the error. Signed-off-by: Omar Ramirez Lunaomar.rami...@ti.com --- arch/arm/mach-omap2/omap_l3_smx.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index 5f2da75..da917c2 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c @@ -196,11 +196,12 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) /* No timeout error for debug sources */ } - base = ((l3-rt) + (*(omap3_l3_bases[int_type] + err_source))); - /* identify the error source */ for (err_source = 0; !(status(1err_source)); err_source++) ; + + base = ((l3-rt) + (*(omap3_l3_bases[int_type] + err_source))); + What's the point of having () around rvalue? You could drop them, while at it... You're right, will do. The same goes about 'l3-rt' and '*(omap3_l3_bases[int_type] + err_source)'... Regards, Omar WBR, Sergei -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Unbuildable kernel with musb
Hi, On Sat, Mar 26, 2011 at 06:59:18PM -0400, Ben Gamari wrote: Today I've been trying to work through the mess that is musb bring-up on recent kernels (v2.6.38). While I still haven't succeeded in getting a patches are welcome. working gadget stack (modprobe g_ether fails with ENODEV), I've come across configuration where musb causes a link failure in 2.6.38 if built as a module: MODPOST 249 modules ERROR: musb_read_fifo [drivers/usb/musb/musb_hdrc.ko] undefined! Configuration attached. musb can't be built as module, I sent a patch making it bool recently until we re-work those parts of the code. -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Initialization of musb on board-omap2beagle fails in platform_driver_probe
Hi, On Sat, Mar 26, 2011 at 07:42:34PM -0400, Ben Gamari wrote: Today I've had a very frustrating time trying to bring up a BeagleBoard (arch/arm/mach-omap2/board-omap2beagle.c) with the 2.6.38 there's no board-omap2beagle kernel. Unfortunately musb has been giving me great difficulties, # modprobe g_ether [ 25.276855] usb_gadget_probe_driver 1815: usb_gadget_probe_driver, no dev?? modprobe: Failed to load module g_ether: No such device. After a great deal of printking, I've determined that the error is coming from platform_driver_probe (platform.c:499). The code in question appears to be a check ensuring that any devices being probe were first registered. When the musb-hdrc module is probed, this check seems to fail with code = 1 and list_empty(drv-driver.p-klist_devices.k_list) = 1. looking at your .config from previous mail, it's wrong. You're trying to use am35x glue layer while you be using omap2430, just change: - CONFIG_USB_MUSB_AM35X=y + # CONFIG_USB_MUSB_AM35X is not set + CONFIG_USB_MUSB_OMAP2PLUS=y -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
(break your lines at 80-chars, I asked you to do this before)
On Mon, Mar 28, 2011 at 08:06:32AM +, kalle.jokini...@nokia.com wrote:
Hi,
-Original Message-
From: ext Keshava Munegowda [mailto:keshava_mgo...@ti.com]
Sent: 28. maaliskuuta 2011 10:19
To: Jokiniemi Kalle (Nokia-MS/Tampere); linux-...@vger.kernel.org; linux-
o...@vger.kernel.org; Felipe Balbi
Cc: Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; Kevin Hilman
Subject: RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
+
static struct platform_device rx51_charger_device = {
-.name = isp1704_charger,
+.name = isp1704_charger,
Both are same; you don't need this change!
No, actually they are not same. I added tab instead of space to match
indentation with the .dev member. This is the correct way IMHO.
Still, changing that indentation isn't part of $SUBJECT. You need to put
that in another patch.
--
balbi
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Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
On Mon, Mar 28, 2011 at 12:20:02PM +0400, Sergei Shtylyov wrote:
+static void __init rx51_charger_init(void)
+{
+BUG_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
+GPIOF_OUT_INIT_LOW, isp1704_reset));
I'm not sure we should kill the machine if this fails...
agreed.
--
balbi
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RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
-Original Message-
From: ext Felipe Balbi [mailto:ba...@ti.com]
Sent: 28. maaliskuuta 2011 11:39
To: Jokiniemi Kalle (Nokia-MS/Tampere)
Cc: keshava_mgo...@ti.com; linux-...@vger.kernel.org; linux-
o...@vger.kernel.org; ba...@ti.com; Krogerus Heikki (Nokia-MS/Helsinki);
jhnik...@gmail.com; khil...@ti.com
Subject: Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
(break your lines at 80-chars, I asked you to do this before)
Sorry, using outlook :( ... Will do that.
On Mon, Mar 28, 2011 at 08:06:32AM +, kalle.jokini...@nokia.com wrote:
Hi,
-Original Message-
From: ext Keshava Munegowda [mailto:keshava_mgo...@ti.com]
Sent: 28. maaliskuuta 2011 10:19
To: Jokiniemi Kalle (Nokia-MS/Tampere); linux-...@vger.kernel.org;
linux-
o...@vger.kernel.org; Felipe Balbi
Cc: Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; Kevin
Hilman
Subject: RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
+
static struct platform_device rx51_charger_device = {
- .name = isp1704_charger,
+ .name = isp1704_charger,
Both are same; you don't need this change!
No, actually they are not same. I added tab instead of space to match
indentation with the .dev member. This is the correct way IMHO.
Still, changing that indentation isn't part of $SUBJECT. You need to put
that in another patch.
Are you sure? It'll be patch that changes indentation that need not be
changed... Only the additional member definition makes the indentation
necessary, hence I see it as natural part of this patch.
But if that's a problem, I can do a separate patch, no problem.
- Kalle
--
balbi
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Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
On Mon, Mar 28, 2011 at 08:52:23AM +, kalle.jokini...@nokia.com wrote:
Hi,
-Original Message-
From: ext Felipe Balbi [mailto:ba...@ti.com]
Sent: 28. maaliskuuta 2011 11:39
To: Jokiniemi Kalle (Nokia-MS/Tampere)
Cc: keshava_mgo...@ti.com; linux-...@vger.kernel.org; linux-
o...@vger.kernel.org; ba...@ti.com; Krogerus Heikki (Nokia-MS/Helsinki);
jhnik...@gmail.com; khil...@ti.com
Subject: Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
(break your lines at 80-chars, I asked you to do this before)
Sorry, using outlook :( ... Will do that.
On Mon, Mar 28, 2011 at 08:06:32AM +, kalle.jokini...@nokia.com wrote:
Hi,
-Original Message-
From: ext Keshava Munegowda [mailto:keshava_mgo...@ti.com]
Sent: 28. maaliskuuta 2011 10:19
To: Jokiniemi Kalle (Nokia-MS/Tampere); linux-...@vger.kernel.org;
linux-
o...@vger.kernel.org; Felipe Balbi
Cc: Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; Kevin
Hilman
Subject: RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
+
static struct platform_device rx51_charger_device = {
- .name = isp1704_charger,
+ .name = isp1704_charger,
Both are same; you don't need this change!
No, actually they are not same. I added tab instead of space to match
indentation with the .dev member. This is the correct way IMHO.
Still, changing that indentation isn't part of $SUBJECT. You need to put
that in another patch.
Are you sure? It'll be patch that changes indentation that need not be
changed... Only the additional member definition makes the indentation
necessary, hence I see it as natural part of this patch.
But if that's a problem, I can do a separate patch, no problem.
you need to at least add notes on the commit log explicit saying that
you're also fixing indentation of one member because it's not worth
having a separate patch and blablabla...
--
balbi
--
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RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
-Original Message-
From: ext Felipe Balbi [mailto:ba...@ti.com]
Sent: 28. maaliskuuta 2011 11:55
To: Jokiniemi Kalle (Nokia-MS/Tampere)
Cc: ba...@ti.com; keshava_mgo...@ti.com; linux-...@vger.kernel.org; linux-
o...@vger.kernel.org; Krogerus Heikki (Nokia-MS/Helsinki);
jhnik...@gmail.com; khil...@ti.com
Subject: Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
On Mon, Mar 28, 2011 at 08:52:23AM +, kalle.jokini...@nokia.com wrote:
Hi,
-Original Message-
From: ext Felipe Balbi [mailto:ba...@ti.com]
Sent: 28. maaliskuuta 2011 11:39
To: Jokiniemi Kalle (Nokia-MS/Tampere)
Cc: keshava_mgo...@ti.com; linux-...@vger.kernel.org; linux-
o...@vger.kernel.org; ba...@ti.com; Krogerus Heikki (Nokia-
MS/Helsinki);
jhnik...@gmail.com; khil...@ti.com
Subject: Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
(break your lines at 80-chars, I asked you to do this before)
Sorry, using outlook :( ... Will do that.
On Mon, Mar 28, 2011 at 08:06:32AM +, kalle.jokini...@nokia.com
wrote:
Hi,
-Original Message-
From: ext Keshava Munegowda [mailto:keshava_mgo...@ti.com]
Sent: 28. maaliskuuta 2011 10:19
To: Jokiniemi Kalle (Nokia-MS/Tampere); linux-...@vger.kernel.org;
linux-
o...@vger.kernel.org; Felipe Balbi
Cc: Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; Kevin
Hilman
Subject: RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
+
static struct platform_device rx51_charger_device = {
-.name = isp1704_charger,
+.name = isp1704_charger,
Both are same; you don't need this change!
No, actually they are not same. I added tab instead of space to match
indentation with the .dev member. This is the correct way IMHO.
Still, changing that indentation isn't part of $SUBJECT. You need to put
that in another patch.
Are you sure? It'll be patch that changes indentation that need not be
changed... Only the additional member definition makes the indentation
necessary, hence I see it as natural part of this patch.
But if that's a problem, I can do a separate patch, no problem.
you need to at least add notes on the commit log explicit saying that
you're also fixing indentation of one member because it's not worth
having a separate patch and blablabla...
Sounds fair, I'll do that.
- Kalle
--
balbi
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Re: [PATCH 0/4] iommu: Prevent oops in iommu_get() and while arch_iommu is in use
Hi Sakari, On Sun, Mar 27, 2011 at 8:27 PM, Sakari Ailus sakari.ai...@maxwell.research.nokia.com wrote: Ramirez Luna, Omar wrote: On Fri, Mar 25, 2011 at 10:13 AM, Sakari Ailus sakari.ai...@maxwell.research.nokia.com wrote: Hi, This patchset is aimed to fix a problem in arch_iommu implementation references. When an actual arch_iommu implementation is not loaded while iommu_get() is being called results to a kernel oops, as well as removing an arch_iommu implementation which is in use. How about fixing the dependency instead? Right now iommu2 depends on iommu because of the calls to install_iommu_arch/uninstall_iommu_arch... we should change that dependency to iommu depend on iommu2. Something like iommu (plat) querying iommu2 (mach) for devices to install. There is no direct dependency from a driver using the generic API to a particular implementation of the iommu. This comes from the design of the iommu framework. The generic layer shouldn't depend on particular implementation(s). What comes to the patch, it works as long as there's only one iommu implementation loaded / compiled to the kernel. I wonder if this kind of limitation can be accepted. The generic iommu driver cannot support more than one implementation loaded at the same time, so your patch is correct by assuming it. Regards, David Cohen Regards, -- Sakari Ailus sakari.ai...@maxwell.research.nokia.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/2] isp1704_charger: allow board specific powering routine
Hi,
Add Anton Vorontsov cbouatmai...@gmail.com to your v3. This will
need ack from him, or this needs to go to him. In this case I guess we
are only dealing with RX51 stuff, so maybe this should go to Tony.
On Mon, Mar 28, 2011 at 09:51:38AM +0300, Kalle Jokiniemi wrote:
The ISP1704/1707 chip can be put to full power down
state by asserting the CHIP_SEL line. This patch enables
platform or board specific hooks to put the device into
power down mode in case not needed.
These patches are preparatio for enabling this powering
routine in n900 (rx-51) devices.
Thanks to Heikki Krogerus for helping out with the patch.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
Cc: Heikki Krogerus heikki.kroge...@nokia.com
---
drivers/power/isp1704_charger.c | 26 ++
include/linux/power/isp1704_charger.h | 29 +
2 files changed, 55 insertions(+), 0 deletions(-)
create mode 100644 include/linux/power/isp1704_charger.h
diff --git a/drivers/power/isp1704_charger.c b/drivers/power/isp1704_charger.c
index 2ad9b14..c796b9f 100644
--- a/drivers/power/isp1704_charger.c
+++ b/drivers/power/isp1704_charger.c
@@ -33,6 +33,7 @@
#include linux/usb/ulpi.h
#include linux/usb/ch9.h
#include linux/usb/gadget.h
+#include linux/power/isp1704_charger.h
/* Vendor specific Power Control register */
#define ISP1704_PWR_CTRL 0x3d
@@ -63,6 +64,7 @@ struct isp1704_charger {
charmodel[8];
unsignedpresent:1;
unsignedonline:1;
+ unsignedinit_done;
Do we need this?
unsignedcurrent_max;
/* temp storage variables */
@@ -71,6 +73,18 @@ struct isp1704_charger {
};
/*
+ * Disable/enable the power from the isp1704 if a function for it
+ * has been provided with platform data.
+ */
+static void isp1704_charger_set_power(struct isp1704_charger *isp, bool on)
+{
+ struct isp1704_charger_data *board = isp-dev-platform_data;
+
+ if (board-set_power)
+ board-set_power(on);
+}
+
+/*
* Determine is the charging port DCP (dedicated charger) or CDP (Host/HUB
* chargers).
*
@@ -222,6 +236,9 @@ static void isp1704_charger_work(struct work_struct *data)
mutex_lock(lock);
+ if (event != USB_EVENT_NONE)
+ isp1704_charger_set_power(isp, 1);
+
switch (event) {
case USB_EVENT_VBUS:
isp-online = true;
@@ -269,6 +286,9 @@ static void isp1704_charger_work(struct work_struct *data)
*/
if (isp-otg-gadget)
usb_gadget_disconnect(isp-otg-gadget);
+ /* If we're initialized, we can power down the isp */
+ if (isp-init_done)
+ isp1704_charger_set_power(isp, 0);
break;
case USB_EVENT_ENUMERATED:
if (isp-present)
@@ -394,6 +414,8 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
isp-dev = pdev-dev;
platform_set_drvdata(pdev, isp);
+ isp1704_charger_set_power(isp, 1);
+
ret = isp1704_test_ulpi(isp);
if (ret 0)
goto fail1;
@@ -437,8 +459,11 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
if ((ret ULPI_INT_VBUS_VALID) !isp-otg-default_a) {
isp-event = USB_EVENT_VBUS;
schedule_work(isp-work);
+ } else {
+ isp1704_charger_set_power(isp, 0);
}
I think the transceiver can be powered down even if we just scheduled
the work. This will basically cause hw reset on the transceiver which
is only a good thing IMO. Drop the else condition.
+ isp-init_done = 1;
return 0;
fail2:
power_supply_unregister(isp-psy);
@@ -459,6 +484,7 @@ static int __devexit isp1704_charger_remove(struct
platform_device *pdev)
otg_unregister_notifier(isp-otg, isp-nb);
power_supply_unregister(isp-psy);
otg_put_transceiver(isp-otg);
+ isp1704_charger_set_power(isp, 0);
kfree(isp);
return 0;
--
heikki
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Re: [PATCH 0/4] iommu: Prevent oops in iommu_get() and while arch_iommu is in use
On Mon, Mar 28, 2011 at 4:42 AM, Ramirez Luna, Omar omar.rami...@ti.com wrote: Hi, On Sun, Mar 27, 2011 at 12:27 PM, Sakari Ailus sakari.ai...@maxwell.research.nokia.com wrote: Ramirez Luna, Omar wrote: On Fri, Mar 25, 2011 at 10:13 AM, Sakari Ailus sakari.ai...@maxwell.research.nokia.com wrote: This patchset is aimed to fix a problem in arch_iommu implementation references. When an actual arch_iommu implementation is not loaded while iommu_get() is being called results to a kernel oops, as well as removing an arch_iommu implementation which is in use. How about fixing the dependency instead? Right now iommu2 depends on iommu because of the calls to install_iommu_arch/uninstall_iommu_arch... we should change that dependency to iommu depend on iommu2. Something like iommu (plat) querying iommu2 (mach) for devices to install. There is no direct dependency from a driver using the generic API to a particular implementation of the iommu. This comes from the design of the iommu framework. The generic layer shouldn't depend on particular implementation(s). IMHO there is, take as an example bridgedriver (it is arm/omap dependent), so it depends on iommu providing the mach-omap2 implementation. I imagine isp for omap imposes the same dependency, even more your patchset enforces that dependency. The generic layer can exist without a specific implementation. It should accept later arch install/uninstall without any problem. Basically, if there is no arch_iommu the iommu driver does not work, and if there was an arch_iommu but it was removed then the driver crashes. The loaded module *must* uninstall arch when existing, then kernel will see no crash. And yes, generic layer won't work anymore but that's an expected and correct situation. Now, there could be architectures that does not depend on a particular implementation but this iommu driver doesn't support them because if there is no arch_iommu operations, it does nothing or crashes. What comes to the patch, it works as long as there's only one iommu implementation loaded / compiled to the kernel. I wonder if this kind of limitation can be accepted. Which is the way iommu choose to work, like I said if there is no arch_iommu nothing works, most of APIs in iommu depend on an machine specific implementation. To fix that it is not the scope of my proposal. If indeed iommu can function without a machine specific implementation then a redesign needs to be made, but to me the same approach as I did needs to be followed: if there is mach implementation (e.g.: iommu2.c) the generic API needs to depend on it, otherwise the module can be removed and crash the kernel; OTOH if there is no mach implementation, then iommu should not depend on it to be installed as you point out, this could be handled in plat/iommu.h among with: #if defined(CONFIG_ARCH_OMAP1) #error iommu for this processor not implemented yet #else #include plat/iommu2.h #endif So, every new specific implementation should modify this piece of code? Are you sure it's a good idea? Regards, David Cohen A new else defining the install/uninstall_arch_iommu functions or simply reversing the check to be OMAP2+ and error on anything else. Regards, Omar -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[pm-core][PATCH v3 06/21] OMAP4: PM: Initialise all the clockdomains to supported states
Initialise hardware supervised mode for all clockdomains if it's
supported. Initiate sleep transition for other clockdomains,
if they are not being used.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm44xx.c | 22 +-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 5b631f5..4f932f3 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -16,9 +16,11 @@
#include linux/err.h
#include linux/slab.h
-#include powerdomain.h
#include mach/omap4-common.h
+#include powerdomain.h
+#include clockdomain.h
+
struct power_state {
struct powerdomain *pwrdm;
u32 next_state;
@@ -73,6 +75,22 @@ static const struct platform_suspend_ops omap_pm_ops = {
};
#endif /* CONFIG_SUSPEND */
+/*
+ * Enable hardware supervised mode for all clockdomains if it's
+ * supported. Initiate sleep transition for other clockdomains, if
+ * they are not used
+ */
+static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
+{
+ if (clkdm-flags CLKDM_CAN_ENABLE_AUTO)
+ clkdm_allow_idle(clkdm);
+ else if (clkdm-flags CLKDM_CAN_FORCE_SLEEP
+ atomic_read(clkdm-usecount) == 0)
+ clkdm_sleep(clkdm);
+ return 0;
+}
+
+
static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
struct power_state *pwrst;
@@ -111,6 +129,8 @@ static int __init omap4_pm_init(void)
goto err2;
}
+ (void) clkdm_for_each(clkdms_setup, NULL);
+
ret = omap4_mpuss_init();
if (ret) {
pr_err(Failed to initialise OMAP4 MPUSS\n);
--
1.6.0.4
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[pm-core][PATCH v3 03/21] OMAP4: PM: Export omap4_get_base*() rather than global address pointers
This patch exports APIs to get base address for GIC
distributor, CPU interface, SCU and PL310 L2 Cache which
are used in OMAP4 PM code.
This was suggested by Kevin Hilman khil...@ti.com during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/include/mach/omap4-common.h | 13 +++--
arch/arm/mach-omap2/omap-smp.c |6 ++
arch/arm/mach-omap2/omap4-common.c | 21 ++---
3 files changed, 35 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h
b/arch/arm/mach-omap2/include/mach/omap4-common.h
index de441c0..106edef 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -25,11 +25,20 @@
#endif
#ifdef CONFIG_CACHE_L2X0
-extern void __iomem *l2cache_base;
+extern void __iomem *omap4_get_l2cache_base(void);
#endif
-extern void __iomem *gic_dist_base_addr;
+#ifdef CONFIG_SMP
+extern void __iomem *omap4_get_scu_base(void);
+#else
+static inline void __iomem *omap4_get_scu_base(void)
+{
+ return NULL;
+}
+#endif
+extern void __iomem *omap4_get_gic_dist_base(void);
+extern void __iomem *omap4_get_gic_cpu_base(void);
extern void __init gic_init_irq(void);
extern void omap_smc1(u32 fn, u32 arg);
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index b66cfe8..4fcaa4a 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -30,6 +30,12 @@ static void __iomem *scu_base;
static DEFINE_SPINLOCK(boot_lock);
+
+void __iomem *omap4_get_scu_base(void)
+{
+ return scu_base;
+}
+
void __cpuinit platform_secondary_init(unsigned int cpu)
{
/*
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index 8f9b97d..fdacb9e 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -24,15 +24,25 @@
#include mach/omap-wakeupgen.h
#ifdef CONFIG_CACHE_L2X0
-void __iomem *l2cache_base;
+static void __iomem *l2cache_base;
#endif
-void __iomem *gic_dist_base_addr;
+static void __iomem *gic_dist_base_addr;
+static void __iomem *gic_cpu_base;
+void __iomem *omap4_get_gic_dist_base(void)
+{
+ return gic_dist_base_addr;
+}
+
+void __iomem *omap4_get_gic_cpu_base(void)
+{
+ return gic_cpu_base;
+}
+
void __init gic_init_irq(void)
{
- void __iomem *gic_cpu_base;
/* Static mapping, never released */
gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
@@ -51,6 +61,11 @@ void __init gic_init_irq(void)
#ifdef CONFIG_CACHE_L2X0
+void __iomem *omap4_get_l2cache_base(void)
+{
+ return l2cache_base;
+}
+
static void omap4_l2x0_disable(void)
{
/* Disable PL310 L2 Cache controller */
--
1.6.0.4
--
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[pm-core][PATCH v3 08/21] OMAP4: PM: CPU1 wakeup workaround from Low power modes
The SGI(Software Generated Interrupts) are not wakeup capable from
low power states. This is known limitation on OMAP4 and needs to be
worked around by using software forced clockdomain wake-up. CPU0 forces
the CPU1 clockdomain to software force wakeup. After the wakeup, CPU1
restores its clockdomain hardware supervised mode.
More details can be found in OMAP4430 TRM - Version J
Section :
4.3.4.2 Power States of CPU0 and CPU1
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap-hotplug.c |8
arch/arm/mach-omap2/omap-smp.c | 26 +-
2 files changed, 33 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-hotplug.c
b/arch/arm/mach-omap2/omap-hotplug.c
index 9f8f097..fe2dae1 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -23,6 +23,7 @@
#include mach/omap-wakeupgen.h
#include powerdomain.h
+#include clockdomain.h
int platform_cpu_kill(unsigned int cpu)
{
@@ -36,6 +37,10 @@ int platform_cpu_kill(unsigned int cpu)
void platform_cpu_die(unsigned int cpu)
{
unsigned int this_cpu;
+ static struct clockdomain *cpu1_clkdm;
+
+ if (!cpu1_clkdm)
+ cpu1_clkdm = clkdm_lookup(mpu1_clkdm);
flush_cache_all();
dsb();
@@ -59,6 +64,9 @@ void platform_cpu_die(unsigned int cpu)
* OK, proper wakeup, we're done
*/
omap_wakeupgen_irqmask_all(this_cpu, 0);
+
+ /* Restore clockdomain to hardware supervised */
+ clkdm_allow_idle(cpu1_clkdm);
break;
}
pr_debug(CPU%u: spurious wakeup call\n, cpu);
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 4fcaa4a..1230c4e 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -25,6 +25,8 @@
#include mach/hardware.h
#include mach/omap4-common.h
+#include clockdomain.h
+
/* SCU base address */
static void __iomem *scu_base;
@@ -54,6 +56,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
+ static struct clockdomain *cpu1_clkdm;
+ static bool booted;
/*
* Set synchronisation state between this boot processor
* and the secondary one
@@ -69,7 +73,27 @@ int __cpuinit boot_secondary(unsigned int cpu, struct
task_struct *idle)
omap_modify_auxcoreboot0(0x200, 0xfdff);
flush_cache_all();
smp_wmb();
- smp_cross_call(cpumask_of(cpu), 1);
+
+ if (!cpu1_clkdm)
+ cpu1_clkdm = clkdm_lookup(mpu1_clkdm);
+
+ /*
+* The SGI(Software Generated Interrupts) are not wakeup capable
+* from low power states. This is known limitation on OMAP4 and
+* needs to be worked around by using software forced clockdomain
+* wake-up. To wakeup CPU1, CPU0 forces the CPU1 clockdomain to
+* software force wakeup. After the wakeup, CPU1 restores its
+* clockdomain hardware supervised mode.
+* More details can be found in OMAP4430 TRM - Version J
+* Section :
+* 4.3.4.2 Power States of CPU0 and CPU1
+*/
+ if (booted) {
+ clkdm_wakeup(cpu1_clkdm);
+ } else {
+ dsb_sev();
+ booted = true;
+ }
/*
* Now the secondary core is starting up let it run its
--
1.6.0.4
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[pm-core][PATCH v3 11/21] OMAP4: PM: Add WakeupGen save/restore support
WakeupGen IP is integrated along with GIC to manage the
interrupt wakeups from CPU low power states. It's located in
always ON power domain. It manages masking/unmasking of
Shared peripheral interrupts(SPI).So the interrupt enable/disable
control should be in sync and consistent at WakeupGen and GIC so
that interrupts are not lost.
Considering this GIC and WakeupGen save and restore is done
together.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/include/mach/omap-wakeupgen.h |1 +
arch/arm/mach-omap2/omap-wakeupgen.c | 81 +
arch/arm/mach-omap2/omap4-mpuss-lowpower.c|2 +
arch/arm/mach-omap2/omap4-sar-layout.h| 11 +++
4 files changed, 95 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
index f10d106..66f31c3 100644
--- a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
+++ b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
@@ -37,4 +37,5 @@
extern int __init omap_wakeupgen_init(void);
extern void omap_wakeupgen_irqmask_all(unsigned int cpu, unsigned int set);
+extern void omap_wakeupgen_save(void);
#endif
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c
b/arch/arm/mach-omap2/omap-wakeupgen.c
index d9d2a3e..345a55c 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -24,6 +24,9 @@
#include asm/hardware/gic.h
#include mach/omap-wakeupgen.h
+#include mach/omap4-common.h
+
+#include omap4-sar-layout.h
#define NR_BANKS 4
#define MAX_IRQS 128
@@ -35,6 +38,7 @@
/* WakeupGen Base addres */
static void __iomem *wakeupgen_base;
+static void __iomem *sar_base;
static DEFINE_PER_CPU(u32 [NR_BANKS], irqmasks);
static DEFINE_SPINLOCK(wakeupgen_lock);
@@ -54,6 +58,11 @@ static inline void wakeupgen_writel(u32 val, u8 idx, u32 cpu)
(cpu * CPU_ENA_OFFSET) + (idx * 4));
}
+static inline void sar_writel(u32 val, u32 offset, u8 idx)
+{
+ __raw_writel(val, sar_base + offset + (idx * 4));
+}
+
static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
{
u8 i;
@@ -236,3 +245,75 @@ int __init omap_wakeupgen_init(void)
return 0;
}
+
+/**
+ * omap_wakeupgen_save() - WakeupGen context save function
+ *
+ * Save WakewupGen context in SAR BANK3. Restore is done by ROM code.
+ * WakeupGen IP is integrated along with GIC to manage the
+ * interrupt wakeups from CPU low power states. It's located in
+ * always ON power domain. It manages masking/unmasking of
+ * Shared peripheral interrupts(SPI).So the interrupt enable/disable
+ * control should be in sync and consistent at WakeupGen and GIC so
+ * that interrupts are not lost. Hence GIC and WakeupGen are saved
+ * and restored together.
+
+ * During normal operation, WakeupGen delivers external interrupts
+ * directly to the GIC. When the CPU asserts StandbyWFI, indicating
+ * it wants to enter lowpower state, the Standby Controller checks
+ * with the WakeupGen unit using the idlereq/idleack handshake to make
+ * sure there is no incoming interrupts.
+ */
+
+void omap_wakeupgen_save(void)
+{
+ u8 i;
+ u32 val;
+
+ if (omap_rev() == OMAP4430_REV_ES1_0)
+ return;
+
+ if (!sar_base)
+ sar_base = omap4_get_sar_ram_base();
+
+ for (i = 0; i NR_BANKS; i++) {
+ /* Save the CPUx interrupt mask for IRQ 0 to 127 */
+ val = wakeupgen_readl(i, 0);
+ sar_writel(val, WAKEUPGENENB_OFFSET_CPU0, i);
+ val = wakeupgen_readl(i, 1);
+ sar_writel(val, WAKEUPGENENB_OFFSET_CPU1, i);
+
+ /*
+* Disable the secure interrupts for CPUx. The restore
+* code blindly restores secure and non-secure interrupt
+* masks from SAR RAM. Secure interrupts are not suppose
+* to be enabled from HLOS. So overwrite the SAR location
+* so that the secure interrupt remains disabled.
+*/
+ sar_writel(0x0, WAKEUPGENENB_SECURE_OFFSET_CPU0, i);
+ sar_writel(0x0, WAKEUPGENENB_SECURE_OFFSET_CPU1, i);
+ }
+
+ /* Save AuxBoot* registers */
+ val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
+ __raw_writel(val, sar_base + AUXCOREBOOT0_OFFSET);
+ val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
+ __raw_writel(val, sar_base + AUXCOREBOOT1_OFFSET);
+
+ /* Save SyncReq generation logic */
+ val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
+ __raw_writel(val, sar_base + AUXCOREBOOT0_OFFSET);
+ val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
+ __raw_writel(val, sar_base + AUXCOREBOOT1_OFFSET);
+
+ /* Save SyncReq generation logic */
+ val = __raw_readl(wakeupgen_base +
[pm-core][PATCH v3 04/21] OMAP4: PM: Add SAR RAM support
This patch adds SAR RAM support on OMAP4430. SAR RAM used to save
and restore the HW context in low power modes.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/include/mach/omap4-common.h |1 +
arch/arm/mach-omap2/omap4-common.c | 31 ++-
arch/arm/mach-omap2/omap4-sar-layout.h | 22
arch/arm/plat-omap/include/plat/omap44xx.h |1 +
4 files changed, 54 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/omap4-sar-layout.h
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h
b/arch/arm/mach-omap2/include/mach/omap4-common.h
index 106edef..284180c 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -39,6 +39,7 @@ static inline void __iomem *omap4_get_scu_base(void)
extern void __iomem *omap4_get_gic_dist_base(void);
extern void __iomem *omap4_get_gic_cpu_base(void);
+extern void __iomem *omap4_get_sar_ram_base(void);
extern void __init gic_init_irq(void);
extern void omap_smc1(u32 fn, u32 arg);
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index fdacb9e..97d7d8a 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -23,13 +23,15 @@
#include mach/omap4-common.h
#include mach/omap-wakeupgen.h
+#include omap4-sar-layout.h
+
#ifdef CONFIG_CACHE_L2X0
static void __iomem *l2cache_base;
#endif
static void __iomem *gic_dist_base_addr;
static void __iomem *gic_cpu_base;
-
+static void __iomem *sar_ram_base;
void __iomem *omap4_get_gic_dist_base(void)
{
@@ -125,3 +127,30 @@ static int __init omap_l2_cache_init(void)
}
early_initcall(omap_l2_cache_init);
#endif
+
+void __iomem *omap4_get_sar_ram_base(void)
+{
+ return sar_ram_base;
+}
+
+/*
+ * SAR RAM used to save and restore the HW
+ * context in low power modes
+ */
+static int __init omap4_sar_ram_init(void)
+{
+ /*
+* To avoid code running on other OMAPs in
+* multi-omap builds
+*/
+ if (!cpu_is_omap44xx())
+ return -ENODEV;
+
+ /* Static mapping, never released */
+ sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_8K);
+ if (WARN_ON(!sar_ram_base))
+ return -ENODEV;
+
+ return 0;
+}
+early_initcall(omap4_sar_ram_init);
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h
b/arch/arm/mach-omap2/omap4-sar-layout.h
new file mode 100644
index 000..1cfb4dd
--- /dev/null
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -0,0 +1,22 @@
+/*
+ * omap4-sar-layout.h: OMAP4 SAR RAM layout header file
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Santosh Shilimkar santosh.shilim...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef OMAP_ARCH_OMAP4_SAR_LAYOUT_H
+#define OMAP_ARCH_OMAP4_SAR_LAYOUT_H
+
+/*
+ * SAR BANK offsets from base address OMAP44XX_SAR_RAM_BASE
+ */
+#define SAR_BANK1_OFFSET 0x
+#define SAR_BANK2_OFFSET 0x1000
+#define SAR_BANK3_OFFSET 0x2000
+#define SAR_BANK4_OFFSET 0x3000
+
+#endif
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h
b/arch/arm/plat-omap/include/plat/omap44xx.h
index ea2b8a6..c0d478e 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -45,6 +45,7 @@
#define OMAP44XX_WKUPGEN_BASE 0x48281000
#define OMAP44XX_MCPDM_BASE0x40132000
#define OMAP44XX_MCPDM_L3_BASE 0x49032000
+#define OMAP44XX_SAR_RAM_BASE 0x4a326000
#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
#define OMAP44XX_HSUSB_OTG_BASE(L4_44XX_BASE + 0xAB000)
--
1.6.0.4
--
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[pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
This patch adds OMAP WakeupGen support. The WakeupGen unit is responsible for generating wakeup event from the incoming interrupts and enable bits. The WakeupGen is implemented in MPU Always-On power domain. During normal operation, WakeupGen delivers external interrupts directly to the GIC. When the CPUx asserts StandbyWFI, indicating it wants to enter lowpower state, the Standby Controller checks with the WakeupGen unit using the idlereq/idleack handshake to make sure there is no incoming interrupts. The GIC and WakeupGen needs to be kept in synchronisation for proper interrupt functioning. Hence this patch hooks up the omap WakeupGen mask/unmask along with GIC using architecture specific hooks. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com Cc: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/Makefile |3 +- arch/arm/mach-omap2/include/mach/omap-wakeupgen.h | 40 arch/arm/mach-omap2/omap-wakeupgen.c | 238 + arch/arm/mach-omap2/omap4-common.c|3 + 4 files changed, 283 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-omap2/include/mach/omap-wakeupgen.h create mode 100644 arch/arm/mach-omap2/omap-wakeupgen.c diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 82b2a67..9b654bf 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -24,7 +24,8 @@ obj-$(CONFIG_TWL4030_CORE) += omap_twl.o obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o -obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o +obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o \ + omap-wakeupgen.o plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) diff --git a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h new file mode 100644 index 000..f10d106 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h @@ -0,0 +1,40 @@ +/* + * OMAP WakeupGen header file + * + * Copyright (C) 2011 Texas Instruments, Inc. + * Written by Santosh Shilimkar santosh.shilim...@ti.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef OMAP_ARCH_WAKEUPGEN_H +#define OMAP_ARCH_WAKEUPGEN_H + +#define OMAP_WKG_CONTROL_0 0x00 +#define OMAP_WKG_ENB_A_0 0x10 +#define OMAP_WKG_ENB_B_0 0x14 +#define OMAP_WKG_ENB_C_0 0x18 +#define OMAP_WKG_ENB_D_0 0x1c +#define OMAP_WKG_ENB_SECURE_A_00x20 +#define OMAP_WKG_ENB_SECURE_B_00x24 +#define OMAP_WKG_ENB_SECURE_C_00x28 +#define OMAP_WKG_ENB_SECURE_D_00x2c +#define OMAP_WKG_ENB_A_1 0x410 +#define OMAP_WKG_ENB_B_1 0x414 +#define OMAP_WKG_ENB_C_1 0x418 +#define OMAP_WKG_ENB_D_1 0x41c +#define OMAP_WKG_ENB_SECURE_A_10x420 +#define OMAP_WKG_ENB_SECURE_B_10x424 +#define OMAP_WKG_ENB_SECURE_C_10x428 +#define OMAP_WKG_ENB_SECURE_D_10x42c +#define OMAP_AUX_CORE_BOOT_0 0x800 +#define OMAP_AUX_CORE_BOOT_1 0x804 +#define OMAP_PTMSYNCREQ_MASK 0xc00 +#define OMAP_PTMSYNCREQ_EN 0xc04 +#define OMAP_TIMESTAMPCYCLELO 0xc08 +#define OMAP_TIMESTAMPCYCLEHI 0xc0c + +extern int __init omap_wakeupgen_init(void); +extern void omap_wakeupgen_irqmask_all(unsigned int cpu, unsigned int set); +#endif diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c new file mode 100644 index 000..d9d2a3e --- /dev/null +++ b/arch/arm/mach-omap2/omap-wakeupgen.c @@ -0,0 +1,238 @@ +/* + * OMAP WakeupGen Source file + * + * The WakeupGen unit is responsible for generating wakeup event from the + * incoming interrupts and enable bits. The WakeupGen is implemented in MPU + * always-On power domain. The WakeupGen consists of two sub-units, one for + * each CPU and manages only SPI interrupts. Hardware requirements is that + * the GIC and WakeupGen should be kept in sync for proper operation. + * + * Copyright (C) 2011 Texas Instruments, Inc. + * Written by Santosh Shilimkar santosh.shilim...@ti.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software
[pm-core][PATCH v3 02/21] OMAP4: Use WARN_ON() instead of BUG_ON() with graceful exit
OMAP L2X0 and GIC initialisation code uses BUG_ON() for the ioremap() failure scenarios. Use WARN_ON() instead and allow graceful function exits. This was suggsted by Kevin Hilman khil...@ti.com during OMAP4 PM code review. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com Cc: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/omap4-common.c |9 ++--- 1 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 559d227..8f9b97d 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -36,11 +36,13 @@ void __init gic_init_irq(void) /* Static mapping, never released */ gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); - BUG_ON(!gic_dist_base_addr); + if (WARN_ON(!gic_dist_base_addr)) + return; /* Static mapping, never released */ gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); - BUG_ON(!gic_cpu_base); + if (WARN_ON(!gic_cpu_base)) + return; omap_wakeupgen_init(); @@ -68,7 +70,8 @@ static int __init omap_l2_cache_init(void) /* Static mapping, never released */ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); - BUG_ON(!l2cache_base); + if (WARN_ON(!l2cache_base)) + return -ENODEV; /* * 16-way associativity, parity disabled -- 1.6.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[pm-core][PATCH v3 20/21] OMAP4: PM: Set static dependency between MPUSS-EMIF and MPUSS-L3_1
As per OMAP4430 TRM, the dynamic dependency between MPUSS-MEMIF
and MPUSS-L3_MAIN_1 clockdomains is enable by default. Refer
register CM_MPU_DYNAMICDEP description for details.
But it doesn't seems to work as expected and MPUSS doesn't wakeup
from off-mode if the static dependency is not set between
MPUSS-EMIF and MPUSS-L3_MAIN_1 clockdomains. At times, CPU
dead-locks with above static dependencies cleared.
The issue is under investigation with hardware team.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm44xx.c | 30 ++
1 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index b78417c..40a44a9 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -182,6 +182,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm,
void *unused)
static int __init omap4_pm_init(void)
{
int ret;
+ struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;
if (!cpu_is_omap44xx())
return -ENODEV;
@@ -196,6 +197,35 @@ static int __init omap4_pm_init(void)
(void) clkdm_for_each(clkdms_setup, NULL);
+ /*
+* FIXME: Remove the MPUSS - EMIF static dependency once the
+* dynamic dependency issue is root-caused.
+* The dynamic dependency between MPUSS - MEMIF and MPUSS - L3_1
+* doesn't seems to work as expected and MPUSS does not wakeup
+* from off-mode if the static dependency is not set between them.
+* At times CPUs dead-locks with above static dependencies cleared.
+*/
+ mpuss_clkdm = clkdm_lookup(mpuss_clkdm);
+ emif_clkdm = clkdm_lookup(l3_emif_clkdm);
+ l3_1_clkdm = clkdm_lookup(l3_1_clkdm);
+ if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm))
+ goto err2;
+
+ ret = clkdm_add_wkdep(mpuss_clkdm, emif_clkdm);
+ if (ret) {
+ pr_err(Failed to add MPUSS - EMIF wakeup dependency\n);
+ goto err2;
+ }
+
+ ret = clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
+ if (ret) {
+ pr_err(Failed to add MPUSS - L3_MAIN_1 wakeup dependency\n);
+ goto err2;
+ }
+
+ pr_info(OMAP4 PM: Temporary static dependency added between
+ MPUSS - EMIF and MPUSS - L3_MAIN_1.\n);
+
ret = omap4_mpuss_init();
if (ret) {
pr_err(Failed to initialise OMAP4 MPUSS\n);
--
1.6.0.4
--
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[pm-core][PATCH v3 00/21] OMAP4: PM: suspend, CPU-hotplug and CPUilde support
V3 updates: It's same as V2 with couple of minor updates and its rebased on Kevin's latest pm-core branch. - Dropped 'enable_off_mode' flag altogether for OMAP4 as discussed on the list. - Removed non-supported pm debug entries The following changes since commit 61cbb3172176b84c106bf0f4c32317c472932ab5: Kevin Hilman (1): Merge branch 'for_2.6.40/pm-misc' into pm-reset are available in the git repository at: git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_v3 Dependent patches and integrated barnch against pm-core branch are also available at below. git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_dep git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_int V2 updates: Rebased on Kevin's latest pm-core branch and fixes below comments from Kevin Hilman khil...@ti.com. - All acronym fixes - Use WARN_ON() instead of BUG_ON() with graceful exit. - Export omap4_get_base*() rather than global address pointers - CPUidle prepare() hook + hotplug notifier to manage C-state dynamically. - Dropped debugfs way of changing C-state valid flags in favor of above. This series adds OMAP4 suspend and cpuidle support till MPU subsystem (MPUSS) off-mode. The suspend on SMP machines uses cpu-hotplug infrastructure to take down the non-boot CPUs. We put secondary CPU(CPU1 in OMAP4) to OFF state via cpu-hotplug. In cpuidle too, low power states are attempted only when the CPU1 is put to OFF state via cpu-hotplug because of hardware constraints. Timer wakeup from suspend, debug pm counters and enable_off_mode provisions are supported as well. Special thanks to Kevin Hilman khil...@ti.com for doing detail off-the list reviews. The patches are generated against mainline 2.6.38-rc5 and tested with OMAP4430 SDP and OMAP4 PANDA board. Any OMAP4 board with ES2.X silicon, below features should work with this series. On ES1.0, these PM features are not supported. 1. CPU hotplug (CPU is put into off-mode) 2. Suspend (Both CPUs put to off-mode and MPUSS to OFF/RET) 3. CPUILDE with below C-states. C1 - CPU0 ON + CPU1 ON/OFF + MPU ON + CORE ON C2 - CPU0 ON + CPU1 OFF + MPU ON + CORE ON C3 - CPU0 OFF + CPU1 OFF + MPU CSWR + CORE ON C4 - CPU0 OFF + CPU1 OFF + MPU OFF + CORE ON In OMAP4 mpuss consist of dual Cortex-A9 with per-cpu local timers GIC(Generic Interrupt Controller), SCU(Snoop Control Unit) and PL310 L2 cache controller and CPU0/CPU1 LPRM modules. CPU0, CPU1 and MPUSS have there own power domain and hence multiple low power state combinations are possible. The CPU10 and CPU1 Close switch Retention(CSWR) isn't supported by hardware. Based on various studies, measurements, hardware constraints and recommendations from hardware team, only below low power modes are supported on OMAP4. CPU0CPU1MPUSS ON ON ON OFF OFF CSWR OFF OFF OSWR OFF OFF OFF - Note: CPU0 is the master core and it is the last CPU to go down and first to wake-up when MPUSS low power states are attempted OSWR(Open Switch Retention) is not added as part of this series because it needs some power domain level support which isn't ready yet. http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38667.html Powerdomain INACTIVE support is also dropped because of its inconsistency between OMAP4 and OMAP3. More information on this thread - http://www.spinics.net/lists/linux-omap/msg45370.html The cpu-hotplug and suspend works with omap2plus_defconfig. Not to damage your file system with current omap2plus_defconfig, disable ARCH_OMAP2 so that V6 and V7 support is not built together with SMP. To tryout cpuidle, CONFIG_CPU_IDLE needs to be enabled in the build. CPU-HOTPLUG commands : offline : $echo 0 /sys/devices/system/cpu/cpu1/online online : $echo 1 /sys/devices/system/cpu/cpu1/online Suspend :$echo mem /sys/power/state cpuilde : To trigger cpuidle deeper C-states on OMAP4, CPU1 needs to be offlied $echo 0 /sys/devices/system/cpu/cpu1/online To see PM debug counters, $mount -t debugfs debugfs /proc/sys/debug/ $cat /proc/sys/debug/pm_debug/count The following changes since commit 61cbb3172176b84c106bf0f4c32317c472932ab5: Kevin Hilman (1): Merge branch 'for_2.6.40/pm-misc' into pm-reset are available in the git repository at: git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_v3 Rajendra Nayak (1): OMAP4: cpuidle: Basic CPUidle support Santosh Shilimkar (20): OMAP4: PM: Add omap WakeupGen module support OMAP4: Use WARN_ON() instead of BUG_ON() with graceful exit OMAP4: PM: Export
[pm-core][PATCH v3 10/21] OMAP4: PM: Add GIC save/restore support
On OMAP4 when attempting MPU off-mode or OSWR, the GIC context is
lost. This patch adds GIC context save and restore support.
The context save is done by software and restore is done by
ROM code from predefined SAR locations where the context supposed
to be saved. Refer to OMAP4430 TRM for the SAR RAM layout.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap-hotplug.c |4 +
arch/arm/mach-omap2/omap4-mpuss-lowpower.c | 195 +++-
arch/arm/mach-omap2/omap4-sar-layout.h | 20 +++
3 files changed, 213 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-hotplug.c
b/arch/arm/mach-omap2/omap-hotplug.c
index fe2dae1..f69cd5c 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -19,6 +19,8 @@
#include linux/smp.h
#include asm/cacheflush.h
+#include asm/hardware/gic.h
+
#include mach/omap4-common.h
#include mach/omap-wakeupgen.h
@@ -57,6 +59,7 @@ void platform_cpu_die(unsigned int cpu)
* clear all interrupt wakeup sources
*/
omap_wakeupgen_irqmask_all(cpu, 1);
+ gic_cpu_disable();
omap4_enter_lowpower(cpu, PWRDM_POWER_OFF);
this_cpu = hard_smp_processor_id();
if (omap_read_auxcoreboot0() == this_cpu) {
@@ -64,6 +67,7 @@ void platform_cpu_die(unsigned int cpu)
* OK, proper wakeup, we're done
*/
omap_wakeupgen_irqmask_all(this_cpu, 0);
+ gic_cpu_enable();
/* Restore clockdomain to hardware supervised */
clkdm_allow_idle(cpu1_clkdm);
diff --git a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
index 21c5ad3..446b956 100644
--- a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
@@ -47,6 +47,8 @@
#include asm/tlbflush.h
#include asm/smp_scu.h
#include asm/system.h
+#include asm/irq.h
+#include asm/hardware/gic.h
#include plat/omap44xx.h
#include mach/omap4-common.h
@@ -57,13 +59,41 @@
#ifdef CONFIG_SMP
+#define GIC_MASK_ALL 0x0
+#define GIC_ISR_NON_SECURE 0x
+#define SPI_ENABLE_SET_OFFSET 0x04
+#define PPI_PRI_OFFSET 0x1c
+#define SPI_PRI_OFFSET 0x20
+#define SPI_TARGET_OFFSET 0x20
+#define SPI_CONFIG_OFFSET 0x20
+
+/* GIC save SAR bank base */
+static struct powerdomain *mpuss_pd;
+
+/* Variables to store maximum spi(Shared Peripheral Interrupts) registers. */
+static u32 max_spi_irq, max_spi_reg;
+
struct omap4_cpu_pm_info {
struct powerdomain *pwrdm;
void __iomem *scu_sar_addr;
};
+static void __iomem *gic_dist_base;
+static void __iomem *sar_base;
+
static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
+/* Helper functions */
+static inline void sar_writel(u32 val, u32 offset, u8 idx)
+{
+ __raw_writel(val, sar_base + offset + 4 * idx);
+}
+
+static inline u32 gic_readl(u32 offset, u8 idx)
+{
+ return __raw_readl(gic_dist_base + offset + 4 * idx);
+}
+
/*
* Set the CPUx powerdomain's previous power state
*/
@@ -121,6 +151,85 @@ static void scu_pwrst_prepare(unsigned int cpu_id,
unsigned int cpu_state)
}
/*
+ * Save GIC context in SAR RAM. Restore is done by ROM code
+ * GIC is lost only when MPU hits OSWR or OFF. It consists
+ * of a distributor and a per-CPU interface module. The GIC
+ * save restore is optimised to save only necessary registers.
+ */
+static void gic_save_context(void)
+{
+ u8 i;
+ u32 val;
+
+ /*
+* Interrupt Clear Enable registers are inverse of set enable
+* and hence not needed to be saved. ROM code programs it
+* based on Set Enable register values.
+*/
+
+ /* Save CPU 0 Interrupt Set Enable register */
+ val = gic_readl(GIC_DIST_ENABLE_SET, 0);
+ sar_writel(val, ICDISER_CPU0_OFFSET, 0);
+
+ /* Disable interrupts on CPU1 */
+ sar_writel(GIC_MASK_ALL, ICDISER_CPU1_OFFSET, 0);
+
+ /* Save all SPI Set Enable register */
+ for (i = 0; i max_spi_reg; i++) {
+ val = gic_readl(GIC_DIST_ENABLE_SET + SPI_ENABLE_SET_OFFSET, i);
+ sar_writel(val, ICDISER_SPI_OFFSET, i);
+ }
+
+ /*
+* Interrupt Priority Registers
+* Secure sw accesses, last 5 bits of the 8 bits (bit[7:3] are used)
+* Non-Secure sw accesses, last 4 bits (i.e. bits[7:4] are used)
+* But the Secure Bits[7:3] are shifted by 1 in Non-Secure access.
+* Secure (bits[7:3] 1)== Non Secure bits[7:4]
+* Hence right shift the value by 1 while saving the priority
+*/
+
+ /* Save SGI priority registers (Software Generated Interrupt) */
+ for (i = 0; i 4; i++) {
+
[pm-core][PATCH v3 15/21] OMAP4: cpuidle: Basic CPUidle support
From: Rajendra Nayak rna...@ti.com
The patch adds a basic CPUidle driver for OMAP4. Just
one C state is registered for CPU0 which does a WFI.
CPU1 is left with defualt idle and the low power state
for it is managed via cpu-hotplug.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/cpuidle44xx.c | 161 +
arch/arm/mach-omap2/pm.h |1 +
arch/arm/mach-omap2/pm44xx.c |2 +
4 files changed, 166 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/cpuidle44xx.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8558215..eec783d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -64,7 +64,8 @@ obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o \
cpuidle34xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o \
- omap4-mpuss-lowpower.o sleep44xx.o
+ omap4-mpuss-lowpower.o sleep44xx.o \
+ cpuidle44xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c
b/arch/arm/mach-omap2/cpuidle44xx.c
new file mode 100644
index 000..270404f
--- /dev/null
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -0,0 +1,161 @@
+/*
+ * OMAP4 CPU idle Routines
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Rajendra Nayak rna...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/sched.h
+#include linux/cpuidle.h
+
+#include asm/proc-fns.h
+
+#include mach/omap4-common.h
+
+#include pm.h
+
+#ifdef CONFIG_CPU_IDLE
+
+#define OMAP4_MAX_STATES 1
+/* C1 - CPU0 ON + + CPU1 ON + MPU ON + CORE ON */
+#define OMAP4_STATE_C1 0
+
+struct omap4_processor_cx {
+ u8 valid;
+ u8 type;
+ u32 sleep_latency;
+ u32 wakeup_latency;
+ u32 cpu0_state;
+ u32 mpu_state;
+ u32 core_state;
+ u32 threshold;
+ u32 flags;
+};
+
+struct omap4_processor_cx omap4_power_states[OMAP4_MAX_STATES];
+
+static struct cpuidle_params cpuidle_params_table[] = {
+ /* C1 */
+ {1, 2, 2, 5},
+};
+
+/**
+ * omap4_enter_idle - Programs OMAP4 to enter the specified state
+ * @dev: cpuidle device
+ * @state: The target state to be programmed
+ *
+ * Called from the CPUidle framework to program the device to the
+ * specified low power state selected by the governor.
+ * Returns the amount of time spent in the low power state.
+ */
+static int omap4_enter_idle(struct cpuidle_device *dev,
+ struct cpuidle_state *state)
+{
+ struct timespec ts_preidle, ts_postidle, ts_idle;
+
+ /* Used to keep track of the total time in idle */
+ getnstimeofday(ts_preidle);
+
+ local_irq_disable();
+ local_fiq_disable();
+
+ cpu_do_idle();
+
+ getnstimeofday(ts_postidle);
+ ts_idle = timespec_sub(ts_postidle, ts_preidle);
+
+ local_irq_enable();
+ local_fiq_enable();
+
+ return ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * USEC_PER_SEC;
+}
+
+DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev);
+
+/**
+ * omap4_init_power_states - Initialises the OMAP4 specific C states.
+ *
+ * Below is the desciption of each C state.
+ * C1 : CPUx wfi + MPU inative + Core inactive
+ */
+void omap4_init_power_states(void)
+{
+ /*
+* C1 - CPU0 ON + + CPU1 ON + MPU ON + CORE ON
+*/
+ omap4_power_states[OMAP4_STATE_C1].valid =
+ cpuidle_params_table[OMAP4_STATE_C1].valid;
+ omap4_power_states[OMAP4_STATE_C1].type = OMAP4_STATE_C1;
+ omap4_power_states[OMAP4_STATE_C1].sleep_latency =
+ cpuidle_params_table[OMAP4_STATE_C1].sleep_latency;
+ omap4_power_states[OMAP4_STATE_C1].wakeup_latency =
+ cpuidle_params_table[OMAP4_STATE_C1].wake_latency;
+ omap4_power_states[OMAP4_STATE_C1].threshold =
+ cpuidle_params_table[OMAP4_STATE_C1].threshold;
+ omap4_power_states[OMAP4_STATE_C1].mpu_state = PWRDM_POWER_ON;
+ omap4_power_states[OMAP4_STATE_C1].core_state = PWRDM_POWER_ON;
+ omap4_power_states[OMAP4_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
+
+}
+
+struct cpuidle_driver omap4_idle_driver = {
+ .name = omap4_idle,
+ .owner =THIS_MODULE,
+};
+
+/**
+ * omap4_idle_init - Init routine
[pm-core][PATCH v3 07/21] OMAP4: PM: Program CPU1 to hit OFF when off-lined
Program non-boot CPUs to hit lowest supported power state
when it is off-lined using cpu hotplug framework.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap-hotplug.c | 18 +-
1 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-hotplug.c
b/arch/arm/mach-omap2/omap-hotplug.c
index 4976b93..9f8f097 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -20,6 +20,9 @@
#include asm/cacheflush.h
#include mach/omap4-common.h
+#include mach/omap-wakeupgen.h
+
+#include powerdomain.h
int platform_cpu_kill(unsigned int cpu)
{
@@ -32,6 +35,8 @@ int platform_cpu_kill(unsigned int cpu)
*/
void platform_cpu_die(unsigned int cpu)
{
+ unsigned int this_cpu;
+
flush_cache_all();
dsb();
@@ -39,18 +44,21 @@ void platform_cpu_die(unsigned int cpu)
* we're ready for shutdown now, so do it
*/
if (omap_modify_auxcoreboot0(0x0, 0x200) != 0x0)
- printk(KERN_CRIT Secure clear status failed\n);
+ pr_err(Secure clear status failed\n);
for (;;) {
/*
-* Execute WFI
+* Enter into low power state
+* clear all interrupt wakeup sources
*/
- do_wfi();
-
- if (omap_read_auxcoreboot0() == cpu) {
+ omap_wakeupgen_irqmask_all(cpu, 1);
+ omap4_enter_lowpower(cpu, PWRDM_POWER_OFF);
+ this_cpu = hard_smp_processor_id();
+ if (omap_read_auxcoreboot0() == this_cpu) {
/*
* OK, proper wakeup, we're done
*/
+ omap_wakeupgen_irqmask_all(this_cpu, 0);
break;
}
pr_debug(CPU%u: spurious wakeup call\n, cpu);
--
1.6.0.4
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[pm-core][PATCH v3 09/21] OMAP4: PM: Add GIC distributor and interface enable/disable accessory API
The power management code needs to have access to enable/disable the
gic cpu interface and distributor based on targetted low power
states.
These APIs are suppose to me moved to common ARM GIC library and patch
for the same was posted earlier. The GIC code refactoring is ongoing
and hence for time being this is kept under OMAP code so that OMAP4
PM can continue to work.
Discussion thread:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42940.html
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
Cc: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-omap2/include/mach/omap4-common.h |5 +++-
arch/arm/mach-omap2/omap4-common.c | 24 +++
2 files changed, 28 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h
b/arch/arm/mach-omap2/include/mach/omap4-common.h
index a6ce905..a4b3beb 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -44,6 +44,10 @@ extern void __iomem *omap4_get_gic_dist_base(void);
extern void __iomem *omap4_get_gic_cpu_base(void);
extern void __iomem *omap4_get_sar_ram_base(void);
extern void __init gic_init_irq(void);
+extern void gic_cpu_enable(void);
+extern void gic_cpu_disable(void);
+extern void gic_dist_enable(void);
+extern void gic_dist_disable(void);
extern void omap_smc1(u32 fn, u32 arg);
/*
@@ -64,7 +68,6 @@ extern int omap4_mpuss_init(void);
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
extern void omap4_cpu_suspend(unsigned int cpu, unsigned int save_state);
extern void omap4_cpu_resume(void);
-
#else
static inline int omap4_enter_lowpower(unsigned int cpu,
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index 97d7d8a..9dd50b7 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -61,6 +61,30 @@ void __init gic_init_irq(void)
gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
}
+/*
+ * FIXME: Remove this GIC APIs once common GIG library starts
+ * supporting it.
+ */
+void gic_cpu_enable(void)
+{
+ __raw_writel(0xf0, gic_cpu_base + GIC_CPU_PRIMASK);
+ __raw_writel(1, gic_cpu_base + GIC_CPU_CTRL);
+}
+
+void gic_cpu_disable(void)
+{
+ __raw_writel(0, gic_cpu_base + GIC_CPU_CTRL);
+}
+
+void gic_dist_enable(void)
+{
+ __raw_writel(0x1, gic_dist_base_addr + GIC_DIST_CTRL);
+}
+void gic_dist_disable(void)
+{
+ __raw_writel(0, gic_dist_base_addr + GIC_CPU_CTRL);
+}
+
#ifdef CONFIG_CACHE_L2X0
void __iomem *omap4_get_l2cache_base(void)
--
1.6.0.4
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[pm-core][PATCH v3 05/21] OMAP4: PM: Add CPUX OFF mode support
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for hotplug, suspend and CPUilde.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/Makefile|4 +-
arch/arm/mach-omap2/include/mach/omap4-common.h | 46 +++
arch/arm/mach-omap2/omap4-mpuss-lowpower.c | 240
arch/arm/mach-omap2/omap4-sar-layout.h | 11 +
arch/arm/mach-omap2/pm44xx.c|6 +
arch/arm/mach-omap2/sleep44xx.S | 339 +++
6 files changed, 645 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/omap4-mpuss-lowpower.c
create mode 100644 arch/arm/mach-omap2/sleep44xx.S
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 9b654bf..8558215 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -63,13 +63,15 @@ obj-$(CONFIG_ARCH_OMAP2)+= pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o \
cpuidle34xx.o pm_bus.o
-obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
+obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o \
+ omap4-mpuss-lowpower.o sleep44xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
+AFLAGS_sleep44xx.o :=-Wa,-march=armv7-a
ifeq ($(CONFIG_PM_VERBOSE),y)
CFLAGS_pm_bus.o+= -DDEBUG
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h
b/arch/arm/mach-omap2/include/mach/omap4-common.h
index 284180c..a6ce905 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -13,6 +13,9 @@
#ifndef OMAP_ARCH_OMAP4_COMMON_H
#define OMAP_ARCH_OMAP4_COMMON_H
+#include asm/proc-fns.h
+
+#ifndef __ASSEMBLER__
/*
* wfi used in low power code. Directly opcode is used instead
* of instruction to avoid mulit-omap build break
@@ -43,4 +46,47 @@ extern void __iomem *omap4_get_sar_ram_base(void);
extern void __init gic_init_irq(void);
extern void omap_smc1(u32 fn, u32 arg);
+/*
+ * Read MPIDR: Multiprocessor affinity register
+ */
+static inline unsigned int hard_smp_processor_id(void)
+{
+ unsigned int cpunum;
+
+ asm volatile (
+ mrc p15, 0, %0, c0, c0, 5\n
+ : =r (cpunum));
+ return cpunum = 0x0f;
+}
+
+#if defined(CONFIG_SMP) defined(CONFIG_PM)
+extern int omap4_mpuss_init(void);
+extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
+extern void omap4_cpu_suspend(unsigned int cpu, unsigned int save_state);
+extern void omap4_cpu_resume(void);
+
+#else
+
+static inline int omap4_enter_lowpower(unsigned int cpu,
+ unsigned int power_state)
+{
+ cpu_do_idle();
+ return 0;
+}
+
+static inline int omap4_mpuss_init(void)
+{
+ return 0;
+}
+
+static inline void omap4_cpu_suspend(unsigned int cpu, unsigned int save_state)
+{
+}
+
+static inline void omap4_cpu_resume(void)
+{
+}
+
#endif
+#endif /* __ASSEMBLER__ */
+#endif /* OMAP_ARCH_OMAP4_COMMON_H */
diff --git a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
new file mode 100644
index 000..21c5ad3
--- /dev/null
+++ b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
@@ -0,0 +1,240 @@
+/*
+ * OMAP4 MPUSS low power code
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Written by Santosh Shilimkar santosh.shilim...@ti.com
+ *
+ * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU
+ * Local timer and Watchdog, GIC, SCU, PL310 L2 cache controller,
+ * CPU0 and CPU1 LPRM modules.
+ * CPU0, CPU1 and MPUSS each have there own power domain and
+ * hence multiple low power combinations of MPUSS are possible.
+ *
+ * The CPU0 and CPU1 can't support Closed switch Retention (CSWR)
+ * because the mode is not supported by hw constraints of dormant
+ * mode. While waking up from the dormant mode, a reset signal
+ * to the Cortex-A9 processor must be asserted by the external
+ * power controller.
+ *
+ * With architectural inputs and hardware recommendations, only
+ * below modes are supported from power gain vs latency point of view.
+ *
+ * CPU0CPU1MPUSS
+ * --
+ * ON ON ON
+ * ON(Inactive)OFF ON(Inactive)
+ * OFF
[pm-core][PATCH v3 12/21] OMAP4: PM: Add L2 cache lowpower support
When MPUSS hits off-mode e, L2 cache is lost. This patch adds L2X0
necessary maintenance operations and context restoration in the
low power code.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap4-mpuss-lowpower.c | 18
arch/arm/mach-omap2/omap4-sar-layout.h |2 +
arch/arm/mach-omap2/sleep44xx.S| 65
3 files changed, 85 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
index ddf5b72..026c955 100644
--- a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
@@ -49,6 +49,7 @@
#include asm/system.h
#include asm/irq.h
#include asm/hardware/gic.h
+#include asm/hardware/cache-l2x0.h
#include plat/omap44xx.h
#include mach/omap4-common.h
@@ -336,6 +337,21 @@ ret:
return 0;
}
+static void save_l2x0_auxctrl(void)
+{
+#ifdef CONFIG_CACHE_L2X0
+ /*
+* Save the L2X0 AUXCTRL value to SAR memory. Its used to
+* in every restore patch MPUSS OFF path.
+*/
+ void __iomem *l2x0_base = omap4_get_l2cache_base();
+ u32 val;
+
+ val = __raw_readl(l2x0_base + L2X0_AUX_CTRL);
+ __raw_writel(val, sar_base + L2X0_AUXCTRL_OFFSET);
+#endif
+}
+
/*
* Initialise OMAP4 MPUSS
*/
@@ -418,6 +434,8 @@ int __init omap4_mpuss_init(void)
for (i = 0; i max_spi_reg; i++)
sar_writel(GIC_ISR_NON_SECURE, ICDISR_SPI_OFFSET, i);
+ save_l2x0_auxctrl();
+
return 0;
}
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h
b/arch/arm/mach-omap2/omap4-sar-layout.h
index 3f3e3c9..c72c0c5 100644
--- a/arch/arm/mach-omap2/omap4-sar-layout.h
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -25,6 +25,8 @@
#define MMU_OFFSET 0xd00
#define SCU_OFFSET00xd20
#define SCU_OFFSET10xd24
+#define L2X0_OFFSET0xd28
+#define L2X0_AUXCTRL_OFFSET0xd2c
/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */
#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index ccaf0e6..54fee44 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -13,6 +13,7 @@
#include asm/system.h
#include asm/smp_scu.h
#include asm/memory.h
+#include asm/hardware/cache-l2x0.h
#include plat/omap44xx.h
#include mach/omap4-common.h
@@ -59,8 +60,10 @@ ENTRY(omap4_cpu_suspend)
cmp r1, #0x0
beq do_WFI @ Nothing to save, jump to WFI
mov r5, r0
+ mov r6, r1
bl omap4_get_sar_ram_base
mov r8, r0
+ str r6, [r8, #L2X0_OFFSET] @ Store save state
andsr5, r5, #0x0f
orreq r8, r8, #CPU0_SAVE_OFFSET
orrne r8, r8, #CPU1_SAVE_OFFSET
@@ -138,6 +141,42 @@ ENTRY(omap4_cpu_suspend)
ldrne r1, [r8, #SCU_OFFSET1]
bl omap4_get_scu_base
bl scu_power_mode
+ isb
+ dsb
+
+#ifdef CONFIG_CACHE_L2X0
+ /*
+* Clean and invalidate the L2 cache.
+* Common cache-l2x0.c functions can't be used here since it
+* uses spinlocks. We are out of coherency here with data cache
+* disabled. The spinlock implementation uses exclusive load/store
+* instruction which can fail without data cache being enabled.
+* OMAP4 hardware doesn't support exclusive monitor which can
+* overcome exclusive access issue. Because of this, CPU can
+* lead to deadlock.
+*/
+l2x_clean_inv:
+ bl omap4_get_sar_ram_base
+ mov r8, r0
+ ldr r0, [r8, #L2X0_OFFSET]
+ cmp r0, #3
+ bne do_WFI
+ bl omap4_get_l2cache_base
+ mov r2, r0
+ mov r0, #0xff
+ str r0, [r2, #L2X0_CLEAN_WAY]
+wait:
+ ldr r0, [r2, #L2X0_CLEAN_WAY]
+ andsr0, r0, #0xff
+ bne wait
+l2x_sync:
+ mov r0, #0x0
+ str r0, [r2, #L2X0_CACHE_SYNC]
+sync:
+ ldr r0, [r2, #L2X0_CACHE_SYNC]
+ andsr0, r0, #0x1
+ bne sync
+#endif
do_WFI:
/*
@@ -199,6 +238,32 @@ ENDPROC(omap4_cpu_suspend)
*/
ENTRY(omap4_cpu_resume)
+#ifdef CONFIG_CACHE_L2X0
+ /*
+* Restore the L2 AUXCTRL and enable the L2 cache.
+* 0x109 = Program the L2X0 AUXCTRL
+* 0x102 = Enable the L2 using L2X0 CTRL
+* register r0 contains value to be programmed.
+* L2 cache is already invalidate by ROM code as part
+* of MPUSS OFF wakeup path.
+*/
+ ldr r2, =OMAP44XX_L2CACHE_BASE
+ ldr r0, [r2, #L2X0_CTRL]
+ and r0, #0x0f
+ cmp r0, #1
+ beq skip_l2en @ Skip
[pm-core][PATCH v3 16/21] OMAP4: cpuidle: Add MPUSS RET OFF states
This patch adds MPUSS low power states in cpuidle.
C1 - CPU0 ON + CPU1 ON + MPU ON
C2 - CPU0 ON + CPU1 OFF + MPU ON
C3 - CPU0 OFF + CPU1 OFF + MPU CSWR
C4 - CPU0 OFF + CPU1 OFF + MPU OFF
MPU OSWR isn't supported yet. To support OSWR, power domain context
registers needs to be managed which are not supported yet. A patch
to address this was submitted but it's not ready for merge yet because
it was not addressing all OMAP4 power domain context registers.
More info on this issue:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38667.html
OMAP4 powerdomain INACTIVE support is also dropped because of inconsistency
of it with OMAP3. More information on this thread.
http://www.spinics.net/lists/linux-omap/msg45370.html
CORE low power states and associated latencies will be updated as part
along with chip retention support.
On OMAP4 because of hardware constraints, no low power states are
targeted when both CPUs are online and in SMP mode. The low power
states are attempted only when secondary CPU gets offline to OFF
through hotplug infrastructure.
Thanks to Nicole Chalhoub n-chalh...@ti.com for doing exhaustive
C-state latency profiling.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/cpuidle44xx.c | 129 +++--
1 files changed, 124 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c
b/arch/arm/mach-omap2/cpuidle44xx.c
index 270404f..19a405c 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2011 Texas Instruments, Inc.
* Rajendra Nayak rna...@ti.com
+ * Santosh Shilimkar santosh.shilim...@ti.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -17,12 +18,20 @@
#include mach/omap4-common.h
#include pm.h
+#include prm.h
#ifdef CONFIG_CPU_IDLE
-#define OMAP4_MAX_STATES 1
+#define OMAP4_MAX_STATES 4
+
/* C1 - CPU0 ON + + CPU1 ON + MPU ON + CORE ON */
#define OMAP4_STATE_C1 0
+/* C2 - CPU0 ON + CPU1 OFF + MPU ON + CORE ON */
+#define OMAP4_STATE_C2 1
+/* C3 - CPU0 OFF + CPU1 OFF + MPU CSWR + CORE ON */
+#define OMAP4_STATE_C3 2
+/* C4 - CPU0 OFF + CPU1 OFF + MPU OFF + CORE ON */
+#define OMAP4_STATE_C4 3
struct omap4_processor_cx {
u8 valid;
@@ -31,16 +40,34 @@ struct omap4_processor_cx {
u32 wakeup_latency;
u32 cpu0_state;
u32 mpu_state;
+ u32 mpu_logic_state;
u32 core_state;
+ u32 core_logic_state;
u32 threshold;
u32 flags;
+ const char *desc;
};
struct omap4_processor_cx omap4_power_states[OMAP4_MAX_STATES];
+static struct powerdomain *mpu_pd, *cpu1_pd, *core_pd;
+/*
+ * FIXME: Full latency numbers needs to be updated as part of
+ * cpuidle CORE retention support.
+ * Currently only MPUSS latency numbers are added based on
+ * measurements done internally. The numbers for MPUSS are
+ * not board dependent and hence set directly here instead of
+ * passing it from board files.
+ */
static struct cpuidle_params cpuidle_params_table[] = {
- /* C1 */
- {1, 2, 2, 5},
+ /* C1 - CPU0 ON + CPU1 ON + MPU ON + CORE ON */
+ {1, 2, 2, 5},
+ /* C2 - CPU0 ON + CPU1 OFF + MPU ON + CORE ON */
+ {1, 140,160,300},
+ /* C3 - CPU0 OFF + CPU1 OFF + MPU CSWR + CORE ON */
+ {1, 200,300,700},
+ /* C4 - CPU0 OFF + CPU1 OFF + MPU OFF + CORE ON */
+ {1, 1400, 600,5000},
};
/**
@@ -55,7 +82,9 @@ static struct cpuidle_params cpuidle_params_table[] = {
static int omap4_enter_idle(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
+ struct omap4_processor_cx *cx = cpuidle_get_statedata(state);
struct timespec ts_preidle, ts_postidle, ts_idle;
+ u32 cpu1_state;
/* Used to keep track of the total time in idle */
getnstimeofday(ts_preidle);
@@ -63,7 +92,26 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
local_irq_disable();
local_fiq_disable();
- cpu_do_idle();
+ /*
+* Continue to do only WFI on CPU0 till CPU1 hits OFF state.
+* This is necessary to honour hardware recommondation
+* of triggeing all the possible low power modes once CPU1 is
+* out of coherency and in OFF mode.
+* Update dev-last_state so that governor stats reflects right
+* data.
+*/
+ cpu1_state = pwrdm_read_pwrst(cpu1_pd);
+ if ((cpu1_state != PWRDM_POWER_OFF) || (!cx-valid)) {
+ dev-last_state = dev-safe_state;
+ cx = cpuidle_get_statedata(dev-safe_state);
+ }
+
+ pwrdm_set_logic_retst(mpu_pd,
[pm-core][PATCH v3 21/21] OMAP4: PM: Avoid omap4_pm_init() on OMAP4430 ES1.0
On OMAP4430 ES1.0, Power Management features are not supported.
Avoid omap4_pm_init() on ES1.0 silicon so that we can continue
to use same kernel binary to boot on all OMAP4 silicons.
The ES1.0 boot failure with OMAP4 PM series was because of
the clockdomain initialisation code. Hardware supervised
clockdomain mode isn't functional for all clockdomains
on OMAP4430 ES1.0 silicon so avoid the same.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reported-by: Kevin Hilman khil...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm44xx.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 40a44a9..6de5267 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -187,6 +187,11 @@ static int __init omap4_pm_init(void)
if (!cpu_is_omap44xx())
return -ENODEV;
+ if (omap_rev() == OMAP4430_REV_ES1_0) {
+ WARN(1, Power Management not supported on OMAP4430 ES1.0\n);
+ return -ENODEV;
+ }
+
pr_err(Power Management for TI OMAP4.\n);
ret = pwrdm_for_each(pwrdms_setup, NULL);
--
1.6.0.4
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[pm-core][PATCH v3 18/21] OMAP4: cpuidle: Add CPU hotplug notifier and prepare() hook.
On OMAP4 CPUidle, the low power states are triggered when CPU1
is offlined to OFF power state. When the CPU1 is online, no
low power states are supported.
The patch adds CPU hotplug notifier to manage the C-state
states using CPUidle prepare() hook and CPUIDLE_FLAG_IGNORE
c-state flag.
This was suggested by Kevin Hilman khil...@ti.com during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/cpuidle44xx.c | 64 +
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c
b/arch/arm/mach-omap2/cpuidle44xx.c
index daf41e1..83b7f95 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -13,6 +13,8 @@
#include linux/sched.h
#include linux/cpuidle.h
#include linux/clockchips.h
+#include linux/notifier.h
+#include linux/cpu.h
#include asm/proc-fns.h
@@ -51,6 +53,8 @@ struct omap4_processor_cx {
struct omap4_processor_cx omap4_power_states[OMAP4_MAX_STATES];
static struct powerdomain *mpu_pd, *cpu1_pd, *core_pd;
+static int needs_state_data_update;
+static unsigned int state_flags = CPUIDLE_FLAG_IGNORE;
/*
* FIXME: Full latency numbers needs to be updated as part of
@@ -72,6 +76,31 @@ static struct cpuidle_params cpuidle_params_table[] = {
};
/**
+ * omap4_prepare_idle - Update C-state parameters dynamically
+ * @dev: cpuidle device
+ *
+ * Called from the CPUidle framework to prepare the device
+ * for idle before before calling the governor's select function.
+ */
+static int omap4_prepare_idle(struct cpuidle_device *dev)
+{
+ int i, ret = 0;
+
+ if (!needs_state_data_update)
+ return ret;
+
+ /*
+* Update the C-state flags based on CPU1 online
+* or offline state. On OMAP4, the low power C-states
+* are made available when only CPU1 is offline.
+*/
+ for (i = OMAP4_STATE_C2; i OMAP4_MAX_STATES; i++)
+ dev-states[i].flags = state_flags;
+
+ return ret;
+}
+
+/**
* omap4_enter_idle - Programs OMAP4 to enter the specified state
* @dev: cpuidle device
* @state: The target state to be programmed
@@ -227,6 +256,36 @@ struct cpuidle_driver omap4_idle_driver = {
.owner =THIS_MODULE,
};
+/*
+ * CPU hotplug notifier to update the C-states when
+ * CPU1 is offline or onine. While updating C-state flag,
+ * keep the cpuidle disabled.
+ */
+static int __cpuinit omap_cpu_hotplug_notify(struct notifier_block *self,
+unsigned long action, void *unused)
+{
+ switch (action) {
+ case CPU_ONLINE:
+ disable_hlt();
+ needs_state_data_update = 1;
+ state_flags = CPUIDLE_FLAG_IGNORE;
+ enable_hlt();
+ break;
+ case CPU_DEAD:
+ disable_hlt();
+ needs_state_data_update = 1;
+ state_flags = CPUIDLE_FLAG_TIME_VALID;
+ enable_hlt();
+ break;
+ }
+
+ return NOTIFY_OK;
+}
+
+static struct notifier_block __refdata omap_ilde_hotplug_notifier = {
+ .notifier_call = omap_cpu_hotplug_notify,
+};
+
/**
* omap4_idle_init - Init routine for OMAP4 idle
*
@@ -272,12 +331,17 @@ int __init omap4_idle_init(void)
if (!count)
return -EINVAL;
dev-state_count = count;
+ dev-prepare = omap4_prepare_idle;
if (cpuidle_register_device(dev)) {
pr_err(%s: CPUidle register device failed\n, __func__);
return -EIO;
}
+ ret = register_hotcpu_notifier(omap_ilde_hotplug_notifier);
+ if (ret)
+ return ret;
+
return 0;
}
#else
--
1.6.0.4
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[pm-core][PATCH v3 19/21] OMAP4: Remove un-used do_wfi() macro.
With OMAP4 suspend, idle and hotplug series, we no longer need do_wfi() macro. Remove the same. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com Cc: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/include/mach/omap4-common.h | 10 -- 1 files changed, 0 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h index a4b3beb..33fa3d3 100644 --- a/arch/arm/mach-omap2/include/mach/omap4-common.h +++ b/arch/arm/mach-omap2/include/mach/omap4-common.h @@ -16,16 +16,6 @@ #include asm/proc-fns.h #ifndef __ASSEMBLER__ -/* - * wfi used in low power code. Directly opcode is used instead - * of instruction to avoid mulit-omap build break - */ -#ifdef CONFIG_THUMB2_KERNEL -#define do_wfi() __asm__ __volatile__ (wfi : : : memory) -#else -#define do_wfi() \ - __asm__ __volatile__ (.word0xe320f003 : : : memory) -#endif #ifdef CONFIG_CACHE_L2X0 extern void __iomem *omap4_get_l2cache_base(void); -- 1.6.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[pm-core][PATCH v3 17/21] OMAP4: cpuidle: Switch to gptimer from twd in deeper C-states.
CPU local timer(TWD) stops when the CPU is transitioning into deeper C-States. Since these timers are not wakeup capable, we need the wakeup capable global timer to program the wakeup time depending on the next timer expiry. It can be handled by registering a global wakeup capable timer along with local timers marked with (mis)feature flag CLOCK_EVT_FEAT_C3STOP. Then notify the clock events layer from idle code using CLOCK_EVT_NOTIFY_BROADCAST_ENTER/EXIT). Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com Cc: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 19a405c..daf41e1 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -12,6 +12,7 @@ #include linux/sched.h #include linux/cpuidle.h +#include linux/clockchips.h #include asm/proc-fns.h @@ -85,6 +86,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev, struct omap4_processor_cx *cx = cpuidle_get_statedata(state); struct timespec ts_preidle, ts_postidle, ts_idle; u32 cpu1_state; + int cpu_id = smp_processor_id(); /* Used to keep track of the total time in idle */ getnstimeofday(ts_preidle); @@ -111,8 +113,14 @@ static int omap4_enter_idle(struct cpuidle_device *dev, pwrdm_set_logic_retst(core_pd, cx-core_logic_state); omap_set_pwrdm_state(core_pd, cx-core_state); + if (cx-type OMAP4_STATE_C1) + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, cpu_id); + omap4_enter_lowpower(dev-cpu, cx-cpu0_state); + if (cx-type OMAP4_STATE_C1) + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, cpu_id); + getnstimeofday(ts_postidle); ts_idle = timespec_sub(ts_postidle, ts_preidle); -- 1.6.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[pm-core][PATCH v3 13/21] OMAP4: suspend: Add MPUSS RET and OFF support
This patch adds MPUSS(MPU Sub System) RET and OFF mode support
to suspend path. For both MPUSS RET and OFF support, CPUs are
programmed to OFF state.
Only MPUSS RET and OFF supported at this point of time. CORE RET
will be added subsequently.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap4-mpuss-lowpower.c |6 ++-
arch/arm/mach-omap2/pm44xx.c | 67 ++--
2 files changed, 68 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
index 026c955..7348d29 100644
--- a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
@@ -25,7 +25,7 @@
* ON(Inactive)OFF ON(Inactive)
* OFF OFF CSWR
* OFF OFF OSWR (*TBD)
- * OFF OFF OFF* (*TBD)
+ * OFF OFF OFF
* --
*
* Note: CPU0 is the master core and it is the last CPU to go down
@@ -293,6 +293,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
* Check MPUSS next state and save GIC if needed
* GIC lost during MPU OFF and OSWR
*/
+ pwrdm_clear_all_prev_pwrst(mpuss_pd);
if (pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_OFF) {
omap_wakeupgen_save();
gic_save_context();
@@ -414,6 +415,9 @@ int __init omap4_mpuss_init(void)
return -ENODEV;
}
+ /* Clear CPU previous power domain state */
+ pwrdm_clear_all_prev_pwrst(mpuss_pd);
+
/*
* Find out how many interrupts are supported.
* OMAP4 supports max of 128 SPIs where as GIC can support
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 4f932f3..051461c 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -1,8 +1,9 @@
/*
* OMAP4 Power Management Routines
*
- * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010-2011 Texas Instruments, Inc.
* Rajendra Nayak rna...@ti.com
+ * Santosh Shilimkar santosh.shilim...@ti.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -35,7 +36,48 @@ static LIST_HEAD(pwrst_list);
#ifdef CONFIG_SUSPEND
static int omap4_pm_suspend(void)
{
- do_wfi();
+ struct power_state *pwrst;
+ int state, ret = 0;
+ u32 cpu_id = smp_processor_id();
+
+ /* Save current powerdomain state */
+ list_for_each_entry(pwrst, pwrst_list, node) {
+ pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-pwrdm);
+ }
+
+ /* Set targeted power domain states by suspend */
+ list_for_each_entry(pwrst, pwrst_list, node) {
+ omap_set_pwrdm_state(pwrst-pwrdm, pwrst-next_state);
+ }
+
+ /*
+* For MPUSS to hit power domain retention(CSWR or OSWR),
+* CPU0 and CPU1 power domain needs to be in OFF or DORMANT
+* state. For MPUSS to reach off-mode. CPU0 and CPU1 power domain
+* should be in off state.
+* Only master CPU followes suspend path. All other CPUs follow
+* cpu-hotplug path in system wide suspend. On OMAP4, CPU power
+* domain CSWR is not supported by hardware.
+* More details can be found in OMAP4430 TRM section 4.3.4.2.
+*/
+ omap4_enter_lowpower(cpu_id, PWRDM_POWER_OFF);
+
+ /* Restore next powerdomain state */
+ list_for_each_entry(pwrst, pwrst_list, node) {
+ state = pwrdm_read_prev_pwrst(pwrst-pwrdm);
+ if (state pwrst-next_state) {
+ pr_info(Powerdomain (%s) didn't enter
+ target state %d\n,
+ pwrst-pwrdm-name, pwrst-next_state);
+ ret = -1;
+ }
+ omap_set_pwrdm_state(pwrst-pwrdm, pwrst-saved_state);
+ }
+ if (ret)
+ pr_err(Could not enter target state in pm_suspend\n);
+ else
+ pr_err(Successfully put all powerdomains to target state\n);
+
return 0;
}
@@ -98,14 +140,31 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm,
void *unused)
if (!pwrdm-pwrsts)
return 0;
+ /*
+* Skip CPU0 and CPU1 power domains. CPU1 is programmed
+* through hotplug path and CPU0 explicitly programmed
+* further down in the code path
+*/
+ if ((!strcmp(pwrdm-name, cpu0_pwrdm)) ||
+ (!strcmp(pwrdm-name, cpu1_pwrdm)))
+ return 0;
+
+ /*
+* FIXME: Remove this check when core retention is supported
+* Only MPUSS power domain is added in the list.
+*/
+ if (strcmp(pwrdm-name,
[pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup timer and debug counters
This patch adds configurable wakeup timer support in suspend. Also
for statistics pm counter support is added.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap4-mpuss-lowpower.c |4
arch/arm/mach-omap2/pm-debug.c | 11 +--
arch/arm/mach-omap2/pm44xx.c |6 ++
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
index 7348d29..3cd9e8b 100644
--- a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
@@ -289,6 +289,8 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
if (cpu)
goto cpu_prepare;
+ pwrdm_pre_transition();
+
/*
* Check MPUSS next state and save GIC if needed
* GIC lost during MPU OFF and OSWR
@@ -334,6 +336,8 @@ cpu_prepare:
gic_dist_enable();
}
+ pwrdm_post_transition();
+
ret:
return 0;
}
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index a5a83b3..232623c 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -604,9 +604,11 @@ static int __init pm_dbg_init(void)
if (pm_dbg_init_done)
return 0;
- if (cpu_is_omap34xx())
+ if (cpu_is_omap34xx()) {
pm_dbg_reg_modules = omap3_pm_reg_modules;
- else {
+ } else if (cpu_is_omap44xx()) {
+ /* Allow pm_dbg_init on OMAP4. */
+ } else {
printk(KERN_ERR %s: only OMAP3 supported\n, __func__);
return -ENODEV;
}
@@ -622,6 +624,9 @@ static int __init pm_dbg_init(void)
pwrdm_for_each(pwrdms_setup, (void *)d);
+ if (cpu_is_omap44xx())
+ goto skip_reg_debufs;
+
pm_dbg_dir = debugfs_create_dir(registers, d);
if (IS_ERR(pm_dbg_dir))
return PTR_ERR(pm_dbg_dir);
@@ -641,6 +646,8 @@ static int __init pm_dbg_init(void)
enable_off_mode, pm_dbg_option_fops);
(void) debugfs_create_file(sleep_while_idle, S_IRUGO | S_IWUSR, d,
sleep_while_idle, pm_dbg_option_fops);
+
+skip_reg_debufs:
(void) debugfs_create_file(wakeup_timer_seconds, S_IRUGO | S_IWUSR, d,
wakeup_timer_seconds, pm_dbg_option_fops);
(void) debugfs_create_file(wakeup_timer_milliseconds,
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 051461c..af3a56d 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -21,6 +21,7 @@
#include powerdomain.h
#include clockdomain.h
+#include pm.h
struct power_state {
struct powerdomain *pwrdm;
@@ -40,6 +41,11 @@ static int omap4_pm_suspend(void)
int state, ret = 0;
u32 cpu_id = smp_processor_id();
+ /* Wakeup timer from suspend */
+ if (wakeup_timer_seconds || wakeup_timer_milliseconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
+wakeup_timer_milliseconds);
+
/* Save current powerdomain state */
list_for_each_entry(pwrst, pwrst_list, node) {
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-pwrdm);
--
1.6.0.4
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RE: [PATCH v2 1/2] isp1704_charger: allow board specific powering routine
Hello,
-Original Message-
From: Heikki Krogerus [mailto:heikki.kroge...@nokia.com]
Sent: 28. maaliskuuta 2011 12:13
To: Jokiniemi Kalle (Nokia-MS/Tampere)
Cc: linux-...@vger.kernel.org; linux-omap@vger.kernel.org; ba...@ti.com;
jhnik...@gmail.com; khil...@ti.com
Subject: Re: [PATCH v2 1/2] isp1704_charger: allow board specific powering
routine
Hi,
Add Anton Vorontsov cbouatmai...@gmail.com to your v3. This will
need ack from him, or this needs to go to him. In this case I guess we
are only dealing with RX51 stuff, so maybe this should go to Tony.
Thanks, I'll add Anton to cc.
On Mon, Mar 28, 2011 at 09:51:38AM +0300, Kalle Jokiniemi wrote:
The ISP1704/1707 chip can be put to full power down
state by asserting the CHIP_SEL line. This patch enables
platform or board specific hooks to put the device into
power down mode in case not needed.
These patches are preparatio for enabling this powering
routine in n900 (rx-51) devices.
Thanks to Heikki Krogerus for helping out with the patch.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
Cc: Heikki Krogerus heikki.kroge...@nokia.com
---
drivers/power/isp1704_charger.c | 26 ++
include/linux/power/isp1704_charger.h | 29
+
2 files changed, 55 insertions(+), 0 deletions(-)
create mode 100644 include/linux/power/isp1704_charger.h
diff --git a/drivers/power/isp1704_charger.c
b/drivers/power/isp1704_charger.c
index 2ad9b14..c796b9f 100644
--- a/drivers/power/isp1704_charger.c
+++ b/drivers/power/isp1704_charger.c
@@ -33,6 +33,7 @@
#include linux/usb/ulpi.h
#include linux/usb/ch9.h
#include linux/usb/gadget.h
+#include linux/power/isp1704_charger.h
/* Vendor specific Power Control register */
#define ISP1704_PWR_CTRL 0x3d
@@ -63,6 +64,7 @@ struct isp1704_charger {
charmodel[8];
unsignedpresent:1;
unsignedonline:1;
+ unsignedinit_done;
Do we need this?
Good point. I needed this for 2.6.37 meego kernel, because it calls
otg_get_last_event in middle of the probing, which causes the
isp1704_charger_work to be run with USB_EVENT_NONE, which
then caused the power to be shut down from the isp during probe.
But it seems the get_last_notifier is not called in upstream code,
So I probably can drop that init_done variable.
unsignedcurrent_max;
/* temp storage variables */
@@ -71,6 +73,18 @@ struct isp1704_charger {
};
/*
+ * Disable/enable the power from the isp1704 if a function for it
+ * has been provided with platform data.
+ */
+static void isp1704_charger_set_power(struct isp1704_charger *isp, bool
on)
+{
+ struct isp1704_charger_data *board = isp-dev-platform_data;
+
+ if (board-set_power)
+ board-set_power(on);
+}
+
+/*
* Determine is the charging port DCP (dedicated charger) or CDP (Host/HUB
* chargers).
*
@@ -222,6 +236,9 @@ static void isp1704_charger_work(struct work_struct
*data)
mutex_lock(lock);
+ if (event != USB_EVENT_NONE)
+ isp1704_charger_set_power(isp, 1);
+
switch (event) {
case USB_EVENT_VBUS:
isp-online = true;
@@ -269,6 +286,9 @@ static void isp1704_charger_work(struct work_struct
*data)
*/
if (isp-otg-gadget)
usb_gadget_disconnect(isp-otg-gadget);
+ /* If we're initialized, we can power down the isp */
+ if (isp-init_done)
+ isp1704_charger_set_power(isp, 0);
break;
case USB_EVENT_ENUMERATED:
if (isp-present)
@@ -394,6 +414,8 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
isp-dev = pdev-dev;
platform_set_drvdata(pdev, isp);
+ isp1704_charger_set_power(isp, 1);
+
ret = isp1704_test_ulpi(isp);
if (ret 0)
goto fail1;
@@ -437,8 +459,11 @@ static int __devinit isp1704_charger_probe(struct
platform_device *pdev)
if ((ret ULPI_INT_VBUS_VALID) !isp-otg-default_a) {
isp-event = USB_EVENT_VBUS;
schedule_work(isp-work);
+ } else {
+ isp1704_charger_set_power(isp, 0);
}
I think the transceiver can be powered down even if we just scheduled
the work. This will basically cause hw reset on the transceiver which
is only a good thing IMO. Drop the else condition.
Ok, I'll test that out and include it if it works w/o problems.
Thanks for the excellent comments.
- Kalle
+ isp-init_done = 1;
return 0;
fail2:
power_supply_unregister(isp-psy);
@@ -459,6 +484,7 @@ static int __devexit isp1704_charger_remove(struct
platform_device *pdev)
RE: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
Hi,
-Original Message-
From: ext Sergei Shtylyov [mailto:sshtyl...@mvista.com]
Sent: 28. maaliskuuta 2011 11:20
To: Jokiniemi Kalle (Nokia-MS/Tampere)
Cc: linux-...@vger.kernel.org; linux-omap@vger.kernel.org; ba...@ti.com;
Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; khil...@ti.com
Subject: Re: [PATCH v2 2/2] RX-51: Enable isp1704 power on/off
On 28-03-2011 10:51, Kalle Jokiniemi wrote:
The isp1704 usb tranceiver is used for charging and can be
disabled when not in use. Provide the powering routine to
the driver via platform data.
Loosely based on earlier patches from Heikki Krogerus in
Nokia N900 maemo kernel.
Signed-off-by: Kalle Jokiniemikalle.jokini...@nokia.com
Cc: Heikki Krogerusheikki.kroge...@nokia.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 27
-
1 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index e75e240..8584dd8 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
[...]
@@ -106,10 +109,30 @@ static struct spi_board_info
rx51_peripherals_spi_board_info[] __initdata = {
},
};
+static void rx51_charger_set_power(bool on)
+{
+ gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
+}
+
+static struct isp1704_charger_data rx51_charger_data = {
+ .set_power = rx51_charger_set_power,
+};
+
static struct platform_device rx51_charger_device = {
- .name = isp1704_charger,
+ .name = isp1704_charger,
+ .dev= {
+ .platform_data =rx51_charger_data,
+ },
};
+static void __init rx51_charger_init(void)
+{
+ BUG_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
+ GPIOF_OUT_INIT_LOW, isp1704_reset));
I'm not sure we should kill the machine if this fails...
True, WARN_ON is probably sufficient.
- Kalle
WBR, Sergei
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RE: [PATCH v2 1/2] isp1704_charger: allow board specific powering routine
Hi,
-Original Message-
From: ext Sergei Shtylyov [mailto:sshtyl...@mvista.com]
Sent: 28. maaliskuuta 2011 11:18
To: Jokiniemi Kalle (Nokia-MS/Tampere)
Cc: linux-...@vger.kernel.org; linux-omap@vger.kernel.org; ba...@ti.com;
Krogerus Heikki (Nokia-MS/Helsinki); jhnik...@gmail.com; khil...@ti.com
Subject: Re: [PATCH v2 1/2] isp1704_charger: allow board specific powering
routine
Hello.
On 28-03-2011 10:51, Kalle Jokiniemi wrote:
The ISP1704/1707 chip can be put to full power down
state by asserting the CHIP_SEL line. This patch enables
platform or board specific hooks to put the device into
power down mode in case not needed.
These patches are preparatio for enabling this powering
Preparation.
routine in n900 (rx-51) devices.
Thanks to Heikki Krogerus for helping out with the patch.
Signed-off-by: Kalle Jokiniemikalle.jokini...@nokia.com
Cc: Heikki Krogerusheikki.kroge...@nokia.com
[...]
diff --git a/include/linux/power/isp1704_charger.h
b/include/linux/power/isp1704_charger.h
new file mode 100644
index 000..68096a6
--- /dev/null
+++ b/include/linux/power/isp1704_charger.h
@@ -0,0 +1,29 @@
+/*
+ * ISP1704 USB Charger Detection driver
+ *
+ * Copyright (C) 2011 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+
+#ifndef __ISP1704_CHARGER_H
+#define __ISP1704_CHARGER_H
+
+struct isp1704_charger_data {
+ void(*set_power)(bool on);
+};
+
+#endif
There should be include/linux/platform_data/ directory now, specifically
for such headers...
Thanks for the pointer, I'll put it there.
- Kalle
WBR, Sergei
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RE: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support.
Kevin -Original Message- From: Kevin Hilman [mailto:khil...@ti.com] Sent: Friday, March 25, 2011 8:54 PM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; Rajendra Nayak; linux-arm- ker...@lists.infradead.org Subject: Re: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support. Hi Santosh, Santosh Shilimkar santosh.shilim...@ti.com writes: [] In the mean time, can you create two branches? One with the dependencies and another with the OMAP4 PM series. After some final review and testing, I'll merge the latter series and by then we'll probably have an -rc1 baseline. Have created two branches as you suggested. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Smartreflex on 'pm-wip/voltdm' Branch
Kevin, I am testing Smartreflex on your Branch 'pm-wip/voltdm'. There seems an issue with reading VP registers. For OMAP3 and OMAP4 reading debugfs entries shows constant voltage. Logs are: OMAP3: # cat /debug/voltage/vdd_mpu_iva/curr_nominal_volt 120 # cat /debug/voltage/vdd_core/curr_nominal_volt 120 # echo 1 /debug/voltage/vdd_mpu_iva/smartreflex/autocomp [ 311.680816] omap_device: smartreflex.0: new worst case activate latency 0: 91552 # echo 1 /debug/voltage/vdd_core/smartreflex/autocomp # cat /debug/voltage/vdd_core/vp/curr_volt 90 # cat /debug/voltage/vdd_mpu_iva/vp/curr_volt 90 OMAP4: # cat /debug/voltage/vdd_core/curr_nominal_volt 120 # cat /debug/voltage/vdd_mpu/curr_nominal_volt 1375000 # cat /debug/voltage/vdd_iva/curr_nominal_volt 1188000 # # echo 1 /debug/voltage/vdd_mpu/smartreflex/autocomp [ 61.514038] omap_device: smartreflex.2: new worst case activate latency 0: 30517 # echo 1 /debug/voltage/vdd_core/smartreflex/autocomp # echo 1 /debug/voltage/vdd_mpu/smartreflex/autocomp # # cat /debug/voltage/vdd_iva/curr_nominal_volt 1188000 # cat /debug/voltage/vdd_iva/vp/curr_volt 120 # # echo 1 /debug/voltage/vdd_iva/smartreflex/autocomp # cat /debug/voltage/vdd_iva/vp/curr_volt 812500 # # cat /debug/voltage/vdd_mpu/vp/curr_volt 812500 # cat /debug/voltage/vdd_core/vp/curr_volt 812500 # This Issue is not reproduced on 'pm-core' branch, seems in the voltage Layer Clean up Patches somewhere some thing is goofed up. Thanks, Regards, Shweta -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support.
Kevin, -Original Message- From: Kevin Hilman [mailto:khil...@ti.com] Sent: Friday, March 25, 2011 8:54 PM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; Rajendra Nayak; linux-arm- ker...@lists.infradead.org Subject: Re: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support. Hi Santosh, Santosh Shilimkar santosh.shilim...@ti.com writes: [...] Before I rebase, I'll wait at least until -rc1 and/or Tony rebases to mainline. In the mean time, can you create two branches? One with the dependencies and another with the OMAP4 PM series. After some final review and testing, I'll merge the latter series and by then we'll probably have an -rc1 baseline. Have created two branches as you suggested against latest pm-core. 1) OMAP4-PM series: git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_v3 2) Dependent patches git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_dep Also created an integration branch which merges 1) and 2) git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_int Regards, Santosh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] watchdog: twl4030_wdt: Watchdog device registration issue fix
Hello All, Any comments on this patch? Regards, Keerthy On Wed, Mar 2, 2011 at 2:17 AM, Keerthy j-keer...@ti.com wrote: twl4030_wdt driver and omap_wdt driver are registering as misc_device name as watchdog and the same minor number WATCHDOG_MINOR( value = 130). There is a conflict since the name and minor were the same for both the misc_device registered by omap_wdt.c as well as twl4030_wdt.c The omap_wdt.c probe is getting called first. Hence it succeeds. twl4030_wdt.c always failed on the minor number comparison check. Now requesting for MISC_DYNAMIC_MINOR as the minor number for twl4030_watchdog and renamed the device name as twl4030_watchdog. Tested for basic boot up on OMAP4 Blaze and OMAP3630 SDP. OMAP3630 SDP twl4030_wdt registration succeeds.2430SDP boot tested, watchdog registration without errors. Signed-off-by: Keerthy j-keer...@ti.com --- drivers/watchdog/twl4030_wdt.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/twl4030_wdt.c b/drivers/watchdog/twl4030_wdt.c index b5045ca..89bf78d 100644 --- a/drivers/watchdog/twl4030_wdt.c +++ b/drivers/watchdog/twl4030_wdt.c @@ -183,8 +183,8 @@ static int __devinit twl4030_wdt_probe(struct platform_device *pdev) wdt-timer_margin = 30; wdt-miscdev.parent = pdev-dev; wdt-miscdev.fops = twl4030_wdt_fops; - wdt-miscdev.minor = WATCHDOG_MINOR; - wdt-miscdev.name = watchdog; + wdt-miscdev.minor = MISC_DYNAMIC_MINOR; + wdt-miscdev.name = twl4030_watchdog; platform_set_drvdata(pdev, wdt); -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 2/2] OMAP2+: PANDA: Fix up random or missing MAC addresses for eth0 and wlan0
On Fri, Mar 25, 2011 at 4:23 PM, Nicolas Pitre nicolas.pi...@linaro.org wrote: On Fri, 25 Mar 2011, Jason Kridner wrote: I very much like this approach. I believed the ability to use the die ID to get a unique code was reasonable approach and that is why I didn't get an EEPROM put onto the BeagleBoard, though Gerald is looking at adding one on a future revision because the lack of one wasn't well received. Minor questions below. If this code had been available and/or the procedure well documented before then I believe the reception would have been better. Understood. Live and learn and try not to repeat the same mistakes. Hopefully others pick up on this one. The use of the OMAP die id below makes this OMAP specific and the list referenced below of the devices to be referenced makes it Panda specific. Is there a way to make the list board specific, but to make these functions that will be used across many OMAP platforms reusable? I believe that this current code will result in a lot of cut-and-paste. My preference is that this is accepted and that we make this more general when we add this to other OMAP platforms, but it'd be great to capture your suggestions on how to do so before those cut-and-paste patch sets start coming in. It is true that this might get copied. But as I suggested to Andy, it is best to wait and see how often this happens before generalizing the approach. Consolidation is easier when you can see what is actually common and what is board specific. Otherwise it is easy to fall into the over-engineering trap. Makes sense. I hope to see this patch accepted for Panda quickly and we can follow Andy's advice on how to make it more general in the future as we wee how people use/need it. Nicolas -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: Smartreflex on 'pm-wip/voltdm' Branch
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Gulati, Shweta Sent: Monday, March 28, 2011 4:23 PM To: linux-omap@vger.kernel.org; Kevin Hilman Subject: Smartreflex on 'pm-wip/voltdm' Branch Kevin, I am testing Smartreflex on your Branch 'pm-wip/voltdm'. There seems an issue with reading VP registers. For OMAP3 and OMAP4 reading debugfs entries shows constant voltage. Logs are: OMAP3: # cat /debug/voltage/vdd_mpu_iva/curr_nominal_volt 120 # cat /debug/voltage/vdd_core/curr_nominal_volt 120 # echo 1 /debug/voltage/vdd_mpu_iva/smartreflex/autocomp [ 311.680816] omap_device: smartreflex.0: new worst case activate latency 0: 91552 # echo 1 /debug/voltage/vdd_core/smartreflex/autocomp # cat /debug/voltage/vdd_core/vp/curr_volt 90 # cat /debug/voltage/vdd_mpu_iva/vp/curr_volt 90 OMAP4: # cat /debug/voltage/vdd_core/curr_nominal_volt 120 # cat /debug/voltage/vdd_mpu/curr_nominal_volt 1375000 # cat /debug/voltage/vdd_iva/curr_nominal_volt 1188000 # # echo 1 /debug/voltage/vdd_mpu/smartreflex/autocomp [ 61.514038] omap_device: smartreflex.2: new worst case activate latency 0: 30517 # echo 1 /debug/voltage/vdd_core/smartreflex/autocomp # echo 1 /debug/voltage/vdd_mpu/smartreflex/autocomp # # cat /debug/voltage/vdd_iva/curr_nominal_volt 1188000 # cat /debug/voltage/vdd_iva/vp/curr_volt 120 # # echo 1 /debug/voltage/vdd_iva/smartreflex/autocomp # cat /debug/voltage/vdd_iva/vp/curr_volt 812500 # # cat /debug/voltage/vdd_mpu/vp/curr_volt 812500 # cat /debug/voltage/vdd_core/vp/curr_volt 812500 # This Issue is not reproduced on 'pm-core' branch, seems in the voltage Layer Clean up Patches somewhere some thing is goofed up. I did a quick debug on this and found that the root cause of the issue is in usage of ffs (because of this, i2c slave address was configured wrongly in vc). Basically ffs returns the position of the first (least significant) bit set in the word and the least significant bit is position 1 where as our bit operation assumes that least significant position is 0. I tested the attached patch on OMAP3 and it seems to work fine. Kevin, You may want to incorporate this change in your next version if this seems OK to you. Vishwa Thanks, Regards, Shweta -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html vc_fix.patch Description: Binary data
[PATCH v4 0/4] OMAP: DMA: mstandby mode and runtime pm support
Patch series to support mstandby mode handling and enabling runtime PM support for DMA driver. Change History: v4: Fixed Paul's comment: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg47359.html v3: Warning fix: http://thread.gmane.org/gmane.linux.ports.arm.omap/54753/focus=55097 v2: - fixed runtime_status issue if channel linking feature is used. - fixed context restore issue during off mode. - removed sysconfig register access during DMA context/restore The review comments and alignment can be found at: http://thread.gmane.org/gmane.linux.ports.arm.omap/53150 Applies cleanly on top of: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git Branch: omap-for-linus commit 05f689400ea5fa3d71af82f910c8b140f87ad1f3 Merge branches 'devel-mux' and 'devel-misc' into omap-for-linus Boot testing and dma test cases are executed on OMAP4430(Blaze). More details on testing is available at: http://article.gmane.org/gmane.linux.ports.arm.omap/54753 G, Manjunath Kondaiah (4): OMAP2+: PM: omap device: API's for handling mstandby mode OMAP2+: DMA: prevent races while setting M idle mode to nostandby OMAP: PM: DMA: Enable runtime pm OMAP: DMA: Fix: context restore during off mode arch/arm/mach-omap1/dma.c |1 + arch/arm/mach-omap2/dma.c | 16 ++ arch/arm/mach-omap2/omap_hwmod.c | 42 ++ arch/arm/plat-omap/dma.c | 196 + arch/arm/plat-omap/include/plat/dma.h |1 + arch/arm/plat-omap/include/plat/omap_device.h |2 + arch/arm/plat-omap/include/plat/omap_hwmod.h |4 +- arch/arm/plat-omap/omap_device.c | 62 8 files changed, 291 insertions(+), 33 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 2/4] OMAP2+: DMA: prevent races while setting M idle mode to nostandby
If two DMA users tries to set no mstandby mode at the same time, a race
condition would arise. Prevent that by using a spin lock and counting
up/down the number of times nostandby is set/reset.
Initial patch is created by Adrian Hunter adrian.hun...@nokia.com
https://patchwork.kernel.org/patch/366831/
Patch reworked to use API implemented at hwmod layer.
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
arch/arm/mach-omap1/dma.c |1 +
arch/arm/mach-omap2/dma.c | 16 +
arch/arm/plat-omap/dma.c | 40 +++--
arch/arm/plat-omap/include/plat/dma.h |1 +
4 files changed, 41 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index d855934..fa2d1b0 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -351,6 +351,7 @@ static int __init omap1_system_dma_init(void)
p-dma_write= dma_write;
p-dma_read = dma_read;
p-disable_irq_lch = NULL;
+ p-midlemode= NULL;
p-errata = configure_dma_errata();
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 34922b2..6e12e71 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -36,7 +36,9 @@
static u32 errata;
static u8 dma_stride;
+static u32 midlemode_save_cnt;
+static struct platform_device *pdev;
static struct omap_dma_dev_attr *d;
static enum omap_reg_offsets dma_common_ch_start, dma_common_ch_end;
@@ -117,6 +119,18 @@ static inline u32 dma_read(int reg, int lch)
return val;
}
+static void midlemode_nostandby(bool nostandby)
+{
+ /* TODO: midlemode_save_cnt can be moved to hwmod layer? */
+ if (nostandby) {
+ omap_device_require_no_mstandby(pdev);
+ midlemode_save_cnt += 1;
+ } else {
+ omap_device_release_no_mstandby(pdev);
+ midlemode_save_cnt -= 1;
+ }
+}
+
static inline void omap2_disable_irq_lch(int lch)
{
u32 val;
@@ -253,6 +267,7 @@ static int __init omap2_system_dma_init_dev(struct
omap_hwmod *oh, void *unused)
p-clear_dma= omap2_clear_dma;
p-dma_write= dma_write;
p-dma_read = dma_read;
+ p-midlemode= midlemode_nostandby;
p-clear_lch_regs = NULL;
@@ -286,6 +301,7 @@ static int __init omap2_system_dma_init_dev(struct
omap_hwmod *oh, void *unused)
dev_err(od-pdev.dev, %s: kzalloc fail\n, __func__);
return -ENOMEM;
}
+ pdev = od-pdev;
return 0;
}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 2ec3b5d..5af9bb2 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -38,8 +38,9 @@
#include asm/system.h
#include mach/hardware.h
-#include plat/dma.h
+#include plat/dma.h
+#include plat/omap_device.h
#include plat/tc.h
#undef DEBUG
@@ -924,6 +925,7 @@ EXPORT_SYMBOL(omap_start_dma);
void omap_stop_dma(int lch)
{
u32 l;
+ unsigned long flags;
/* Disable all interrupts on the channel */
if (cpu_class_is_omap1())
@@ -933,14 +935,13 @@ void omap_stop_dma(int lch)
if (IS_DMA_ERRATA(DMA_ERRATA_i541)
(l OMAP_DMA_CCR_SEL_SRC_DST_SYNC)) {
int i = 0;
- u32 sys_cf;
/* Configure No-Standby */
- l = p-dma_read(OCP_SYSCONFIG, lch);
- sys_cf = l;
- l = ~DMA_SYSCONFIG_MIDLEMODE_MASK;
- l |= DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_NO_IDLE);
- p-dma_write(l , OCP_SYSCONFIG, 0);
+ if (p-midlemode) {
+ spin_lock_irqsave(dma_chan_lock, flags);
+ p-midlemode(true);
+ spin_unlock_irqrestore(dma_chan_lock, flags);
+ }
l = p-dma_read(CCR, lch);
l = ~OMAP_DMA_CCR_EN;
@@ -958,7 +959,11 @@ void omap_stop_dma(int lch)
printk(KERN_ERR DMA drain did not complete on
lch %d\n, lch);
/* Restore OCP_SYSCONFIG */
- p-dma_write(sys_cf, OCP_SYSCONFIG, lch);
+ if (p-midlemode) {
+ spin_lock_irqsave(dma_chan_lock, flags);
+ p-midlemode(false);
+ spin_unlock_irqrestore(dma_chan_lock, flags);
+ }
} else {
l = ~OMAP_DMA_CCR_EN;
p-dma_write(l, CCR, lch);
@@ -1610,7 +1615,7 @@ int omap_stop_dma_chain_transfers(int chain_id)
{
int *channels;
u32 l, i;
- u32 sys_cf = 0;
+ unsigned long flags;
/* Check for input params */
if (unlikely((chain_id 0 || chain_id = dma_lch_count))) {
@@ -1625,12 +1630,10
[PATCH v4 1/4] OMAP2+: PM: omap device: API's for handling mstandby mode
Certain errata in OMAP2+ processors will require forcing
master standby to no standby mode before completing on going
operation. Without this, the results will be unpredictable.
Since current implementation of PM run time framework does not support
changing sysconfig settings during middle of the on going operation,
these API's will support the same. One API will force the device's
sysconfig mstandby mode settings to no standby and other API will
release no standby mode and sets it to smart standby or no
standby? depending on HWMOD_SWSUP_MSTANDBY value.
These API's should be used by device drivers only incase of
erratum applicable to their modules if there is no other methods
to resolve.
These API's are required for multiple DMA errata which require
putting DMA controller in no mstandby mode before stopping dma.
The applicable errata:
1. Erratum ID: i557(Applicable for omap36xx all ES versions)
The channel hangs when the Pause bit (DMA4_CDPi [7] ) is cleared
through config port while in Standby.
2. Erratum ID: i541
sDMA FIFO draining does not finish. Applicable to all omap2+ except
omap4.
3. Erratum ID:i88
The sDMA to be put in no mstandby mode before disabling the channel
after completing the data transfer operation.
Applicable only for OMAP3430 ES1.0
Also fixes typo HWMOD_SWSUP_MSTDBY to HWMOD_SWSUP_MSTANDBY in
omap_hwmod.h
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 42 +
arch/arm/plat-omap/include/plat/omap_device.h |2 +
arch/arm/plat-omap/include/plat/omap_hwmod.h |4 +-
arch/arm/plat-omap/omap_device.c | 62 +
4 files changed, 109 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e034294..7966cc0 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1594,6 +1594,48 @@ int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh,
u8 idlemode)
}
/**
+ * omap_hwmod_set_master_standbymode - set the hwmod's OCP mstandby mode
+ * @oh: struct omap_hwmod *
+ * @midlemode: flag to set mstandby to either no standby or smart standby
+ *
+ * Sets the IP block's OCP mstandby mode in hardware, and updates our
+ * local copy. Intended to be used by drivers that have some erratum
+ * that requires direct manipulation of the MIDLEMODE bits. Returns
+ * -EINVAL if @oh is null, or passes along the return value from
+ * _set_master_standbymode().
+ *
+ * Any users of this function should be scrutinized carefully.
+ */
+int omap_hwmod_set_master_standbymode(struct omap_hwmod *oh, u8 idlemode)
+{
+ u32 v;
+ u8 sf;
+ int retval = 0;
+
+ if (!oh)
+ return -EINVAL;
+
+ if (!oh-class-sysc)
+ return -EINVAL;
+
+ v = oh-_sysc_cache;
+ sf = oh-class-sysc-sysc_flags;
+
+ if (sf SYSC_HAS_MIDLEMODE) {
+ if (idlemode)
+ idlemode = HWMOD_IDLEMODE_NO;
+ else
+ idlemode = (oh-flags HWMOD_SWSUP_MSTANDBY) ?
+ HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
+ }
+ retval = _set_master_standbymode(oh, idlemode, v);
+ if (!retval)
+ _write_sysconfig(v, oh);
+
+ return retval;
+}
+
+/**
* omap_hwmod_lookup - look up a registered omap_hwmod by name
* @name: name of the omap_hwmod to look up
*
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h
b/arch/arm/plat-omap/include/plat/omap_device.h
index e4c349f..42e0186 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/plat-omap/include/plat/omap_device.h
@@ -117,6 +117,8 @@ int omap_device_enable_hwmods(struct omap_device *od);
int omap_device_disable_clocks(struct omap_device *od);
int omap_device_enable_clocks(struct omap_device *od);
+int omap_device_require_no_mstandby(struct platform_device *pdev);
+int omap_device_release_no_mstandby(struct platform_device *pdev);
/*
* Entries should be kept in latency order ascending
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 1adea9c..2437f10 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -373,7 +373,7 @@ struct omap_hwmod_omap4_prcm {
*
* HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
* of idle, rather than relying on module smart-idle
- * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
+ * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and
out
* of standby, rather than relying on module smart-standby
* HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
* SDRAM controller, etc. XXX probably belongs outside the main hwmod file
@@ -567,6 +567,8 @@ int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
int
[PATCH v4 4/4] OMAP: DMA: Fix: context restore during off mode
The current DMA context restore clears all the DMA channel registers
even if the channels are in use. This will result in transfer failures
if repeated DMA transfers are initiated with one time DMA channel
configuration.
Also, remove access to sysconfig register during context save/restore
since it will be handled through hwmod layer.
Tested on OMAP3430 Zoom2 with
- off mode enabled
- one time DMA channel configuration
- repeated DMA transfers
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/plat-omap/dma.c |9 -
1 files changed, 0 insertions(+), 9 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 3c39794..5c4ae7d 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2059,29 +2059,20 @@ void omap_dma_global_context_save(void)
pm_runtime_get_sync(dev);
omap_dma_global_context.dma_irqenable_l0 =
p-dma_read(IRQENABLE_L0, 0);
- omap_dma_global_context.dma_ocp_sysconfig =
- p-dma_read(OCP_SYSCONFIG, 0);
omap_dma_global_context.dma_gcr = p-dma_read(GCR, 0);
pm_runtime_put_autosuspend(dev);
}
void omap_dma_global_context_restore(void)
{
- int ch;
-
pm_runtime_get_sync(dev);
p-dma_write(omap_dma_global_context.dma_gcr, GCR, 0);
- p-dma_write(omap_dma_global_context.dma_ocp_sysconfig,
- OCP_SYSCONFIG, 0);
p-dma_write(omap_dma_global_context.dma_irqenable_l0,
IRQENABLE_L0, 0);
if (IS_DMA_ERRATA(DMA_ROMCODE_BUG))
p-dma_write(0x3 , IRQSTATUS_L0, 0);
- for (ch = 0; ch dma_chan_count; ch++)
- if (dma_chan[ch].dev_id != -1)
- omap_clear_dma(ch);
pm_runtime_put_autosuspend(dev);
}
--
1.7.1
--
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[PATCH v4 3/4] OMAP: PM: DMA: Enable runtime pm
Enable runtime pm and use pm_runtime_get_sync and pm_runtime_put_autosuspend
for OMAP DMA driver.
The DMA driver uses auto suspend feature of runtime pm framework through
which the clock gets disabled automatically if there is no activity for
more than one second.
Testing:
Compile: omap1_defconfig and omap2plus_defconfig
Boot: OMAP1710(H3), OMAP2420(H4), OMAP3430LDP(Zoom2), OMAP3630(Zoom3),
OMAP4(Blaze)
The DMA tests(including chaining) are executed and tested for suspend state
after each test cases.
On zoom2 core retention is tested with following steps:
echo 1 /debug/pm_debug/sleep_while_idle
echo 1 /debug/pm_debug/enable_off_mode
echo 5 /sys/devices/platform/omap/omap_uart.0/sleep_timeout
echo 5 /sys/devices/platform/omap/omap_uart.1/sleep_timeout
echo 5 /sys/devices/platform/omap/omap_uart.2/sleep_timeout
echo 5 /sys/devices/platform/omap/omap_uart.3/sleep_timeout
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
---
arch/arm/plat-omap/dma.c | 147 --
1 files changed, 141 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5af9bb2..3c39794 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -35,6 +35,7 @@
#include linux/io.h
#include linux/slab.h
#include linux/delay.h
+#include linux/pm_runtime.h
#include asm/system.h
#include mach/hardware.h
@@ -60,6 +61,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
static struct omap_system_dma_plat_info *p;
static struct omap_dma_dev_attr *d;
+static struct device *dev;
static int enable_1510_mode;
static u32 errata;
@@ -172,6 +174,7 @@ void omap_set_dma_priority(int lch, int dst_port, int
priority)
unsigned long reg;
u32 l;
+ pm_runtime_get_sync(dev);
if (cpu_class_is_omap1()) {
switch (dst_port) {
case OMAP_DMA_PORT_OCP_T1: /* FFFECC00 */
@@ -188,6 +191,7 @@ void omap_set_dma_priority(int lch, int dst_port, int
priority)
break;
default:
BUG();
+ pm_runtime_put_autosuspend(dev);
return;
}
l = omap_readl(reg);
@@ -206,6 +210,7 @@ void omap_set_dma_priority(int lch, int dst_port, int
priority)
ccr = ~(1 6);
p-dma_write(ccr, CCR, lch);
}
+ pm_runtime_put_autosuspend(dev);
}
EXPORT_SYMBOL(omap_set_dma_priority);
@@ -215,6 +220,8 @@ void omap_set_dma_transfer_params(int lch, int data_type,
int elem_count,
{
u32 l;
+ pm_runtime_get_sync(dev);
+
l = p-dma_read(CSDP, lch);
l = ~0x03;
l |= data_type;
@@ -269,6 +276,7 @@ void omap_set_dma_transfer_params(int lch, int data_type,
int elem_count,
p-dma_write(elem_count, CEN, lch);
p-dma_write(frame_count, CFN, lch);
+ pm_runtime_put_autosuspend(dev);
}
EXPORT_SYMBOL(omap_set_dma_transfer_params);
@@ -276,6 +284,7 @@ void omap_set_dma_color_mode(int lch, enum
omap_dma_color_mode mode, u32 color)
{
BUG_ON(omap_dma_in_1510_mode());
+ pm_runtime_get_sync(dev);
if (cpu_class_is_omap1()) {
u16 w;
@@ -329,11 +338,13 @@ void omap_set_dma_color_mode(int lch, enum
omap_dma_color_mode mode, u32 color)
color = 0xff;
p-dma_write(color, COLOR, lch);
}
+ pm_runtime_put_autosuspend(dev);
}
EXPORT_SYMBOL(omap_set_dma_color_mode);
void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode)
{
+ pm_runtime_get_sync(dev);
if (cpu_class_is_omap2()) {
u32 csdp;
@@ -342,11 +353,13 @@ void omap_set_dma_write_mode(int lch, enum
omap_dma_write_mode mode)
csdp |= (mode 16);
p-dma_write(csdp, CSDP, lch);
}
+ pm_runtime_put_autosuspend(dev);
}
EXPORT_SYMBOL(omap_set_dma_write_mode);
void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
{
+ pm_runtime_get_sync(dev);
if (cpu_class_is_omap1() !cpu_is_omap15xx()) {
u32 l;
@@ -355,6 +368,7 @@ void omap_set_dma_channel_mode(int lch, enum
omap_dma_channel_mode mode)
l |= mode;
p-dma_write(l, LCH_CTRL, lch);
}
+ pm_runtime_put_autosuspend(dev);
}
EXPORT_SYMBOL(omap_set_dma_channel_mode);
@@ -365,6 +379,8 @@ void omap_set_dma_src_params(int lch, int src_port, int
src_amode,
{
u32 l;
+ pm_runtime_get_sync(dev);
+
if (cpu_class_is_omap1()) {
u16 w;
@@ -383,11 +399,13 @@ void omap_set_dma_src_params(int lch, int src_port, int
src_amode,
p-dma_write(src_ei, CSEI, lch);
p-dma_write(src_fi, CSFI, lch);
+ pm_runtime_put_autosuspend(dev);
}
EXPORT_SYMBOL(omap_set_dma_src_params);
void omap_set_dma_params(int lch, struct omap_dma_channel_params *params)
{
+
Re: Unbuildable kernel with musb
On Mon, 28 Mar 2011 11:34:51 +0300, Felipe Balbi ba...@ti.com wrote: Hi, On Sat, Mar 26, 2011 at 06:59:18PM -0400, Ben Gamari wrote: Today I've been trying to work through the mess that is musb bring-up on recent kernels (v2.6.38). While I still haven't succeeded in getting a patches are welcome. I'm working on it. Hopefully none will be necessary as this is all the fault of incorrect configuration. working gadget stack (modprobe g_ether fails with ENODEV), I've come across configuration where musb causes a link failure in 2.6.38 if built as a module: MODPOST 249 modules ERROR: musb_read_fifo [drivers/usb/musb/musb_hdrc.ko] undefined! Configuration attached. musb can't be built as module, I sent a patch making it bool recently until we re-work those parts of the code. Ahh good, thanks for that change! This should eliminate at least one nasty failure mode. - Ben -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Initialization of musb on board-omap2beagle fails in platform_driver_probe
On Mon, 28 Mar 2011 11:37:22 +0300, Felipe Balbi ba...@ti.com wrote: Hi, On Sat, Mar 26, 2011 at 07:42:34PM -0400, Ben Gamari wrote: Today I've had a very frustrating time trying to bring up a BeagleBoard (arch/arm/mach-omap2/board-omap2beagle.c) with the 2.6.38 there's no board-omap2beagle My apologies, s/omap2/omap3. kernel. Unfortunately musb has been giving me great difficulties, # modprobe g_ether [ 25.276855] usb_gadget_probe_driver 1815: usb_gadget_probe_driver, no dev?? modprobe: Failed to load module g_ether: No such device. After a great deal of printking, I've determined that the error is coming from platform_driver_probe (platform.c:499). The code in question appears to be a check ensuring that any devices being probe were first registered. When the musb-hdrc module is probed, this check seems to fail with code = 1 and list_empty(drv-driver.p-klist_devices.k_list) = 1. looking at your .config from previous mail, it's wrong. You're trying to use am35x glue layer while you be using omap2430, just change: Alright, fair enough. The mishmash of IP found in these ARM devices can make it very difficult to determine the correct configuration at times. Thanks for your help! - Ben -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP3: l3: fix for irq 10: nobody cared message
Hi, On Mon, Mar 28, 2011 at 12:38 AM, Santosh Shilimkar santosh.shilim...@ti.com wrote: If an error occurs in the L3 on any other initiator than MPU, the interrupt goes unhandled given that the 'base' register was calculated with the initialized err_base value (which coincidentally points to MPU) and not with the actual source of the error. Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com Patch looks good. Did you observe this with DSP initiator?? Yes, when loading a base image for the DSP, I got an: In-band Error Error seen by IVA_SS at address 0; after this fix. I was planning to remove the duplicated Error print too. Acked-by: Santosh Shilimkar santosh.shilim...@ti.com Thanks, I'll add it in my next version when I make the changes affecting only these lines. Regards, Omar -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support.
Hi Santosh, Santosh Shilimkar santosh.shilim...@ti.com writes: [...] Have created two branches as you suggested against latest pm-core. Thanks! 1) OMAP4-PM series: git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_v3 Also, can you post this version of the series to the list, w/linux-arm-kernel Cc'd. 2) Dependent patches git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_dep Also created an integration branch which merges 1) and 2) git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_int Excellent. Thanks Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support.
-Original Message- From: Kevin Hilman [mailto:khil...@ti.com] Sent: Monday, March 28, 2011 9:27 PM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; Rajendra Nayak; linux-arm- ker...@lists.infradead.org Subject: Re: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support. Hi Santosh, Santosh Shilimkar santosh.shilim...@ti.com writes: [...] Have created two branches as you suggested against latest pm-core. Thanks! 1) OMAP4-PM series: git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_v3 Also, can you post this version of the series to the list, w/linux-arm-kernel Cc'd. Done that as well. Patches are on the list Regards, Santosh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 00/19] OMAP4: PM: Suspend, CPU-hotplug and CPUilde support.
On Mon, 2011-03-28 at 08:56 -0700, Kevin Hilman wrote: [...] 1) OMAP4-PM series: git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git omap4_pm_pmcore_v3 Also, can you post this version of the series to the list, w/linux-arm-kernel Cc'd. Oops, sorry. I see it's already posted to the list. Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/7] ARM / OMAP: Use struct syscore_ops for core power management
Rafael J. Wysocki r...@sisk.pl writes:
From: Rafael J. Wysocki r...@sisk.pl
Replace the sysdev class and struct sys_device used for power
management in the OMAP's GPIO code with a struct syscore_ops object
which is simpler.
Signed-off-by: Rafael J. Wysocki r...@sisk.pl
Acked-by: Kevin Hilman khil...@ti.com
Looks fine to me. We're in the process of converting this driver to
runtime PM. When that happens the syscore ops will be removed as well,
but I'm fine with this patch until we finish the runtime PM conversion.
Kevin
---
arch/arm/plat-omap/gpio.c | 35 +--
1 file changed, 9 insertions(+), 26 deletions(-)
Index: linux-2.6/arch/arm/plat-omap/gpio.c
===
--- linux-2.6.orig/arch/arm/plat-omap/gpio.c
+++ linux-2.6/arch/arm/plat-omap/gpio.c
@@ -17,7 +17,7 @@
#include linux/init.h
#include linux/module.h
#include linux/interrupt.h
-#include linux/sysdev.h
+#include linux/syscore_ops.h
#include linux/err.h
#include linux/clk.h
#include linux/io.h
@@ -1379,9 +1379,7 @@ static const struct dev_pm_ops omap_mpui
.resume_noirq = omap_mpuio_resume_noirq,
};
-/* use platform_driver for this, now that there's no longer any
- * point to sys_device (other than not disturbing old code).
- */
+/* use platform_driver for this. */
static struct platform_driver omap_mpuio_driver = {
.driver = {
.name = mpuio,
@@ -1754,7 +1752,7 @@ static int __devinit omap_gpio_probe(str
}
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
-static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
+static int omap_gpio_suspend(void)
{
int i;
@@ -1804,12 +1802,12 @@ static int omap_gpio_suspend(struct sys_
return 0;
}
-static int omap_gpio_resume(struct sys_device *dev)
+static void omap_gpio_resume(void)
{
int i;
if (!cpu_class_is_omap2() !cpu_is_omap16xx())
- return 0;
+ return;
for (i = 0; i gpio_bank_count; i++) {
struct gpio_bank *bank = gpio_bank[i];
@@ -1845,21 +1843,13 @@ static int omap_gpio_resume(struct sys_d
__raw_writel(bank-saved_wakeup, wake_set);
spin_unlock_irqrestore(bank-lock, flags);
}
-
- return 0;
}
-static struct sysdev_class omap_gpio_sysclass = {
- .name = gpio,
+static struct syscore_ops omap_gpio_syscore_ops = {
.suspend= omap_gpio_suspend,
.resume = omap_gpio_resume,
};
-static struct sys_device omap_gpio_device = {
- .id = 0,
- .cls= omap_gpio_sysclass,
-};
-
#endif
#ifdef CONFIG_ARCH_OMAP2PLUS
@@ -2117,21 +2107,14 @@ postcore_initcall(omap_gpio_drv_reg);
static int __init omap_gpio_sysinit(void)
{
- int ret = 0;
-
mpuio_init();
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
- if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
- if (ret == 0) {
- ret = sysdev_class_register(omap_gpio_sysclass);
- if (ret == 0)
- ret = sysdev_register(omap_gpio_device);
- }
- }
+ if (cpu_is_omap16xx() || cpu_class_is_omap2())
+ register_syscore_ops(omap_gpio_syscore_ops);
#endif
- return ret;
+ return 0;
}
arch_initcall(omap_gpio_sysinit);
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Re: Smartreflex on 'pm-wip/voltdm' Branch
Vishwa, Shweta, Vishwanath Sripathy vishwanath...@ti.com writes: [...] I am testing Smartreflex on your Branch 'pm-wip/voltdm'. There seems an issue with reading VP registers. For OMAP3 and OMAP4 reading debugfs entries shows constant voltage. Thanks for testing. [...] I did a quick debug on this and found that the root cause of the issue is in usage of ffs (because of this, i2c slave address was configured wrongly in vc). Basically ffs returns the position of the first (least significant) bit set in the word and the least significant bit is position 1 where as our bit operation assumes that least significant position is 0. Vishwa, Thanks for findingg this. Indeed, I had assumed ffs() was zero based, but it is 1 based. I tested the attached patch on OMAP3 and it seems to work fine. Kevin, You may want to incorporate this change in your next version if this seems OK to you. Yes, I will fix this in forthcoming versions. Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP4: clockdomain: Follow recommended enable sequence
Hi Rajendra, On Mon, 21 Mar 2011, Rajendra Nayak wrote: On 3/11/2011 10:17 PM, Kevin Hilman wrote: Rajendra Nayakrna...@ti.com writes: [...] It's also breaking boot on OMAP35xx BeagleBoard rev C2. The kernel boot messages are below - omap2plus_defconfig + DEBUG_LL. Reverting the patch fixes it. Could you please take a look? I got hold of a Beagle, a sticker on which says rev C1D. Not sure if there is a better way to identify the rev, but this one seems to boot fine for me even with this patch. I just applied this one patch on top of the the tag 'integration-2.6.39-20110310-008' of git://git.pwsan.com/linux- integration. In the process of testing Santosh's OMAP4 PM series (which includes $SUBJECT patch) on OMAP3, I also noticed some problems on beagle (mine is a C3.) Specifially, with $SUBJECT patch applied, none of the powerdomains ever reach inactive or RET during idle (suspend seems to work fine.) Just reverting $SUBJECT patch makes things go back to working normally. I pushed the test branch I used which is a merge of Santosh's v3 branch with my pm branch (branch: tmp/santosh-omap4-pm) I tested by first doing a suspend test and confirming all the powerdomains hit retention. That worked fine. Then I did an idle test: echo 5 /sys/devices/platform/omap/omap_uart.0/sleep_timeout echo 5 /sys/devices/platform/omap/omap_uart.1/sleep_timeout echo 5 /sys/devices/platform/omap/omap_uart.2/sleep_timeout echo 1 /debug/pm_debug/sleep_while_idle and waited for the UARTs to timeout. Well after the UART timeouts expired, I do not see any powerdomains transitioning from ON. What's even more strange is that the same thing is working fine on all the other OMAP3 platforms I tested: 3430/n900, 3630/zoom3 and even a different 3530-based platform, the OMAP3EVM. I tried to reproduce this on a Beagle rev C3, but I don't seem to be seeing this issue. I was able to hit OFF mode in both suspend and idle. I also tried removing autodeps completely on OMAP3 and ran into some issues/aborts with GPIO restore path with OFF mode enabled. Besides these, debugging some McBSP related crashes showed up another issue with this patch. Since the clockdomain is programmed back to HW_AUTO (if supported) in the clock framework, this happens *before* waiting for the module to become accessible. (On OMAP4, the check to make sure the module is accessible happens in the hwmod framework, unlike in older OMAP's, where it was part of the clock framework) So instead of implementing the recommended sequence of -1- Force clkdm to SW_WKUP -2- Configure desired module mode to enable or auto -3- Wait for the desired module idle status to be FUNC -4- Program clkdm in HW_AUTO(if supported) ..it was actually implementing the wrong sequence as below -1- Force clkdm to SW_WKUP -2- Configure desired module mode to enable or auto -3- Program clkdm in HW_AUTO(if supported) -4- Wait for the desired module idle status to be FUNC Hmmm, right now OMAP4 only appears to be forcing the clkdm to SW_WKUP if the clockdomain is in software-supervised mode (clockdomain44xx.c:omap4_clkdm_clk_enable()). Doesn't seem like that follows either sequence? This however was only a problem on OMAP4. Fixing this would require moving the clockdomain programming back to HW_AUTO as part of the hwmod framework. In omap_hwmod.c:_enable(), what do you think about: 1. saving the current idle mode of the clockdomain, 2. forcing the clockdomain to software-supervised wakeup. 3. enabling clocks and waiting for the module as we currently do, then 4. switching the clockdomain's idle mode back to its original state? Seems like that would be a reasonable approach for the short term, at least for drivers that have been converted to PM runtime. However this sequence is recommended even for optional clock enabling, and hence might have to be handled at the clock framework as well. Might be worth finding out the reasoning behind this recommendation. Is this only for optional clocks that are used for functional purposes, e.g., for modules that use HWMOD_CONTROL_OPT_CLKS_IN_RESET ? (Since optional clocks are still controlled by drivers using clock framework directly). Yeah, if this really turns out to be needed, sounds like we'll have to tightly couple the hwmod code with the OMAP clock code :-( I'd suggest that we find out why this is recommended first. Any suggestions on how to handle this without duplicating much of this across clock and hwmod framework? - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/7] ARM / Samsung: Use struct syscore_ops for core power management
On Monday, March 28, 2011, Ben Dooks wrote: On Mon, Mar 28, 2011 at 01:29:49AM +0200, Rafael J. Wysocki wrote: From: Rafael J. Wysocki r...@sisk.pl Replace sysdev classes and struct sys_device objects used for core power management by Samsung platforms with struct syscore_ops objects that are simpler. This generally reduces the code size and the kernel memory footprint. It also is necessary for removing sysdevs entirely from the kernel in the future. Hmm, does it still allow the system to choose which bits are bound depending on the cpu being registered, as for the s3c stuff it isn't just about the suspend/resume, it's binding items that get registered early in the startup sequence? The registering is still done through sysdevs, the syscore_ops are only used for power management. I did my best to retain the existing flow of control as far as possible. Thanks, Rafael -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
* Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -21,6 +21,7 @@ #include mach/hardware.h #include mach/omap4-common.h +#include mach/omap-wakeupgen.h #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; @@ -41,6 +42,8 @@ void __init gic_init_irq(void) gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); BUG_ON(!gic_cpu_base); + omap_wakeupgen_init(); + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); } Do you really need to initialize all of this that early? Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [pm-core][PATCH v3 02/21] OMAP4: Use WARN_ON() instead of BUG_ON() with graceful exit
* Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: OMAP L2X0 and GIC initialisation code uses BUG_ON() for the ioremap() failure scenarios. Use WARN_ON() instead and allow graceful function exits. This was suggsted by Kevin Hilman khil...@ti.com during OMAP4 PM code review. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com Cc: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/omap4-common.c |9 ++--- 1 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 559d227..8f9b97d 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -36,11 +36,13 @@ void __init gic_init_irq(void) /* Static mapping, never released */ gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); - BUG_ON(!gic_dist_base_addr); + if (WARN_ON(!gic_dist_base_addr)) + return; /* Static mapping, never released */ gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); - BUG_ON(!gic_cpu_base); + if (WARN_ON(!gic_cpu_base)) + return; omap_wakeupgen_init(); @@ -68,7 +70,8 @@ static int __init omap_l2_cache_init(void) /* Static mapping, never released */ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); - BUG_ON(!l2cache_base); + if (WARN_ON(!l2cache_base)) + return -ENODEV; /* * 16-way associativity, parity disabled Hmm to me it seems that if any of these we don't want to continue. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup timer and debug counters
* Santosh Shilimkar santosh.shilim...@ti.com [110328 02:21]:
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -40,6 +41,11 @@ static int omap4_pm_suspend(void)
int state, ret = 0;
u32 cpu_id = smp_processor_id();
+ /* Wakeup timer from suspend */
+ if (wakeup_timer_seconds || wakeup_timer_milliseconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
+ wakeup_timer_milliseconds);
+
/* Save current powerdomain state */
list_for_each_entry(pwrst, pwrst_list, node) {
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-pwrdm);
This hack to mess diretly with sys_timer will be ripped out,
so please drop this patch.
In the long run we'll have dmtimer1 dedicated to the PM code,
so then it's possible to do similar things.
Tony
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Re: rx51: omapfb: no driver for display
On Mon, Mar 28, 2011 at 09:01:29AM +0300, Tomi Valkeinen wrote: On Sun, 2011-03-27 at 04:39 +0200, Sebastian Reichel wrote: Hi, I've got problems getting a working tty with the mainline 2.6.38 kernel on my Nokia N900. Here is the related output from dmesg: $ grep -E (omapdss|omapfb|acx565akm) dmesg [0.890899] omapdss CORE: clk ick, rate 8300 [0.890930] omapdss CORE: clk dss1_fck, rate 9600 [0.890991] omapdss CORE: clk dss2_fck, rate 1920 [0.891021] omapdss CORE: clk tv_fck, rate 5400 [0.891052] omapdss CORE: clk video_fck, rate 9600 [0.891143] omapdss CORE: initial ctx id 0 [0.950469] omapdss CORE: save context [0.950714] omapdss CORE: bus_match. dev display0/panel-acx565akm, drv panel-acx565akm [0.950775] omapdss CORE: driver_probe: dev display0/panel-acx565akm, drv panel-acx565akm [0.950805] omapdss SDI: SDI init [1.004455] omapdss CORE: save context [1.059173] omapdss CORE: save context [1.113830] omapdss CORE: save context [1.129608] acx565akm spi1.2: omapfb: acx565akm rev 8b LCD detected [1.130065] omapdss CORE: probe done for device display0 [1.130096] omapdss CORE: bus_match. dev display1/venc, drv panel-acx565akm [1.303741] OMAPFB: omapfb_init [1.303894] OMAPFB: omapfb_probe [1.303924] omapfb omapfb: no driver for display [1.304016] omapfb omapfb: failed to setup omapfb You can find the full dmesg and the full kernel config at [0] and [1]. Can you tell me the reason for the no driver for display message? I thought acx565akm has been registered as display driver directly before. You also need VENC driver for the tv-out: CONFIG_OMAP2_DSS_VENC thanks, that fixes the problem. Granted, DSS could handle this case a bit better, by continuing but refusing to let the user enable the tv-out... uhm yes :) But first of all it would help to know which driver is missing. Perhaps something like no driver for display1/venc. -- Sebastian signature.asc Description: Digital signature
Re: [PATCH] watchdog: twl4030_wdt: Watchdog device registration issue fix
Hi All, Hello All, Any comments on this patch? Regards, Keerthy On Wed, Mar 2, 2011 at 2:17 AM, Keerthy j-keer...@ti.com wrote: twl4030_wdt driver and omap_wdt driver are registering as misc_device name as watchdog and the same minor number WATCHDOG_MINOR( value = 130). There is a conflict since the name and minor were the same for both the misc_device registered by omap_wdt.c as well as twl4030_wdt.c The omap_wdt.c probe is getting called first. Hence it succeeds. twl4030_wdt.c always failed on the minor number comparison check. Now requesting for MISC_DYNAMIC_MINOR as the minor number for twl4030_watchdog and renamed the device name as twl4030_watchdog. Tested for basic boot up on OMAP4 Blaze and OMAP3630 SDP. OMAP3630 SDP twl4030_wdt registration succeeds.2430SDP boot tested, watchdog registration without errors. Signed-off-by: Keerthy j-keer...@ti.com NAK. Reason: a watchdog daemon will only be using /dev/watchdog. The plan is to get the generic watchdog framework in, convert most of the drivers, extend teh generic watchdog framework with a sysfs interface so that we can support multiple watchdogs. Kind regards, Wim. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] omap display subsystem changes for 2.6.39
* Tomi Valkeinen tomi.valkei...@ti.com [110323 00:43]: On Tue, 2011-03-22 at 13:49 -0500, Felipe Contreras wrote: On Mon, Mar 21, 2011 at 11:51 AM, Tomi Valkeinen tomi.valkei...@ti.com wrote: Here are OMAP display subsystem patches for 2.6.39 merge window. Quite a bit of them, and many changes also in arch/arm/mach-omap2, which unfortunately couldn't go through Tony's linux-omap tree due to dependencies on DSS driver code. What about this one? http://article.gmane.org/gmane.linux.ports.arm.omap/44975 I seem to have missed that one. But I think that should go through Tony's tree to avoid conflicts. Tony? Acked-by: Tomi Valkeinen tomi.valkei...@ti.com Seems OK for -rc cycle. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] usb: otg: OMAP4430: Fix omap4430_phy_init function
* Hema HK hem...@ti.com [110324 04:03]: omap4430_phy_init() function can be called with no device pointer to powerdown the UTMI PHY during board init when USB is disabled. Fix the function accordingly. I don't think this is the case any longer, see merge commit 0df0914d414a504b975f3cc66ace0c16ef55b7f3. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2 v2] usb: otg: OMAP4430: Fixing the omap4430_phy_init function
* Hema HK hem...@ti.com [110324 04:36]: omap4430_phy_init() function can be called with no device pointer, to powerdown the PHY during board init when USB is disabled. Fix the function accordingly. This should no longer be needed after merge commit 0df0914d414a504b975f3cc66ace0c16ef55b7f3. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/10] omap init_early changes for irq and timer init
Hi all, This series continues the work to only initialize minimal omap code in init_early and to cut down dependencies to code that should be initialized later. It also cleans up the omap2+ timer init code to prepare things for the later patches. After this series further patches can make the dmtimer code a regular device driver. Later on we can also move the clockource init happen earlier to make sched_clock work properly with CONFIG_PRINTK_TIME. Regards, Tony --- Tony Lindgren (10): omap: Use separate init_irq functions to avoid cpu_is_omap tests early omap: Set separate timer init functions to avoid cpu_is_omap tests omap: Move dmtimer defines to dmtimer.h omap: Make a subset of dmtimer functions into inline functions omap2+: Use dmtimer macros for clockevent omap2+: Remove gptimer_wakekup for now omap2+: Reserve clocksource and timesource and initialize dmtimer later omap2+: Use dmtimer macros for clocksource omap2+: Remove omap2_gp_clockevent_set_gptimer omap2+: Rename timer-gp.c into timer.c to combine timer init functions arch/arm/mach-omap1/board-ams-delta.c |4 arch/arm/mach-omap1/board-fsample.c|4 arch/arm/mach-omap1/board-generic.c|4 arch/arm/mach-omap1/board-h2.c |4 arch/arm/mach-omap1/board-h3.c |4 arch/arm/mach-omap1/board-htcherald.c |4 arch/arm/mach-omap1/board-innovator.c |4 arch/arm/mach-omap1/board-nokia770.c |4 arch/arm/mach-omap1/board-osk.c|4 arch/arm/mach-omap1/board-palmte.c |4 arch/arm/mach-omap1/board-palmtt.c |4 arch/arm/mach-omap1/board-palmz71.c|4 arch/arm/mach-omap1/board-perseus2.c |4 arch/arm/mach-omap1/board-sx1.c|4 arch/arm/mach-omap1/board-voiceblue.c |4 arch/arm/mach-omap1/irq.c |2 arch/arm/mach-omap1/time.c |6 arch/arm/mach-omap1/timer32k.c |4 arch/arm/mach-omap2/Makefile |2 arch/arm/mach-omap2/board-2430sdp.c|4 arch/arm/mach-omap2/board-3430sdp.c|4 arch/arm/mach-omap2/board-3630sdp.c|4 arch/arm/mach-omap2/board-4430sdp.c|6 arch/arm/mach-omap2/board-am3517crane.c|4 arch/arm/mach-omap2/board-am3517evm.c |4 arch/arm/mach-omap2/board-apollon.c|4 arch/arm/mach-omap2/board-cm-t35.c |4 arch/arm/mach-omap2/board-cm-t3517.c |4 arch/arm/mach-omap2/board-devkit8000.c |8 - arch/arm/mach-omap2/board-generic.c|4 arch/arm/mach-omap2/board-h4.c |4 arch/arm/mach-omap2/board-igep0020.c |4 arch/arm/mach-omap2/board-igep0030.c |4 arch/arm/mach-omap2/board-ldp.c|4 arch/arm/mach-omap2/board-n8x0.c | 12 - arch/arm/mach-omap2/board-omap3beagle.c|8 - arch/arm/mach-omap2/board-omap3evm.c |4 arch/arm/mach-omap2/board-omap3logic.c |9 - arch/arm/mach-omap2/board-omap3pandora.c |4 arch/arm/mach-omap2/board-omap3stalker.c |8 - arch/arm/mach-omap2/board-omap3touchbook.c |8 - arch/arm/mach-omap2/board-omap4panda.c |3 arch/arm/mach-omap2/board-overo.c |4 arch/arm/mach-omap2/board-rm680.c |4 arch/arm/mach-omap2/board-rx51.c |4 arch/arm/mach-omap2/board-ti8168evm.c |9 - arch/arm/mach-omap2/board-zoom.c |8 - arch/arm/mach-omap2/io.c | 17 - arch/arm/mach-omap2/irq.c | 84 +-- arch/arm/mach-omap2/omap4-common.c |6 arch/arm/mach-omap2/pm-debug.c | 27 -- arch/arm/mach-omap2/pm.h |6 arch/arm/mach-omap2/pm34xx.c |4 arch/arm/mach-omap2/timer-gp.c | 266 - arch/arm/mach-omap2/timer-gp.h | 16 - arch/arm/mach-omap2/timer.c| 361 arch/arm/plat-omap/counter_32k.c |2 arch/arm/plat-omap/dmtimer.c | 219 - arch/arm/plat-omap/include/plat/common.h |7 - arch/arm/plat-omap/include/plat/dmtimer.h | 181 ++ arch/arm/plat-omap/include/plat/irqs.h |6 61 files changed, 773 insertions(+), 654 deletions(-) delete mode 100644 arch/arm/mach-omap2/timer-gp.c delete mode 100644 arch/arm/mach-omap2/timer-gp.h create mode 100644 arch/arm/mach-omap2/timer.c -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] omap: Use separate init_irq functions to avoid cpu_is_omap tests early
This allows us to remove cpu_is_omap calls from init_irq functions
and the irq handler. There should not be any need for cpu_is_omap
as at this point we only care about SoC generation, and not about
subcategories.
The main reason for the patch is that we want to initialize only
minimal omap specific code from the init_early call, and this and
the following patches get us closer to that goal.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/board-ams-delta.c |2 -
arch/arm/mach-omap1/board-fsample.c|2 -
arch/arm/mach-omap1/board-generic.c|2 -
arch/arm/mach-omap1/board-h2.c |2 -
arch/arm/mach-omap1/board-h3.c |2 -
arch/arm/mach-omap1/board-htcherald.c |2 -
arch/arm/mach-omap1/board-innovator.c |2 -
arch/arm/mach-omap1/board-nokia770.c |2 -
arch/arm/mach-omap1/board-osk.c|2 -
arch/arm/mach-omap1/board-palmte.c |2 -
arch/arm/mach-omap1/board-palmtt.c |2 -
arch/arm/mach-omap1/board-palmz71.c|2 -
arch/arm/mach-omap1/board-perseus2.c |2 -
arch/arm/mach-omap1/board-sx1.c|2 -
arch/arm/mach-omap1/board-voiceblue.c |2 -
arch/arm/mach-omap1/irq.c |2 -
arch/arm/mach-omap2/board-2430sdp.c|2 -
arch/arm/mach-omap2/board-3430sdp.c|2 -
arch/arm/mach-omap2/board-3630sdp.c|2 -
arch/arm/mach-omap2/board-am3517crane.c|2 -
arch/arm/mach-omap2/board-am3517evm.c |2 -
arch/arm/mach-omap2/board-apollon.c|2 -
arch/arm/mach-omap2/board-cm-t35.c |2 -
arch/arm/mach-omap2/board-cm-t3517.c |2 -
arch/arm/mach-omap2/board-devkit8000.c |2 -
arch/arm/mach-omap2/board-generic.c|2 -
arch/arm/mach-omap2/board-h4.c |2 -
arch/arm/mach-omap2/board-igep0020.c |2 -
arch/arm/mach-omap2/board-igep0030.c |2 -
arch/arm/mach-omap2/board-ldp.c|2 -
arch/arm/mach-omap2/board-n8x0.c |6 +-
arch/arm/mach-omap2/board-omap3beagle.c|2 -
arch/arm/mach-omap2/board-omap3evm.c |2 -
arch/arm/mach-omap2/board-omap3logic.c |4 +
arch/arm/mach-omap2/board-omap3pandora.c |2 -
arch/arm/mach-omap2/board-omap3stalker.c |2 -
arch/arm/mach-omap2/board-omap3touchbook.c |2 -
arch/arm/mach-omap2/board-overo.c |2 -
arch/arm/mach-omap2/board-rm680.c |2 -
arch/arm/mach-omap2/board-rx51.c |2 -
arch/arm/mach-omap2/board-ti8168evm.c |7 --
arch/arm/mach-omap2/board-zoom.c |4 +
arch/arm/mach-omap2/io.c | 17 --
arch/arm/mach-omap2/irq.c | 84
arch/arm/mach-omap2/omap4-common.c |6 ++
arch/arm/plat-omap/include/plat/irqs.h |6 ++
46 files changed, 117 insertions(+), 93 deletions(-)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c
b/arch/arm/mach-omap1/board-ams-delta.c
index de88c92..17ed757 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value)
static void __init ams_delta_init_irq(void)
{
omap1_init_common_hw();
- omap_init_irq();
+ omap1_init_irq();
}
static struct map_desc ams_delta_io_desc[] __initdata = {
diff --git a/arch/arm/mach-omap1/board-fsample.c
b/arch/arm/mach-omap1/board-fsample.c
index 87f173d..eaff305 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void)
static void __init omap_fsample_init_irq(void)
{
omap1_init_common_hw();
- omap_init_irq();
+ omap1_init_irq();
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
diff --git a/arch/arm/mach-omap1/board-generic.c
b/arch/arm/mach-omap1/board-generic.c
index 23f4ab9..3fd6b40 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -31,7 +31,7 @@
static void __init omap_generic_init_irq(void)
{
omap1_init_common_hw();
- omap_init_irq();
+ omap1_init_irq();
}
/* assume no Mini-AB port */
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index ba3bd09..8147b04 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[]
= {
static void __init h2_init_irq(void)
{
omap1_init_common_hw();
- omap_init_irq();
+ omap1_init_irq();
}
static struct omap_usb_config h2_usb_config __initdata = {
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index ac48677..1b448f6 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -439,7 +439,7 @@ static void __init
[PATCH 02/10] omap: Set separate timer init functions to avoid cpu_is_omap tests
This is needed for the following patches to initialize non-sys_timer hardware later on. Again, there's no need to do cpu_is_omap calls as we only care about the major omap generation. We can do this with the .timer entry alone. Note that for now we just set stubs for the various sys_timer entries that will get populated in a later patch. Also the following patches will remove the omap_dm_timer_init calls and make it an arch_initcall. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap1/board-ams-delta.c |2 - arch/arm/mach-omap1/board-fsample.c|2 - arch/arm/mach-omap1/board-generic.c|2 - arch/arm/mach-omap1/board-h2.c |2 - arch/arm/mach-omap1/board-h3.c |2 - arch/arm/mach-omap1/board-htcherald.c |2 - arch/arm/mach-omap1/board-innovator.c |2 - arch/arm/mach-omap1/board-nokia770.c |2 - arch/arm/mach-omap1/board-osk.c|2 - arch/arm/mach-omap1/board-palmte.c |2 - arch/arm/mach-omap1/board-palmtt.c |2 - arch/arm/mach-omap1/board-palmz71.c|2 - arch/arm/mach-omap1/board-perseus2.c |2 - arch/arm/mach-omap1/board-sx1.c|2 - arch/arm/mach-omap1/board-voiceblue.c |2 - arch/arm/mach-omap1/time.c |6 +-- arch/arm/mach-omap2/board-2430sdp.c|2 - arch/arm/mach-omap2/board-3430sdp.c|2 - arch/arm/mach-omap2/board-3630sdp.c|2 - arch/arm/mach-omap2/board-4430sdp.c|2 - arch/arm/mach-omap2/board-am3517crane.c|2 - arch/arm/mach-omap2/board-am3517evm.c |2 - arch/arm/mach-omap2/board-apollon.c|2 - arch/arm/mach-omap2/board-cm-t35.c |2 - arch/arm/mach-omap2/board-cm-t3517.c |2 - arch/arm/mach-omap2/board-devkit8000.c |2 - arch/arm/mach-omap2/board-generic.c|2 - arch/arm/mach-omap2/board-h4.c |2 - arch/arm/mach-omap2/board-igep0020.c |2 - arch/arm/mach-omap2/board-igep0030.c |2 - arch/arm/mach-omap2/board-ldp.c|2 - arch/arm/mach-omap2/board-n8x0.c |6 +-- arch/arm/mach-omap2/board-omap3beagle.c|2 - arch/arm/mach-omap2/board-omap3evm.c |2 - arch/arm/mach-omap2/board-omap3logic.c |4 +- arch/arm/mach-omap2/board-omap3pandora.c |2 - arch/arm/mach-omap2/board-omap3stalker.c |2 - arch/arm/mach-omap2/board-omap3touchbook.c |2 - arch/arm/mach-omap2/board-omap4panda.c |2 - arch/arm/mach-omap2/board-overo.c |2 - arch/arm/mach-omap2/board-rm680.c |2 - arch/arm/mach-omap2/board-rx51.c |2 - arch/arm/mach-omap2/board-ti8168evm.c |2 - arch/arm/mach-omap2/board-zoom.c |4 +- arch/arm/mach-omap2/timer-gp.c | 63 arch/arm/plat-omap/include/plat/common.h |7 +++ arch/arm/plat-omap/include/plat/dmtimer.h |1 47 files changed, 111 insertions(+), 60 deletions(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 17ed757..f1ac7fb 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, Amstrad E3 (Delta)) .reserve= omap_reserve, .init_irq = ams_delta_init_irq, .init_machine = ams_delta_init, - .timer = omap_timer, + .timer = omap1_timer, MACHINE_END EXPORT_SYMBOL(ams_delta_latch1_write); diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index eaff305..a6b1bea 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, OMAP730 F-Sample) .reserve= omap_reserve, .init_irq = omap_fsample_init_irq, .init_machine = omap_fsample_init, - .timer = omap_timer, + .timer = omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 3fd6b40..04fc356 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, Generic OMAP1510/1610/1710) .reserve= omap_reserve, .init_irq = omap_generic_init_irq, .init_machine = omap_generic_init, - .timer = omap_timer, + .timer = omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 8147b04..cb7fb1a 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, TI-H2) .reserve= omap_reserve, .init_irq = h2_init_irq, .init_machine = h2_init, - .timer = omap_timer, + .timer
[PATCH 03/10] omap: Move dmtimer defines to dmtimer.h
These will be needed when dmtimer platform init code gets split for omap1 and omap2+. These will also be needed for inline macros for sys_timer in the following patches. No functional changes. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/dmtimer.c | 121 arch/arm/plat-omap/include/plat/dmtimer.h | 125 + 2 files changed, 125 insertions(+), 121 deletions(-) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index ee9f6eb..dfdc3b2 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -41,127 +41,6 @@ #include plat/dmtimer.h #include mach/irqs.h -/* register offsets */ -#define _OMAP_TIMER_ID_OFFSET 0x00 -#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 -#define _OMAP_TIMER_SYS_STAT_OFFSET0x14 -#define _OMAP_TIMER_STAT_OFFSET0x18 -#define _OMAP_TIMER_INT_EN_OFFSET 0x1c -#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 -#define _OMAP_TIMER_CTRL_OFFSET0x24 -#defineOMAP_TIMER_CTRL_GPOCFG (1 14) -#defineOMAP_TIMER_CTRL_CAPTMODE(1 13) -#defineOMAP_TIMER_CTRL_PT (1 12) -#defineOMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 8) -#defineOMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 8) -#defineOMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 8) -#defineOMAP_TIMER_CTRL_SCPWM (1 7) -#defineOMAP_TIMER_CTRL_CE (1 6) /* compare enable */ -#defineOMAP_TIMER_CTRL_PRE (1 5) /* prescaler enable */ -#defineOMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */ -#defineOMAP_TIMER_CTRL_POSTED (1 2) -#defineOMAP_TIMER_CTRL_AR (1 1) /* auto-reload enable */ -#defineOMAP_TIMER_CTRL_ST (1 0) /* start timer */ -#define _OMAP_TIMER_COUNTER_OFFSET 0x28 -#define _OMAP_TIMER_LOAD_OFFSET0x2c -#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 -#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 -#defineWP_NONE 0 /* no write pending bit */ -#defineWP_TCLR (1 0) -#defineWP_TCRR (1 1) -#defineWP_TLDR (1 2) -#defineWP_TTGR (1 3) -#defineWP_TMAR (1 4) -#defineWP_TPIR (1 5) -#defineWP_TNIR (1 6) -#defineWP_TCVR (1 7) -#defineWP_TOCR (1 8) -#defineWP_TOWR (1 9) -#define _OMAP_TIMER_MATCH_OFFSET 0x38 -#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c -#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 -#define _OMAP_TIMER_CAPTURE2_OFFSET0x44/* TCAR2, 34xx only */ -#define _OMAP_TIMER_TICK_POS_OFFSET0x48/* TPIR, 34xx only */ -#define _OMAP_TIMER_TICK_NEG_OFFSET0x4c/* TNIR, 34xx only */ -#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50/* TCVR, 34xx only */ -#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54/* TOCR, 34xx only */ -#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58/* TOWR, 34xx only */ - -/* register offsets with the write pending bit encoded */ -#defineWPSHIFT 16 - -#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ - | (WP_NONE WPSHIFT)) - -#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ - | (WP_NONE WPSHIFT)) - -#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ - | (WP_NONE WPSHIFT)) - -#define OMAP_TIMER_STAT_REG(_OMAP_TIMER_STAT_OFFSET \ - | (WP_NONE WPSHIFT)) - -#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ - | (WP_NONE WPSHIFT)) - -#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ - | (WP_NONE WPSHIFT)) - -#define OMAP_TIMER_CTRL_REG(_OMAP_TIMER_CTRL_OFFSET \ - | (WP_TCLR WPSHIFT)) - -#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \ - | (WP_TCRR WPSHIFT)) - -#define OMAP_TIMER_LOAD_REG(_OMAP_TIMER_LOAD_OFFSET \ - | (WP_TLDR WPSHIFT)) - -#define OMAP_TIMER_TRIGGER_REG
[PATCH 05/10] omap2+: Use dmtimer macros for clockevent
This patch makes timer-gp.c to use only a subset of dmtimer
functions without the need to initialize dmtimer code early.
Note that omap_dmtimer_init_one can eventually be moved to
omap2+ specific dmtimer.c.
Also note that now with the inline functions, timer_set_next_event
becomes more efficient in the lines of assembly code.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/timer-gp.c| 145 ++---
arch/arm/plat-omap/include/plat/dmtimer.h |1
2 files changed, 111 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index b7ea047..c21e99f 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -45,10 +45,33 @@
#include timer-gp.h
+/* Parent clocks, eventually these will come from the clock framework */
+
+#define OMAP2_MPU_SOURCE sys_ck
+#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
+#define OMAP4_MPU_SOURCE sys_clkin_ck
+#define OMAP2_32K_SOURCE func_32k_ck
+#define OMAP3_32K_SOURCE omap_32k_fck
+#define OMAP4_32K_SOURCE sys_32k_ck
+
+#ifdef CONFIG_OMAP_32K_TIMER
+#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE
+#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE
+#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE
+#define OMAP3_BEAGLE_TIMER 12
+#else
+#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE
+#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE
+#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE
+#define OMAP3_BEAGLE_TIMER 1
+#endif
/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
#define MAX_GPTIMER_ID 12
+/* Clockevent code */
+
+static struct omap_dm_timer clkev;
static struct omap_dm_timer *gptimer;
static struct clock_event_device clockevent_gpt;
static u8 __initdata gptimer_id = 1;
@@ -57,10 +80,9 @@ struct omap_dm_timer *gptimer_wakeup;
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
{
- struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id;
struct clock_event_device *evt = clockevent_gpt;
- omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW);
+ __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
evt-event_handler(evt);
return IRQ_HANDLED;
@@ -75,7 +97,8 @@ static struct irqaction omap2_gp_timer_irq = {
static int omap2_gp_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
- omap_dm_timer_set_load_start(gptimer, 0, 0x - cycles);
+ __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
+ 0x - cycles, 1);
return 0;
}
@@ -85,13 +108,13 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode
mode,
{
u32 period;
- omap_dm_timer_stop(gptimer);
+ omap_dm_timer_stop(clkev);
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
- period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
+ period = clkev.rate / HZ;
period -= 1;
- omap_dm_timer_set_load_start(gptimer, 1, 0x - period);
+ omap_dm_timer_set_load_start(clkev, 1, 0x - period);
break;
case CLOCK_EVT_MODE_ONESHOT:
break;
@@ -130,43 +153,88 @@ int __init omap2_gp_clockevent_set_gptimer(u8 id)
return 0;
}
-static void __init omap2_gp_clockevent_init(void)
+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
+ int gptimer_id,
+ const char *fck_source)
{
- u32 tick_rate;
- int src;
- char clockevent_hwmod_name[8]; /* 8 = sizeof(timerXX0) */
-
- inited = 1;
+ char name[10]; /* 10 = sizeof(gptXX_Xck0) */
+ struct omap_hwmod *oh;
+ size_t size;
+ int res = 0;
+
+ sprintf(name, timer%d, gptimer_id);
+ omap_hwmod_setup_one(name);
+ oh = omap_hwmod_lookup(name);
+ if (!oh)
+ return -ENODEV;
+
+ timer-irq = oh-mpu_irqs[0].irq;
+ timer-phys_base = oh-slaves[0]-addr-pa_start;
+ size = oh-slaves[0]-addr-pa_end - timer-phys_base;
+
+ /* Static mapping, never released */
+ timer-io_base = ioremap(timer-phys_base, size);
+ if (!timer-io_base)
+ return -ENXIO;
+
+ /* After the dmtimer is using hwmod these clocks won't be needed */
+ sprintf(name, gpt%d_fck, gptimer_id);
+ timer-fclk = clk_get(NULL, name);
+ if (IS_ERR(timer-fclk))
+ return -ENODEV;
+
+ sprintf(name, gpt%d_ick, gptimer_id);
+ timer-iclk = clk_get(NULL, name);
+ if (IS_ERR(timer-iclk)) {
+ clk_put(timer-fclk);
+ return -ENODEV;
+ }
- sprintf(clockevent_hwmod_name, timer%d, gptimer_id);
-
[PATCH 06/10] omap2+: Remove gptimer_wakekup for now
This removes the support for setting the wake-up timer for debugging.
Later on we can reserve gptimer1 for PM code only and have similar
functionality.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/pm-debug.c | 27 ---
arch/arm/mach-omap2/pm.h |6 --
arch/arm/mach-omap2/pm34xx.c |4
arch/arm/mach-omap2/timer-gp.c |8 +---
4 files changed, 1 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index a5a83b3..6e19f10 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -41,8 +41,6 @@
int omap2_pm_debug;
u32 enable_off_mode;
u32 sleep_while_idle;
-u32 wakeup_timer_seconds;
-u32 wakeup_timer_milliseconds;
#define DUMP_PRM_MOD_REG(mod, reg)\
regs[reg_count].name = #mod . #reg; \
@@ -162,23 +160,6 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
printk(KERN_INFO %-20s: 0x%08x\n, regs[i].name, regs[i].val);
}
-void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
-{
- u32 tick_rate, cycles;
-
- if (!seconds !milliseconds)
- return;
-
- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
- cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
- omap_dm_timer_stop(gptimer_wakeup);
- omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0x - cycles);
-
- pr_info(PM: Resume timer in %u.%03u secs
-(%d ticks at %d ticks/sec.)\n,
- seconds, milliseconds, cycles, tick_rate);
-}
-
#ifdef CONFIG_DEBUG_FS
#include linux/debugfs.h
#include linux/seq_file.h
@@ -576,9 +557,6 @@ static int option_set(void *data, u64 val)
{
u32 *option = data;
- if (option == wakeup_timer_milliseconds val = 1000)
- return -EINVAL;
-
*option = val;
if (option == enable_off_mode) {
@@ -641,11 +619,6 @@ static int __init pm_dbg_init(void)
enable_off_mode, pm_dbg_option_fops);
(void) debugfs_create_file(sleep_while_idle, S_IRUGO | S_IWUSR, d,
sleep_while_idle, pm_dbg_option_fops);
- (void) debugfs_create_file(wakeup_timer_seconds, S_IRUGO | S_IWUSR, d,
- wakeup_timer_seconds, pm_dbg_option_fops);
- (void) debugfs_create_file(wakeup_timer_milliseconds,
- S_IRUGO | S_IWUSR, d, wakeup_timer_milliseconds,
- pm_dbg_option_fops);
pm_dbg_init_done = 1;
return 0;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 797bfd1..fb26e71 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -55,19 +55,13 @@ inline void omap3_pm_init_cpuidle(struct cpuidle_params
*cpuidle_board_params)
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
-extern u32 wakeup_timer_seconds;
-extern u32 wakeup_timer_milliseconds;
-extern struct omap_dm_timer *gptimer_wakeup;
-
#ifdef CONFIG_PM_DEBUG
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
-extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
extern int omap2_pm_debug;
extern u32 enable_off_mode;
extern u32 sleep_while_idle;
#else
#define omap2_pm_dump(mode, resume, us)do {} while (0);
-#define omap2_pm_wakeup_on_timer(seconds, milliseconds)do {} while (0);
#define omap2_pm_debug 0
#define enable_off_mode 0
#define sleep_while_idle 0
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0c5e3a4..ff2fb0e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -534,10 +534,6 @@ static int omap3_pm_suspend(void)
struct power_state *pwrst;
int state, ret = 0;
- if (wakeup_timer_seconds || wakeup_timer_milliseconds)
- omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
-wakeup_timer_milliseconds);
-
/* Read current next_pwrsts */
list_for_each_entry(pwrst, pwrst_list, node)
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-pwrdm);
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index c21e99f..4b071fb 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -72,11 +72,9 @@
/* Clockevent code */
static struct omap_dm_timer clkev;
-static struct omap_dm_timer *gptimer;
static struct clock_event_device clockevent_gpt;
static u8 __initdata gptimer_id = 1;
static u8 __initdata inited;
-struct omap_dm_timer *gptimer_wakeup;
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
{
@@ -192,10 +190,6 @@ static int __init omap_dm_timer_init_one(struct
omap_dm_timer *timer,
omap_hwmod_enable(oh);
- gptimer =
[PATCH 07/10] omap2+: Reserve clocksource and timesource and initialize dmtimer later
There's no need to initialize the dmtimer framework early.
Just mark the clocksource and timesource as reserved, and
initialize dmtimer with an arch_initcall.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/timer32k.c|4
arch/arm/mach-omap2/timer-gp.c|9 -
arch/arm/plat-omap/dmtimer.c |8
arch/arm/plat-omap/include/plat/dmtimer.h |1 +
4 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 13d7b8f..96604a5 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void)
bool __init omap_32k_timer_init(void)
{
omap_init_clocksource_32k();
-
-#ifdef CONFIG_OMAP_DM_TIMER
- omap_dm_timer_init();
-#endif
omap_init_32k_timer();
return true;
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4b071fb..5e8fa1e 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -69,6 +69,8 @@
/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
#define MAX_GPTIMER_ID 12
+u32 sys_timer_reserved;
+
/* Clockevent code */
static struct omap_dm_timer clkev;
@@ -190,6 +192,8 @@ static int __init omap_dm_timer_init_one(struct
omap_dm_timer *timer,
omap_hwmod_enable(oh);
+ sys_timer_reserved |= (1 (gptimer_id - 1));
+
if (gptimer_id != 12) {
struct clk *src;
@@ -315,7 +319,6 @@ static void __init omap2_gp_clocksource_init(void)
#ifdef CONFIG_ARCH_OMAP2
static void __init omap242x_timer_init(void)
{
- omap_dm_timer_init();
omap2_gp_clockevent_init(1, OMAP2_CLKEV_SOURCE);
omap2_gp_clocksource_init();
}
@@ -326,7 +329,6 @@ struct sys_timer omap242x_timer = {
static void __init omap243x_timer_init(void)
{
- omap_dm_timer_init();
omap2_gp_clockevent_init(1, OMAP2_CLKEV_SOURCE);
omap2_gp_clocksource_init();
}
@@ -339,7 +341,6 @@ struct sys_timer omap243x_timer = {
#ifdef CONFIG_ARCH_OMAP3
static void __init omap3_timer_init(void)
{
- omap_dm_timer_init();
omap2_gp_clockevent_init(1, OMAP3_CLKEV_SOURCE);
omap2_gp_clocksource_init();
}
@@ -354,7 +355,6 @@ struct sys_timer omap3_timer = {
*/
static void __init omap3_beagle_timer_init(void)
{
- omap_dm_timer_init();
omap2_gp_clockevent_init(OMAP3_BEAGLE_TIMER, OMAP3_CLKEV_SOURCE);
omap2_gp_clocksource_init();
}
@@ -371,7 +371,6 @@ static void __init omap4_timer_init(void)
twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
BUG_ON(!twd_base);
#endif
- omap_dm_timer_init();
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
omap2_gp_clocksource_init();
}
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index ff9b732..5163cf4 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -677,8 +677,16 @@ int __init omap_dm_timer_init(void)
sprintf(clk_name, gpt%d_fck, i + 1);
timer-fclk = clk_get(NULL, clk_name);
}
+
+ /* One or two timers may be set up early for sys_timer */
+ if (sys_timer_reserved (1 i)) {
+ timer-reserved = 1;
+ timer-posted = 1;
+ }
#endif
}
return 0;
}
+
+arch_initcall(omap_dm_timer_init);
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h
b/arch/arm/plat-omap/include/plat/dmtimer.h
index 5e68974..97bc306 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -219,6 +219,7 @@ struct omap_dm_timer {
unsigned posted:1;
};
+extern u32 sys_timer_reserved;
void __omap_dm_timer_reset(struct omap_dm_timer *timer, int autoidle,
int wakeup);
void omap_dm_timer_prepare(struct omap_dm_timer *timer);
--
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[PATCH 04/10] omap: Make a subset of dmtimer functions into inline functions
This will allow us to share the code between system timer and
dmtimer device driver code without having to initialize all
dmtimers early. It will also make the timer_set_next_event
more efficient as the inline functions will optimize the code
better in this case.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/dmtimer.c | 90 -
arch/arm/plat-omap/include/plat/dmtimer.h | 53 +
2 files changed, 102 insertions(+), 41 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index dfdc3b2..ff9b732 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -170,11 +170,7 @@ static spinlock_t dm_timer_lock;
*/
static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
{
- if (timer-posted)
- while (readl(timer-io_base + (OMAP_TIMER_WRITE_PEND_REG
0xff))
-(reg WPSHIFT))
- cpu_relax();
- return readl(timer-io_base + (reg 0xff));
+ return __omap_dm_timer_read(timer-io_base, reg, timer-posted);
}
/*
@@ -186,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct
omap_dm_timer *timer, u32 reg)
static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
u32 value)
{
- if (timer-posted)
- while (readl(timer-io_base + (OMAP_TIMER_WRITE_PEND_REG
0xff))
-(reg WPSHIFT))
- cpu_relax();
- writel(value, timer-io_base + (reg 0xff));
+ __omap_dm_timer_write(timer-io_base, reg, value, timer-posted);
}
static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
@@ -207,38 +199,54 @@ static void omap_dm_timer_wait_for_reset(struct
omap_dm_timer *timer)
}
}
-static void omap_dm_timer_reset(struct omap_dm_timer *timer)
+/* Assumes the source clock has been set by caller */
+void __omap_dm_timer_reset(struct omap_dm_timer *timer, int autoidle,
+ int wakeup)
{
u32 l;
+ l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
+ l |= 0x02 3; /* Set to smart-idle mode */
+ l |= 0x2 8; /* Set clock activity to perserve f-clock on idle */
+
+ if (autoidle)
+ l |= 0x1 0;
+
+ if (wakeup)
+ l |= 1 2;
+
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
+
+ /* Match hardware reset default of posted mode */
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
+ OMAP_TIMER_CTRL_POSTED);
+ timer-posted = 1;
+}
+
+static void omap_dm_timer_reset(struct omap_dm_timer *timer)
+{
+ int autoidle = 0, wakeup = 0;
+
if (!cpu_class_is_omap2() || timer != dm_timers[0]) {
omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
omap_dm_timer_wait_for_reset(timer);
}
omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
- l |= 0x02 3; /* Set to smart-idle mode */
- l |= 0x2 8; /* Set clock activity to perserve f-clock on idle */
-
/* Enable autoidle on OMAP2 / OMAP3 */
if (cpu_is_omap24xx() || cpu_is_omap34xx())
- l |= 0x1 0;
+ autoidle = 1;
/*
* Enable wake-up on OMAP2 CPUs.
*/
if (cpu_class_is_omap2())
- l |= 1 2;
- omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
+ wakeup = 1;
- /* Match hardware reset default of posted mode */
- omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
- OMAP_TIMER_CTRL_POSTED);
- timer-posted = 1;
+ __omap_dm_timer_reset(timer, autoidle, wakeup);
}
-static void omap_dm_timer_prepare(struct omap_dm_timer *timer)
+void omap_dm_timer_prepare(struct omap_dm_timer *timer)
{
omap_dm_timer_enable(timer);
omap_dm_timer_reset(timer);
@@ -449,16 +457,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
#else
-int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
+int __omap_dm_timer_set_source(struct clk *timer_fck, struct clk *parent)
{
- int ret = -EINVAL;
-
- if (source 0 || source = 3)
- return -EINVAL;
+ int ret;
- clk_disable(timer-fclk);
- ret = clk_set_parent(timer-fclk, dm_source_clocks[source]);
- clk_enable(timer-fclk);
+ clk_disable(timer_fck);
+ ret = clk_set_parent(timer_fck, parent);
+ clk_enable(timer_fck);
/*
* When the functional clock disappears, too quick writes seem
@@ -468,6 +473,15 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer,
int source)
return ret;
}
+
+int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
+{
+
[PATCH 08/10] omap2+: Use dmtimer macros for clocksource
Use dmtimer macros for clocksource. As with the clockevent,
this allows us to initialize the rest of dmtimer code later on.
Note that eventually we will be initializing the timesource
from init_early so sched_clock will work properly for
CONFIG_PRINTK_TIME.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/timer-gp.c | 60 +-
arch/arm/plat-omap/counter_32k.c |2 +
2 files changed, 34 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 5e8fa1e..afb9041 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -256,20 +256,22 @@ static void __init omap2_gp_clockevent_init(int
gptimer_id,
* sync counter. See clocksource setup in plat-omap/counter_32k.c
*/
-static void __init omap2_gp_clocksource_init(void)
+static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
{
omap_init_clocksource_32k();
}
#else
+
+static struct omap_dm_timer clksrc;
+
/*
* clocksource
*/
static DEFINE_CLOCK_DATA(cd);
-static struct omap_dm_timer *gpt_clocksource;
static cycle_t clocksource_read_cycles(struct clocksource *cs)
{
- return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
}
static struct clocksource clocksource_gpt = {
@@ -284,35 +286,39 @@ static void notrace dmtimer_update_sched_clock(void)
{
u32 cyc;
- cyc = omap_dm_timer_read_counter(gpt_clocksource);
+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
update_sched_clock(cd, cyc, (u32)~0);
}
-/* Setup free-running counter for clocksource */
-static void __init omap2_gp_clocksource_init(void)
+unsigned long long notrace sched_clock(void)
{
- static struct omap_dm_timer *gpt;
- u32 tick_rate;
- static char err1[] __initdata = KERN_ERR
- %s: failed to request dm-timer\n;
- static char err2[] __initdata = KERN_ERR
- %s: can't register clocksource!\n;
+ u32 cyc = 0;
- gpt = omap_dm_timer_request();
- if (!gpt)
- printk(err1, clocksource_gpt.name);
- gpt_clocksource = gpt;
+ if (clksrc.reserved)
+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
- omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK);
- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt));
+ return cyc_to_sched_clock(cd, cyc, (u32)~0);
+}
+
+/* Setup free-running counter for clocksource */
+static void __init omap2_gp_clocksource_init(int gptimer_id,
+ const char *fck_source)
+{
+ int res;
+
+ res = omap_dm_timer_init_one(clksrc, gptimer_id, fck_source);
+ BUG_ON(res);
- omap_dm_timer_set_load_start(gpt, 1, 0);
+ pr_info(OMAP clocksource: GPTIMER%d at %lu Hz\n,
+ gptimer_id, clksrc.rate);
- init_sched_clock(cd, dmtimer_update_sched_clock, 32, tick_rate);
+ omap_dm_timer_set_load_start(clksrc, 1, 0);
+ init_sched_clock(cd, dmtimer_update_sched_clock, 32, clksrc.rate);
- if (clocksource_register_hz(clocksource_gpt, tick_rate))
- printk(err2, clocksource_gpt.name);
+ if (clocksource_register_hz(clocksource_gpt, clksrc.rate))
+ pr_err(Could not register clocksource %s\n,
+ clocksource_gpt.name);
}
#endif
@@ -320,7 +326,7 @@ static void __init omap2_gp_clocksource_init(void)
static void __init omap242x_timer_init(void)
{
omap2_gp_clockevent_init(1, OMAP2_CLKEV_SOURCE);
- omap2_gp_clocksource_init();
+ omap2_gp_clocksource_init(2, OMAP2_MPU_SOURCE);
}
struct sys_timer omap242x_timer = {
@@ -330,7 +336,7 @@ struct sys_timer omap242x_timer = {
static void __init omap243x_timer_init(void)
{
omap2_gp_clockevent_init(1, OMAP2_CLKEV_SOURCE);
- omap2_gp_clocksource_init();
+ omap2_gp_clocksource_init(2, OMAP2_MPU_SOURCE);
}
struct sys_timer omap243x_timer = {
@@ -342,7 +348,7 @@ struct sys_timer omap243x_timer = {
static void __init omap3_timer_init(void)
{
omap2_gp_clockevent_init(1, OMAP3_CLKEV_SOURCE);
- omap2_gp_clocksource_init();
+ omap2_gp_clocksource_init(2, OMAP3_MPU_SOURCE);
}
struct sys_timer omap3_timer = {
@@ -356,7 +362,7 @@ struct sys_timer omap3_timer = {
static void __init omap3_beagle_timer_init(void)
{
omap2_gp_clockevent_init(OMAP3_BEAGLE_TIMER, OMAP3_CLKEV_SOURCE);
- omap2_gp_clocksource_init();
+ omap2_gp_clocksource_init(2, OMAP3_MPU_SOURCE);
}
struct sys_timer omap3_beagle_timer = {
@@ -372,7 +378,7 @@ static void __init omap4_timer_init(void)
BUG_ON(!twd_base);
#endif
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
- omap2_gp_clocksource_init();
+ omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
}
struct sys_timer
[PATCH 09/10] omap2+: Remove omap2_gp_clockevent_set_gptimer
This is no longer needed as we now just set the desired
.timer in MACHINE_START. We can now also remove timer-gp.h.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-4430sdp.c|4
arch/arm/mach-omap2/board-devkit8000.c |4
arch/arm/mach-omap2/board-omap3beagle.c|4
arch/arm/mach-omap2/board-omap3logic.c |1 -
arch/arm/mach-omap2/board-omap3stalker.c |4
arch/arm/mach-omap2/board-omap3touchbook.c |4
arch/arm/mach-omap2/board-omap4panda.c |1 -
arch/arm/mach-omap2/timer-gp.c | 26 --
arch/arm/mach-omap2/timer-gp.h | 16
9 files changed, 0 insertions(+), 64 deletions(-)
delete mode 100644 arch/arm/mach-omap2/timer-gp.h
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index f740c40..142efaa 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -40,7 +40,6 @@
#include mux.h
#include hsmmc.h
-#include timer-gp.h
#include control.h
#define ETH_KS8851_IRQ 34
@@ -330,9 +329,6 @@ static void __init omap_4430sdp_init_early(void)
{
omap2_init_common_infrastructure();
omap2_init_common_devices(NULL, NULL);
-#ifdef CONFIG_OMAP_32K_TIMER
- omap2_gp_clockevent_set_gptimer(1);
-#endif
}
static struct omap_musb_board_data musb_board_data = {
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index cd465fa..18f7a0f 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -59,7 +59,6 @@
#include mux.h
#include hsmmc.h
-#include timer-gp.h
#define NAND_BLOCK_SIZESZ_128K
@@ -458,9 +457,6 @@ static void __init devkit8000_init_early(void)
static void __init devkit8000_init_irq(void)
{
omap3_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
- omap2_gp_clockevent_set_gptimer(12);
-#endif
}
static void __init devkit8000_ads7846_init(void)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index a4206be..8af2433 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -50,7 +50,6 @@
#include mux.h
#include hsmmc.h
-#include timer-gp.h
#include pm.h
#define NAND_BLOCK_SIZESZ_128K
@@ -541,9 +540,6 @@ static void __init omap3_beagle_init_early(void)
static void __init omap3_beagle_init_irq(void)
{
omap3_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
- omap2_gp_clockevent_set_gptimer(12);
-#endif
}
static struct platform_device *omap3_beagle_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-omap3logic.c
b/arch/arm/mach-omap2/board-omap3logic.c
index 7e8ce0a..57ac9d1 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -35,7 +35,6 @@
#include mux.h
#include hsmmc.h
-#include timer-gp.h
#include control.h
#include plat/mux.h
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c
b/arch/arm/mach-omap2/board-omap3stalker.c
index fd863cf..2f08603 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -53,7 +53,6 @@
#include sdram-micron-mt46h32m32lf-6.h
#include mux.h
#include hsmmc.h
-#include timer-gp.h
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
#define OMAP3STALKER_ETHR_START0x2c00
@@ -588,9 +587,6 @@ static void __init omap3_stalker_init_early(void)
static void __init omap3_stalker_init_irq(void)
{
omap3_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
- omap2_gp_clockevent_set_gptimer(12);
-#endif
}
static struct platform_device *omap3_stalker_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c
b/arch/arm/mach-omap2/board-omap3touchbook.c
index 84f4be0..a40f640 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -51,7 +51,6 @@
#include mux.h
#include hsmmc.h
-#include timer-gp.h
#include asm/setup.h
@@ -423,9 +422,6 @@ static void __init omap3_touchbook_init_early(void)
static void __init omap3_touchbook_init_irq(void)
{
omap3_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
- omap2_gp_clockevent_set_gptimer(12);
-#endif
}
static struct platform_device *omap3_touchbook_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index e7ce10d..731efd3 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -41,7 +41,6 @@
#include plat/usb.h
#include plat/mmc.h
#include plat/panel-generic-dpi.h
-#include timer-gp.h
#include hsmmc.h
#include control.h
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index afb9041..2edeb1a 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++
[PATCH 10/10] omap2+: Rename timer-gp.c into timer.c to combine timer init functions
We can keep everything sys_timer and gptimer.c related code in
timer.c as the code will be very minimal.
Later on we can also remove timer-mpu.c, as it can be called from
omap4_timer_init function.
This allows us to get rid of confusing existing files. We currently
have timer-gp.c, timer-mpu.c, and patches have been posted to add
dmtimer.c. There's no need to have these multiple files, we can
put everything into timer.c.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/timer.c|0
2 files changed, 1 insertions(+), 1 deletions(-)
rename arch/arm/mach-omap2/{timer-gp.c = timer.c} (100%)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index a45cd64..04d04bb 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,7 @@
#
# Common support
-obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
common.o gpio.o dma.o wd_timer.o
omap-2-3-common= irq.o sdrc.o
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer.c
similarity index 100%
rename from arch/arm/mach-omap2/timer-gp.c
rename to arch/arm/mach-omap2/timer.c
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[PATCH v2] OMAP: DSS2: DSI: Introduce sync_vc functions
The DSI protocol engine has no interrupt for signalling the end of a Frame
transfer. The present approach is to send a BTA after DISPC generates a
FRAMEDONE interrupt, and unlock the dsi bus only when the BTA Ack is received.
The assumption made with this approach was that OMAP will send a BTA only after
the long packet corresponding to the last line is sent. However, it is possible
that on the DISPC FRAMEDONE interrupt there are 2 (or more) lines of pixel data
in the DSI line buffer. Hence, the BTA Ack could be received for the long packet
corresponding to the second last line (or the third last and so on..).
Therefore, the current method doesn't ensure that the complete frame data is
sent before we start a new transfer. A similar explanation holds valid if we
send a BTA in between multiple short/long command packets from the slave port.
Introduce dsi_sync functions, based on Tomi Valkeinen's idea, which ensure
that all the DSI Virtual Channels enabled complete their previous work before
proceeding to the next Frame/Command.
For a frame update, the DSI driver now sends a callback to the Panel Driver
on the FRAMEDONE interrupt itself. The callback in the panel driver then unlocks
the bus. dsi_sync() functions are placed in dsi_vc_config_l4() and
dsi_vc_config_vp() to ensure that the previous tasks of the Virtual Channels are
completed.
Signed-off-by: Archit Taneja arc...@ti.com
---
v2:
-Introduce dsi_sync() which syncs all VCs.
-Modify commit message for above change.
Note:
Can be tested with the tree:
http://gitorious.org/~boddob/linux-omap-dss2/archit-dss2-clone
drivers/video/omap2/dss/dsi.c | 194 +++-
1 files changed, 131 insertions(+), 63 deletions(-)
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index e9b734c..880e861 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -2033,6 +2033,128 @@ static int dsi_force_tx_stop_mode_io(void)
return 0;
}
+static bool dsi_vc_is_enabled(int channel)
+{
+ return REG_GET(DSI_VC_CTRL(channel), 0, 0);
+}
+
+static void dsi_packet_sent_handler_vp(void *data, u32 mask)
+{
+ const int channel = dsi.update_channel;
+ u8 bit = dsi.te_enabled ? 30 : 31;
+
+ if (REG_GET(DSI_VC_TE(channel), bit, bit) == 0)
+ complete((struct completion *)data);
+}
+
+static int dsi_sync_vc_vp(int channel)
+{
+ int r = 0;
+ u8 bit;
+
+ DECLARE_COMPLETION_ONSTACK(completion);
+
+ bit = dsi.te_enabled ? 30 : 31;
+
+ r = dsi_register_isr_vc(channel, dsi_packet_sent_handler_vp,
+ completion, DSI_VC_IRQ_PACKET_SENT);
+ if (r)
+ goto err0;
+
+ /* Wait for completion only if TE_EN/TE_START is still set */
+ if (REG_GET(DSI_VC_TE(channel), bit, bit)) {
+ if (wait_for_completion_timeout(completion,
+ msecs_to_jiffies(10)) == 0) {
+ DSSERR(Failed to complete previous frame transfer\n);
+ r = -EIO;
+ goto err1;
+ }
+ }
+
+ dsi_unregister_isr_vc(channel, dsi_packet_sent_handler_vp,
+ completion, DSI_VC_IRQ_PACKET_SENT);
+
+ return 0;
+err1:
+ dsi_unregister_isr_vc(channel, dsi_packet_sent_handler_vp, completion,
+ DSI_VC_IRQ_PACKET_SENT);
+err0:
+ return r;
+}
+
+static void dsi_packet_sent_handler_l4(void *data, u32 mask)
+{
+ const int channel = dsi.update_channel;
+
+ if (REG_GET(DSI_VC_CTRL(channel), 5, 5) == 0)
+ complete((struct completion *)data);
+}
+
+static int dsi_sync_vc_l4(int channel)
+{
+ int r = 0;
+
+ DECLARE_COMPLETION_ONSTACK(completion);
+
+ r = dsi_register_isr_vc(channel, dsi_packet_sent_handler_l4,
+ completion, DSI_VC_IRQ_PACKET_SENT);
+ if (r)
+ goto err0;
+
+ /* Wait for completion only if TX_FIFO_NOT_EMPTY is still set */
+ if (REG_GET(DSI_VC_CTRL(channel), 5, 5)) {
+ if (wait_for_completion_timeout(completion,
+ msecs_to_jiffies(10)) == 0) {
+ DSSERR(Failed to complete previous l4 transfer\n);
+ r = -EIO;
+ goto err1;
+ }
+ }
+
+ dsi_unregister_isr_vc(channel, dsi_packet_sent_handler_l4,
+ completion, DSI_VC_IRQ_PACKET_SENT);
+
+ return 0;
+err1:
+ dsi_unregister_isr_vc(channel, dsi_packet_sent_handler_l4,
+ completion, DSI_VC_IRQ_PACKET_SENT);
+err0:
+ return r;
+}
+
+static int dsi_sync_vc(int channel)
+{
+ if (!dsi_vc_is_enabled(channel))
+ return 0;
+
+ switch (dsi.vc[channel].mode) {
+ case DSI_VC_MODE_VP:
+ return dsi_sync_vc_vp(channel);
+ case DSI_VC_MODE_L4:
+ return dsi_sync_vc_l4(channel);
+ default:
+ BUG();
+
RE: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Tuesday, March 29, 2011 2:20 AM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com; linux-arm-ker...@lists.infradead.org Subject: Re: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support * Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -21,6 +21,7 @@ #include mach/hardware.h #include mach/omap4-common.h +#include mach/omap-wakeupgen.h #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; @@ -41,6 +42,8 @@ void __init gic_init_irq(void) gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); BUG_ON(!gic_cpu_base); + omap_wakeupgen_init(); + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); } Do you really need to initialize all of this that early? Yes. It's a interrupt controller extension and needs to work together with GIC. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Tuesday, March 29, 2011 2:20 AM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com; linux-arm-ker...@lists.infradead.org Subject: Re: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support * Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -21,6 +21,7 @@ #include mach/hardware.h #include mach/omap4-common.h +#include mach/omap-wakeupgen.h #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; @@ -41,6 +42,8 @@ void __init gic_init_irq(void) gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); BUG_ON(!gic_cpu_base); + omap_wakeupgen_init(); + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); } Do you really need to initialize all of this that early? Yes. It's a interrupt controller extension and needs to work together with GIC. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup timer and debug counters
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Tuesday, March 29, 2011 2:31 AM
To: Santosh Shilimkar
Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com;
linux-arm-ker...@lists.infradead.org
Subject: Re: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup
timer and debug counters
* Santosh Shilimkar santosh.shilim...@ti.com [110328 02:21]:
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -40,6 +41,11 @@ static int omap4_pm_suspend(void)
int state, ret = 0;
u32 cpu_id = smp_processor_id();
+ /* Wakeup timer from suspend */
+ if (wakeup_timer_seconds || wakeup_timer_milliseconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
+wakeup_timer_milliseconds);
+
/* Save current powerdomain state */
list_for_each_entry(pwrst, pwrst_list, node) {
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-
pwrdm);
This hack to mess diretly with sys_timer will be ripped out,
so please drop this patch.
Ok.
In the long run we'll have dmtimer1 dedicated to the PM code,
so then it's possible to do similar things.
Regards,
Santosh
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RE: [PATCH v2 1/2] isp1704_charger: allow board specific powering routine
Hi,
-Original Message-
From: Jokiniemi Kalle (Nokia-MS/Tampere)
snip
diff --git a/include/linux/power/isp1704_charger.h
b/include/linux/power/isp1704_charger.h
new file mode 100644
index 000..68096a6
--- /dev/null
+++ b/include/linux/power/isp1704_charger.h
@@ -0,0 +1,29 @@
+/*
+ * ISP1704 USB Charger Detection driver
+ *
+ * Copyright (C) 2011 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
USA
+ */
+
+
+#ifndef __ISP1704_CHARGER_H
+#define __ISP1704_CHARGER_H
+
+struct isp1704_charger_data {
+ void(*set_power)(bool on);
+};
+
+#endif
There should be include/linux/platform_data/ directory now,
specifically
for such headers...
Thanks for the pointer, I'll put it there.
There are things like msm-serial.h and tegra-usb.h there, but I'm not so
convinced
that this isp1704_charger.h should be there. The isp1707 component on n900 is
a discrete chip, it's not part of the SoC, so in theory some other device or
platform
could also use it as a charger. It's not even made by TI, so it's not related
in that
sense to OMAP platform...
What do you think about keeping it still in /include/linux/power ?
- Kalle
- Kalle
WBR, Sergei
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RE: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Tuesday, March 29, 2011 2:20 AM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com; linux-arm-ker...@lists.infradead.org Subject: Re: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support * Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -21,6 +21,7 @@ #include mach/hardware.h #include mach/omap4-common.h +#include mach/omap-wakeupgen.h #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; @@ -41,6 +42,8 @@ void __init gic_init_irq(void) gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); BUG_ON(!gic_cpu_base); + omap_wakeupgen_init(); + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); } Do you really need to initialize all of this that early? Yes. It's a interrupt controller extension and needs to work together with GIC. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup timer and debug counters
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Tuesday, March 29, 2011 2:31 AM
To: Santosh Shilimkar
Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com;
linux-arm-ker...@lists.infradead.org
Subject: Re: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup
timer and debug counters
* Santosh Shilimkar santosh.shilim...@ti.com [110328 02:21]:
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -40,6 +41,11 @@ static int omap4_pm_suspend(void)
int state, ret = 0;
u32 cpu_id = smp_processor_id();
+ /* Wakeup timer from suspend */
+ if (wakeup_timer_seconds || wakeup_timer_milliseconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
+wakeup_timer_milliseconds);
+
/* Save current powerdomain state */
list_for_each_entry(pwrst, pwrst_list, node) {
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-
pwrdm);
This hack to mess diretly with sys_timer will be ripped out,
so please drop this patch.
Ok.
In the long run we'll have dmtimer1 dedicated to the PM code,
so then it's possible to do similar things.
Regards,
Santosh
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RE: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Tuesday, March 29, 2011 2:20 AM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com; linux-arm-ker...@lists.infradead.org Subject: Re: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support * Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -21,6 +21,7 @@ #include mach/hardware.h #include mach/omap4-common.h +#include mach/omap-wakeupgen.h #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; @@ -41,6 +42,8 @@ void __init gic_init_irq(void) gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); BUG_ON(!gic_cpu_base); + omap_wakeupgen_init(); + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); } Do you really need to initialize all of this that early? Yes. It's a interrupt controller extension and needs to work together with GIC. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup timer and debug counters
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Tuesday, March 29, 2011 2:31 AM
To: Santosh Shilimkar
Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com;
linux-arm-ker...@lists.infradead.org
Subject: Re: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup
timer and debug counters
* Santosh Shilimkar santosh.shilim...@ti.com [110328 02:21]:
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -40,6 +41,11 @@ static int omap4_pm_suspend(void)
int state, ret = 0;
u32 cpu_id = smp_processor_id();
+ /* Wakeup timer from suspend */
+ if (wakeup_timer_seconds || wakeup_timer_milliseconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
+wakeup_timer_milliseconds);
+
/* Save current powerdomain state */
list_for_each_entry(pwrst, pwrst_list, node) {
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-
pwrdm);
This hack to mess diretly with sys_timer will be ripped out,
so please drop this patch.
Ok.
In the long run we'll have dmtimer1 dedicated to the PM code,
so then it's possible to do similar things.
Regards,
Santosh
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RE: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Tuesday, March 29, 2011 2:20 AM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com; linux-arm-ker...@lists.infradead.org Subject: Re: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support * Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -21,6 +21,7 @@ #include mach/hardware.h #include mach/omap4-common.h +#include mach/omap-wakeupgen.h #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; @@ -41,6 +42,8 @@ void __init gic_init_irq(void) gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); BUG_ON(!gic_cpu_base); + omap_wakeupgen_init(); + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); } Do you really need to initialize all of this that early? Yes. It's a interrupt controller extension and needs to work together with GIC. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup timer and debug counters
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Tuesday, March 29, 2011 2:31 AM
To: Santosh Shilimkar
Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com;
linux-arm-ker...@lists.infradead.org
Subject: Re: [pm-core][PATCH v3 14/21] OMAP4: pm-debug: Add wakeup
timer and debug counters
* Santosh Shilimkar santosh.shilim...@ti.com [110328 02:21]:
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -40,6 +41,11 @@ static int omap4_pm_suspend(void)
int state, ret = 0;
u32 cpu_id = smp_processor_id();
+ /* Wakeup timer from suspend */
+ if (wakeup_timer_seconds || wakeup_timer_milliseconds)
+ omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
+wakeup_timer_milliseconds);
+
/* Save current powerdomain state */
list_for_each_entry(pwrst, pwrst_list, node) {
pwrst-saved_state = pwrdm_read_next_pwrst(pwrst-
pwrdm);
This hack to mess diretly with sys_timer will be ripped out,
so please drop this patch.
Ok.
In the long run we'll have dmtimer1 dedicated to the PM code,
so then it's possible to do similar things.
Regards,
Santosh
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[PATCH] OMAP2+: SR Layer Cleanup.
As a part of Voltage Layer Cleanup Patches,
submitted by Kevin Hilman, Voltage domain
Information is removed from hwmod,
So the patch removes 'vdd_name' info from omap_hwmod
and adds that info into dev_attr as SR code uses vdd_name
to get voltagedomain sructure info.
Tested on OMAP3630 SDP and OMAP4430 SDP Board
Signed-off-by: Shweta Gulati shweta.gul...@ti.com
---
It apllies over Voltage Layer Cleanup Patch by
Kevin Hilman:
https://patchwork.kernel.org/patch/657421/
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 17 +
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 19 ---
arch/arm/mach-omap2/smartreflex.h| 10 ++
arch/arm/mach-omap2/sr_device.c | 11 +++
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 -
5 files changed, 46 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c819c30..e88f819 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -29,6 +29,7 @@
#include omap_hwmod_common_data.h
+#include smartreflex.h
#include prm-regbits-34xx.h
#include cm-regbits-34xx.h
#include wd_timer.h
@@ -2901,6 +2902,10 @@ static struct omap_hwmod_class
omap36xx_smartreflex_hwmod_class = {
};
/* SR1 */
+static struct omap_sr_dev_attr sr1_dev_attr = {
+ .voltdm_name = mpu,
+};
+
static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = {
omap3_l4_core__sr1,
};
@@ -2909,7 +2914,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
.name = sr1_hwmod,
.class = omap34xx_smartreflex_hwmod_class,
.main_clk = sr1_fck,
- .vdd_name = mpu,
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
@@ -2921,6 +2925,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
},
.slaves = omap3_sr1_slaves,
.slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
+ .dev_attr = sr1_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
CHIP_IS_OMAP3430ES3_0 |
CHIP_IS_OMAP3430ES3_1),
@@ -2931,7 +2936,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
.name = sr1_hwmod,
.class = omap36xx_smartreflex_hwmod_class,
.main_clk = sr1_fck,
- .vdd_name = mpu,
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
@@ -2943,10 +2947,15 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
},
.slaves = omap3_sr1_slaves,
.slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
+ .dev_attr = sr1_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
};
/* SR2 */
+static struct omap_sr_dev_attr sr2_dev_attr = {
+ .voltdm_name= core,
+};
+
static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = {
omap3_l4_core__sr2,
};
@@ -2955,7 +2964,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
.name = sr2_hwmod,
.class = omap34xx_smartreflex_hwmod_class,
.main_clk = sr2_fck,
- .vdd_name = core,
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
@@ -2967,6 +2975,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
},
.slaves = omap3_sr2_slaves,
.slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
+ .dev_attr = sr2_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
CHIP_IS_OMAP3430ES3_0 |
CHIP_IS_OMAP3430ES3_1),
@@ -2977,7 +2986,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
.name = sr2_hwmod,
.class = omap36xx_smartreflex_hwmod_class,
.main_clk = sr2_fck,
- .vdd_name = core,
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
@@ -2989,6 +2997,7 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
},
.slaves = omap3_sr2_slaves,
.slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
+ .dev_attr = sr2_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 3e88dd3..1331b39 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,6 +30,7 @@
#include omap_hwmod_common_data.h
+#include smartreflex.h
#include cm1_44xx.h
#include cm2_44xx.h
#include prm44xx.h
@@ -3775,6 +3776,10 @@ static struct omap_hwmod_class
omap44xx_smartreflex_hwmod_class = {
};
/* smartreflex_core */
+static struct omap_sr_dev_attr sr_core_dev_attr = {
+
RE: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Tuesday, March 29, 2011 2:20 AM To: Santosh Shilimkar Cc: linux-omap@vger.kernel.org; khil...@ti.com; rna...@ti.com; linux-arm-ker...@lists.infradead.org Subject: Re: [pm-core][PATCH v3 01/21] OMAP4: PM: Add omap WakeupGen module support * Santosh Shilimkar santosh.shilim...@ti.com [110328 02:20]: --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -21,6 +21,7 @@ #include mach/hardware.h #include mach/omap4-common.h +#include mach/omap-wakeupgen.h #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; @@ -41,6 +42,8 @@ void __init gic_init_irq(void) gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); BUG_ON(!gic_cpu_base); + omap_wakeupgen_init(); + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); } Do you really need to initialize all of this that early? Yes. It's a interrupt controller extension and needs to work together with GIC. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
