Re: Booting PilOS
Do we need to re-invent the wheel here? maybe we could leverage: https://en.wikipedia.org/wiki/BareMetal https://github.com/ReturnInfinity/BareMetal-OS http://www.returninfinity.com/baremetal.html http://www.osnews.com/story/27566/BareMetal_OS_gets_TCP_IP On Fri, Jul 10, 2015 at 9:30 AM, Alexander Burger a...@software-lab.de wrote: Hi Geo, thanks for the investigations! I think i got some leads why some of us got stuck with Checking long mode What i noticed is the that if i insert some message printing on most parts of the code between Loading PilOS and Checking long mode, i will arrive on the real error which is ERROR: CPU has no local APIC. Yes, that's interesting. So this means that message printing doesn't work reliably? Did the messages you inserted appear? Or does it mean that your CPU passed the tests for Extended function available and Check long mode (Bit 29), but then finally failed in the Check local APIC? I check my BIOS how to enable APIC but seems my BIOS does not have such option. So my plan is to enable APIC through assembly code but didn't work, any idea? I think this is not an option in the BIOS. The Local APICs are part of the CPU. Each core in a multi-core CPU has its own private local APIC (see http://wiki.osdev.org/APIC). The APIC *is* actually enabled at the end of pilos/x86-64/beg.l, in these lines: mov $0x001B, %ecx # APIC Base MSR rdmsr or $0x0800, %eax # Enable APIC (Bit 11) wrmsr and $0xF000, %eax # Get base address or $0x93, %eax# 2 MiB + P | R/W | PCD mov %eax, 8(%edi) # Map APICs to 0x20 movl $0xFEC00093, 16(%edi)# Map IO-APIC 0x40 movw $0x1FF, (0x2000F0) # Spurious IR vector + APIC enable But only after the above test succeeded, of course. But before that i want to resolve why the code will not work properly if without the newly inserted message printing.. is it about code Yes, this is a strange thing. It is not good if we can't even rely on the debug messages ;) misalignment? Maybe it differs per CPU model? Misalignment should not be an issue. We are still in 16-bit code (8086 real mode) here. ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
Alex, PilOS is complete so far What could PilOS be used for? Does it have any way of communicating with the outside world? (http://lwip.wikia.com/wiki/Porting_For_Bare_Metal) Any thoughts re: IOT: eg: http://www.adafruit.com/products/2112?gclid=Cj0KEQjw2v2sBRCazKGu3tSFz64BEiQAKIE1htXJRrxOaZQdrYYHh5qrwo0Ohob02GyUN_gCZMbxyPkaAhp68P8HAQ Thanks for the osdev.org link. Also, what about using containers? http://www.infoworld.com/article/2942721/linux/from-coreos-to-nano-micro-oses-strip-down-for-containers.html Thanks, -rl On Fri, Jul 10, 2015 at 10:24 AM, Alexander Burger a...@software-lab.de wrote: On Fri, Jul 10, 2015 at 09:55:30AM -0400, Rick Lyman wrote: May be useful: https://blog.netbsd.org/tnf/entry/an_internet_ready_os_from https://www.raspberrypi.org/forums/viewtopic.php?f=72t=92579 https://lse.epita.fr/lse-summer-week-2014/slides/lse-summer-week-2014-21-Porting%20and%20testing%20a%20TCPIP%20stack%20without%20an%20ethernet%20driver.pdf https://news.ycombinator.com/item?id=8537645 http://www.embedded.com/design/prototyping-and-development/4237636/Bare-metal-embedded-software-development-with---without-an-RTOS Thanks for the links! However, PilOS is complete so far. We just have some very concrete problems at the moment, which should be solved. Or, to be exact, I myself don't have any problem ;) But PilOS doesn't boot properly on some machines. This may well be due to the fact that those machines don't have the right CPU or BIOS. What's expected is a multi-core x86-64 CPU, for example. Of course I'm glad for any hint which may solve these problems. Perhaps just some little stupid error ... ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
Hi Alex, I think i got some leads why some of us got stuck with Checking long mode What i noticed is the that if i insert some message printing on most parts of the code between Loading PilOS and Checking long mode, i will arrive on the real error which is ERROR: CPU has no local APIC. I check my BIOS how to enable APIC but seems my BIOS does not have such option. So my plan is to enable APIC through assembly code but didn't work, any idea? But before that i want to resolve why the code will not work properly if without the newly inserted message printing.. is it about code misalignment? Maybe it differs per CPU model? BR,Geo On Thursday, July 9, 2015 9:10 PM, Alexander Burger a...@software-lab.de wrote: Hi Geo, Indeed! ok so time to install qemu.. but hmm if the current pilOS works on your qemu then it would not help right? Or does qemu also depends on its host hardware that its running? I think it doesn't. After all, qemu can emulate various systems. Hmmm might be helpful if we can refer how those liveUSB handle their boot-up? Perhaps. But I think they do some things by their own, not depending on the BIOS. For example, they do probably implement their own USB library, and their own disk I/O. I didn't want to go so far, as the BIOS is supposed to do what we need. But, anyway, the other current problem - detecting 64-bit long mode - is not an issue of the BIOS but of the CPU alone. ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
Hi Rick, Do we need to re-invent the wheel here? maybe we could leverage: https://en.wikipedia.org/wiki/BareMetal https://github.com/ReturnInfinity/BareMetal-OS http://www.returninfinity.com/baremetal.html http://www.osnews.com/story/27566/BareMetal_OS_gets_TCP_IP Yes, I've seen it. You are right, this may be a good idea for deeper investigation. However, I just didn't want to invest the time to analyze a full-blown existing operating system. I used the information found at OSDev: http://wiki.osdev.org Much easier to read than a source tree ;) And of course the AMD64 Architecture Programmer's Manuals volumes 1-3. Mainly vol. 2, System Programming (vol. 3 for the instruction set I had already used extensivily when writing the Pil64 VM). ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
May be useful: https://blog.netbsd.org/tnf/entry/an_internet_ready_os_from https://www.raspberrypi.org/forums/viewtopic.php?f=72t=92579 https://lse.epita.fr/lse-summer-week-2014/slides/lse-summer-week-2014-21-Porting%20and%20testing%20a%20TCPIP%20stack%20without%20an%20ethernet%20driver.pdf https://news.ycombinator.com/item?id=8537645 http://www.embedded.com/design/prototyping-and-development/4237636/Bare-metal-embedded-software-development-with---without-an-RTOS On Fri, Jul 10, 2015 at 9:30 AM, Alexander Burger a...@software-lab.de wrote: Hi Geo, thanks for the investigations! I think i got some leads why some of us got stuck with Checking long mode What i noticed is the that if i insert some message printing on most parts of the code between Loading PilOS and Checking long mode, i will arrive on the real error which is ERROR: CPU has no local APIC. Yes, that's interesting. So this means that message printing doesn't work reliably? Did the messages you inserted appear? Or does it mean that your CPU passed the tests for Extended function available and Check long mode (Bit 29), but then finally failed in the Check local APIC? I check my BIOS how to enable APIC but seems my BIOS does not have such option. So my plan is to enable APIC through assembly code but didn't work, any idea? I think this is not an option in the BIOS. The Local APICs are part of the CPU. Each core in a multi-core CPU has its own private local APIC (see http://wiki.osdev.org/APIC). The APIC *is* actually enabled at the end of pilos/x86-64/beg.l, in these lines: mov $0x001B, %ecx # APIC Base MSR rdmsr or $0x0800, %eax # Enable APIC (Bit 11) wrmsr and $0xF000, %eax # Get base address or $0x93, %eax# 2 MiB + P | R/W | PCD mov %eax, 8(%edi) # Map APICs to 0x20 movl $0xFEC00093, 16(%edi)# Map IO-APIC 0x40 movw $0x1FF, (0x2000F0) # Spurious IR vector + APIC enable But only after the above test succeeded, of course. But before that i want to resolve why the code will not work properly if without the newly inserted message printing.. is it about code Yes, this is a strange thing. It is not good if we can't even rely on the debug messages ;) misalignment? Maybe it differs per CPU model? Misalignment should not be an issue. We are still in 16-bit code (8086 real mode) here. ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
On Fri, Jul 10, 2015 at 09:55:30AM -0400, Rick Lyman wrote: May be useful: https://blog.netbsd.org/tnf/entry/an_internet_ready_os_from https://www.raspberrypi.org/forums/viewtopic.php?f=72t=92579 https://lse.epita.fr/lse-summer-week-2014/slides/lse-summer-week-2014-21-Porting%20and%20testing%20a%20TCPIP%20stack%20without%20an%20ethernet%20driver.pdf https://news.ycombinator.com/item?id=8537645 http://www.embedded.com/design/prototyping-and-development/4237636/Bare-metal-embedded-software-development-with---without-an-RTOS Thanks for the links! However, PilOS is complete so far. We just have some very concrete problems at the moment, which should be solved. Or, to be exact, I myself don't have any problem ;) But PilOS doesn't boot properly on some machines. This may well be due to the fact that those machines don't have the right CPU or BIOS. What's expected is a multi-core x86-64 CPU, for example. Of course I'm glad for any hint which may solve these problems. Perhaps just some little stupid error ... ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
Hi Geo, thanks for the investigations! I think i got some leads why some of us got stuck with Checking long mode What i noticed is the that if i insert some message printing on most parts of the code between Loading PilOS and Checking long mode, i will arrive on the real error which is ERROR: CPU has no local APIC. Yes, that's interesting. So this means that message printing doesn't work reliably? Did the messages you inserted appear? Or does it mean that your CPU passed the tests for Extended function available and Check long mode (Bit 29), but then finally failed in the Check local APIC? I check my BIOS how to enable APIC but seems my BIOS does not have such option. So my plan is to enable APIC through assembly code but didn't work, any idea? I think this is not an option in the BIOS. The Local APICs are part of the CPU. Each core in a multi-core CPU has its own private local APIC (see http://wiki.osdev.org/APIC). The APIC *is* actually enabled at the end of pilos/x86-64/beg.l, in these lines: mov $0x001B, %ecx # APIC Base MSR rdmsr or $0x0800, %eax # Enable APIC (Bit 11) wrmsr and $0xF000, %eax # Get base address or $0x93, %eax# 2 MiB + P | R/W | PCD mov %eax, 8(%edi) # Map APICs to 0x20 movl $0xFEC00093, 16(%edi)# Map IO-APIC 0x40 movw $0x1FF, (0x2000F0) # Spurious IR vector + APIC enable But only after the above test succeeded, of course. But before that i want to resolve why the code will not work properly if without the newly inserted message printing.. is it about code Yes, this is a strange thing. It is not good if we can't even rely on the debug messages ;) misalignment? Maybe it differs per CPU model? Misalignment should not be an issue. We are still in 16-bit code (8086 real mode) here. ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
On Fri, Jul 10, 2015 at 07:03:28PM +0200, Alexander Burger wrote: What could PilOS be used for? ... And of course it represents the essence of PicoLisp: Being totally in control, and knowing every single machine instruction in your machine personally. This thrill alone was worth the effort :) ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
Re: Booting PilOS
Hi Rick, PilOS is complete so far Well, to be honest, not completely complete. The most interesting part is still missing, but that's not an OS-issue, but a matter of PicoLisp internals: Parallelize parts of the interpreter to employ multiple CPU cores. First will be the garbage collector. What could PilOS be used for? On a PC it doesn't make much sense. There it is easier to build a bootable stick with Linux, e.g. with the Debian 'live-build' package. What I'm targeting for are high-end embedded systems (in the far future), with multi-core 64-bit CPUs, and perhaps lots of such machines (each with their local database) connected in a network. And also for tablets (for my own use, text-only without graphics). Does it have any way of communicating with the outside world? Not currently, except for the USB-Stick. A dedicated/embedded system would simply use network-hardware. More infos at: http://picolisp.com/wiki/?PilOS ♪♫ Alex -- UNSUBSCRIBE: mailto:picolisp@software-lab.de?subject=Unsubscribe
