[time-nuts] Divide by 3

[Mark Sims]

When I was working on the temperature control feature of Lady Heather,  I 
noticed that I could detect when ever I opened the refrigerator door (in the 
next room) or when I was in the same room as the Tbolt by looking at the EFC or 
temperature sensor plots...  the Thunderbolt oscillator makes a nice 
thermometer.  People are basically a 100 watt space heater.

Another time I was working on a precision temperature recorder (based upon an 
Analog Devices V/F chip).  It could easily detect when a person walked into or 
left a (rather large) lab.  You could even quantify the number of people in the 
lab (one particularly large guy counted as two people).

-
>  People would say "nice thermometer, guys :-( 
>   
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Re: [time-nuts] Divide by 3

[Richard (Rick) Karlquist]

I remember when we first got a prototype 10816
Mini-Rubidium standard working.  We put in on
of those old paper strip chart recorders (this
was circa 1981).  We were pretty cocky about
how it went straight down the page.  You
couldn't do that with quartz.  When we
came back the next day, you could clearly
see frequency steps when the air conditioning
went off at night and came on in the daytime.
People would say "nice thermometer, guys :-(

Rick

On 6/8/2016 2:21 PM, Hal Murray wrote:


att...@kinali.ch said:

Temperature, in an office or lab, does not change that much to cause large
differences.


Maybe in your lab.

I'd expect that will change as people get more sensitive to energy costs.
Things like turning down/off the heat/cooling at night can lead to large
swings.


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Re: [time-nuts] Divide by 3

[Richard (Rick) Karlquist]

On 6/8/2016 9:59 AM, Charles Steinmetz wrote:


You can achieve substantially lower jitter (phase noise) with a
regenerative divider, which also allows you to divide by 3/2 for a 10MHz
output.  I've built several like that, and they work extremely well.



When I was at Agilent, they developed a very low noise regenerative 
divide by 3/2 chain to use in high performance instruments.  The gurus 
who know about this stuff said it was the lowest phase noise

architecture.

Rick
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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[David]

NAND Flash is especially bad about this.  Not only can the data being
currently erased or programmed be corrupted but other data can be
also.  That is why NAND Flash drives are so prone to complete failure
even if a log type of internal file system is used; it is one thing to
protect against corruption of the last written data but another when
any data can be destroyed.

On Wed, 8 Jun 2016 17:22:38 +0100, you wrote:

>Sounds similar to the issues you encounter with Atmel and some other
>EEPROM/Flash based MCUs when they're not held in reset until VCC becomes
>stable.
>
>http://atmel.force.com/support/articles/en_US/FAQ/Prevent-EEPROM-corruption
>
>Some more info:
>
>http://www.embedded.com/design/prototyping-and-development/4006422/Avoid-corruption-in-nonvolatile-memory
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Re: [time-nuts] GPS altitude somewhat wrong?

[Tom Van Baak]

Hi Gary,

>From one NW GPS farm to another... I'm willing to help you debug yours.

> A Garmin 18x reports:
>Altitude Err:+/- 264 ft   

Something is terribly wrong with your setup. The Garmin 18x is much, much 
better than this. I know because the 18x was one of the GPS receivers I brought 
along on a recent mobile clock experiment.

Here is a plot of 2 hours of GPGGA raw altitude data while stationary in Tucson:
http://leapsecond.com/great2016a/2016a-garmin-18x-2.gif

With clear sky view, the peak to peak is under +/- 8 m, and the (1-sigma) 
standard deviation is 3 m.
Even at the hotel lobby, with obstructed sky view, the (1-sigma) standard 
deviation stayed under 7 m.
Your 18x number, +/- 264ft (+/- 80 m), is 10x to 25x worse than this. It 
doesn't feel right.

Off-list, can you send me a day of NMEA from your 18x? Not gpsd output; but the 
raw serial ascii data from the receiver. I'd like to get to the bottom of this. 
We'll all learn something.

Thanks,
/tvb

- Original Message - 
From: "Gary E. Miller" 
To: "Van Horn, David" 
Cc: 
Sent: Wednesday, June 08, 2016 3:24 PM
Subject: Re: [time-nuts] GPS altitude somewhat wrong?

Yo David!

On Wed, 8 Jun 2016 20:33:58 +
"Van Horn, David"  wrote:

> I suppose 214' isn't that outrageous, but it does bring me to a
> question:

Looking at my GPS farm, fair but not great skyview.

A Garmin 18x reports:
Altitude Err:+/- 264 ft   

A u-blox 8:
Altitude Err:+/- 36 ft 

And an adafruit HAT (u-blox 6?:
Altitude Err:+/- 69 ft 

On a Skytraq I have seen +/- 12 feet.

> How accurate is the altitude number really?

Depends.  :-)

RGDS
GARY
---
Gary E. Miller Rellim 109 NW Wilmington Ave., Suite E, Bend, OR 97703
 g...@rellim.com  Tel:+1 541 382 8588


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Re: [time-nuts] Divide by 3

[Nick Sayer via time-nuts]

> On Jun 8, 2016, at 9:59 AM, Charles Steinmetz  wrote:
> 
> You can achieve substantially lower jitter (phase noise) with a regenerative 
> divider, which also allows you to divide by 3/2 for a 10MHz output.  I've 
> built several like that, and they work extremely well.
> 
> There are simpler divide-by-three logic circuits (generally, the simpler the 
> circuit the closer to an exact 50% duty cycle and the lower the jitter).  See 
> the attached image for one approach.
> 

Very nice! That one also simulates properly on CircuitLab without the delay 
gates in the output feedback. I tried adding the delay gates back in, and it 
didn’t change, but I can imagine that’s just because it’s a simulator.


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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[Nick Sayer via time-nuts]

For what it’s worth, the GPS boards I’ve designed for the FEI devices use the 
TPS54[23]31 for the primary 15v supply (which also powers the 5v supply), and 
it has been configured with a hysteretic UVLO with a start threshold above 16 
volts. Additionally, the slow-start is configured for somewhere between 1 and 
10 ms, which I would posit is acceptable. I haven’t actually measured the delay 
between the +15 and +5 supplies, but I don’t have much reason to believe they’d 
be “unreasonably” far apart.

The ATTinys have brownout detectors in them that’s supposed to keep them from 
going bonkers during undervolt periods.

I’ve powered up my 5680As a bunch of times with these boards and since 
identifying that one firmware bug in my code where the serial output dropped a 
byte in the tuning command, I haven’t had any trouble.

> On Jun 8, 2016, at 9:22 AM, Clint Jay  wrote:
> 
> Sounds similar to the issues you encounter with Atmel and some other
> EEPROM/Flash based MCUs when they're not held in reset until VCC becomes
> stable.
> 
> http://atmel.force.com/support/articles/en_US/FAQ/Prevent-EEPROM-corruption
> 
> Some more info:
> 
> http://www.embedded.com/design/prototyping-and-development/4006422/Avoid-corruption-in-nonvolatile-memory
> 
> 
> 
> On 8 June 2016 at 16:20, jimlux  wrote:
> 
>> On 6/8/16 6:19 AM, paul swed wrote:
>> 
>>> The units were never intended for a slow ramp
>>> I assume it runs into a meta stable condition
>>> Neither on or off and then corruption
>>> Glad you're can repair them
>>> 
>>> On Tuesday, June 7, 2016, Bob Camp  wrote:
>>> 
>>> 
 
>> Interesting, we just had a similar issue on a circuit here at work..
>> someone slowly brought the supply voltage up on a bunch of DC/DC
>> converters, and some didn't start. This was in initial checkout of a new
>> board.
>> 
>> Switch it on with a bang, and it works just fine.
>> 
>> So for some of these things there's apparently a minimum dv/dt.
>> 
>> I've seen this before with DC/DC converters.. if the voltage drops too
>> low, they draw too much current - because they're basically constant power
>> devices- and the overcurrent trip shuts them down.  There's a delicate
>> interplay between the overcurrent and undervoltage trips,both of which have
>> some sort of time constant, and I suspect that for a lot of circuits, the
>> "slow ramp up of input voltage" isn't something they are designed for.
>> Once it's up and running, when the supply sags, the UV trip works just
>> fine, tripping before the OC trip goes.
>> 
>> 
>> Linear regulators.. they may be not the most efficient thing in the world,
>> but they have a lot less "weird" behavior.  (although I've had linear
>> regulators go into thermally driven oscillation)
>> 
>> 
>> 
>> 
>> 
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> 
> 
> 
> -- 
> Clint.
> 
> *No trees were harmed in the sending of this mail. However, a large number
> of electrons were greatly inconvenienced.*
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Re: [time-nuts] Maser 0.7 nsec jumps solved

[Jim Palfreyman]

Hold your horses folks.

There is more on this tale!

To recap we put the SSR on the aircon (at zero crossing) and the jumps got
very very worse. So we turned the aircon off again (winter here - so not
really needed) and the jumps dropped, but didn't go away. :-(

So we also have a heater in the room (simple 1200W column heater) and a
temperature monitor that turns the cooling or heating on as appropriate. So
we also replaced the heating relay with an SSR and it all now seems to have
gone away.

We are now thinking that the aircon AND heating *relays* had started to pit
after years of use and so give off radio transients which managed to get in
and interfere with the extremely low (-100 dBm) signal coming from the
physics package and going into the maser electronics.

We have now run for four days with no clock jumps with both aircon and
heater on and with 0V crossing SSR relays.

"Welcome to the jungle, we've got fun and games..."

Jim Palfreyman


On 3 June 2016 at 15:00, Jim Palfreyman  wrote:

> Hi All,
>
> Thanks so much for your input and thoughts. It has really proved helpful
> here at the observatory.
>
> As it turned out we easily obtained a zero-crossing solid state relay so
> we thought we'd try it.
>
> And, drumroll..
>
>
>
> It made things so much terribly *worse* than ever before. (As predicted by
> many of you above.)
>
> We are going to try a SSR that switches at the peak - but we need to order
> one. So stay tuned on those results.
>
> There is of course the "move the bloody thing far away from the maser"
> solution which could end up being a serious option. These air conditioning
> units are small and cheap (window-type), so we are trying to find the
> cheapest solution - and if that ends up being some ducting - so be it!
>
>
> Jim Palfreyman
>
>
>
> On 26 May 2016 at 13:13, Andy  wrote:
>
>> On Wed, May 25, 2016 at 12:59 PM, Mike Monett <
>> timen...@binsamp.e4ward.com>
>> wrote:
>>
>> LTspice shows  switching  at 0V is the best point in  time.  ...
>>
>>
>>
>> Bzzzt!  Your simulation is seriously flawed, and your conclusions are
>> wrong.  What you forgot, or may not have realized, is that SPICE's initial
>> transient solution is obtained by having the signal sources already turned
>> on (at the moment of the Big Bang) and set to their initial value, so the
>> current through L2 is limited by DC conditions.  That is not anything
>> close
>> to switching the driving voltages on.  It is having one waveform sit at
>> +169.7V DC for a very long time ('forever'), and then letting it follow a
>> cosine wave.
>>
>> Re-run the simulation with "UIC" added to the .tran statement (.tran 50ms
>> uic) and see what it shows.  Using UIC forces the initial voltage to be 0V
>> at time=0, the start of the simulation.  That's like having the switch
>> initially open.
>>
>> Or if you don't like that, multiply the sources by a PWL waveform that
>> starts both voltages at 0V and then switches them on, a few milliseconds
>> into the simulation, with the appropriate phase.
>>
>> Or use an actual switch.  LTspice has a switch element you could use.
>>
>> I guarantee you, the case with the voltage switching on at the 0V point in
>> the voltage waveform, causes greater currents.
>>
>> The smaller surge current happens when the source is connected at the
>> moment when the current i(t) would be 0A if it were a continuous waveform.
>> For an inductive load, this happens when the voltage v(t) would be +/-
>> peak
>> (or near peak, for a real load which has both inductance and a little
>> resistance).  This condition also results in no surge, thus no L/R decay.
>>
>> All of this might not be relevant to a mechanical system, where surge
>> current is caused by rotational inertia, rather than anything electrical.
>>
>> Regards,
>> Andy
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>
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Re: [time-nuts] FE-405B Reprogramming

[Logan Cummings]

Thanks Bob,

   I figured if it was that easy someone else would have already done
it. Went looking for a schematic and found Tom's page describing the
architecture at a high level and with ADEV plots providing evidence of said
architecture. Good block diagram from an FEI presentation at the bottom of
the page http://www.leapsecond.com/pages/fe405/

  Takeaway: no, can't be done - 5MHz DOCXO clocks a DDS which outputs
at 15MHz feeds into a PLL steering a standard 15MHz VCXO which then
provides the output directly.

  Very interesting architecture and gives me some food for thought, but
does not solve the 15 != 10 problem Nick was facing.

Cheers and thanks again!
-Logan

On Wed, Jun 8, 2016 at 3:06 PM, Bob Camp  wrote:

> Hi
>
> The 405 appears to have some “bandpass” elements in it. You can not tune
> it over a wide range.
>
> Bob
>
> > On Jun 8, 2016, at 3:08 PM, Logan Cummings 
> wrote:
> >
> > Hi All,
> >
> >Nick's request for a divide-by-three circuit to get his FE-405B to
> > output a 10MHz signal got me thinking - didn't want to threadjack.
> >
> >I had assumed that the FE-405B's DDS output and FE-5680 compatibility
> > made it a good candidate for output frequency reprogramming. Has anyone
> > determined that this is not possible? My biggest concern was that if the
> > internal crystal is also at 10MHz you'd get bad spurs trying to output
> the
> > DDS at the same frequency..
> >
> >Does anyone know if the FE-405B uses the original FE-5680 DDS circuit
> > or the more recent one that is only narrowly (EFC) tunable over the
> serial
> > interface? Would be great to have a stable reference at 1, 5, 10, etc.
> MHz.
> >
> >
> > Any info/references on the FE-XXX internals would be appreciated!
> >
> > Thanks,
> > -Logan
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Re: [time-nuts] GPS altitude somewhat wrong?

[Jim Harman]

On Wed, Jun 8, 2016 at 4:33 PM, Van Horn, David <
david.vanh...@backcountryaccess.com> wrote:

> Backcountry Access, Inc.
> 2820 Wilderness Pl, Unit H
> Boulder, CO  80301 USA
>

Google Earth has the elevation of this address as 5272' which is a good
deal closer to your reading...


-- 

--Jim Harman
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Re: [time-nuts] GPS altitude somewhat wrong?

[Van Horn, David]

Some of that is probably the difference between the geoid (what your surveyed 
maps report height relative to) and the WGS84 ellipsoid (what your GPS reports 
heights relative to).  At Boulder that difference is only about 15 meters, 
though.

Generally with VDOP < 2 and a reasonably modern receiver the accuracy of a GPS 
altitude measurement should be better than about 20 meters.
I'm not sure if the Thunderbolt counts as such.

How flat is Boulder?  Do you have a proper surveyed elevation of your location?

I do not.

The readout is plausibly right, but it is displaying to the nearest tenth of a 
millimeter which I thought was somewhat optimistic.  :)

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Re: [time-nuts] GPS altitude somewhat wrong?

[Michael Perrett]

I just checked Google Earth and the elevation of your office is 5260', only
about 24' off of your GPS estimate if that is your location.
Michael

On Wed, Jun 8, 2016 at 1:33 PM, Van Horn, David <
david.vanh...@backcountryaccess.com> wrote:

>
> I have just installed a Thunderbolt here to get our time and frequency
> equipment all on the same page.
> As I was looking at the display on Lady Heather, I was noticing that the
> GPS altitude seems rather wrong.
> We are in Boulder CO, which is nominally 5430' and the antenna is about
> 20' off the ground.
> The display (near overdetermined position) reads 1589.72991 meters or 5216
> and change in feet.
> Altitude is a big deal around here. :)
>
> I suppose 214' isn't that outrageous, but it does bring me to a question:
>
> How accurate is the altitude number really?
>
> Thanks.
>
>
> --
> David VanHorn
> Lead Hardware Engineer
>
> Backcountry Access, Inc.
> 2820 Wilderness Pl, Unit H
> Boulder, CO  80301 USA
> phone: 303-417-1345 x110
> email: david.vanh...@backcountryaccess.com david.vanh...@backcountryaccess.com>
>
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Re: [time-nuts] GPS altitude somewhat wrong?

[Chris Caudle]

On Wed, June 8, 2016 3:33 pm, Van Horn, David wrote:
> How accurate is the altitude number really?

Probably not the question you really want to ask.

Try "what does GPS mean by altitude? Altitude relative to what standard?"

http://www.esri.com/news/arcuser/0703/geoid1of3.html

-- 
Chris Caudle


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Re: [time-nuts] GPS altitude somewhat wrong?

[Henry Hallam]

Per 
https://www.topoquest.com/map.php?lat=40.02486=-105.24468=nad27=2=auto=d=zoomin=m
the address in your signature is close to the 5250 ft (geoidal)
contour.

Henry

On Wed, Jun 8, 2016 at 3:18 PM, Henry Hallam  wrote:
> Some of that is probably the difference between the geoid (what your
> surveyed maps report height relative to) and the WGS84 ellipsoid (what
> your GPS reports heights relative to).  At Boulder that difference is
> only about 15 meters, though.
>
> Generally with VDOP < 2 and a reasonably modern receiver the accuracy
> of a GPS altitude measurement should be better than about 20 meters.
> I'm not sure if the Thunderbolt counts as such.
>
> How flat is Boulder?  Do you have a proper surveyed elevation of your 
> location?
>
> Henry
>
> On Wed, Jun 8, 2016 at 1:33 PM, Van Horn, David
>  wrote:
>>
>> I have just installed a Thunderbolt here to get our time and frequency 
>> equipment all on the same page.
>> As I was looking at the display on Lady Heather, I was noticing that the GPS 
>> altitude seems rather wrong.
>> We are in Boulder CO, which is nominally 5430' and the antenna is about 20' 
>> off the ground.
>> The display (near overdetermined position) reads 1589.72991 meters or 5216 
>> and change in feet.
>> Altitude is a big deal around here. :)
>>
>> I suppose 214' isn't that outrageous, but it does bring me to a question:
>>
>> How accurate is the altitude number really?
>>
>> Thanks.
>>
>>
>> --
>> David VanHorn
>> Lead Hardware Engineer
>>
>> Backcountry Access, Inc.
>> 2820 Wilderness Pl, Unit H
>> Boulder, CO  80301 USA
>> phone: 303-417-1345 x110
>> email: 
>> david.vanh...@backcountryaccess.com
>>
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Re: [time-nuts] GPS altitude somewhat wrong?

[Gary E. Miller]

Yo David!

On Wed, 8 Jun 2016 20:33:58 +
"Van Horn, David"  wrote:

> I suppose 214' isn't that outrageous, but it does bring me to a
> question:

Looking at my GPS farm, fair but not great skyview.

A Garmin 18x reports:
Altitude Err:+/- 264 ft   

A u-blox 8:
Altitude Err:+/- 36 ft 

And an adafruit HAT (u-blox 6?:
Altitude Err:+/- 69 ft 

On a Skytraq I have seen +/- 12 feet.

> How accurate is the altitude number really?

Depends.  :-)

RGDS
GARY
---
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g...@rellim.com  Tel:+1 541 382 8588


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Re: [time-nuts] Divide by 3

[Nick Sayer via time-nuts]

There’s a link to the blog posting (not mine) that has the schematic on the 
OSHPark shared project.

The schematic there isn’t *totally* obvious - the square boxes that are 
otherwise unlabeled are D flip-flops with D on the left and Q on the right. 
I’ve simulated the circuit at CircuitLab and gotten the correct behavior, for 
what that’s worth.

You’re correct that multiple instances of this circuit fed from the same source 
would not be in phase. That’s ok with me. I’m just going to build one.

I don’t know if I’ll actually put it into service or not. I have lots of 
different references at my disposal for the 53220A, and at this point my 
thinking is that all of them are going to be a tie given this TIA’s specs.

Someone else mentioned sine vs square for the 53220A reference input. I’ve fed 
square waves into this TIA with no indication that it hasn’t worked just as 
well as sine, but I don’t have any assurance beyond that.

> On Jun 8, 2016, at 9:47 AM, Richard (Rick) Karlquist  
> wrote:
> 
> The URL you cited doesn't have the schematic in any obvious
> place.  However, using both edges of the clock to supposedly
> result in 50% duty cycle output depends on having 50%
> duty cycle at the input.  If you have differential logic
> like ECL, this can be realistic.  Single ended logic,
> questionable.
> 
> The other issue is that the divider can start up in any
> one of 3 phases with respect to any other frequency
> dividers in your system, unless you do something to
> synchronize the various dividers.
> 
> This is probably old hat to most readers of time-nuts, but
> I just wanted to mention it in case some were unaware
> of it.
> 
> Rick
> 
> On 6/8/2016 6:55 AM, Nick Sayer via time-nuts wrote:
>> I’m contemplating trying my GPS board with an FE-405B. That’s a different 
>> kettle of fish, but at the end of that, if I’m successful, one of the goals 
>> would be to be able to use it for the external reference of my 53220A. 
>> Unfortunately, 15 MHz isn’t one of the options - only 1, 5 and 10.
>> 
>> So I did some googling and found a divide-by-3 circuit using flip-flops, and 
>> then designed a board for it:
>> 
>> https://oshpark.com/shared_projects/jxXp7wYM
>> 
>> The circuit uses 3 D flip-flops and 3 NOR gates and has a 50% duty cycle 
>> output that’s 1/3 the frequency of the input. The OSHPark project has a 
>> pointer to the original blog post that has a schematic. The only difference 
>> between their schematic and mine is that in theirs, the third flip-flop has 
>> an inverted clock input. The third NOR gate inverts the clock to achieve 
>> that in mine (also one flip-flop and one NOR gate are unused and have the 
>> inputs tied high).
>> 
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Re: [time-nuts] Divide by 3

[Nick Sayer via time-nuts]

In this case, the FE-405B outputs a sine wave, which is converted to square 
with a self-biased inverter. That’s fed into an NB3N551 clock buffer. Two of 
the outputs go off to the discipline system and the other two are user outputs, 
one of which would be fed into the circuit in question.

On the scope, the 10 MHz I have from the FE-5680As look 50% to me, but of 
course that doesn’t mean a lot. The controller is clocked from it too, and it 
really wants “close” to 50% duty cycles, but again, their tolerances aren’t 
Time Nuts(tm) grade.

All that said, I’m feeding this stuff into a 53220A, so I’m not sure there 
aren’t bigger fish to fry...


> On Jun 8, 2016, at 11:48 AM, Alex Pummer  wrote:
> 
> utilizing rising and falling edges makes the circuit output signal duty cycle 
> sensitive to the input signal's duty cycle, and therefore the harmonic 
> content will vary with the input duty cycle variation.
> 73
> KJ6UHN
> Alex
> 
> On 6/8/2016 9:47 AM, Richard (Rick) Karlquist wrote:
>> The URL you cited doesn't have the schematic in any obvious
>> place.  However, using both edges of the clock to supposedly
>> result in 50% duty cycle output depends on having 50%
>> duty cycle at the input.  If you have differential logic
>> like ECL, this can be realistic.  Single ended logic,
>> questionable.
>> 
>> The other issue is that the divider can start up in any
>> one of 3 phases with respect to any other frequency
>> dividers in your system, unless you do something to
>> synchronize the various dividers.
>> 
>> This is probably old hat to most readers of time-nuts, but
>> I just wanted to mention it in case some were unaware
>> of it.
>> 
>> Rick
>> 
>> On 6/8/2016 6:55 AM, Nick Sayer via time-nuts wrote:
>>> I’m contemplating trying my GPS board with an FE-405B. That’s a different 
>>> kettle of fish, but at the end of that, if I’m successful, one of the goals 
>>> would be to be able to use it for the external reference of my 53220A. 
>>> Unfortunately, 15 MHz isn’t one of the options - only 1, 5 and 10.
>>> 
>>> So I did some googling and found a divide-by-3 circuit using flip-flops, 
>>> and then designed a board for it:
>>> 
>>> https://oshpark.com/shared_projects/jxXp7wYM
>>> 
>>> The circuit uses 3 D flip-flops and 3 NOR gates and has a 50% duty cycle 
>>> output that’s 1/3 the frequency of the input. The OSHPark project has a 
>>> pointer to the original blog post that has a schematic. The only difference 
>>> between their schematic and mine is that in theirs, the third flip-flop has 
>>> an inverted clock input. The third NOR gate inverts the clock to achieve 
>>> that in mine (also one flip-flop and one NOR gate are unused and have the 
>>> inputs tied high).
>>> 
>>> ___
>>> time-nuts mailing list -- time-nuts@febo.com
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>>> 
>>> 
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> 
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Re: [time-nuts] GPS altitude somewhat wrong?

[Henry Hallam]

Some of that is probably the difference between the geoid (what your
surveyed maps report height relative to) and the WGS84 ellipsoid (what
your GPS reports heights relative to).  At Boulder that difference is
only about 15 meters, though.

Generally with VDOP < 2 and a reasonably modern receiver the accuracy
of a GPS altitude measurement should be better than about 20 meters.
I'm not sure if the Thunderbolt counts as such.

How flat is Boulder?  Do you have a proper surveyed elevation of your location?

Henry

On Wed, Jun 8, 2016 at 1:33 PM, Van Horn, David
 wrote:
>
> I have just installed a Thunderbolt here to get our time and frequency 
> equipment all on the same page.
> As I was looking at the display on Lady Heather, I was noticing that the GPS 
> altitude seems rather wrong.
> We are in Boulder CO, which is nominally 5430' and the antenna is about 20' 
> off the ground.
> The display (near overdetermined position) reads 1589.72991 meters or 5216 
> and change in feet.
> Altitude is a big deal around here. :)
>
> I suppose 214' isn't that outrageous, but it does bring me to a question:
>
> How accurate is the altitude number really?
>
> Thanks.
>
>
> --
> David VanHorn
> Lead Hardware Engineer
>
> Backcountry Access, Inc.
> 2820 Wilderness Pl, Unit H
> Boulder, CO  80301 USA
> phone: 303-417-1345 x110
> email: 
> david.vanh...@backcountryaccess.com
>
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Re: [time-nuts] FE-405B Reprogramming

[Bob Camp]

Hi

The 405 appears to have some “bandpass” elements in it. You can not tune it 
over a wide range.

Bob

> On Jun 8, 2016, at 3:08 PM, Logan Cummings  wrote:
> 
> Hi All,
> 
>Nick's request for a divide-by-three circuit to get his FE-405B to
> output a 10MHz signal got me thinking - didn't want to threadjack.
> 
>I had assumed that the FE-405B's DDS output and FE-5680 compatibility
> made it a good candidate for output frequency reprogramming. Has anyone
> determined that this is not possible? My biggest concern was that if the
> internal crystal is also at 10MHz you'd get bad spurs trying to output the
> DDS at the same frequency..
> 
>Does anyone know if the FE-405B uses the original FE-5680 DDS circuit
> or the more recent one that is only narrowly (EFC) tunable over the serial
> interface? Would be great to have a stable reference at 1, 5, 10, etc. MHz.
> 
> 
> Any info/references on the FE-XXX internals would be appreciated!
> 
> Thanks,
> -Logan
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Re: [time-nuts] GPS altitude somewhat wrong?

[Michael Perrett]

A couple of things come to mind:
1) Is this a single measurement or an average over at least 24 hours?
2) Did you get your elevation via the receiver survey mode (recommended)?
3) How close is your "nominal" elevation measurement and what makes you
think it is truth?
4) The vertical component of the GPS position solution is typically 50%
worse accuracy and a lot noisier than the horizontal measurement. If you
have a good horizontal measurement it is unlikely you have a "wrong answer"
on elevation since your receiver is using the same data, just solving the
equation for a different variable.
5) What is your satellite mask angle? The geometry (hence accuracy)
degrades as an increasing function with mask angle. Suggest for the survey
mode you use as low a mask angle as possible (typically 5 to 10 degrees).

Finally, your 214' error is outrageous. For a surveyed position the answer
should be with +/- 10'.

Michael Perrett

On Wed, Jun 8, 2016 at 1:33 PM, Van Horn, David <
david.vanh...@backcountryaccess.com> wrote:

>
> I have just installed a Thunderbolt here to get our time and frequency
> equipment all on the same page.
> As I was looking at the display on Lady Heather, I was noticing that the
> GPS altitude seems rather wrong.
> We are in Boulder CO, which is nominally 5430' and the antenna is about
> 20' off the ground.
> The display (near overdetermined position) reads 1589.72991 meters or 5216
> and change in feet.
> Altitude is a big deal around here. :)
>
> I suppose 214' isn't that outrageous, but it does bring me to a question:
>
> How accurate is the altitude number really?
>
> Thanks.
>
>
> --
> David VanHorn
> Lead Hardware Engineer
>
> Backcountry Access, Inc.
> 2820 Wilderness Pl, Unit H
> Boulder, CO  80301 USA
> phone: 303-417-1345 x110
> email: david.vanh...@backcountryaccess.com david.vanh...@backcountryaccess.com>
>
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[time-nuts] Some FE405B data

[cdelect]

Attila,

All oscillators are not the same!

Although I find the yield to be better for the FE405B than say the 10811
some are duds like the top trace in Toms data, some are very good like
the bottom trace, and some are even better, my plot.

I've been very impressed by the 405B performance as I have run through
testing a pile of them!

Cheers,


Corby

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Re: [time-nuts] Divide by 3

[Hal Murray]

att...@kinali.ch said:
> Temperature, in an office or lab, does not change that much to cause large
> differences. 

Maybe in your lab.

I'd expect that will change as people get more sensitive to energy costs.  
Things like turning down/off the heat/cooling at night can lead to large 
swings.

-- 
These are my opinions.  I hate spam.



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[time-nuts] GPS altitude somewhat wrong?

[Van Horn, David]

I have just installed a Thunderbolt here to get our time and frequency 
equipment all on the same page.
As I was looking at the display on Lady Heather, I was noticing that the GPS 
altitude seems rather wrong.
We are in Boulder CO, which is nominally 5430' and the antenna is about 20' off 
the ground.
The display (near overdetermined position) reads 1589.72991 meters or 5216 and 
change in feet.
Altitude is a big deal around here. :)

I suppose 214' isn't that outrageous, but it does bring me to a question:

How accurate is the altitude number really?

Thanks.


--
David VanHorn
Lead Hardware Engineer

Backcountry Access, Inc.
2820 Wilderness Pl, Unit H
Boulder, CO  80301 USA
phone: 303-417-1345  x110
email: 
david.vanh...@backcountryaccess.com

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[time-nuts] FE-405B Reprogramming

[Logan Cummings]

Hi All,

Nick's request for a divide-by-three circuit to get his FE-405B to
output a 10MHz signal got me thinking - didn't want to threadjack.

I had assumed that the FE-405B's DDS output and FE-5680 compatibility
made it a good candidate for output frequency reprogramming. Has anyone
determined that this is not possible? My biggest concern was that if the
internal crystal is also at 10MHz you'd get bad spurs trying to output the
DDS at the same frequency..

Does anyone know if the FE-405B uses the original FE-5680 DDS circuit
or the more recent one that is only narrowly (EFC) tunable over the serial
interface? Would be great to have a stable reference at 1, 5, 10, etc. MHz.


 Any info/references on the FE-XXX internals would be appreciated!

Thanks,
-Logan
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Re: [time-nuts] Divide by 3

[Alex Pummer]

utilizing rising and falling edges makes the circuit output signal duty 
cycle sensitive to the input signal's duty cycle, and therefore the 
harmonic content will vary with the input duty cycle variation.

73
KJ6UHN
Alex

On 6/8/2016 9:47 AM, Richard (Rick) Karlquist wrote:

The URL you cited doesn't have the schematic in any obvious
place.  However, using both edges of the clock to supposedly
result in 50% duty cycle output depends on having 50%
duty cycle at the input.  If you have differential logic
like ECL, this can be realistic.  Single ended logic,
questionable.

The other issue is that the divider can start up in any
one of 3 phases with respect to any other frequency
dividers in your system, unless you do something to
synchronize the various dividers.

This is probably old hat to most readers of time-nuts, but
I just wanted to mention it in case some were unaware
of it.

Rick

On 6/8/2016 6:55 AM, Nick Sayer via time-nuts wrote:
I’m contemplating trying my GPS board with an FE-405B. That’s a 
different kettle of fish, but at the end of that, if I’m successful, 
one of the goals would be to be able to use it for the external 
reference of my 53220A. Unfortunately, 15 MHz isn’t one of the 
options - only 1, 5 and 10.


So I did some googling and found a divide-by-3 circuit using 
flip-flops, and then designed a board for it:


https://oshpark.com/shared_projects/jxXp7wYM

The circuit uses 3 D flip-flops and 3 NOR gates and has a 50% duty 
cycle output that’s 1/3 the frequency of the input. The OSHPark 
project has a pointer to the original blog post that has a schematic. 
The only difference between their schematic and mine is that in 
theirs, the third flip-flop has an inverted clock input. The third 
NOR gate inverts the clock to achieve that in mine (also one 
flip-flop and one NOR gate are unused and have the inputs tied high).


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-
No virus found in this message.
Checked by AVG - www.avg.com
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06/08/16


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[time-nuts] Divide by 3

[cdelect]

The FE405B AD plot I recently posted used a simple (non 50% duty cycle)
divide by 3 using a 74ls74 and 74ls02 (if I remember correctly). 
I used the HP board from the pair used in the 5065A or 5061A/B.
The existing 74ls74 was piggy backed with the 74ls02 and connections made
with tiny wire. The non-symmetrical 5Mhz output of the divider went into
the existing 5Mhz filter amp resulting in a nice clean Sine wave.
As the plot shows the AD does not suffer using this simple scheme.

Cheers,

Corby

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Re: [time-nuts] Divide by 3

[Charles Steinmetz]

Nick wrote:


I’m contemplating trying my GPS board with an FE-405B. That’s a different 
kettle of fish, but at the end of that, if I’m successful, one of the goals 
would be to be able to use it for the external reference of my 53220A. 
Unfortunately, 15 MHz isn’t one of the options - only 1, 5 and 10.

So I did some googling and found a divide-by-3 circuit using flip-flops, and 
then designed a board for it


You can achieve substantially lower jitter (phase noise) with a 
regenerative divider, which also allows you to divide by 3/2 for a 10MHz 
output.  I've built several like that, and they work extremely well.


There are simpler divide-by-three logic circuits (generally, the simpler 
the circuit the closer to an exact 50% duty cycle and the lower the 
jitter).  See the attached image for one approach.


Best regards,

Charles


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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[David]

Bob Pease recommended saving low gain transistors for operating margin
tests.

On Wed, 8 Jun 2016 18:35:58 +0200, you wrote:

>...
>
>Another way to identify potential start-up problems is to cool down the 
>unpowered oscillator to the minimum operating temperature (or upper operating 
>temperature) and then to apply a slow supply voltage ramp
>
>Bernd
>DK1AG
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Re: [time-nuts] Divide by 3

[Attila Kinali]

On Wed, 8 Jun 2016 18:35:43 +0200
Mike Cook  wrote:

> It is a no brainer to get a sine from a square wave, BUT , I seriously
> doubt that the excellent ADEV can be maintained with all that flipping
> and flopping going on. I even doubt that it could be kept in a pure sine
> implementation. 

I would not worry too much about ADEV degradation. The two most influencial
parameters for delay changes are temperature and supply voltage. Given that
the power supply is of decent quality (<<1% change per °C), then the supply
variations have little influence. Temperature, in an office or lab, does
not change that much to cause large differences.

I attached a TDEV plot (TDEV_all_pairs.png) of our clock sync system, which
uses Cyclone4 FPGAs (on an undmodified DE0-nano board) as TDCs to measure and
correct the skew between otherwise independent nodes. The measurements were
done using pulse outputs of the nodes feeding an DTS-2075, hence depict the
skew between pairs of nodes[1]. As you can see the curves go down nicely down
(with white phase noise) to <2ps in the 10-100s range. The blue curve looks
worse, due to hysteresis effects in the control system.

The second plot (TDEV_N4_N5_long.png) is an 9d19h run of the blue node
pair from the other plot. As you can see, the TDEV stays below 10ps up to 1e5s.
Most of the instability at taus >10 comes from the above mentioned hysteresis.

All measurements were done in late April, early May this year in Vienna,
with changing weather conditions. I.e. the temperature was anything but stable.
Unfortunately, we didn't record the temperature in the room.

If you take this data as indication, you can guess that any modern CMOS system
in an office environment will add less than 10ps timing uncertainty long term.
More likely it will be less than 1ps, as the plots depict measurements of a
complex system that does a lot of detection and non-trivial processing. 
For a frequency reference that is fed by GPS this level of stability should
be good enough.

Short term effects (aka phase noise) are a totally different story, though.


Attila Kinali

[1] I am leaving the details of the system out for the moment, as they are
not really important for the discussion at hand. As soon as I have time to
prepare the arxiv version of the paper I will post it on this list.

-- 
It is upon moral qualities that a society is ultimately founded. All 
the prosperity and technological sophistication in the world is of no 
use without that foundation.
 -- Miss Matheson, The Diamond Age, Neil Stephenson
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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[David]

On Wed, 8 Jun 2016 08:20:45 -0700, you wrote:

>Interesting, we just had a similar issue on a circuit here at work.. 
>someone slowly brought the supply voltage up on a bunch of DC/DC 
>converters, and some didn't start. This was in initial checkout of a new 
>board.
>
>Switch it on with a bang, and it works just fine.
>
>So for some of these things there's apparently a minimum dv/dt.

This problem also occasionally shows up in integrated circuits where a
slow power ramp does not allow the bias circuits to start.  I think
Bob Pease related an instance where this was caused by a missing
connection and capacitive coupling to the substrate was enough to
start the bias circuits but nobody noticed the problem until after it
was in production.

>I've seen this before with DC/DC converters.. if the voltage drops too 
>low, they draw too much current - because they're basically constant 
>power devices- and the overcurrent trip shuts them down.  There's a 
>delicate interplay between the overcurrent and undervoltage trips,both 
>of which have some sort of time constant, and I suspect that for a lot 
>of circuits, the "slow ramp up of input voltage" isn't something they 
>are designed for.  Once it's up and running, when the supply sags, the 
>UV trip works just fine, tripping before the OC trip goes.

These problem seems to crop up more with newer designs.  In old
off-line switching power supply designs that I have studied, most have
a deliberately designed in hard start capability where when an
extended fault condition is detected, the regulator is completely
reset by momentarily shorting the bias supply.  If the fault
continues, then the power supply periodically ticks as it tries to
restart so there is a nice indication of the problem without self
destruction.

The negative input resistance characteristic of switching power
supplies can have another bad result.  Some will continue to operate
at low input voltages drawing excessive current eventually damaging
themselves do to I^2R losses.

Power on reset circuits can have this problem in a different way.  If
power is removed and then reapplied within a short time, an RC circuit
may not discharge enough to retrigger.  Adding a diode to discharge
the capacitor when the supply falls is usually enough to fix this.

Some "universal input" off-line switching power supplies are marked to
run from 90 VAC to 270 VAC but actually cannot because they use an
automatic switching voltage doubler at their input.  If the input is
between the 120 VAC and 240 VAC ranges, they toggle back and forth
until they self destruct.  Luckily these are less common now with
active power factor correction inputs becoming ubiquitous.

>Linear regulators.. they may be not the most efficient thing in the 
>world, but they have a lot less "weird" behavior.  (although I've had 
>linear regulators go into thermally driven oscillation)

Linear regulators with foldback current limiting can have startup
problems with some loads.  Integrated regulators are usually designed
to put out full current as long as secondary breakdown limits are
observed and rely on their thermal protection which is itself designed
to have significant hysterisis to allow for hard starts under any
conditions.  But if the input to output voltage difference is high,
they can fail to start into some loads.
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[time-nuts] O-451A/u 5 MHz oscillator: more photos

[Eric Scace]

   I added some more photos of the O-451A/U to a Dropbox folder 
. 
There are no obvious manufacturer marks beyond the Western Electric contractor 
cited on the Coast Guard nameplate on the front panel. Note that the large 
electrolytic cap and transformer are a quick & dirty mod to bypass the 
dynamotor in the supply.

   In opening the rear of the unit to compare with the photos Corby sent on Jun 
2nd, the dynamotor prevented me from removing the insulation plug in the back. 
But the guts in the front of the unit are identical (other than my father 
thoughtfully added a spare tube inside when he was working on it).

   The O-451A/U puts out 5, 1 and 0.1 MHz square wave… implying a 5 MHz crystal 
inside the double oven. The rear panel photo includes a marking that describes 
the crystal as a GA-10752.

   As mentioned in an earlier email, these oscillators appear to have been used 
in Loran A/B transmitter sites. The last in-service date shown on the inside of 
the dropdown front panel for this particular unit (serial #11) is 1974. If 
there was a separate calibration logbook, it was lost when the unit was 
declared surplus.

— Eric
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Re: [time-nuts] Divide by 3

[Mike Cook]

> Le 8 juin 2016 à 15:55, Nick Sayer via time-nuts  a écrit 
> :
> 
> I’m contemplating trying my GPS board with an FE-405B. That’s a different 
> kettle of fish, but at the end of that, if I’m successful, one of the goals 
> would be to be able to use it for the external reference of my 53220A. 
> Unfortunately, 15 MHz isn’t one of the options - only 1, 5 and 10.

I saw the same, which put me off trying to do the same. However I am not sure 
that your approach will work as the specs for the external clock indicate:

 - EXTernal  selects an external reference signal applied to the rear panel
Ext Ref In  connector. The signal must be:
•  1 MHz , 5 MHz, or 10 MHz
•  100 mVrms to 2.5 Vrms
•  sine wave

Your output is digital, no? It may function but I wouldn’t trust it.

It is a no brainer to get a sine from a square wave, BUT , I seriously doubt 
that the excellent ADEV can be maintained with all that flipping and flopping 
going on. I even doubt that it could be kept in a pure sine implementation. 

Mike


> 
> So I did some googling and found a divide-by-3 circuit using flip-flops, and 
> then designed a board for it:
> 
> https://oshpark.com/shared_projects/jxXp7wYM
> 
> The circuit uses 3 D flip-flops and 3 NOR gates and has a 50% duty cycle 
> output that’s 1/3 the frequency of the input. The OSHPark project has a 
> pointer to the original blog post that has a schematic. The only difference 
> between their schematic and mine is that in theirs, the third flip-flop has 
> an inverted clock input. The third NOR gate inverts the clock to achieve that 
> in mine (also one flip-flop and one NOR gate are unused and have the inputs 
> tied high).
> 
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"The power of accurate observation is commonly called cynicism by those who 
have not got it. »
George Bernard Shaw

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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[Clint Jay]

Sounds similar to the issues you encounter with Atmel and some other
EEPROM/Flash based MCUs when they're not held in reset until VCC becomes
stable.

http://atmel.force.com/support/articles/en_US/FAQ/Prevent-EEPROM-corruption

Some more info:

http://www.embedded.com/design/prototyping-and-development/4006422/Avoid-corruption-in-nonvolatile-memory



On 8 June 2016 at 16:20, jimlux  wrote:

> On 6/8/16 6:19 AM, paul swed wrote:
>
>> The units were never intended for a slow ramp
>> I assume it runs into a meta stable condition
>> Neither on or off and then corruption
>> Glad you're can repair them
>>
>> On Tuesday, June 7, 2016, Bob Camp  wrote:
>>
>>
>>>
> Interesting, we just had a similar issue on a circuit here at work..
> someone slowly brought the supply voltage up on a bunch of DC/DC
> converters, and some didn't start. This was in initial checkout of a new
> board.
>
> Switch it on with a bang, and it works just fine.
>
> So for some of these things there's apparently a minimum dv/dt.
>
> I've seen this before with DC/DC converters.. if the voltage drops too
> low, they draw too much current - because they're basically constant power
> devices- and the overcurrent trip shuts them down.  There's a delicate
> interplay between the overcurrent and undervoltage trips,both of which have
> some sort of time constant, and I suspect that for a lot of circuits, the
> "slow ramp up of input voltage" isn't something they are designed for.
> Once it's up and running, when the supply sags, the UV trip works just
> fine, tripping before the OC trip goes.
>
>
> Linear regulators.. they may be not the most efficient thing in the world,
> but they have a lot less "weird" behavior.  (although I've had linear
> regulators go into thermally driven oscillation)
>
>
>
>
>
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of electrons were greatly inconvenienced.*
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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[Bernd Neubig]

The same problem may appear on some poorly designed crystal oscillators.
Some circuits depend on the spectral component of a fast power-on and will not 
start reliably if the supply voltage is ramped slowly - as can happen if the 
oscillator stage is fed by a voltage regulator with high value capacitor 
blocking at its output.
That is why oscillator testing standards like IEC 60679-1 define the test for 
reliable start-up to consist of a slowly ramping up supply voltage.
Another way to identify potential start-up problems is to cool down the 
unpowered oscillator to the minimum operating temperature (or upper operating 
temperature) and then to apply a slow supply voltage ramp

Bernd
DK1AG
-Ursprüngliche Nachricht-
Von: time-nuts [mailto:time-nuts-boun...@febo.com] Im Auftrag von jimlux
Gesendet: Mittwoch, 8. Juni 2016 17:21
An: time-nuts@febo.com
Betreff: Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

On 6/8/16 6:19 AM, paul swed wrote:
> The units were never intended for a slow ramp I assume it runs into a 
> meta stable condition Neither on or off and then corruption Glad 
> you're can repair them
>
> On Tuesday, June 7, 2016, Bob Camp  wrote:
>
>>

Interesting, we just had a similar issue on a circuit here at work.. 
someone slowly brought the supply voltage up on a bunch of DC/DC converters, 
and some didn't start. This was in initial checkout of a new board.

Switch it on with a bang, and it works just fine.

So for some of these things there's apparently a minimum dv/dt.

I've seen this before with DC/DC converters.. if the voltage drops too low, 
they draw too much current - because they're basically constant power devices- 
and the overcurrent trip shuts them down.  There's a delicate interplay between 
the overcurrent and undervoltage trips,both of which have some sort of time 
constant, and I suspect that for a lot of circuits, the "slow ramp up of input 
voltage" isn't something they are designed for.  Once it's up and running, when 
the supply sags, the UV trip works just fine, tripping before the OC trip goes.


Linear regulators.. they may be not the most efficient thing in the world, but 
they have a lot less "weird" behavior.  (although I've had linear regulators go 
into thermally driven oscillation)




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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[jimlux]

On 6/8/16 6:19 AM, paul swed wrote:

The units were never intended for a slow ramp
I assume it runs into a meta stable condition
Neither on or off and then corruption
Glad you're can repair them

On Tuesday, June 7, 2016, Bob Camp  wrote:





Interesting, we just had a similar issue on a circuit here at work.. 
someone slowly brought the supply voltage up on a bunch of DC/DC 
converters, and some didn't start. This was in initial checkout of a new 
board.


Switch it on with a bang, and it works just fine.

So for some of these things there's apparently a minimum dv/dt.

I've seen this before with DC/DC converters.. if the voltage drops too 
low, they draw too much current - because they're basically constant 
power devices- and the overcurrent trip shuts them down.  There's a 
delicate interplay between the overcurrent and undervoltage trips,both 
of which have some sort of time constant, and I suspect that for a lot 
of circuits, the "slow ramp up of input voltage" isn't something they 
are designed for.  Once it's up and running, when the supply sags, the 
UV trip works just fine, tripping before the OC trip goes.



Linear regulators.. they may be not the most efficient thing in the 
world, but they have a lot less "weird" behavior.  (although I've had 
linear regulators go into thermally driven oscillation)





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[time-nuts] Divide by 3

[Nick Sayer via time-nuts]

I’m contemplating trying my GPS board with an FE-405B. That’s a different 
kettle of fish, but at the end of that, if I’m successful, one of the goals 
would be to be able to use it for the external reference of my 53220A. 
Unfortunately, 15 MHz isn’t one of the options - only 1, 5 and 10.

So I did some googling and found a divide-by-3 circuit using flip-flops, and 
then designed a board for it:

https://oshpark.com/shared_projects/jxXp7wYM

The circuit uses 3 D flip-flops and 3 NOR gates and has a 50% duty cycle output 
that’s 1/3 the frequency of the input. The OSHPark project has a pointer to the 
original blog post that has a schematic. The only difference between their 
schematic and mine is that in theirs, the third flip-flop has an inverted clock 
input. The third NOR gate inverts the clock to achieve that in mine (also one 
flip-flop and one NOR gate are unused and have the inputs tied high).

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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

[paul swed]

The units were never intended for a slow ramp
I assume it runs into a meta stable condition
Neither on or off and then corruption
Glad you're can repair them

On Tuesday, June 7, 2016, Bob Camp  wrote:

> Hi
>
> Thanks for the heads up !!
>
> It almost sounds like they are doing some sort of “use flash as eeprom”
> trick and not
> quite getting it right. Maybe updating a “how many times turned on”
> counter in that
> memory space.
>
> Bob
>
>
> > On Jun 7, 2016, at 5:22 PM, Skip Withrow  > wrote:
> >
> > We recently had a customer that purchased an FEI FE-5650A (basically a
> > repackage version of the FE-5680A) and reported that it worked for
> several
> > hours, then died.  We promptly sent another unit, and he reported that it
> > died as well.  He had nothing but power hooked to the unit.
> >
> > On return of the first unit, it was examined and found to have corrupted
> > code.  The corrupted code problem was thought to be associated with doing
> > bad things to the serial port (like framing errors), and we still believe
> > this to be the case.  However, the customer said only power was connected
> > to the unit.
> >
> > I was asking some questions about how he was powering the unit, when he
> > said he turned on the power supply (a large HP variable supply) and
> turned
> > the voltage up to +15V (our 5650's are single supply).  Ah hah, slowly
> > ramping the voltage up on these oscillators appears to be a no no.
> >
> > The second oscillator has now been examined and it too was confirmed to
> > have corrupted code.  So, the word of warning is - DO NOT slowly ramp the
> > supply voltage of FE-5680A and FE-5650A oscillators.  I can't say what
> > slowly is, but this guy was good at killing them.  If I get some time I
> may
> > try to repeat the results.
> >
> > My advice was to set the supply at 15V and just turn it off and on.  I
> have
> > not heard from him since.
> >
> > If anyone out there has a 5680A or 5650A that does not lock, the code
> issue
> > is very likely the problem.  I have seen several 5680 units as well as a
> > few 5650 units with this problem.  The good news is that they can be
> > fixed.  I would happily do this for any time-nut that has one if return
> > postage is included with the unit.  The bad news is that we don't know
> the
> > nature of the code problem that trashes the software (stack overflow,
> error
> > handling routine, etc.) so units can only be restored to their original
> > condition that still has the bug in the code.
> >
> > Otherwise, the 5650 and 5680 are great values to get rubidium performance
> > at very reasonable prices.  I have 1000's of hours on them and 100's of
> > power cycles, with a lot of serial port use, so if treated correctly they
> > are reliable units.
> >
> > Regards,
> > Skip Withrow
> > RDR Electronics, Inc.
> >
> > <
> https://www.avast.com/sig-email?utm_medium=email_source=link_campaign=sig-email_content=webmail_term=oa-2322-b
> >
> > Virus-free
> > <
> https://www.avast.com/sig-email?utm_medium=email_source=link_campaign=sig-email_content=webmail_term=oa-2322-b
> >
> > <#DDB4FAA8-2DD7-40BB-A1B8-4E2AA1F9FDF2>
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Re: [time-nuts] Transformer inrush current and transformer simulation

[Gerhard Hoffmann]

Am 08.06.2016 um 02:31 schrieb Mike Monett:

I was not interested in examining the frequency response, saturation
effect or core losses. These are only important after the  core goes
into saturation.

I was  only interested in the result of switching at the peak  or at
the zero  crossing. This is clearly defined at the beginning  of the
document.
...
The saturation  and  core  losses   are  outside  the  scope  of the
investigation. The  investigation was only to examine the  effect of
switching at  the  peak or at the zero  crossing.  This  was clearly
stated at the beginning of the paper.

My analysis  correctly defined an unloaded transformer  as  the only
case where  switching  at  the peak or the  zero  crossing  made any
difference. This was the goal, and it was met.


Saturation is not outside the scope. It is the very heart of the problem.
You need to build up a voltage opposite to the grid voltage to keep the 
current small.

That requires an inductance and that requires a core that can be magnetized.
If the core is already magnetized to the limit from a previous session, 
it is as good
as simply not there at all. What remains is some meters of copper wire 
without an

appreciable L and that is not enough.

I'm haunted by that effect myself on a regular base in that I have a fat 
class A  Krell
audio amplifier and it pops the fuse of my living room once in about 5 
times of

switching it on.



I also showed that very few solid state switches were available that
switched at  the peak, that most vendors simply supply  devices that
switch at  the  zero  crossing and state to get  a  model  that will
accept the  surge currents, that switching at the  peak  could cause
severe surge  currents with capacitive loads,
Nobody uses large transformers anymore, everybody has a diode bridge , 
capacitor

and a DC/DC behind it. Then zero voltage switching makes sense.


  and that  I  could not
find any reference that stated switching at the peak would not cause
core saturation.
I provided references that zero voltage switching leads to saturation, 
and so did others.


Your comments   offer   no   additional   information  regarding the
advisability of  switching  at the peak or  the  zero  crossing. The
information you  do supply is irrelevant to the problem,  and mostly
irrelevant to LTspice.

you are right. This is not a LTspice problem but your modelling problem.

> Attila Kinali

It is upon moral qualities that a society is ultimately founded.
All the  prosperity and technological sophistication in  the world
is of no use without that foundation.

You need to consider getting new sigs. The two you post  have little
or nothing  to  do  with timenuts, and I'm  sure  everyone  has them
memorized by now.



OMG , I'm not Attila, but I may need a special time nuts .sig!

regards, Gerhard

--
Es ist schon alles gesagt worden, aber noch nicht von jedem. (Valentin)

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