[PATCH v8] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
Changes since v7:
- Re-added lost ramdisk_addr_r.
Changes since v6:
- Cleaned up some CONFIG_* pollution.
Changes since v5:
- Adjusted to further Binman changes.
- Adjusted to further Kconfig conversions.
- Removed some phy init in favor of DM.
- Removed some pinmux which are now handled by DM_SERIAL.
- Compared with Librem5/EVK and adjusted for similarity.
Changes since v4:
- Adjusted to Kconfig conversions.
- Removed U-Boot-specific device tree changes.
- Synced device tree to Linux v5.19-rc3.
Changes since v3:
- Adjusted to Binman changes in main branch.
- Cleaned up environment variables akin to i.MX8MM.
- Added vendor-prefix to device tree filename.
- Provided ramdisk_addr_r.
Changes since v2:
- Switched to Binman.
Changes since v1:
- Synced DTS with files in Linux git repo.
- Added support for USB host ports.
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 +
arch/arm/mach-imx/imx8m/Kconfig |7 +
board/mntre/imx8mq_reform2/Kconfig| 15 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 171 +++
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 107 ++
include/configs/imx8mq_reform2.h | 67 ++
11 files changed, 1766 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..e0a6fc5470
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "imx8mq-u-boot.dtsi"
+
+_uart1 {
+ u-boot,dm-spl;
+};
+
+ { /* console */
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 5e4836b02f..3133e0a009 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -60,6 +60,12 @@ config TARGET_IMX8MQ_PHANBELL
select IMX8MQ
select IMX8M_LPDDR4
+config TARGET_IMX8MQ_REFORM2
+ bool "imx8mq_reform2"
+ select BINMAN
+ select IMX8MQ
+ select IMX8M_LPDDR4
+
config TARGET_IMX8MM_DATA_MODUL_EDM_SBC
bool "Data Modul eDM SBC i.MX8M Mini"
select BINMAN
@@ -343,6 +349,7 @@ source "board/kontron/pitx_imx8m/Kconfig"
source "board/kontron/sl-mx8mm/Kconfig"
source "board/menlo/mx8menlo/Kconfig"
source "board/msc/sm2s_imx8mp/Kconfig"
+source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
source "board/purism/librem5/Kconfig"
diff --git a/board/mntre/imx8mq_reform2/Kconfig
b/board/mntre/imx8mq_reform2/Kconfig
new file mode 100644
index 00..f9260cb7f5
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_IMX8MQ_REFORM2
+
+config SYS_BOARD
+ default "imx8mq_reform2"
+
+config SYS_VENDOR
+ default "mntre"
+
+config SYS_CONFIG_NAME
+ default "imx8mq_reform2"
+
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
+endif
diff --git a/board/mntre/imx8mq_reform2/MAINTAINERS
b/board/mntre/imx8mq_reform2/MAINTAINERS
new file mode 100644
index 00..946f287ecf
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/MAINTAINERS
@@ -0,0 +1,7 @@
+REFORM2 IMX8MQ BOARD
+M: Lukas F. Hartmann
+M: Patrick Wildt
+S: Maintained
+F: board/mntre/imx8mq_reform2/
+F: include/configs/imx8mq_reform2.h
+F: configs/imx8mq_reform2_defconfig
diff --git a/board/mntre/imx8mq_reform2/Makefile
b/board/mntre/imx8mq_reform2/Makefile
new file mode 100644
index 00..2efd56bb4a
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mq_reform2.o
+
+if
[PATCH v7] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
Changes since v6:
- Cleaned up some CONFIG_* pollution.
Changes since v5:
- Adjusted to further Binman changes.
- Adjusted to further Kconfig conversions.
- Removed some phy init in favor of DM.
- Removed some pinmux which are now handled by DM_SERIAL.
- Compared with Librem5/EVK and adjusted for similarity.
Changes since v4:
- Adjusted to Kconfig conversions.
- Removed U-Boot-specific device tree changes.
- Synced device tree to Linux v5.19-rc3.
Changes since v3:
- Adjusted to Binman changes in main branch.
- Cleaned up environment variables akin to i.MX8MM.
- Added vendor-prefix to device tree filename.
- Provided ramdisk_addr_r.
Changes since v2:
- Switched to Binman.
Changes since v1:
- Synced DTS with files in Linux git repo.
- Added support for USB host ports.
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 +
arch/arm/mach-imx/imx8m/Kconfig |7 +
board/mntre/imx8mq_reform2/Kconfig| 15 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 171 +++
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 107 ++
include/configs/imx8mq_reform2.h | 66 ++
11 files changed, 1765 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..e0a6fc5470
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "imx8mq-u-boot.dtsi"
+
+_uart1 {
+ u-boot,dm-spl;
+};
+
+ { /* console */
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index a0715e8091..2049efb131 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -51,6 +51,12 @@ config TARGET_IMX8MQ_PHANBELL
select IMX8MQ
select IMX8M_LPDDR4
+config TARGET_IMX8MQ_REFORM2
+ bool "imx8mq_reform2"
+ select BINMAN
+ select IMX8MQ
+ select IMX8M_LPDDR4
+
config TARGET_IMX8MM_DATA_MODUL_EDM_SBC
bool "Data Modul eDM SBC i.MX8M Mini"
select BINMAN
@@ -320,6 +326,7 @@ source "board/kontron/pitx_imx8m/Kconfig"
source "board/kontron/sl-mx8mm/Kconfig"
source "board/menlo/mx8menlo/Kconfig"
source "board/msc/sm2s_imx8mp/Kconfig"
+source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
source "board/purism/librem5/Kconfig"
diff --git a/board/mntre/imx8mq_reform2/Kconfig
b/board/mntre/imx8mq_reform2/Kconfig
new file mode 100644
index 00..f9260cb7f5
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_IMX8MQ_REFORM2
+
+config SYS_BOARD
+ default "imx8mq_reform2"
+
+config SYS_VENDOR
+ default "mntre"
+
+config SYS_CONFIG_NAME
+ default "imx8mq_reform2"
+
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
+endif
diff --git a/board/mntre/imx8mq_reform2/MAINTAINERS
b/board/mntre/imx8mq_reform2/MAINTAINERS
new file mode 100644
index 00..946f287ecf
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/MAINTAINERS
@@ -0,0 +1,7 @@
+REFORM2 IMX8MQ BOARD
+M: Lukas F. Hartmann
+M: Patrick Wildt
+S: Maintained
+F: board/mntre/imx8mq_reform2/
+F: include/configs/imx8mq_reform2.h
+F: configs/imx8mq_reform2_defconfig
diff --git a/board/mntre/imx8mq_reform2/Makefile
b/board/mntre/imx8mq_reform2/Makefile
new file mode 100644
index 00..2efd56bb4a
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mq_reform2.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IM
Re: [PATCH v6] board: mntre: imx8mq: Add MNT Reform 2 board support
Am Tue, Jan 31, 2023 at 06:00:31PM +0100 schrieb Stefano Babic:
> On 19.01.23 20:56, Patrick Wildt wrote:
> > The MNT Reform 2 is a modular DIY laptop. In its initial version it
> > is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
> > lifted from BoundaryDevices official U-Boot downstream project.
> >
> > Signed-off-by: Patrick Wildt
> > ---
> > Changes since v5:
> > - Adjusted to further Binman changes.
> > - Adjusted to further Kconfig conversions.
> > - Removed some phy init in favor of DM.
> > - Removed some pinmux which are now handled by DM_SERIAL.
> > - Compared with Librem5/EVK and adjusted for similarity.
> > Changes since v4:
> > - Adjusted to Kconfig conversions.
> > - Removed U-Boot-specific device tree changes.
> > - Synced device tree to Linux v5.19-rc3.
> > Changes since v3:
> > - Adjusted to Binman changes in main branch.
> > - Cleaned up environment variables akin to i.MX8MM.
> > - Added vendor-prefix to device tree filename.
> > - Provided ramdisk_addr_r.
> > Changes since v2:
> > - Switched to Binman.
> > Changes since v1:
> > - Synced DTS with files in Linux git repo.
> > - Added support for USB host ports.
> >
> > arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 +
> > arch/arm/mach-imx/imx8m/Kconfig |7 +
> > board/mntre/imx8mq_reform2/Kconfig| 15 +
> > board/mntre/imx8mq_reform2/MAINTAINERS|7 +
> > board/mntre/imx8mq_reform2/Makefile | 12 +
> > board/mntre/imx8mq_reform2/imx8mq_reform2.c | 171 +++
> > board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
> > .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
> > board/mntre/imx8mq_reform2/spl.c | 260 +
> > configs/imx8mq_reform2_defconfig | 107 ++
> > include/configs/imx8mq_reform2.h | 66 ++
> > 11 files changed, 1765 insertions(+)
> > create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
> > create mode 100644 board/mntre/imx8mq_reform2/Kconfig
> > create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
> > create mode 100644 board/mntre/imx8mq_reform2/Makefile
> > create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
> > create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
> > create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
> > create mode 100644 board/mntre/imx8mq_reform2/spl.c
> > create mode 100644 configs/imx8mq_reform2_defconfig
> > create mode 100644 include/configs/imx8mq_reform2.h
> >
> > diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
> > b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
> > new file mode 100644
> > index 00..e0a6fc5470
> > --- /dev/null
> > +++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
> > @@ -0,0 +1,11 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +
> > +#include "imx8mq-u-boot.dtsi"
> > +
> > +_uart1 {
> > + u-boot,dm-spl;
> > +};
> > +
> > + { /* console */
> > + u-boot,dm-spl;
> > +};
> > diff --git a/arch/arm/mach-imx/imx8m/Kconfig
> > b/arch/arm/mach-imx/imx8m/Kconfig
> > index a0715e8091..2049efb131 100644
> > --- a/arch/arm/mach-imx/imx8m/Kconfig
> > +++ b/arch/arm/mach-imx/imx8m/Kconfig
> > @@ -51,6 +51,12 @@ config TARGET_IMX8MQ_PHANBELL
> > select IMX8MQ
> > select IMX8M_LPDDR4
> > +config TARGET_IMX8MQ_REFORM2
> > + bool "imx8mq_reform2"
> > + select BINMAN
> > + select IMX8MQ
> > + select IMX8M_LPDDR4
> > +
> > config TARGET_IMX8MM_DATA_MODUL_EDM_SBC
> > bool "Data Modul eDM SBC i.MX8M Mini"
> > select BINMAN
> > @@ -320,6 +326,7 @@ source "board/kontron/pitx_imx8m/Kconfig"
> > source "board/kontron/sl-mx8mm/Kconfig"
> > source "board/menlo/mx8menlo/Kconfig"
> > source "board/msc/sm2s_imx8mp/Kconfig"
> > +source "board/mntre/imx8mq_reform2/Kconfig"
> > source "board/phytec/phycore_imx8mm/Kconfig"
> > source "board/phytec/phycore_imx8mp/Kconfig"
> > source "board/purism/librem5/Kconfig"
> > diff --git a/board/mntre/imx8mq_reform2/Kconfig
> > b/board/mntre/imx8mq_reform2/Kconfig
> > new file mode 100644
> > index 00..f9260cb7f5
> > --- /dev/null
> > +++ b/board/mntre/imx8mq_reform2/Kconfig
> > @@ -0,0 +1,15 @@
> > +if TARGET_IMX8MQ_REFORM2
> > +
> >
Re: [PATCH] imx: power-domain: enable parent power domain
On Sun, Jan 29, 2023 at 05:00:15AM +0100, Marek Vasut wrote:
> On 1/29/23 04:28, Patrick Wildt wrote:
> > Am Sun, Jan 29, 2023 at 02:46:36AM +0100 schrieb Marek Vasut:
> > > On 1/28/23 23:14, Patrick Wildt wrote:
> > > > The PCIe power domains are dependant on each other, which is why
> > > > the device tree makes both PCIe controllers reference the PCIe1
> > > > power domain, which then depends on the PCIe2 power domain.
> > > >
> > > > Enabling the parent power domain used to be part of the driver,
> > > > but got partially lost in the rewrite. Add the enable call back
> > > > to be able to power up PCIe2.
> > > >
> > > > Signed-off-by: Patrick Wildt
> > > > ---
> > > >drivers/power/domain/imx8m-power-domain.c | 3 +++
> > > >1 file changed, 3 insertions(+)
> > > >
> > > > diff --git a/drivers/power/domain/imx8m-power-domain.c
> > > > b/drivers/power/domain/imx8m-power-domain.c
> > > > index 145f6ec0cd..d8e9ce3291 100644
> > > > --- a/drivers/power/domain/imx8m-power-domain.c
> > > > +++ b/drivers/power/domain/imx8m-power-domain.c
> > > > @@ -330,6 +330,9 @@ static int imx8m_power_domain_on(struct
> > > > power_domain *power_domain)
> > > > u32 pgc;
> > > > int ret;
> > > > + if (pdata->has_pd)
> > > > + power_domain_on(>pd);
> > > > +
> > > > if (pdata->clk.count) {
> > > > ret = clk_enable_bulk(>clk);
> > > > if (ret) {
> > >
> > > One problem with this patch is that it does not turn the power domain back
> > > OFF in imx8m_power_domain_off().
> >
> > That's not true. That function already turns the power domain off, it
> > just never enables them in the first place. The enabling was lost when
> > the code was rewritten to not use smcc but the disabling is still there:
> >
> > static int imx8m_power_domain_off(struct power_domain *power_domain)
> > {
> > (...)
> > if (pdata->has_pd)
> > power_domain_off(>pd);
> >
> > return 0;
> > (...)
> > }
>
> Doh, sorry, I did miss that one. Indeed, the imx power domain driver is not
> symmetrical now.
>
> > What might be missing though is error handling to turn the power domain
> > back off when enabling clocks/power up fails. In case this needs to be
> > fixed elsewhere, then maybe we need to *remove* the call to power_domain_
> > off().
> >
> > > However, the driver should not have to care about that. It is the uclass
> > > job
> > > to turn on any prerequisite power domains, which I believe happens in:
> > >
> > > drivers/power/domain/power-domain-uclass.c
> > > dev_power_domain_ctrl()
> > >
> > > However, I suspect the code fails to recurse through more than one level
> > > of
> > > power domains and therefore doesn't enable the power domains all the way
> > > up
> > > the power domain tree. I also think this would be the fix -- recurse in
> > > dev_power_domain_ctrl() if there are upstream domains to enable, enable
> > > them
> > > in that recursive call, and then enable the current power domain using
> > > power_domain_on() .
> > >
> > > Can you take a closer look at the uclass and the way it enables (or fail
> > > to)
> > > the upstream domains instead ?
> >
> > I guess one issue is that I was calling power_domain_on() directly instead
> > of
> > dev_power_domain_on() in my PCIe driver.
>
> That sounds like a good idea.
>
> > And maybe I shouldn't even need to
> > have the PCIe driver call that one function anyway, maybe uclass is supposed
> > to turn on my PCIe controllers power domain automatically.
>
> device_probe() does call dev_power_domain_on(), so that sounds like a good
> idea too.
>
> > As you mentioned, there's no "parent handling" in dev_power_domain_ctrl().
> > Something like this could work, but I'm not sure that's better. Also I
> > can't
> > judge if there are any other side-effects of this. Still feels a bit like a
> > layer violation
>
> How so ?
>
> > , but maybe it's the right thing to do.
> >
> > for (i = 0; i < count; i++) {
> > ret = power_domain_get_by_index(dev, , i);
> > if (ret)
> > return ret;
&
Re: [PATCH] imx: power-domain: enable parent power domain
Am Sun, Jan 29, 2023 at 02:46:36AM +0100 schrieb Marek Vasut:
> On 1/28/23 23:14, Patrick Wildt wrote:
> > The PCIe power domains are dependant on each other, which is why
> > the device tree makes both PCIe controllers reference the PCIe1
> > power domain, which then depends on the PCIe2 power domain.
> >
> > Enabling the parent power domain used to be part of the driver,
> > but got partially lost in the rewrite. Add the enable call back
> > to be able to power up PCIe2.
> >
> > Signed-off-by: Patrick Wildt
> > ---
> > drivers/power/domain/imx8m-power-domain.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/power/domain/imx8m-power-domain.c
> > b/drivers/power/domain/imx8m-power-domain.c
> > index 145f6ec0cd..d8e9ce3291 100644
> > --- a/drivers/power/domain/imx8m-power-domain.c
> > +++ b/drivers/power/domain/imx8m-power-domain.c
> > @@ -330,6 +330,9 @@ static int imx8m_power_domain_on(struct power_domain
> > *power_domain)
> > u32 pgc;
> > int ret;
> > + if (pdata->has_pd)
> > + power_domain_on(>pd);
> > +
> > if (pdata->clk.count) {
> > ret = clk_enable_bulk(>clk);
> > if (ret) {
>
> One problem with this patch is that it does not turn the power domain back
> OFF in imx8m_power_domain_off().
That's not true. That function already turns the power domain off, it
just never enables them in the first place. The enabling was lost when
the code was rewritten to not use smcc but the disabling is still there:
static int imx8m_power_domain_off(struct power_domain *power_domain)
{
(...)
if (pdata->has_pd)
power_domain_off(>pd);
return 0;
(...)
}
What might be missing though is error handling to turn the power domain
back off when enabling clocks/power up fails. In case this needs to be
fixed elsewhere, then maybe we need to *remove* the call to power_domain_
off().
> However, the driver should not have to care about that. It is the uclass job
> to turn on any prerequisite power domains, which I believe happens in:
>
> drivers/power/domain/power-domain-uclass.c
> dev_power_domain_ctrl()
>
> However, I suspect the code fails to recurse through more than one level of
> power domains and therefore doesn't enable the power domains all the way up
> the power domain tree. I also think this would be the fix -- recurse in
> dev_power_domain_ctrl() if there are upstream domains to enable, enable them
> in that recursive call, and then enable the current power domain using
> power_domain_on() .
>
> Can you take a closer look at the uclass and the way it enables (or fail to)
> the upstream domains instead ?
I guess one issue is that I was calling power_domain_on() directly instead of
dev_power_domain_on() in my PCIe driver. And maybe I shouldn't even need to
have the PCIe driver call that one function anyway, maybe uclass is supposed
to turn on my PCIe controllers power domain automatically.
As you mentioned, there's no "parent handling" in dev_power_domain_ctrl().
Something like this could work, but I'm not sure that's better. Also I can't
judge if there are any other side-effects of this. Still feels a bit like a
layer violation, but maybe it's the right thing to do.
for (i = 0; i < count; i++) {
ret = power_domain_get_by_index(dev, , i);
if (ret)
return ret;
if (on) {
ret = dev_power_domain_on(pd.dev);
if (!ret)
ret = power_domain_on();
} else {
ret = power_domain_off();
if (!ret)
ret = dev_power_domain_off(pd.dev);
}
}
I'll give this a go after some sleep.
Cheers,
Patrick
[PATCH] imx: power-domain: enable parent power domain
The PCIe power domains are dependant on each other, which is why
the device tree makes both PCIe controllers reference the PCIe1
power domain, which then depends on the PCIe2 power domain.
Enabling the parent power domain used to be part of the driver,
but got partially lost in the rewrite. Add the enable call back
to be able to power up PCIe2.
Signed-off-by: Patrick Wildt
---
drivers/power/domain/imx8m-power-domain.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/power/domain/imx8m-power-domain.c
b/drivers/power/domain/imx8m-power-domain.c
index 145f6ec0cd..d8e9ce3291 100644
--- a/drivers/power/domain/imx8m-power-domain.c
+++ b/drivers/power/domain/imx8m-power-domain.c
@@ -330,6 +330,9 @@ static int imx8m_power_domain_on(struct power_domain
*power_domain)
u32 pgc;
int ret;
+ if (pdata->has_pd)
+ power_domain_on(>pd);
+
if (pdata->clk.count) {
ret = clk_enable_bulk(>clk);
if (ret) {
--
2.39.1
[PATCH v6] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
Changes since v5:
- Adjusted to further Binman changes.
- Adjusted to further Kconfig conversions.
- Removed some phy init in favor of DM.
- Removed some pinmux which are now handled by DM_SERIAL.
- Compared with Librem5/EVK and adjusted for similarity.
Changes since v4:
- Adjusted to Kconfig conversions.
- Removed U-Boot-specific device tree changes.
- Synced device tree to Linux v5.19-rc3.
Changes since v3:
- Adjusted to Binman changes in main branch.
- Cleaned up environment variables akin to i.MX8MM.
- Added vendor-prefix to device tree filename.
- Provided ramdisk_addr_r.
Changes since v2:
- Switched to Binman.
Changes since v1:
- Synced DTS with files in Linux git repo.
- Added support for USB host ports.
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 +
arch/arm/mach-imx/imx8m/Kconfig |7 +
board/mntre/imx8mq_reform2/Kconfig| 15 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 171 +++
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 107 ++
include/configs/imx8mq_reform2.h | 66 ++
11 files changed, 1765 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..e0a6fc5470
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "imx8mq-u-boot.dtsi"
+
+_uart1 {
+ u-boot,dm-spl;
+};
+
+ { /* console */
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index a0715e8091..2049efb131 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -51,6 +51,12 @@ config TARGET_IMX8MQ_PHANBELL
select IMX8MQ
select IMX8M_LPDDR4
+config TARGET_IMX8MQ_REFORM2
+ bool "imx8mq_reform2"
+ select BINMAN
+ select IMX8MQ
+ select IMX8M_LPDDR4
+
config TARGET_IMX8MM_DATA_MODUL_EDM_SBC
bool "Data Modul eDM SBC i.MX8M Mini"
select BINMAN
@@ -320,6 +326,7 @@ source "board/kontron/pitx_imx8m/Kconfig"
source "board/kontron/sl-mx8mm/Kconfig"
source "board/menlo/mx8menlo/Kconfig"
source "board/msc/sm2s_imx8mp/Kconfig"
+source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
source "board/purism/librem5/Kconfig"
diff --git a/board/mntre/imx8mq_reform2/Kconfig
b/board/mntre/imx8mq_reform2/Kconfig
new file mode 100644
index 00..f9260cb7f5
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_IMX8MQ_REFORM2
+
+config SYS_BOARD
+ default "imx8mq_reform2"
+
+config SYS_VENDOR
+ default "mntre"
+
+config SYS_CONFIG_NAME
+ default "imx8mq_reform2"
+
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
+endif
diff --git a/board/mntre/imx8mq_reform2/MAINTAINERS
b/board/mntre/imx8mq_reform2/MAINTAINERS
new file mode 100644
index 00..946f287ecf
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/MAINTAINERS
@@ -0,0 +1,7 @@
+REFORM2 IMX8MQ BOARD
+M: Lukas F. Hartmann
+M: Patrick Wildt
+S: Maintained
+F: board/mntre/imx8mq_reform2/
+F: include/configs/imx8mq_reform2.h
+F: configs/imx8mq_reform2_defconfig
diff --git a/board/mntre/imx8mq_reform2/Makefile
b/board/mntre/imx8mq_reform2/Makefile
new file mode 100644
index 00..2efd56bb4a
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mq_reform2.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/boar
[PATCH v5 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 +
arch/arm/mach-imx/imx8m/Kconfig |7 +
board/mntre/imx8mq_reform2/Kconfig| 15 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 94 ++
include/configs/imx8mq_reform2.h | 86 ++
11 files changed, 1814 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..7efd82214d
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "imx8mq-u-boot.dtsi"
+
+_uart1 {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index ef8518c06b..b1a8c30e80 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -50,6 +50,12 @@ config TARGET_IMX8MQ_PHANBELL
select IMX8MQ
select IMX8M_LPDDR4
+config TARGET_IMX8MQ_REFORM2
+ bool "imx8mq_reform2"
+ select BINMAN
+ select IMX8MQ
+ select IMX8M_LPDDR4
+
config TARGET_IMX8MM_DATA_MODUL_EDM_SBC
bool "Data Modul eDM SBC i.MX8M Mini"
select BINMAN
@@ -284,6 +290,7 @@ source "board/google/imx8mq_phanbell/Kconfig"
source "board/kontron/pitx_imx8m/Kconfig"
source "board/kontron/sl-mx8mm/Kconfig"
source "board/menlo/mx8menlo/Kconfig"
+source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
source "board/ronetix/imx8mq-cm/Kconfig"
diff --git a/board/mntre/imx8mq_reform2/Kconfig
b/board/mntre/imx8mq_reform2/Kconfig
new file mode 100644
index 00..f9260cb7f5
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_IMX8MQ_REFORM2
+
+config SYS_BOARD
+ default "imx8mq_reform2"
+
+config SYS_VENDOR
+ default "mntre"
+
+config SYS_CONFIG_NAME
+ default "imx8mq_reform2"
+
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
+endif
diff --git a/board/mntre/imx8mq_reform2/MAINTAINERS
b/board/mntre/imx8mq_reform2/MAINTAINERS
new file mode 100644
index 00..946f287ecf
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/MAINTAINERS
@@ -0,0 +1,7 @@
+REFORM2 IMX8MQ BOARD
+M: Lukas F. Hartmann
+M: Patrick Wildt
+S: Maintained
+F: board/mntre/imx8mq_reform2/
+F: include/configs/imx8mq_reform2.h
+F: configs/imx8mq_reform2_defconfig
diff --git a/board/mntre/imx8mq_reform2/Makefile
b/board/mntre/imx8mq_reform2/Makefile
new file mode 100644
index 00..2efd56bb4a
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mq_reform2.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/board/mntre/imx8mq_reform2/imx8mq_reform2.c
b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
new file mode 100644
index 00..f7cb32dd98
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ * Copyright (C) 2018, Boundary Devices
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+
+#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS
[PATCH v5 1/2] arm: dts: imx8mq: update MNT Reform 2 to Linux v5.19-rc3
---
arch/arm/dts/imx8mq-mnt-reform2.dts | 145 +-
arch/arm/dts/imx8mq-nitrogen-som.dtsi | 15 +--
2 files changed, 152 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/imx8mq-mnt-reform2.dts
b/arch/arm/dts/imx8mq-mnt-reform2.dts
index 4f2db6197b..8956a46788 100644
--- a/arch/arm/dts/imx8mq-mnt-reform2.dts
+++ b/arch/arm/dts/imx8mq-mnt-reform2.dts
@@ -12,6 +12,31 @@
/ {
model = "MNT Reform 2";
compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som",
"fsl,imx8mq";
+ chassis-type = "laptop";
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pinctrl-names = "default";
+ pinctrl-0 = <_backlight>;
+ pwms = < 0 1 0>;
+ power-supply = <_main_usb>;
+ enable-gpios = < 10 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <0 32 64 128 160 200 255>;
+ default-brightness-level = <6>;
+ };
+
+ panel {
+ compatible = "innolux,n125hce-gn1", "simple-panel";
+ power-supply = <_main_3v3>;
+ backlight = <>;
+ no-hpd;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_bridge_out>;
+ };
+ };
+ };
pcie1_refclk: clock-pcie1-refclk {
compatible = "fixed-clock";
@@ -41,6 +66,22 @@
vin-supply = <_main_5v>;
};
+ reg_main_1v8: regulator-main-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_main_3v3>;
+ };
+
+ reg_main_1v2: regulator-main-1v2 {
+ compatible = "regulator-fixed";
+ regulator-name = "1V2";
+ regulator-min-microvolt = <120>;
+ regulator-max-microvolt = <120>;
+ vin-supply = <_main_5v>;
+ };
+
sound {
compatible = "fsl,imx-audio-wm8960";
audio-cpu = <>;
@@ -60,6 +101,13 @@
};
};
+ {
+ assigned-clocks = < IMX8MQ_CLK_DSI_PHY_REF>;
+ assigned-clock-parents = < IMX8MQ_SYS1_PLL_800M>;
+ assigned-clock-rates = <2500>;
+ status = "okay";
+};
+
{
status = "okay";
};
@@ -83,6 +131,67 @@
};
};
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c4>;
+ clock-frequency = <40>;
+ status = "okay";
+
+ edp_bridge: bridge@2c {
+ compatible = "ti,sn65dsi86";
+ pinctrl-names = "default";
+ pinctrl-0 = <_edp_bridge>;
+ reg = <0x2c>;
+ enable-gpios = < 20 GPIO_ACTIVE_HIGH>;
+ vccio-supply = <_main_1v8>;
+ vpll-supply = <_main_1v8>;
+ vcca-supply = <_main_1v2>;
+ vcc-supply = <_main_1v2>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ edp_bridge_in: endpoint {
+ remote-endpoint = <_dsi_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ edp_bridge_out: endpoint {
+ remote-endpoint = <_in>;
+ };
+ };
+ };
+ };
+};
+
+ {
+ assigned-clocks = < IMX8MQ_CLK_LCDIF_PIXEL>;
+ assigned-clock-parents = < IMX8MQ_SYS1_PLL_800M>;
+ /delete-property/assigned-clock-rates;
+ status = "okay";
+};
+
+_dsi {
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+
+ mipi_dsi_out: endpoint {
+ remote-endpoint = <_bridge_in>;
+ };
+ };
+ };
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pcie1>;
@@ -95,6 +204,13 @@
status = "okay";
};
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pwm2>;
+ status = "okay";
+};
+
+
_1p8v {
vin-supply = <_main_5v>;
};
@@ -168,10 +284,29 @@
};
{
+ pinctrl_backlight: backlightgrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x3
+ >;
+ };
+
+ pinctrl_edp_bridge: edpbridgegrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO200x1
+ >;
+ };
+
pinctrl_i2c3: i2c3grp {
fsl,pins = <
- MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL
[PATCH v5 0/2] Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been lifted from BoundaryDevices official U-Boot downstream project. This U-Boot patchset supports the serial console, the SD card and eMMC, Gigabit Ethernet and USB. Changes since v4: - Adjusted to Kconfig conversions. - Removed U-Boot-specific device tree changes. - Synced device tree to Linux v5.19-rc3. Changes since v3: - Adjusted to Binman changes in main branch. - Cleaned up environment variables akin to i.MX8MM. - Added vendor-prefix to device tree filename. - Provided ramdisk_addr_r. Changes since v2: - Switched to Binman. Changes since v1: - Synced DTS with files in Linux git repo. - Added support for USB host ports. Patrick Wildt (2): arm: dts: imx8mq: update MNT Reform 2 to Linux v5.19-rc3 board: mntre: imx8mq: Add MNT Reform 2 board support arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 + arch/arm/dts/imx8mq-mnt-reform2.dts | 145 ++- arch/arm/dts/imx8mq-nitrogen-som.dtsi | 15 +- arch/arm/mach-imx/imx8m/Kconfig |7 + board/mntre/imx8mq_reform2/Kconfig| 15 + board/mntre/imx8mq_reform2/MAINTAINERS|7 + board/mntre/imx8mq_reform2/Makefile | 12 + board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213 board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 + .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++ board/mntre/imx8mq_reform2/spl.c | 260 + configs/imx8mq_reform2_defconfig | 94 ++ include/configs/imx8mq_reform2.h | 86 ++ 13 files changed, 1966 insertions(+), 8 deletions(-) create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi create mode 100644 board/mntre/imx8mq_reform2/Kconfig create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS create mode 100644 board/mntre/imx8mq_reform2/Makefile create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h create mode 100644 board/mntre/imx8mq_reform2/spl.c create mode 100644 configs/imx8mq_reform2_defconfig create mode 100644 include/configs/imx8mq_reform2.h -- 2.36.1
[PATCH v2 4/4] arm64: dts: imx8mq-u-boot.dtsi: improve odd blob-ext naming
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 34 -
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 566b8b8035..1dc060ce0c 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -22,32 +22,37 @@
filename = "u-boot-spl.bin";
};
- blob_1: blob-ext@1 {
+ 1d-imem {
filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>;
+ type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ 1d-dmem {
filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>;
+ type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ 2d-imem {
filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>;
+ type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ 2d-dmem {
filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>;
+ type = "blob-ext";
};
};
- signed_hdmi {
+ signed-hdmi {
filename = "signed_hdmi.bin";
- blob_5: blob-ext@5 {
+ signed-hdmi-imx8m {
filename = "signed_hdmi_imx8m.bin";
+ type = "blob-ext";
};
};
@@ -60,9 +65,7 @@
blob {
filename = "u-boot-spl-ddr.bin";
};
-
};
-
};
itb {
@@ -81,8 +84,9 @@
load = ;
type = "standalone";
- uboot_blob: blob-ext {
+ uboot-blob {
filename = "u-boot-nodtb.bin";
+ type = "blob-ext";
};
};
@@ -94,8 +98,9 @@
load = <0x91>;
type = "firmware";
- atf_blob: blob-ext {
+ atf-blob {
filename = "bl31.bin";
+ type = "blob-ext";
};
};
@@ -104,8 +109,9 @@
description = "NAME";
type = "flat_dt";
- uboot_fdt_blob: blob-ext {
+ uboot-fdt-blob {
filename = "u-boot.dtb";
+ type = "blob-ext";
};
};
};
@@ -127,14 +133,16 @@
filename = "flash.bin";
pad-byte = <0x00>;
- spl: blob-ext@1 {
+ spl {
filename = "spl.bin";
offset = <0x0>;
+ type = "blob-ext";
};
- uboot: blob-ext@2 {
+ binman_uboot: uboot {
filename = "u-boot.itb";
offset = <0x57c00>;
+ type = "blob-ext";
};
};
};
--
2.34.1
[PATCH v2 3/4] arm64: dts: imx8mm-u-boot.dtsi: use dash for node names
Some of the nodes were named using a underscore, so rectify this and
consistenly use dashes.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mm-u-boot.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 7882fe7316..3ea03a96d6 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -45,19 +45,19 @@
type = "blob-ext";
};
- 1d_dmem {
+ 1d-dmem {
filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>;
type = "blob-ext";
};
- 2d_imem {
+ 2d-imem {
filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>;
type = "blob-ext";
};
- 2d_dmem {
+ 2d-dmem {
filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>;
type = "blob-ext";
@@ -93,7 +93,7 @@
load = ;
type = "standalone";
- uboot_blob {
+ uboot-blob {
filename = "u-boot-nodtb.bin";
type = "blob-ext";
};
@@ -107,7 +107,7 @@
load = <0x92>;
type = "firmware";
- atf_blob {
+ atf-blob {
filename = "bl31.bin";
type = "blob-ext";
};
@@ -126,7 +126,7 @@
description = "NAME";
type = "flat_dt";
- uboot_fdt_blob {
+ uboot-fdt-blob {
filename = "u-boot.dtb";
type = "blob-ext";
};
--
2.34.1
[PATCH v2 2/4] arm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename
Explicitly add SPL aka u-boot-spl.bin filename.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index d8208ae7b0..566b8b8035 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -19,6 +19,7 @@
u-boot-spl {
align-end = <4>;
+ filename = "u-boot-spl.bin";
};
blob_1: blob-ext@1 {
--
2.34.1
[PATCH v2 1/4] arm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties
Alphabetically re-order properties.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 8a6075c77b..d8208ae7b0 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -12,10 +12,10 @@
{
u-boot-spl-ddr {
+ align = <4>;
+ align-size = <4>;
filename = "u-boot-spl-ddr.bin";
pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
u-boot-spl {
align-end = <4>;
@@ -69,16 +69,16 @@
fit {
description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
fit,external-offset = ;
+ #address-cells = <1>;
images {
uboot {
- description = "U-Boot (64-bit)";
- type = "standalone";
arch = "arm64";
compression = "none";
+ description = "U-Boot (64-bit)";
load = ;
+ type = "standalone";
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
@@ -86,12 +86,12 @@
};
atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
arch = "arm64";
compression = "none";
- load = <0x91>;
+ description = "ARM Trusted Firmware";
entry = <0x91>;
+ load = <0x91>;
+ type = "firmware";
atf_blob: blob-ext {
filename = "bl31.bin";
@@ -99,9 +99,9 @@
};
fdt {
+ compression = "none";
description = "NAME";
type = "flat_dt";
- compression = "none";
uboot_fdt_blob: blob-ext {
filename = "u-boot.dtb";
@@ -114,9 +114,9 @@
conf {
description = "NAME";
+ fdt = "fdt";
firmware = "uboot";
loadables = "atf";
- fdt = "fdt";
};
};
};
@@ -127,13 +127,13 @@
pad-byte = <0x00>;
spl: blob-ext@1 {
- offset = <0x0>;
filename = "spl.bin";
+ offset = <0x0>;
};
uboot: blob-ext@2 {
- offset = <0x57c00>;
filename = "u-boot.itb";
+ offset = <0x57c00>;
};
};
};
--
2.34.1
[PATCH v2 0/4] arm64: imx8mq/imx8mm: cleanup binman configuration
The i.MX8MM boards have been converted for some longer time compared to i.MX8MQ. During that time the i.MX8MM binman configuration has already gotten some cleanup. This brings the i.MX8MQ binman config in line with the i.MX8MM one, and also fixes node names in the i.MX8MM config. Changes since v1: - Underscores in node names replaced with dashes. Patrick Wildt (4): arm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties arm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename arm64: dts: imx8mm-u-boot.dtsi: use dash for node names arm64: dts: imx8mq-u-boot.dtsi: improve odd blob-ext naming arch/arm/dts/imx8mm-u-boot.dtsi | 12 +++ arch/arm/dts/imx8mq-u-boot.dtsi | 59 +++-- 2 files changed, 40 insertions(+), 31 deletions(-) -- 2.34.1
Re: [PATCH 3/4] arm64: dts: imx8mm-u-boot.dtsi: fix typo in ddr blob name
On Thu, Jan 13, 2022 at 10:40:21AM -0300, Fabio Estevam wrote: > Hi Patrick, > > On 13/01/2022 10:29, Michael Walle wrote: > > > Why don't you just change it to the correct naming then? > > I agree with Michael: node names should use a dash instead of the > underscore. > > dtc complains about it when building with W=2: > > arch/arm/dts/imx8mm-evk.dtb: Warning (node_name_chars_strict): > /binman/u-boot-spl-ddr/1d_dmem: Character '_' not recommended in node name Ok, I'll send a v2 for the patchset in a minute. Cheers, Patrick
Re: [PATCH 3/4] arm64: dts: imx8mm-u-boot.dtsi: fix typo in ddr blob name
On Thu, Jan 13, 2022 at 12:42:50PM +0100, Michael Walle wrote:
> Hi,
>
> > --- a/arch/arm/dts/imx8mm-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mm-u-boot.dtsi
> > @@ -39,7 +39,7 @@
> > filename = "u-boot-spl.bin";
> > };
> >
> > - 1d-imem {
> > + 1d_imem {
>
> I think it is the other way around. Device tree node names should contain
> hyphens and not underscores.
>
> I couldn't find any references in dtschema though. Maybe I haven't looked
> hard enough.
>
> But you can see linux commit 28d7f0f3f10b, for example.
>
> -michael
Hi,
I don't know what's right, but every other of these in the i.MX8MM file
use _ instead of -, so if at all this makes it consistenly wrong, but
at least now it's consistent. ;)
If it's wrong, I'm sure someone will step up and rectify it.
Cheers,
Patrick
Re: [PATCH v4 0/2] Add MNT Reform 2 board support
On Wed, Jan 12, 2022 at 05:03:28PM -0500, Tom Rini wrote: > On Wed, Jan 12, 2022 at 10:29:50PM +0100, Patrick Wildt wrote: > > > Hi, > > > > is there anything I can do to help get attention on this patchset? > > Not a whole lot, sorry. The big hold up right now is that Stefano is > out currently and that means a number of imx patches are still > outstanding. > > > I'm now regularly rebasing the patchset and adjusting it to all the > > changes that happen in-tree to the other boards to keep the patchset > > compiling and working. > > > > Right now I'd have to send a v5 to remove a single define that's now > > obsolete and hence breaks compilation, but I'm not sure it's worth > > sending it out if there's gonna be a v6 and v7 for another rebase > > soon anyway. > > Aside from what I just sent out in reply to Fabio's comment, it probably > makes sense to hold off on reposting until Stefano is back. Thanks to both of you for the feedback! Cheers, Patrick
Re: [PATCH v4 0/2] Add MNT Reform 2 board support
Hi, is there anything I can do to help get attention on this patchset? I'm now regularly rebasing the patchset and adjusting it to all the changes that happen in-tree to the other boards to keep the patchset compiling and working. Right now I'd have to send a v5 to remove a single define that's now obsolete and hence breaks compilation, but I'm not sure it's worth sending it out if there's gonna be a v6 and v7 for another rebase soon anyway. Cheers, Patrick On Sat, Jan 08, 2022 at 04:04:14PM +0100, Patrick Wildt wrote: > The MNT Reform 2 is a modular DIY laptop. In its initial version it > is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been > lifted from BoundaryDevices official U-Boot downstream project. > > This U-Boot patchset supports the serial console, the SD card and > eMMC, Gigabit Ethernet and USB. > > Changes since v3: > - Adjusted to Binman changes in main branch. > - Cleaned up environment variables akin to i.MX8MM. > - Added vendor-prefix to device tree filename. > - Provided ramdisk_addr_r. > Changes since v2: > - Switched to Binman. > Changes since v1: > - Synced DTS with files in Linux git repo. > - Added support for USB host ports. > > Patrick Wildt (2): > arm: dts: imx8mq: add MNT Reform 2 > board: mntre: imx8mq: Add MNT Reform 2 board support > > arch/arm/dts/Makefile |1 + > arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 13 + > arch/arm/dts/imx8mq-mnt-reform2.dts | 214 > arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 + > arch/arm/mach-imx/imx8m/Kconfig |7 + > board/mntre/imx8mq_reform2/Kconfig| 15 + > board/mntre/imx8mq_reform2/MAINTAINERS|7 + > board/mntre/imx8mq_reform2/Makefile | 12 + > board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213 > board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 + > .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++ > board/mntre/imx8mq_reform2/spl.c | 260 + > configs/imx8mq_reform2_defconfig | 85 ++ > include/configs/imx8mq_reform2.h | 108 ++ > 14 files changed, 2319 insertions(+) > create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi > create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts > create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi > create mode 100644 board/mntre/imx8mq_reform2/Kconfig > create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS > create mode 100644 board/mntre/imx8mq_reform2/Makefile > create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c > create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c > create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h > create mode 100644 board/mntre/imx8mq_reform2/spl.c > create mode 100644 configs/imx8mq_reform2_defconfig > create mode 100644 include/configs/imx8mq_reform2.h > > -- > 2.34.1 >
[PATCH 4/4] arm64: dts: imx8mq-u-boot.dtsi: improve odd blob-ext naming
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 32
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 566b8b8035..b27630e3e5 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -22,32 +22,37 @@
filename = "u-boot-spl.bin";
};
- blob_1: blob-ext@1 {
+ 1d_imem {
filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>;
+ type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ 1d_dmem {
filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>;
+ type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ 2d_imem {
filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>;
+ type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ 2d_dmem {
filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>;
+ type = "blob-ext";
};
};
signed_hdmi {
filename = "signed_hdmi.bin";
- blob_5: blob-ext@5 {
+ hdmi_imx8m {
filename = "signed_hdmi_imx8m.bin";
+ type = "blob-ext";
};
};
@@ -60,9 +65,7 @@
blob {
filename = "u-boot-spl-ddr.bin";
};
-
};
-
};
itb {
@@ -81,8 +84,9 @@
load = ;
type = "standalone";
- uboot_blob: blob-ext {
+ uboot_blob {
filename = "u-boot-nodtb.bin";
+ type = "blob-ext";
};
};
@@ -94,8 +98,9 @@
load = <0x91>;
type = "firmware";
- atf_blob: blob-ext {
+ atf_blob {
filename = "bl31.bin";
+ type = "blob-ext";
};
};
@@ -104,8 +109,9 @@
description = "NAME";
type = "flat_dt";
- uboot_fdt_blob: blob-ext {
+ uboot_fdt_blob {
filename = "u-boot.dtb";
+ type = "blob-ext";
};
};
};
@@ -127,14 +133,16 @@
filename = "flash.bin";
pad-byte = <0x00>;
- spl: blob-ext@1 {
+ spl {
filename = "spl.bin";
offset = <0x0>;
+ type = "blob-ext";
};
- uboot: blob-ext@2 {
+ binman_uboot: uboot {
filename = "u-boot.itb";
offset = <0x57c00>;
+ type = "blob-ext";
};
};
};
--
2.34.1
[PATCH 3/4] arm64: dts: imx8mm-u-boot.dtsi: fix typo in ddr blob name
One of the blobs was named using a hyphen instead of an underscore,
so make it consistent.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mm-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 7882fe7316..cc022d46c9 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -39,7 +39,7 @@
filename = "u-boot-spl.bin";
};
- 1d-imem {
+ 1d_imem {
filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>;
type = "blob-ext";
--
2.34.1
[PATCH 2/4] arm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename
Explicitly add SPL aka u-boot-spl.bin filename.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index d8208ae7b0..566b8b8035 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -19,6 +19,7 @@
u-boot-spl {
align-end = <4>;
+ filename = "u-boot-spl.bin";
};
blob_1: blob-ext@1 {
--
2.34.1
[PATCH 1/4] arm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties
Alphabetically re-order properties.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 8a6075c77b..d8208ae7b0 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -12,10 +12,10 @@
{
u-boot-spl-ddr {
+ align = <4>;
+ align-size = <4>;
filename = "u-boot-spl-ddr.bin";
pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
u-boot-spl {
align-end = <4>;
@@ -69,16 +69,16 @@
fit {
description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
fit,external-offset = ;
+ #address-cells = <1>;
images {
uboot {
- description = "U-Boot (64-bit)";
- type = "standalone";
arch = "arm64";
compression = "none";
+ description = "U-Boot (64-bit)";
load = ;
+ type = "standalone";
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
@@ -86,12 +86,12 @@
};
atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
arch = "arm64";
compression = "none";
- load = <0x91>;
+ description = "ARM Trusted Firmware";
entry = <0x91>;
+ load = <0x91>;
+ type = "firmware";
atf_blob: blob-ext {
filename = "bl31.bin";
@@ -99,9 +99,9 @@
};
fdt {
+ compression = "none";
description = "NAME";
type = "flat_dt";
- compression = "none";
uboot_fdt_blob: blob-ext {
filename = "u-boot.dtb";
@@ -114,9 +114,9 @@
conf {
description = "NAME";
+ fdt = "fdt";
firmware = "uboot";
loadables = "atf";
- fdt = "fdt";
};
};
};
@@ -127,13 +127,13 @@
pad-byte = <0x00>;
spl: blob-ext@1 {
- offset = <0x0>;
filename = "spl.bin";
+ offset = <0x0>;
};
uboot: blob-ext@2 {
- offset = <0x57c00>;
filename = "u-boot.itb";
+ offset = <0x57c00>;
};
};
};
--
2.34.1
[PATCH 0/4] arm64: imx8mq/imx8mm: cleanup binman configuration
The i.MX8MM boards have been converted for some longer time compared to i.MX8MQ. During that time the i.MX8MM binman configuration has already gotten some cleanup. This brings the i.MX8MQ binman config in line with the i.MX8MM one, and fixes a typo in the i.MX8MM config. Patrick Wildt (4): arm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties arm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename arm64: dts: imx8mm-u-boot.dtsi: fix typo in ddr blob name arm64: dts: imx8mq-u-boot.dtsi: improve odd blob-ext naming arch/arm/dts/imx8mm-u-boot.dtsi | 2 +- arch/arm/dts/imx8mq-u-boot.dtsi | 57 +++-- 2 files changed, 34 insertions(+), 25 deletions(-) -- 2.34.1
Re: [PATCH 3/3] doc: verdin-imx8mm: Remove ATF_LOAD_ADDR export
On Wed, Jan 12, 2022 at 05:49:46PM -0300, Fabio Estevam wrote: > imx8mm-u-boot.dtsi passes the ATF load address via the > 'entry' and 'load' properties. > > Remove the step that performs the ATF_LOAD_ADDR export, which is > now unneeded. > > Signed-off-by: Fabio Estevam Reviewed-by: Patrick Wildt > --- > doc/board/toradex/verdin-imx8mm.rst | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/doc/board/toradex/verdin-imx8mm.rst > b/doc/board/toradex/verdin-imx8mm.rst > index a11c82da2f5c..439128adceba 100644 > --- a/doc/board/toradex/verdin-imx8mm.rst > +++ b/doc/board/toradex/verdin-imx8mm.rst > @@ -44,7 +44,6 @@ Build U-Boot > .. code-block:: bash > > $ export CROSS_COMPILE=aarch64-linux-gnu- > -$ export ATF_LOAD_ADDR=0x92 > $ make verdin-imx8mm_defconfig > $ make > > -- > 2.25.1 >
Re: [PATCH 2/3] doc: sl-mx8mm: Remove ATF_LOAD_ADDR export
On Wed, Jan 12, 2022 at 05:49:45PM -0300, Fabio Estevam wrote: > imx8mm-u-boot.dtsi passes the ATF load address via the > 'entry' and 'load' properties. > > Remove the step that performs the ATF_LOAD_ADDR export, which is > now unneeded. > > Signed-off-by: Fabio Estevam Reviewed-by: Patrick Wildt > --- > doc/board/kontron/sl-mx8mm.rst | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/doc/board/kontron/sl-mx8mm.rst b/doc/board/kontron/sl-mx8mm.rst > index 74ff228f2038..7a4c1134b54d 100644 > --- a/doc/board/kontron/sl-mx8mm.rst > +++ b/doc/board/kontron/sl-mx8mm.rst > @@ -62,7 +62,6 @@ Build U-Boot > .. code-block:: bash > > $ make kontron-sl-mx8mm_defconfig > - $ export ATF_LOAD_ADDR=0x92 > $ make > > Burn the flash.bin to SD card at an offset of 33 KiB: > -- > 2.25.1 >
Re: [PATCH 1/3] doc: imx8mm_evk: Remove ATF_LOAD_ADDR export
On Wed, Jan 12, 2022 at 05:49:44PM -0300, Fabio Estevam wrote: > imx8mm-u-boot.dtsi passes the ATF load address via the > 'entry' and 'load' properties. > > Remove the step that performs the ATF_LOAD_ADDR export, which is > now unneeded. > > Signed-off-by: Fabio Estevam Reviewed-by: Patrick Wildt > --- > doc/board/nxp/imx8mm_evk.rst | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/doc/board/nxp/imx8mm_evk.rst b/doc/board/nxp/imx8mm_evk.rst > index b377c4de276d..b9e67b954fc2 100644 > --- a/doc/board/nxp/imx8mm_evk.rst > +++ b/doc/board/nxp/imx8mm_evk.rst > @@ -42,7 +42,6 @@ Build U-Boot > > $ export CROSS_COMPILE=aarch64-poky-linux- > $ make imx8mm_evk_defconfig > - $ export ATF_LOAD_ADDR=0x92 > $ make > > Burn the flash.bin to MicroSD card offset 33KB: > -- > 2.25.1 >
Re: [PATCH] imx8mq: Generate a single bootable flash.bin again
On Sat, Jan 08, 2022 at 12:24:29PM -0300, Fabio Estevam wrote: > On 08/01/2022 12:16, Patrick Wildt wrote: > > > but it's not only imx8mq_evk. Tom has merged the patchset that switches > > *all* i.MX8MQ boards to Binman, which means that this change touches not > > only imx8mq_evk but all i.MX8MQ boards. The only thing that is specific > > to imx8mq_evk is the documentation change. > > Ah, OK. It was not clear when I read the commit log, but I agree now after > reading your reply. > > > Should I still change it? > > Maybe put in the commit log that all i.MX8MQ boards have been > converted to binman would avoid some confusion. > > Thanks, > > Fabio Estevam Ok, I agree that the previous wording as bad. I have sent a v2 *without* your Reviewed-By tag. Please have a look and check if you like that wording better. Thanks, Patrick
[PATCH v2] imx8mq: Generate a single bootable flash.bin again
All i.MX8MQ boards have been converted to binman, which makes it
necessary to flash both flash.bin and u-boot.itb to get a bootable
system. Prior to the conversion, only flash.bin was needed.
Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.
Generate a final flash.bin that can be used again as a single bootable
binary to keep the original behavior.
After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone (for
example, for secure boot purposes).
Also update imx8mq_evk.rst to remove the u-boot.itb copy step.
This is a cherry-pick of 028abfd9b157 ("imx8mm-evk: Generate a single
bootable flash.bin again") adjusted to apply to i.MX8MQ.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 19 ++-
arch/arm/mach-imx/imx8m/imximage.cfg | 2 +-
doc/board/nxp/imx8mq_evk.rst | 1 -
3 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 2c10e9b645..8a6075c77b 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -50,7 +50,9 @@
};
};
- flash {
+ spl {
+ filename = "spl.bin";
+
mkimage {
args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x7e1000";
@@ -119,4 +121,19 @@
};
};
};
+
+ imx-boot {
+ filename = "flash.bin";
+ pad-byte = <0x00>;
+
+ spl: blob-ext@1 {
+ offset = <0x0>;
+ filename = "spl.bin";
+ };
+
+ uboot: blob-ext@2 {
+ offset = <0x57c00>;
+ filename = "u-boot.itb";
+ };
+ };
};
diff --git a/arch/arm/mach-imx/imx8m/imximage.cfg
b/arch/arm/mach-imx/imx8m/imximage.cfg
index 9c6eaf0a6d..2a3f959183 100644
--- a/arch/arm/mach-imx/imx8m/imximage.cfg
+++ b/arch/arm/mach-imx/imx8m/imximage.cfg
@@ -8,4 +8,4 @@
FIT
BOOT_FROM sd
SIGNED_HDMIsigned_hdmi.bin
-LOADER mkimage.flash.mkimage 0x7e1000
+LOADER u-boot-spl-ddr.bin 0x7e1000
diff --git a/doc/board/nxp/imx8mq_evk.rst b/doc/board/nxp/imx8mq_evk.rst
index 92eeda79aa..aa1ecfb47a 100644
--- a/doc/board/nxp/imx8mq_evk.rst
+++ b/doc/board/nxp/imx8mq_evk.rst
@@ -50,7 +50,6 @@ Burn the flash.bin to MicroSD card offset 33KB:
.. code-block:: bash
$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc
- $sudo dd if=u-boot.itb of=/dev/sd[x] bs=1024 seek=384 conv=notrunc
Boot
--
2.34.1
Re: [PATCH] imx8mq: Generate a single bootable flash.bin again
On Sat, Jan 08, 2022 at 12:10:49PM -0300, Fabio Estevam wrote:
> On 08/01/2022 11:58, Patrick Wildt wrote:
> > After the conversion to binman in commit c1ecd03d90c7 ("imx: imx8mq_evk:
> > switch to binman"), it is necessary to flash both flash.bin and
> > u-boot.itb to get a bootable system. Prior to this commit, only
> > flash.bin was needed.
> >
> > Such new requirement breaks existing distro mechanisms to generate the
> > final binary because the extra u-boot.itb is now required.
> >
> > Generate a final flash.bin that can be used again as a single bootable
> > binary to keep the original behavior.
> >
> > After this change the SPL binary is called spl.bin, which is a more
> > descriptive name for its purpose, and can still be used standalone (for
> > example, for secure boot purposes).
> >
> > Also update imx8mq_evk.rst to remove the u-boot.itb copy step.
> >
> > This is a cherry-pick of 028abfd9b157 ("imx8mm-evk: Generate a single
> > bootable flash.bin again") adjusted to apply to i.MX8MQ.
>
> "apply to imx8mq_evk."
>
> Also, the subject should be imx8mq_evk: Generate...
>
> Feel free to resubmit with these two minor changes and keep my Reviewed-by
> tag.
>
> Thanks,
>
> Fabio Estevam
Hi,
but it's not only imx8mq_evk. Tom has merged the patchset that switches
*all* i.MX8MQ boards to Binman, which means that this change touches not
only imx8mq_evk but all i.MX8MQ boards. The only thing that is specific
to imx8mq_evk is the documentation change.
Should I still change it?
Thanks,
Patrick
[PATCH v4 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 13 +
arch/arm/mach-imx/imx8m/Kconfig |7 +
board/mntre/imx8mq_reform2/Kconfig| 15 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 85 ++
include/configs/imx8mq_reform2.h | 108 ++
11 files changed, 1829 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..c38c698794
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include "imx8mq-u-boot.dtsi"
+
+ {
+ mmc-hs400-1_8v;
+};
+
+ {
+ cd-gpios = < 12 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index d6a869068a..a14c05cdc6 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -46,6 +46,12 @@ config TARGET_IMX8MQ_PHANBELL
select IMX8MQ
select IMX8M_LPDDR4
+config TARGET_IMX8MQ_REFORM2
+ bool "imx8mq_reform2"
+ select BINMAN
+ select IMX8MQ
+ select IMX8M_LPDDR4
+
config TARGET_IMX8MM_EVK
bool "imx8mm LPDDR4 EVK board"
select BINMAN
@@ -173,6 +179,7 @@ source "board/freescale/imx8mp_evk/Kconfig"
source "board/gateworks/venice/Kconfig"
source "board/google/imx8mq_phanbell/Kconfig"
source "board/kontron/sl-mx8mm/Kconfig"
+source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
source "board/ronetix/imx8mq-cm/Kconfig"
diff --git a/board/mntre/imx8mq_reform2/Kconfig
b/board/mntre/imx8mq_reform2/Kconfig
new file mode 100644
index 00..f9260cb7f5
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_IMX8MQ_REFORM2
+
+config SYS_BOARD
+ default "imx8mq_reform2"
+
+config SYS_VENDOR
+ default "mntre"
+
+config SYS_CONFIG_NAME
+ default "imx8mq_reform2"
+
+config IMX_CONFIG
+ default "arch/arm/mach-imx/imx8m/imximage.cfg"
+
+endif
diff --git a/board/mntre/imx8mq_reform2/MAINTAINERS
b/board/mntre/imx8mq_reform2/MAINTAINERS
new file mode 100644
index 000000..946f287ecf
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/MAINTAINERS
@@ -0,0 +1,7 @@
+REFORM2 IMX8MQ BOARD
+M: Lukas F. Hartmann
+M: Patrick Wildt
+S: Maintained
+F: board/mntre/imx8mq_reform2/
+F: include/configs/imx8mq_reform2.h
+F: configs/imx8mq_reform2_defconfig
diff --git a/board/mntre/imx8mq_reform2/Makefile
b/board/mntre/imx8mq_reform2/Makefile
new file mode 100644
index 00..2efd56bb4a
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mq_reform2.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/board/mntre/imx8mq_reform2/imx8mq_reform2.c
b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
new file mode 100644
index 00..f7cb32dd98
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ * Copyright (C) 2018, Boundary Devices
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+
+#define WDOG_PA
[PATCH v4 1/2] arm: dts: imx8mq: add MNT Reform 2
Device tree taken from Linux v5.16-rc5.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mq-mnt-reform2.dts | 214
arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 ++
3 files changed, 490 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts
create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b3e2a9c9d7..17d3c8fb43 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -906,6 +906,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-evk.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
+ imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-evk.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mq-mnt-reform2.dts
b/arch/arm/dts/imx8mq-mnt-reform2.dts
new file mode 100644
index 00..4f2db6197b
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2.dts
@@ -0,0 +1,214 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/*
+ * Copyright 2019-2021 MNT Research GmbH
+ * Copyright 2021 Lucas Stach
+ */
+
+/dts-v1/;
+
+#include "imx8mq-nitrogen-som.dtsi"
+
+/ {
+ model = "MNT Reform 2";
+ compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som",
"fsl,imx8mq";
+
+ pcie1_refclk: clock-pcie1-refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ };
+
+ reg_main_5v: regulator-main-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ };
+
+ reg_main_3v3: regulator-main-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ reg_main_usb: regulator-main-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_PWR";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_main_5v>;
+ };
+
+ sound {
+ compatible = "fsl,imx-audio-wm8960";
+ audio-cpu = <>;
+ audio-codec = <>;
+ audio-routing =
+ "Headphone Jack", "HP_L",
+ "Headphone Jack", "HP_R",
+ "Ext Spk", "SPK_LP",
+ "Ext Spk", "SPK_LN",
+ "Ext Spk", "SPK_RP",
+ "Ext Spk", "SPK_RN",
+ "LINPUT1", "Mic Jack",
+ "Mic Jack", "MICB",
+ "LINPUT2", "Line In Jack",
+ "RINPUT2", "Line In Jack";
+ model = "wm8960-audio";
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c3>;
+ status = "okay";
+
+ wm8960: codec@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ clocks = < IMX8MQ_CLK_SAI2_ROOT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ };
+
+ rtc@68 {
+ compatible = "nxp,pcf8523";
+ reg = <0x68>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pcie1>;
+ reset-gpio = < 23 GPIO_ACTIVE_LOW>;
+ clocks = < IMX8MQ_CLK_PCIE2_ROOT>,
+< IMX8MQ_CLK_PCIE2_AUX>,
+< IMX8MQ_CLK_PCIE2_PHY>,
+<_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ status = "okay";
+};
+
+_1p8v {
+ vin-supply = <_main_5v>;
+};
+
+_snvs {
+ vin-supply = <_main_5v>;
+};
+
+_arm_dram {
+ vin-supply = <_main_5v>;
+};
+
+_dram_1p1v {
+ vin-supply = <_main_5v>;
+};
+
+_soc_gpu_vpu {
+ vin-supply = <_main_5v>;
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_sai2>;
+ assigned-clocks = < IMX8MQ_CLK_SAI2>;
+ assigned-clock-parents = < IMX8MQ_CLK_25M>;
+ assigned-clock-rates = <2500>;
+
[PATCH v4 0/2] Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been lifted from BoundaryDevices official U-Boot downstream project. This U-Boot patchset supports the serial console, the SD card and eMMC, Gigabit Ethernet and USB. Changes since v3: - Adjusted to Binman changes in main branch. - Cleaned up environment variables akin to i.MX8MM. - Added vendor-prefix to device tree filename. - Provided ramdisk_addr_r. Changes since v2: - Switched to Binman. Changes since v1: - Synced DTS with files in Linux git repo. - Added support for USB host ports. Patrick Wildt (2): arm: dts: imx8mq: add MNT Reform 2 board: mntre: imx8mq: Add MNT Reform 2 board support arch/arm/dts/Makefile |1 + arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 13 + arch/arm/dts/imx8mq-mnt-reform2.dts | 214 arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 + arch/arm/mach-imx/imx8m/Kconfig |7 + board/mntre/imx8mq_reform2/Kconfig| 15 + board/mntre/imx8mq_reform2/MAINTAINERS|7 + board/mntre/imx8mq_reform2/Makefile | 12 + board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213 board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 + .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++ board/mntre/imx8mq_reform2/spl.c | 260 + configs/imx8mq_reform2_defconfig | 85 ++ include/configs/imx8mq_reform2.h | 108 ++ 14 files changed, 2319 insertions(+) create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi create mode 100644 board/mntre/imx8mq_reform2/Kconfig create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS create mode 100644 board/mntre/imx8mq_reform2/Makefile create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h create mode 100644 board/mntre/imx8mq_reform2/spl.c create mode 100644 configs/imx8mq_reform2_defconfig create mode 100644 include/configs/imx8mq_reform2.h -- 2.34.1
[PATCH] imx8mq: Generate a single bootable flash.bin again
After the conversion to binman in commit c1ecd03d90c7 ("imx: imx8mq_evk:
switch to binman"), it is necessary to flash both flash.bin and
u-boot.itb to get a bootable system. Prior to this commit, only
flash.bin was needed.
Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.
Generate a final flash.bin that can be used again as a single bootable
binary to keep the original behavior.
After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone (for
example, for secure boot purposes).
Also update imx8mq_evk.rst to remove the u-boot.itb copy step.
This is a cherry-pick of 028abfd9b157 ("imx8mm-evk: Generate a single
bootable flash.bin again") adjusted to apply to i.MX8MQ.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-u-boot.dtsi | 19 ++-
arch/arm/mach-imx/imx8m/imximage.cfg | 2 +-
doc/board/nxp/imx8mq_evk.rst | 1 -
3 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 2c10e9b645..8a6075c77b 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -50,7 +50,9 @@
};
};
- flash {
+ spl {
+ filename = "spl.bin";
+
mkimage {
args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x7e1000";
@@ -119,4 +121,19 @@
};
};
};
+
+ imx-boot {
+ filename = "flash.bin";
+ pad-byte = <0x00>;
+
+ spl: blob-ext@1 {
+ offset = <0x0>;
+ filename = "spl.bin";
+ };
+
+ uboot: blob-ext@2 {
+ offset = <0x57c00>;
+ filename = "u-boot.itb";
+ };
+ };
};
diff --git a/arch/arm/mach-imx/imx8m/imximage.cfg
b/arch/arm/mach-imx/imx8m/imximage.cfg
index 9c6eaf0a6d..2a3f959183 100644
--- a/arch/arm/mach-imx/imx8m/imximage.cfg
+++ b/arch/arm/mach-imx/imx8m/imximage.cfg
@@ -8,4 +8,4 @@
FIT
BOOT_FROM sd
SIGNED_HDMIsigned_hdmi.bin
-LOADER mkimage.flash.mkimage 0x7e1000
+LOADER u-boot-spl-ddr.bin 0x7e1000
diff --git a/doc/board/nxp/imx8mq_evk.rst b/doc/board/nxp/imx8mq_evk.rst
index 92eeda79aa..aa1ecfb47a 100644
--- a/doc/board/nxp/imx8mq_evk.rst
+++ b/doc/board/nxp/imx8mq_evk.rst
@@ -50,7 +50,6 @@ Burn the flash.bin to MicroSD card offset 33KB:
.. code-block:: bash
$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc
- $sudo dd if=u-boot.itb of=/dev/sd[x] bs=1024 seek=384 conv=notrunc
Boot
--
2.34.1
Re: [PATCH] dts: rockchip: rk3399: enable emmc phy for spl
Am Mon, Nov 01, 2021 at 12:43:47PM +0800 schrieb Yifeng Zhao:
> adapting commit ac804143cf ("mmc: rockchip_sdhci: add phy and clock
> config for rk3399") to fix the issue "Not found emmc phy device".
Reviewed-by: Patrick Wildt
Tested-by: Patrick Wildt - on a Pinebook Pro
Please merge, otherwise the Pinebook Pro doesn't boot up at all.
> Signed-off-by: Yifeng Zhao
> ---
>
> arch/arm/dts/rk3399-u-boot.dtsi | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
> index 73922c328a..716b9a433a 100644
> --- a/arch/arm/dts/rk3399-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
> @@ -88,6 +88,10 @@
> u-boot,dm-pre-reloc;
> };
>
> +_phy {
> + u-boot,dm-pre-reloc;
> +};
> +
> {
> u-boot,dm-pre-reloc;
> };
> --
> 2.17.1
>
>
>
[PATCH v3 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 143 +++
arch/arm/mach-imx/imx8m/Kconfig |7 +
board/mntre/imx8mq_reform2/Kconfig| 15 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213
board/mntre/imx8mq_reform2/imximage.cfg | 11 +
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 82 ++
include/configs/imx8mq_reform2.h | 114 ++
12 files changed, 1973 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/imximage.cfg
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..3b7d50635c
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+ {
+ mmc-hs400-1_8v;
+};
+
+ {
+ cd-gpios = < 12 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
+
+ {
+ u-boot-spl-ddr {
+ filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+ align-size = <4>;
+ align = <4>;
+
+ u-boot-spl {
+ align-end = <4>;
+ };
+
+ blob_1: blob-ext@1 {
+ filename = "lpddr4_pmu_train_1d_imem.bin";
+ size = <0x8000>;
+ };
+
+ blob_2: blob-ext@2 {
+ filename = "lpddr4_pmu_train_1d_dmem.bin";
+ size = <0x4000>;
+ };
+
+ blob_3: blob-ext@3 {
+ filename = "lpddr4_pmu_train_2d_imem.bin";
+ size = <0x8000>;
+ };
+
+ blob_4: blob-ext@4 {
+ filename = "lpddr4_pmu_train_2d_dmem.bin";
+ size = <0x4000>;
+ };
+ };
+
+ signed_hdmi {
+ filename = "signed_hdmi.bin";
+
+ blob_5: blob-ext@5 {
+ filename = "signed_hdmi_imx8m.bin";
+ };
+ };
+
+ spl {
+ filename = "spl.bin";
+
+ mkimage {
+ args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x7e1000";
+
+ blob {
+ filename = "u-boot-spl-ddr.bin";
+ };
+ };
+ };
+
+ itb {
+ filename = "u-boot.itb";
+
+ fit {
+ description = "Configuration to load ATF before U-Boot";
+ #address-cells = <1>;
+ fit,external-offset = ;
+
+ images {
+ uboot {
+ description = "U-Boot (64-bit)";
+ type = "standalone";
+ arch = "arm64";
+ compression = "none";
+ load = ;
+
+ uboot_blob: blob-ext {
+ filename = "u-boot-nodtb.bin";
+ };
+ };
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression
[PATCH v3 1/2] arm: dts: imx8mq: add MNT Reform 2
Device tree taken from Linux v5.16-rc5.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mq-mnt-reform2.dts | 214
arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 ++
3 files changed, 490 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts
create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7f622fedbd..1183a8f7c6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -905,6 +905,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-evk.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
+ imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-evk.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mq-mnt-reform2.dts
b/arch/arm/dts/imx8mq-mnt-reform2.dts
new file mode 100644
index 00..4f2db6197b
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2.dts
@@ -0,0 +1,214 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/*
+ * Copyright 2019-2021 MNT Research GmbH
+ * Copyright 2021 Lucas Stach
+ */
+
+/dts-v1/;
+
+#include "imx8mq-nitrogen-som.dtsi"
+
+/ {
+ model = "MNT Reform 2";
+ compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som",
"fsl,imx8mq";
+
+ pcie1_refclk: clock-pcie1-refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ };
+
+ reg_main_5v: regulator-main-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ };
+
+ reg_main_3v3: regulator-main-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ reg_main_usb: regulator-main-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_PWR";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_main_5v>;
+ };
+
+ sound {
+ compatible = "fsl,imx-audio-wm8960";
+ audio-cpu = <>;
+ audio-codec = <>;
+ audio-routing =
+ "Headphone Jack", "HP_L",
+ "Headphone Jack", "HP_R",
+ "Ext Spk", "SPK_LP",
+ "Ext Spk", "SPK_LN",
+ "Ext Spk", "SPK_RP",
+ "Ext Spk", "SPK_RN",
+ "LINPUT1", "Mic Jack",
+ "Mic Jack", "MICB",
+ "LINPUT2", "Line In Jack",
+ "RINPUT2", "Line In Jack";
+ model = "wm8960-audio";
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c3>;
+ status = "okay";
+
+ wm8960: codec@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ clocks = < IMX8MQ_CLK_SAI2_ROOT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ };
+
+ rtc@68 {
+ compatible = "nxp,pcf8523";
+ reg = <0x68>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pcie1>;
+ reset-gpio = < 23 GPIO_ACTIVE_LOW>;
+ clocks = < IMX8MQ_CLK_PCIE2_ROOT>,
+< IMX8MQ_CLK_PCIE2_AUX>,
+< IMX8MQ_CLK_PCIE2_PHY>,
+<_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ status = "okay";
+};
+
+_1p8v {
+ vin-supply = <_main_5v>;
+};
+
+_snvs {
+ vin-supply = <_main_5v>;
+};
+
+_arm_dram {
+ vin-supply = <_main_5v>;
+};
+
+_dram_1p1v {
+ vin-supply = <_main_5v>;
+};
+
+_soc_gpu_vpu {
+ vin-supply = <_main_5v>;
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_sai2>;
+ assigned-clocks = < IMX8MQ_CLK_SAI2>;
+ assigned-clock-parents = < IMX8MQ_CLK_25M>;
+ assigned-clock-rates = <2500>;
+
[PATCH v3 0/2] Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been lifted from BoundaryDevices official U-Boot downstream project. This U-Boot patchset supports the serial console, the SD card and eMMC, Gigabit Ethernet and USB. Changes since v2: - Switched to Binman. Changes since v1: - Synced DTS with files in Linux git repo. - Added support for USB host ports. Patrick Wildt (2): arm: dts: imx8mq: add MNT Reform 2 board: mntre: imx8mq: Add MNT Reform 2 board support arch/arm/dts/Makefile |1 + arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 143 +++ arch/arm/dts/imx8mq-mnt-reform2.dts | 214 arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 + arch/arm/mach-imx/imx8m/Kconfig |7 + board/mntre/imx8mq_reform2/Kconfig| 15 + board/mntre/imx8mq_reform2/MAINTAINERS|7 + board/mntre/imx8mq_reform2/Makefile | 12 + board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213 board/mntre/imx8mq_reform2/imximage.cfg | 11 + board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 + .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++ board/mntre/imx8mq_reform2/spl.c | 260 + configs/imx8mq_reform2_defconfig | 82 ++ include/configs/imx8mq_reform2.h | 114 ++ 15 files changed, 2463 insertions(+) create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi create mode 100644 board/mntre/imx8mq_reform2/Kconfig create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS create mode 100644 board/mntre/imx8mq_reform2/Makefile create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c create mode 100644 board/mntre/imx8mq_reform2/imximage.cfg create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h create mode 100644 board/mntre/imx8mq_reform2/spl.c create mode 100644 configs/imx8mq_reform2_defconfig create mode 100644 include/configs/imx8mq_reform2.h -- 2.34.1
Re: [PATCH v2 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
On Fri, Nov 12, 2021 at 11:59:29AM -0800, Vagrant Cascadian wrote: > On 2021-11-11, Patrick Wildt wrote: > > On Thu, Nov 11, 2021 at 12:21:26PM +0100, Patrick Wildt wrote: > >> On Wed, Nov 10, 2021 at 02:26:54PM -0800, Vagrant Cascadian wrote: > >> > On 2021-09-02, Patrick Wildt wrote: > >> > > The MNT Reform 2 is a modular DIY laptop. In its initial version it > >> > > is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been > >> > > lifted from BoundaryDevices official U-Boot downstream project. > ... > >> > Both simply hanging with: > >> > > >> > U-Boot SPL 2021.10 (Jan 01 1970 - 00:00:01 +) > > Still hanging with the below patch... > Might just be the ATF, hm. > > >> There have been a few changes in U-Boot since I sent my patchset, it's > >> possible the diff by itself might not be enough. > >> > >> I will send out a new patchset soon, but the move to Binman doesn't work > >> for me yet. It's weird, because I don't see a diff to other i.MX8MQ > >> platforms, so I'm still debugging that. Maybe the other i.MX8MQ boards > >> don't work with Binman either? > >> > >> Keep note that the build procedure (how to supply bl31) changes once > >> Binman is used. > > > > I have fixed the issue. My changes depend on Peng's patchset to change > > i.MX8MQ to Binman, so I will re-issue a v3 of the patchset as soon as > > that is done (to not interfere any further with his patchset). > > > > 'Attached' you'll find a complete diff you can apply to origin/master, > > which includes some of Peng's changes. Let me know how it goes for you. > > To get it to build, I needed to add this: > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile > index 07954bc201..e51b5317fc 100644 > --- a/arch/arm/mach-imx/Makefile > +++ b/arch/arm/mach-imx/Makefile > @@ -161,9 +161,9 @@ spl/u-boot-spl.cfgout: $(IMX_CONFIG) FORCE > $(Q)mkdir -p $(dir $@) > $(call if_changed_dep,cpp_cfg) > > -spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE > +u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE > > -flash.bin: spl/u-boot-spl-ddr.bin u-boot.itb FORCE > +flash.bin: u-boot-spl-ddr.bin u-boot.itb FORCE > $(call if_changed,mkimage) > endif > Are you doing 'make flash.bin'? Because that might be the build issue. I'm only running 'make', and for me that yields a working flash.bin. I wonder if that flash.bin target is still relevant, because with binman the default target runs binman which parses a config file which decides which binaries to produce, so there's no need for the flash.bin target. > >> > Is the flash.bin step unecessary? I see DDR timing code in the patch > >> > series; are corresponding lpddr4*.bin no longer necessary? > >> > >> The flash.bin has all bits: U-Boot, U-Boot SPL, lpddr4*.bin and bl31.bin > >> > >> lpddr4*.bin is the firmware for the DDR controller. So you need the > >> timing information *and* the firmware. > >> > >> > I also tried building with an old version of arm-trusted-firmware > >> > (v2.2), as that was the most recent upstream version that successfully > >> > built. This seems to be a fork of ATF that has support for iMX8MQ, but > >> > it is unclear which branch/tag/etc. should be used with the mnt/reform: > >> > > >> > https://source.codeaurora.org/external/imx/imx-atf > >> > >> Not sure right now, but I think I was using the one that's build on > >> OpenBSD-current, which seems to be arm-trusted-firmware 2.5. I'll > >> check it. > > I can't get atf 2.5 for imx8mq to build on Debian or GNU Guix; it seems > that maybe it is no longer supported upstream: > > > https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=e3c07d2f5a082d8bb1684ca026d1789a77b3c870 > > Though it's not exactly clear what works... > Huh, that's crazy. I can send you the ATF binary I'm using if you're interested. > > >> > It would be nice to include a board README in the next patch revision to > >> > spell out some of the details of exactly which other projects and > >> > versions/comments/branches are expected to work with MNT Reform2. > >> > > >> > >> This is nothing specific to the MNT Reform2. It's the same for all > >> i.MX8MQ boards. ATF+DDR+U-Boot have to work together, and it doesn't > >> matter which board it is. Hence I don't believe providing that kind > >> information in a Reform-specific README makes sense. > > I guess we need a workable README for i.MX8MQ or something, and only > boards that differ from that process document the differences? I do hope at the end of Peng's patchset there won't be any boards that differ from the process. Patrick > But at the moment, it appears to still be guesswork. > > live well, > vagrant
Re: [PATCH v2 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
On Thu, Nov 11, 2021 at 12:21:26PM +0100, Patrick Wildt wrote: > On Wed, Nov 10, 2021 at 02:26:54PM -0800, Vagrant Cascadian wrote: > > On 2021-09-02, Patrick Wildt wrote: > > > The MNT Reform 2 is a modular DIY laptop. In its initial version it > > > is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been > > > lifted from BoundaryDevices official U-Boot downstream project. > > > > Thanks for working on this! > > > > I'm struggling a bit getting it to actually boot; how is this supposed > > to be installed to the device? > > > > I've built with the two applied patches on a patched v2021.10, copying > > various firmware parts from: > > > > > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/bl31-iMX8MQ.bin > > > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_1d_dmem.bin > > > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_1d_imem.bin > > > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_2d_dmem.bin > > > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_2d_imem.bin > > > > export BL31=bl31-iMX8MQ.bin > > > > make imx8mq_reform2_defconfig > > make > > make flash.bin > > > > Then grepping various other README's from imx8mq devices, I tried two > > different processes: > > > > dd if=flash.bin of=/dev/sd[x] bs=1K seek=33 > > You only need to dd flash.bin, the command looks fine. Correction: With Peng's current Binman patchset you need both. But I think that is not correct, because for i.MX8MM Binman was changed back to generate a single image. The following patch includes that change, so you only need to dd flash.bin. > > and: > > > > dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync > > dd if=u-boot.itb of=/dev/sd[x] bs=1024 seek=384 conv=sync > > > > Both simply hanging with: > > > > U-Boot SPL 2021.10 (Jan 01 1970 - 00:00:01 +) > > There have been a few changes in U-Boot since I sent my patchset, it's > possible the diff by itself might not be enough. > > I will send out a new patchset soon, but the move to Binman doesn't work > for me yet. It's weird, because I don't see a diff to other i.MX8MQ > platforms, so I'm still debugging that. Maybe the other i.MX8MQ boards > don't work with Binman either? > > Keep note that the build procedure (how to supply bl31) changes once > Binman is used. I have fixed the issue. My changes depend on Peng's patchset to change i.MX8MQ to Binman, so I will re-issue a v3 of the patchset as soon as that is done (to not interfere any further with his patchset). 'Attached' you'll find a complete diff you can apply to origin/master, which includes some of Peng's changes. Let me know how it goes for you. Patrick > > Is the flash.bin step unecessary? I see DDR timing code in the patch > > series; are corresponding lpddr4*.bin no longer necessary? > > The flash.bin has all bits: U-Boot, U-Boot SPL, lpddr4*.bin and bl31.bin > > lpddr4*.bin is the firmware for the DDR controller. So you need the > timing information *and* the firmware. > > > I also tried building with an old version of arm-trusted-firmware > > (v2.2), as that was the most recent upstream version that successfully > > built. This seems to be a fork of ATF that has support for iMX8MQ, but > > it is unclear which branch/tag/etc. should be used with the mnt/reform: > > > > https://source.codeaurora.org/external/imx/imx-atf > > Not sure right now, but I think I was using the one that's build on > OpenBSD-current, which seems to be arm-trusted-firmware 2.5. I'll > check it. > > > It would be nice to include a board README in the next patch revision to > > spell out some of the details of exactly which other projects and > > versions/comments/branches are expected to work with MNT Reform2. > > > > This is nothing specific to the MNT Reform2. It's the same for all > i.MX8MQ boards. ATF+DDR+U-Boot have to work together, and it doesn't > matter which board it is. Hence I don't believe providing that kind > information in a Reform-specific README makes sense. > > Patrick > > > > > I would be nice if you could CC me on future patch series revisions to > > be able to test. Thanks! > > > > > > live well, > > vagrant diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cc34da7bd8..6c14e9328e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -904,6 +904,7 @@ dtb-$(CONFIG_ARCH_IMX8M)
Re: [PATCH V3 5/5] doc: imx8mq_evk: update doc after using binman
On Fri, Oct 22, 2021 at 10:42:20AM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > Update doc after using binman to pack images Not necessary if we make sure flash.bin stays a single bootable image > Signed-off-by: Peng Fan > --- > doc/board/nxp/imx8mq_evk.rst | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/doc/board/nxp/imx8mq_evk.rst b/doc/board/nxp/imx8mq_evk.rst > index c269fdebe3..92eeda79aa 100644 > --- a/doc/board/nxp/imx8mq_evk.rst > +++ b/doc/board/nxp/imx8mq_evk.rst > @@ -43,13 +43,14 @@ Build U-Boot > > $ export CROSS_COMPILE=aarch64-poky-linux- > $ make imx8mq_evk_defconfig > - $ make flash.bin > + $ make > > Burn the flash.bin to MicroSD card offset 33KB: > > .. code-block:: bash > > $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc > + $sudo dd if=u-boot.itb of=/dev/sd[x] bs=1024 seek=384 conv=notrunc > > Boot > > -- > 2.30.0 >
Re: [PATCH V3 4/5] imx: imx8mq use common imximage.cfg
On Fri, Oct 22, 2021 at 10:42:19AM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > After all these board switch to binman, we could use common imximage.cfg Reviewed-by: Patrick Wildt > Signed-off-by: Peng Fan > --- > arch/arm/mach-imx/imx8m/imximage.cfg | 12 +++- > board/freescale/imx8mq_evk/Kconfig| 2 +- > board/freescale/imx8mq_evk/imximage.cfg | 11 --- > board/google/imx8mq_phanbell/Kconfig | 2 +- > board/google/imx8mq_phanbell/imximage.cfg | 11 --- > board/technexion/pico-imx8mq/Kconfig | 2 +- > board/technexion/pico-imx8mq/imximage.cfg | 11 --- > 7 files changed, 6 insertions(+), 45 deletions(-) > delete mode 100644 board/freescale/imx8mq_evk/imximage.cfg > delete mode 100644 board/google/imx8mq_phanbell/imximage.cfg > delete mode 100644 board/technexion/pico-imx8mq/imximage.cfg > > diff --git a/arch/arm/mach-imx/imx8m/imximage.cfg > b/arch/arm/mach-imx/imx8m/imximage.cfg > index 714b24273b..9c6eaf0a6d 100644 > --- a/arch/arm/mach-imx/imx8m/imximage.cfg > +++ b/arch/arm/mach-imx/imx8m/imximage.cfg > @@ -1,17 +1,11 @@ > /* SPDX-License-Identifier: GPL-2.0+ */ > /* > - * Copyright 2018 NXP > + * Copyright 2018-2021 NXP > */ > > #define __ASSEMBLY__ > > FIT > BOOT_FROMsd > -SIGNED_HDMI signed_hdmi_imx8m.bin > -LOADER spl/u-boot-spl-ddr.bin 0x7E1000 > -SECOND_LOADERu-boot.itb 0x4020 0x6 > - > -DDR_FW lpddr4_pmu_train_1d_imem.bin > -DDR_FW lpddr4_pmu_train_1d_dmem.bin > -DDR_FW lpddr4_pmu_train_2d_imem.bin > -DDR_FW lpddr4_pmu_train_2d_dmem.bin > +SIGNED_HDMI signed_hdmi.bin > +LOADER mkimage.flash.mkimage 0x7e1000 > diff --git a/board/freescale/imx8mq_evk/Kconfig > b/board/freescale/imx8mq_evk/Kconfig > index a7c49744b3..c4d20ad7c7 100644 > --- a/board/freescale/imx8mq_evk/Kconfig > +++ b/board/freescale/imx8mq_evk/Kconfig > @@ -10,6 +10,6 @@ config SYS_CONFIG_NAME > default "imx8mq_evk" > > config IMX_CONFIG > - default "board/freescale/imx8mq_evk/imximage.cfg" > + default "arch/arm/mach-imx/imx8m/imximage.cfg" > > endif > diff --git a/board/freescale/imx8mq_evk/imximage.cfg > b/board/freescale/imx8mq_evk/imximage.cfg > deleted file mode 100644 > index 74f12b30d2..00 > --- a/board/freescale/imx8mq_evk/imximage.cfg > +++ /dev/null > @@ -1,11 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0+ */ > -/* > - * Copyright 2021 NXP > - */ > - > -#define __ASSEMBLY__ > - > -FIT > -BOOT_FROMsd > -SIGNED_HDMI signed_hdmi.bin > -LOADER mkimage.flash.mkimage 0x7e1000 > diff --git a/board/google/imx8mq_phanbell/Kconfig > b/board/google/imx8mq_phanbell/Kconfig > index e59b03cb17..54cfb99952 100644 > --- a/board/google/imx8mq_phanbell/Kconfig > +++ b/board/google/imx8mq_phanbell/Kconfig > @@ -10,6 +10,6 @@ config SYS_CONFIG_NAME > default "imx8mq_phanbell" > > config IMX_CONFIG > - default "board/google/imx8mq_phanbell/imximage.cfg" > + default "arch/arm/mach-imx/imx8m/imximage.cfg" > > endif > diff --git a/board/google/imx8mq_phanbell/imximage.cfg > b/board/google/imx8mq_phanbell/imximage.cfg > deleted file mode 100644 > index 74f12b30d2..00 > --- a/board/google/imx8mq_phanbell/imximage.cfg > +++ /dev/null > @@ -1,11 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0+ */ > -/* > - * Copyright 2021 NXP > - */ > - > -#define __ASSEMBLY__ > - > -FIT > -BOOT_FROMsd > -SIGNED_HDMI signed_hdmi.bin > -LOADER mkimage.flash.mkimage 0x7e1000 > diff --git a/board/technexion/pico-imx8mq/Kconfig > b/board/technexion/pico-imx8mq/Kconfig > index 97655517d8..628b051149 100644 > --- a/board/technexion/pico-imx8mq/Kconfig > +++ b/board/technexion/pico-imx8mq/Kconfig > @@ -10,6 +10,6 @@ config SYS_CONFIG_NAME > default "pico-imx8mq" > > config IMX_CONFIG > - default "board/technexion/pico-imx8mq/imximage.cfg" > + default "arch/arm/mach-imx/imx8m/imximage.cfg" > > endif > diff --git a/board/technexion/pico-imx8mq/imximage.cfg > b/board/technexion/pico-imx8mq/imximage.cfg > deleted file mode 100644 > index 74f12b30d2..00 > --- a/board/technexion/pico-imx8mq/imximage.cfg > +++ /dev/null > @@ -1,11 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0+ */ > -/* > - * Copyright 2021 NXP > - */ > - > -#define __ASSEMBLY__ > - > -FIT > -BOOT_FROMsd > -SIGNED_HDMI signed_hdmi.bin > -LOADER mkimage.flash.mkimage 0x7e1000 > -- > 2.30.0 >
Re: [PATCH V3 3/5] imx: pico-imx8mq: switch to use binman
On Fri, Oct 22, 2021 at 10:42:18AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> Switch to use binman to pack images
Reviewed-by: Patrick Wildt
> Signed-off-by: Peng Fan
> ---
> arch/arm/dts/imx8mq-pico-pi.dts | 1 +
> arch/arm/mach-imx/imx8m/Kconfig | 1 +
> board/technexion/pico-imx8mq/Kconfig | 2 +-
> board/technexion/pico-imx8mq/imximage.cfg | 11 +++
> configs/pico-imx8mq_defconfig | 2 +-
> 5 files changed, 15 insertions(+), 2 deletions(-)
> create mode 100644 board/technexion/pico-imx8mq/imximage.cfg
>
> diff --git a/arch/arm/dts/imx8mq-pico-pi.dts b/arch/arm/dts/imx8mq-pico-pi.dts
> index d2af18ad0e..8ed6e9166b 100644
> --- a/arch/arm/dts/imx8mq-pico-pi.dts
> +++ b/arch/arm/dts/imx8mq-pico-pi.dts
> @@ -9,6 +9,7 @@
> /dts-v1/;
>
> #include "imx8mq.dtsi"
> +#include "imx8mq-u-boot.dtsi"
>
> / {
> model = "TechNexion PICO-PI-8M";
> diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
> index b453e5a7da..707d2d5f4b 100644
> --- a/arch/arm/mach-imx/imx8m/Kconfig
> +++ b/arch/arm/mach-imx/imx8m/Kconfig
> @@ -107,6 +107,7 @@ config TARGET_IMX8MP_EVK
>
> config TARGET_PICO_IMX8MQ
> bool "Support Technexion Pico iMX8MQ"
> + select BINMAN
> select IMX8MQ
> select IMX8M_LPDDR4
>
> diff --git a/board/technexion/pico-imx8mq/Kconfig
> b/board/technexion/pico-imx8mq/Kconfig
> index 628b051149..97655517d8 100644
> --- a/board/technexion/pico-imx8mq/Kconfig
> +++ b/board/technexion/pico-imx8mq/Kconfig
> @@ -10,6 +10,6 @@ config SYS_CONFIG_NAME
> default "pico-imx8mq"
>
> config IMX_CONFIG
> - default "arch/arm/mach-imx/imx8m/imximage.cfg"
> + default "board/technexion/pico-imx8mq/imximage.cfg"
>
> endif
> diff --git a/board/technexion/pico-imx8mq/imximage.cfg
> b/board/technexion/pico-imx8mq/imximage.cfg
> new file mode 100644
> index 00..74f12b30d2
> --- /dev/null
> +++ b/board/technexion/pico-imx8mq/imximage.cfg
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2021 NXP
> + */
> +
> +#define __ASSEMBLY__
> +
> +FIT
> +BOOT_FROMsd
> +SIGNED_HDMI signed_hdmi.bin
> +LOADER mkimage.flash.mkimage 0x7e1000
> diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
> index b90a492424..a25baf71dc 100644
> --- a/configs/pico-imx8mq_defconfig
> +++ b/configs/pico-imx8mq_defconfig
> @@ -17,7 +17,7 @@ CONFIG_SYS_LOAD_ADDR=0x4048
> CONFIG_FIT=y
> CONFIG_FIT_EXTERNAL_OFFSET=0x3000
> CONFIG_SPL_LOAD_FIT=y
> -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
> +# CONFIG_USE_SPL_FIT_GENERATOR is not set
> CONFIG_BOARD_EARLY_INIT_F=y
> CONFIG_BOARD_LATE_INIT=y
> CONFIG_SPL_BOARD_INIT=y
> --
> 2.30.0
>
Re: [PATCH V3 2/5] imx: imx8mq_phanbell: switch to binman
On Fri, Oct 22, 2021 at 10:42:17AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> Switch to binman to pack images
Reviewed-by: Patrick Wildt
> Signed-off-by: Peng Fan
> ---
> arch/arm/dts/imx8mq-phanbell-u-boot.dtsi | 2 ++
> arch/arm/mach-imx/imx8m/Kconfig | 7 ---
> board/google/imx8mq_phanbell/Kconfig | 2 +-
> board/google/imx8mq_phanbell/imximage.cfg | 11 +++
> configs/imx8mq_phanbell_defconfig | 2 +-
> 5 files changed, 19 insertions(+), 5 deletions(-)
> create mode 100644 board/google/imx8mq_phanbell/imximage.cfg
>
> diff --git a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
> b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
> index 4712cf6a44..a65a942ee7 100644
> --- a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
> @@ -1,5 +1,7 @@
> // SPDX-License-Identifier: (GPL-2.0 OR MIT)
>
> +#include "imx8mq-u-boot.dtsi"
> +
> _usdhc2_vmmc {
> u-boot,off-on-delay-us = <2>;
> };
> diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
> index c556e712b7..b453e5a7da 100644
> --- a/arch/arm/mach-imx/imx8m/Kconfig
> +++ b/arch/arm/mach-imx/imx8m/Kconfig
> @@ -41,9 +41,10 @@ config TARGET_IMX8MQ_EVK
> select IMX8M_LPDDR4
>
> config TARGET_IMX8MQ_PHANBELL
> -bool "imx8mq_phanbell"
> -select IMX8MQ
> -select IMX8M_LPDDR4
> + bool "imx8mq_phanbell"
> + select BINMAN
> + select IMX8MQ
> + select IMX8M_LPDDR4
>
> config TARGET_IMX8MM_EVK
> bool "imx8mm LPDDR4 EVK board"
> diff --git a/board/google/imx8mq_phanbell/Kconfig
> b/board/google/imx8mq_phanbell/Kconfig
> index 54cfb99952..e59b03cb17 100644
> --- a/board/google/imx8mq_phanbell/Kconfig
> +++ b/board/google/imx8mq_phanbell/Kconfig
> @@ -10,6 +10,6 @@ config SYS_CONFIG_NAME
> default "imx8mq_phanbell"
>
> config IMX_CONFIG
> - default "arch/arm/mach-imx/imx8m/imximage.cfg"
> + default "board/google/imx8mq_phanbell/imximage.cfg"
>
> endif
> diff --git a/board/google/imx8mq_phanbell/imximage.cfg
> b/board/google/imx8mq_phanbell/imximage.cfg
> new file mode 100644
> index 00..74f12b30d2
> --- /dev/null
> +++ b/board/google/imx8mq_phanbell/imximage.cfg
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2021 NXP
> + */
> +
> +#define __ASSEMBLY__
> +
> +FIT
> +BOOT_FROMsd
> +SIGNED_HDMI signed_hdmi.bin
> +LOADER mkimage.flash.mkimage 0x7e1000
> diff --git a/configs/imx8mq_phanbell_defconfig
> b/configs/imx8mq_phanbell_defconfig
> index 911c3391db..a8eab85b4a 100644
> --- a/configs/imx8mq_phanbell_defconfig
> +++ b/configs/imx8mq_phanbell_defconfig
> @@ -18,7 +18,7 @@ CONFIG_SYS_LOAD_ADDR=0x4048
> CONFIG_FIT=y
> CONFIG_FIT_EXTERNAL_OFFSET=0x3000
> CONFIG_SPL_LOAD_FIT=y
> -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
> +# CONFIG_USE_SPL_FIT_GENERATOR is not set
> CONFIG_SD_BOOT=y
> CONFIG_BOARD_EARLY_INIT_F=y
> CONFIG_SPL_BOARD_INIT=y
> --
> 2.30.0
>
Re: [PATCH V3 1/5] imx: imx8mq_evk: switch to binman
On Fri, Oct 22, 2021 at 10:42:16AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> Switch to use binman to pack images
>
> Signed-off-by: Peng Fan
I'm unsure how to reply to this. On the one hand I really like to see
this go in, on the other hand this changes the expectation of what
flash.bin is. We had the same discussion for i.MX8MM.
Because historically, flash.bin is SPL+U-Boot.itb, and for i.MX8MM
people have changed the binman config to generate a single bootable
file again: 028abfd9b1576b45cf756b9a0c978cfe17906314
So, I would ask you to adjust the imx8mq-u-boot.dts changes in the same
way as done for i.MX8MM. You should be able to see the differences
by diffing e.g. these files:
diff -u arch/arm/dts/imx8mq-u-boot.dtsi arch/arm/dts/imx8mm-evk-u-boot.dtsi
> ---
> arch/arm/dts/imx8mq-evk-u-boot.dtsi | 2 +
> arch/arm/dts/imx8mq-u-boot.dtsi | 122
> arch/arm/mach-imx/imx8m/Kconfig | 1 +
> board/freescale/imx8mq_evk/Kconfig | 2 +-
> board/freescale/imx8mq_evk/imximage.cfg | 11 +++
> configs/imx8mq_evk_defconfig| 2 +-
> 6 files changed, 138 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/dts/imx8mq-u-boot.dtsi
> create mode 100644 board/freescale/imx8mq_evk/imximage.cfg
>
> diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> index 2cfc12b7e0..6f9c81462e 100644
> --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> @@ -1,5 +1,7 @@
> // SPDX-License-Identifier: (GPL-2.0 OR MIT)
>
> +#include "imx8mq-u-boot.dtsi"
> +
> {
> mmc-hs400-1_8v;
> };
> diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
> new file mode 100644
> index 00..2c10e9b645
> --- /dev/null
> +++ b/arch/arm/dts/imx8mq-u-boot.dtsi
> @@ -0,0 +1,122 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2021 NXP
> + */
> +
> +/ {
> + binman: binman {
> + multiple-images;
> + };
> +
> +};
> +
> + {
> + u-boot-spl-ddr {
> + filename = "u-boot-spl-ddr.bin";
> + pad-byte = <0xff>;
> + align-size = <4>;
> + align = <4>;
> +
> + u-boot-spl {
> + align-end = <4>;
> + };
> +
> + blob_1: blob-ext@1 {
> + filename = "lpddr4_pmu_train_1d_imem.bin";
> + size = <0x8000>;
> + };
> +
> + blob_2: blob-ext@2 {
> + filename = "lpddr4_pmu_train_1d_dmem.bin";
> + size = <0x4000>;
> + };
> +
> + blob_3: blob-ext@3 {
> + filename = "lpddr4_pmu_train_2d_imem.bin";
> + size = <0x8000>;
> + };
> +
> + blob_4: blob-ext@4 {
> + filename = "lpddr4_pmu_train_2d_dmem.bin";
> + size = <0x4000>;
> + };
> + };
> +
> + signed_hdmi {
> + filename = "signed_hdmi.bin";
> +
> + blob_5: blob-ext@5 {
> + filename = "signed_hdmi_imx8m.bin";
> + };
> + };
> +
> + flash {
> + mkimage {
> + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
> 0x7e1000";
> +
> + blob {
> + filename = "u-boot-spl-ddr.bin";
> + };
> +
> + };
> +
> + };
> +
> + itb {
> + filename = "u-boot.itb";
> +
> + fit {
> + description = "Configuration to load ATF before U-Boot";
> + #address-cells = <1>;
> + fit,external-offset = ;
> +
> + images {
> + uboot {
> + description = "U-Boot (64-bit)";
> + type = "standalone";
> + arch = "arm64";
> + compression = "none";
> + load = ;
> +
> + uboot_blob: blob-ext {
> + filename = "u-boot-nodtb.bin";
> + };
> + };
> +
> + atf {
> + description = "ARM Trusted Firmware";
> + type = "firmware";
> + arch = "arm64";
> + compression = "none";
> + load = <0x91>;
> + entry = <0x91>;
> +
> + atf_blob: blob-ext {
> + filename = "bl31.bin";
> + };
> + };
> +
> +
Re: [PATCH v2 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
On Wed, Nov 10, 2021 at 02:26:54PM -0800, Vagrant Cascadian wrote: > On 2021-09-02, Patrick Wildt wrote: > > The MNT Reform 2 is a modular DIY laptop. In its initial version it > > is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been > > lifted from BoundaryDevices official U-Boot downstream project. > > Thanks for working on this! > > I'm struggling a bit getting it to actually boot; how is this supposed > to be installed to the device? > > I've built with the two applied patches on a patched v2021.10, copying > various firmware parts from: > > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/bl31-iMX8MQ.bin > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_1d_dmem.bin > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_1d_imem.bin > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_2d_dmem.bin > > https://source.mnt.re/reform/reform-boundary-uboot/-/blob/master/lpddr4_pmu_train_2d_imem.bin > > export BL31=bl31-iMX8MQ.bin > > make imx8mq_reform2_defconfig > make > make flash.bin > > Then grepping various other README's from imx8mq devices, I tried two > different processes: > > dd if=flash.bin of=/dev/sd[x] bs=1K seek=33 You only need to dd flash.bin, the command looks fine. > and: > > dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync > dd if=u-boot.itb of=/dev/sd[x] bs=1024 seek=384 conv=sync > > Both simply hanging with: > > U-Boot SPL 2021.10 (Jan 01 1970 - 00:00:01 +) There have been a few changes in U-Boot since I sent my patchset, it's possible the diff by itself might not be enough. I will send out a new patchset soon, but the move to Binman doesn't work for me yet. It's weird, because I don't see a diff to other i.MX8MQ platforms, so I'm still debugging that. Maybe the other i.MX8MQ boards don't work with Binman either? Keep note that the build procedure (how to supply bl31) changes once Binman is used. > Is the flash.bin step unecessary? I see DDR timing code in the patch > series; are corresponding lpddr4*.bin no longer necessary? The flash.bin has all bits: U-Boot, U-Boot SPL, lpddr4*.bin and bl31.bin lpddr4*.bin is the firmware for the DDR controller. So you need the timing information *and* the firmware. > I also tried building with an old version of arm-trusted-firmware > (v2.2), as that was the most recent upstream version that successfully > built. This seems to be a fork of ATF that has support for iMX8MQ, but > it is unclear which branch/tag/etc. should be used with the mnt/reform: > > https://source.codeaurora.org/external/imx/imx-atf Not sure right now, but I think I was using the one that's build on OpenBSD-current, which seems to be arm-trusted-firmware 2.5. I'll check it. > It would be nice to include a board README in the next patch revision to > spell out some of the details of exactly which other projects and > versions/comments/branches are expected to work with MNT Reform2. > This is nothing specific to the MNT Reform2. It's the same for all i.MX8MQ boards. ATF+DDR+U-Boot have to work together, and it doesn't matter which board it is. Hence I don't believe providing that kind information in a Reform-specific README makes sense. Patrick > > I would be nice if you could CC me on future patch series revisions to > be able to test. Thanks! > > > live well, > vagrant > > > > Signed-off-by: Patrick Wildt > > --- > > arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 + > > arch/arm/mach-imx/imx8m/Kconfig |6 + > > board/mntre/imx8mq_reform2/Kconfig| 12 + > > board/mntre/imx8mq_reform2/MAINTAINERS|7 + > > board/mntre/imx8mq_reform2/Makefile | 12 + > > board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213 > > board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 + > > .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++ > > board/mntre/imx8mq_reform2/spl.c | 260 + > > configs/imx8mq_reform2_defconfig | 67 ++ > > include/configs/imx8mq_reform2.h | 151 +++ > > 11 files changed, 1848 insertions(+) > > create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi > > create mode 100644 board/mntre/imx8mq_reform2/Kconfig > > create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS > > create mode 100644 board/mntre/imx8mq_reform2/Makefile > > create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c > > create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c > > create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h > > create mode 100644 board/mntre/imx8mq_reform2/spl.c > > create mode 100644 configs/imx8mq_reform2_defconfig > > create mode 100644 include/configs/imx8mq_reform2.h
Re: [PATCH v2 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
Am Fri, Sep 03, 2021 at 05:58:07PM -0300 schrieb Fabio Estevam: > Hi Patrick, > > On Fri, Sep 3, 2021 at 11:30 AM Patrick Wildt wrote: > > > U-Boot SPL 2021.10-rc3-00023-g2c634e01b6-dirty (Sep 03 2021 - 18:22:04 > > +0200) > > Normal Boot > > Could not get FIT buffer of 686592 bytes > > check CONFIG_SYS_SPL_MALLOC_SIZE > > > > Is there anything specific I need to change to make that work? > > Does it help if you increase CONFIG_SYS_SPL_MALLOC_SIZE to SZ_1M? I think the issue is something else. The old .itb used external data, but the one with binman seems to not make use of that. It's weird though because fit,external-offset = ; is set and CONFIG_FIT_EXTERNAL_OFFSET is 0x3000. So, even though binman seems to be calling mkimage -E -p 0x3000, the u-boot.itb does *not* use external data.
Re: [PATCH v2 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
Am Fri, Sep 03, 2021 at 08:25:39PM +0200 schrieb Heiko Thiery: > Hi Patrick, > > Am Fr., 3. Sept. 2021 um 16:30 Uhr schrieb Patrick Wildt : > > > > Am Fri, Sep 03, 2021 at 11:01:06AM +0200 schrieb Heiko Thiery: > > > Hi Patrick, > > > > > > Am Do., 2. Sept. 2021 um 23:44 Uhr schrieb Patrick Wildt > > > : > > > > > > > > The MNT Reform 2 is a modular DIY laptop. In its initial version it > > > > is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been > > > > lifted from BoundaryDevices official U-Boot downstream project. > > > > > > > > Signed-off-by: Patrick Wildt > > > > > > I just sent a patch to add board support for the Kontron pitx-imx8m > > > that is also based on the imx8mq SOC. I already switched the flash.bin > > > generation to binman. Maybe you can use this patchset as a template > > > and also switch to binman for that board. > > > > > > -- > > > Heiko > > > > Hi Heiko, > > > > I think that's a good idea. But I seem to be having issues: > > > > U-Boot SPL 2021.10-rc3-00023-g2c634e01b6-dirty (Sep 03 2021 - 18:22:04 > > +0200) > > Normal Boot > > Could not get FIT buffer of 686592 bytes > > check CONFIG_SYS_SPL_MALLOC_SIZE > > I'm not sure, but could you check that no old fragments are left in > the output folder before building the flash.bin with binman. I can > remember that I had also some strange issues while switching to > binman. No change. Is your u-boot.itb that much smaller? -rw-r--r-- 1 patrick patrick 670K Sep 4 00:50 imx8mq_reform2/u-boot.itb
Re: [PATCH v2 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
Am Fri, Sep 03, 2021 at 11:01:06AM +0200 schrieb Heiko Thiery: > Hi Patrick, > > Am Do., 2. Sept. 2021 um 23:44 Uhr schrieb Patrick Wildt : > > > > The MNT Reform 2 is a modular DIY laptop. In its initial version it > > is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been > > lifted from BoundaryDevices official U-Boot downstream project. > > > > Signed-off-by: Patrick Wildt > > I just sent a patch to add board support for the Kontron pitx-imx8m > that is also based on the imx8mq SOC. I already switched the flash.bin > generation to binman. Maybe you can use this patchset as a template > and also switch to binman for that board. > > -- > Heiko Hi Heiko, I think that's a good idea. But I seem to be having issues: U-Boot SPL 2021.10-rc3-00023-g2c634e01b6-dirty (Sep 03 2021 - 18:22:04 +0200) Normal Boot Could not get FIT buffer of 686592 bytes check CONFIG_SYS_SPL_MALLOC_SIZE Is there anything specific I need to change to make that work? Otherwise we can probably also switch to binman after this patchset is merged. Patrick
[PATCH v2 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 +
arch/arm/mach-imx/imx8m/Kconfig |6 +
board/mntre/imx8mq_reform2/Kconfig| 12 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 67 ++
include/configs/imx8mq_reform2.h | 151 +++
11 files changed, 1848 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..7e928e875b
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+ {
+ mmc-hs400-1_8v;
+};
+
+ {
+ cd-gpios = < 12 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index ccaf106be5..44582ad152 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -44,6 +44,11 @@ config TARGET_IMX8MQ_PHANBELL
select IMX8MQ
select IMX8M_LPDDR4
+config TARGET_IMX8MQ_REFORM2
+ bool "imx8mq_reform2"
+ select IMX8MQ
+ select IMX8M_LPDDR4
+
config TARGET_IMX8MM_EVK
bool "imx8mm LPDDR4 EVK board"
select BINMAN
@@ -150,6 +155,7 @@ source "board/freescale/imx8mn_evk/Kconfig"
source "board/freescale/imx8mp_evk/Kconfig"
source "board/gateworks/venice/Kconfig"
source "board/google/imx8mq_phanbell/Kconfig"
+source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
source "board/ronetix/imx8mq-cm/Kconfig"
diff --git a/board/mntre/imx8mq_reform2/Kconfig
b/board/mntre/imx8mq_reform2/Kconfig
new file mode 100644
index 00..8070ef377b
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_IMX8MQ_REFORM2
+
+config SYS_BOARD
+ default "imx8mq_reform2"
+
+config SYS_VENDOR
+ default "mntre"
+
+config SYS_CONFIG_NAME
+ default "imx8mq_reform2"
+
+endif
diff --git a/board/mntre/imx8mq_reform2/MAINTAINERS
b/board/mntre/imx8mq_reform2/MAINTAINERS
new file mode 100644
index 00..946f287ecf
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/MAINTAINERS
@@ -0,0 +1,7 @@
+REFORM2 IMX8MQ BOARD
+M: Lukas F. Hartmann
+M: Patrick Wildt
+S: Maintained
+F: board/mntre/imx8mq_reform2/
+F: include/configs/imx8mq_reform2.h
+F: configs/imx8mq_reform2_defconfig
diff --git a/board/mntre/imx8mq_reform2/Makefile
b/board/mntre/imx8mq_reform2/Makefile
new file mode 100644
index 00..2efd56bb4a
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mq_reform2.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/board/mntre/imx8mq_reform2/imx8mq_reform2.c
b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
new file mode 100644
index 00..f7cb32dd98
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ * Copyright (C) 2018, Boundary Devices
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+
+#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
+
+static iomux_v3_cfg_t const wdog_pads[] = {
+ IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_B
[PATCH v2 1/2] arm: dts: imx8mq: add MNT Reform 2
Signed-off-by: Patrick Wildt
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mq-mnt-reform2.dts | 213
arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 ++
3 files changed, 489 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts
create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fc16a57e60..ecd4fc0a19 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -884,6 +884,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-evk.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
+ imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-evk.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mq-mnt-reform2.dts
b/arch/arm/dts/imx8mq-mnt-reform2.dts
new file mode 100644
index 00..2535268f09
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2.dts
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/*
+ * Copyright 2019-2021 MNT Research GmbH
+ * Copyright 2021 Lucas Stach
+ */
+
+/dts-v1/;
+
+#include "imx8mq-nitrogen-som.dtsi"
+
+/ {
+ model = "MNT Reform 2";
+ compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som",
"fsl,imx8mq";
+
+ pcie1_refclk: clock-pcie1-refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ };
+
+ reg_main_5v: regulator-main-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ };
+
+ reg_main_3v3: regulator-main-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ reg_main_usb: regulator-main-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_PWR";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_main_5v>;
+ };
+
+ sound {
+ compatible = "fsl,imx-audio-wm8960";
+ audio-cpu = <>;
+ audio-codec = <>;
+ audio-routing =
+ "Headphone Jack", "HP_L",
+ "Headphone Jack", "HP_R",
+ "Ext Spk", "SPK_LP",
+ "Ext Spk", "SPK_LN",
+ "Ext Spk", "SPK_RP",
+ "Ext Spk", "SPK_RN",
+ "LINPUT1", "Mic Jack",
+ "Mic Jack", "MICB",
+ "LINPUT2", "Line In Jack",
+ "RINPUT2", "Line In Jack";
+ model = "wm8960-audio";
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c3>;
+ status = "okay";
+
+ wm8960: codec@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ clocks = < IMX8MQ_CLK_SAI2_ROOT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ };
+
+ rtc@68 {
+ compatible = "nxp,pcf8523";
+ reg = <0x68>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pcie1>;
+ reset-gpio = < 23 GPIO_ACTIVE_LOW>;
+ clocks = < IMX8MQ_CLK_PCIE2_ROOT>,
+< IMX8MQ_CLK_PCIE2_AUX>,
+< IMX8MQ_CLK_PCIE2_PHY>,
+<_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ status = "okay";
+};
+
+_1p8v {
+ vin-supply = <_main_5v>;
+};
+
+_snvs {
+ vin-supply = <_main_5v>;
+};
+
+_arm_dram {
+ vin-supply = <_main_5v>;
+};
+
+_dram_1p1v {
+ vin-supply = <_main_5v>;
+};
+
+_soc_gpu_vpu {
+ vin-supply = <_main_5v>;
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_sai2>;
+ assigned-clocks = < IMX8MQ_CLK_SAI2>;
+ assigned-clock-parents = < IMX8MQ_CLK_25M>;
+ assigned-clock-rates = <2500>;
+ fsl,sai-mclk-direction-output;
+ f
[PATCH v2 0/2] Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been lifted from BoundaryDevices official U-Boot downstream project. This U-Boot patchset supports the serial console, the SD card and eMMC, Gigabit Ethernet and USB. Changes since v2: - Synced DTS with files in Linux git repo. - Added support for USB host ports. Patrick Wildt (2): arm: dts: imx8mq: add MNT Reform 2 board: mntre: imx8mq: Add MNT Reform 2 board support arch/arm/dts/Makefile |1 + arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 + arch/arm/dts/imx8mq-mnt-reform2.dts | 213 arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 + arch/arm/mach-imx/imx8m/Kconfig |6 + board/mntre/imx8mq_reform2/Kconfig| 12 + board/mntre/imx8mq_reform2/MAINTAINERS|7 + board/mntre/imx8mq_reform2/Makefile | 12 + board/mntre/imx8mq_reform2/imx8mq_reform2.c | 213 board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 + .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++ board/mntre/imx8mq_reform2/spl.c | 260 + configs/imx8mq_reform2_defconfig | 67 ++ include/configs/imx8mq_reform2.h | 151 +++ 14 files changed, 2337 insertions(+) create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi create mode 100644 board/mntre/imx8mq_reform2/Kconfig create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS create mode 100644 board/mntre/imx8mq_reform2/Makefile create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h create mode 100644 board/mntre/imx8mq_reform2/spl.c create mode 100644 configs/imx8mq_reform2_defconfig create mode 100644 include/configs/imx8mq_reform2.h -- 2.32.0
[PATCH] mux: correct prototype for mux_control_try_select()
The macro should be passed a state, which should be passed
to the actual function. Otherwise using that macro would
yield a build error.
Signed-off-by: Patrick Wildt
---
include/mux.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/mux.h b/include/mux.h
index 23844f480a..9f80991274 100644
--- a/include/mux.h
+++ b/include/mux.h
@@ -51,7 +51,7 @@ unsigned int mux_control_states(struct mux_control *mux);
*/
int __must_check mux_control_select(struct mux_control *mux,
unsigned int state);
-#define mux_control_try_select(mux) mux_control_select(mux)
+#define mux_control_try_select(mux, state) mux_control_select(mux, state)
/**
* mux_control_deselect() - Deselect the previously selected multiplexer state.
@@ -128,7 +128,7 @@ int __must_check mux_control_select(struct mux_control *mux,
return -ENOSYS;
}
-#define mux_control_try_select(mux) mux_control_select(mux)
+#define mux_control_try_select(mux, state) mux_control_select(mux, state)
int mux_control_deselect(struct mux_control *mux)
{
--
2.32.0
Re: [PATCH 1/4] phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ
Am Tue, Jul 13, 2021 at 12:46:04PM +0200 schrieb Stefano Babic: > On 13.07.21 12:39, Marek Vasut wrote: > > On 7/13/21 7:53 AM, Stefano Babic wrote: > > > Hi Fabio, > > > > > > On 12.07.21 23:31, Fabio Estevam wrote: > > > > Hi Patrick, > > > > > > > > On Mon, Jul 12, 2021 at 11:27 AM Patrick Wildt > > > > wrote: > > > > > > > > > > Am Sun, Feb 21, 2021 at 08:26:21AM -0800 schrieb Ye Li: > > > > > > Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller. > > > > > > > > > > > > Signed-off-by: Ye Li > > > > > > > > > > Reviewed-by: Patrick Wildt > > > > > Tested-by: Patrick Wildt > > > > > > > > It seems Ye Li missed adding Marek on Cc. > > > > > > > > Could you please resend the series with Marek on Cc? > > > > > > > > > > I see that the series is already assigned to Marek: > > > > > > http://patchwork.ozlabs.org/project/uboot/list/?series=230965 > > > > > > So I guess it is enough to inform Marek (in CC) about this and he > > > can review / apply the patches without reposting. > > > > USB3 is Bin. > > Then delegate on patchwork is wrong as the patches are assigned to you. The patches contain a new PHY driver, i.MX8MQ clock init code and device tree change. So it's not really USB, it's just some work in the i.MX8MQ stuff to *enable* USB.
Re: [PATCH 4/4] imx8mq_evk: Enable the USB3.0 host port
Am Sun, Feb 21, 2021 at 08:26:24AM -0800 schrieb Ye Li: > Setup USB clock in board codes, and enable the DWC3 XHCI and > PHY drivers to make USB3.0 host port working on i.MX8MQ EVK. > > Signed-off-by: Ye Li The same change works on the MNT Reform 2 as well. Reviewed-by: Patrick Wildt > board/freescale/imx8mq_evk/imx8mq_evk.c | 4 > configs/imx8mq_evk_defconfig| 9 + > 2 files changed, 13 insertions(+) > > diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c > b/board/freescale/imx8mq_evk/imx8mq_evk.c > index 93da67d..e394805 100644 > --- a/board/freescale/imx8mq_evk/imx8mq_evk.c > +++ b/board/freescale/imx8mq_evk/imx8mq_evk.c > @@ -86,6 +86,10 @@ int board_init(void) > setup_fec(); > #endif > > +#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_DWC3) > + init_usb_clk(); > +#endif > + > return 0; > } > > diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig > index a149c1a..a644862 100644 > --- a/configs/imx8mq_evk_defconfig > +++ b/configs/imx8mq_evk_defconfig > @@ -54,3 +54,12 @@ CONFIG_DM_REGULATOR_GPIO=y > CONFIG_DM_RESET=y > CONFIG_MXC_UART=y > CONFIG_DM_THERMAL=y > +CONFIG_CMD_USB=y > +CONFIG_USB=y > +CONFIG_USB_STORAGE=y > +CONFIG_DM_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_XHCI_DWC3=y > +CONFIG_USB_DWC3=y > +CONFIG_PHY=y > +CONFIG_PHY_IMX8MQ_USB=y > -- > 2.7.4 >
Re: [PATCH 3/4] arm: imx8mq: Add USB clock init function
Am Sun, Feb 21, 2021 at 08:26:23AM -0800 schrieb Ye Li:
> Add clock function to setup relevant clocks for USB3.0 controllers and
> PHYs on i.MX8MQ
>
> Signed-off-by: Ye Li
Reviewed-by: Patrick Wildt
Tested-by: Patrick Wildt
> ---
> arch/arm/include/asm/arch-imx8m/clock.h | 1 +
> arch/arm/mach-imx/imx8m/clock_imx8mq.c | 22 ++
> 2 files changed, 23 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-imx8m/clock.h
> b/arch/arm/include/asm/arch-imx8m/clock.h
> index c545eb8..e806552 100644
> --- a/arch/arm/include/asm/arch-imx8m/clock.h
> +++ b/arch/arm/include/asm/arch-imx8m/clock.h
> @@ -257,6 +257,7 @@ u32 imx_get_uartclk(void);
> int clock_init(void);
> void init_clk_usdhc(u32 index);
> void init_uart_clk(u32 index);
> +void init_usb_clk(void);
> void init_wdog_clk(void);
> unsigned int mxc_get_clock(enum mxc_clock clk);
> int clock_enable(enum clk_ccgr_index index, bool enable);
> diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
> b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
> index 759ec6d..cccd645 100644
> --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
> +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
> @@ -393,6 +393,28 @@ void init_wdog_clk(void)
> clock_enable(CCGR_WDOG3, 1);
> }
>
> +void init_usb_clk(void)
> +{
> + if (!is_usb_boot()) {
> + clock_enable(CCGR_USB_CTRL1, 0);
> + clock_enable(CCGR_USB_CTRL2, 0);
> + clock_enable(CCGR_USB_PHY1, 0);
> + clock_enable(CCGR_USB_PHY2, 0);
> + /* 500MHz */
> + clock_set_target_val(USB_BUS_CLK_ROOT, CLK_ROOT_ON |
> + CLK_ROOT_SOURCE_SEL(1));
> + /* 100MHz */
> + clock_set_target_val(USB_CORE_REF_CLK_ROOT, CLK_ROOT_ON |
> + CLK_ROOT_SOURCE_SEL(1));
> + /* 100MHz */
> + clock_set_target_val(USB_PHY_REF_CLK_ROOT, CLK_ROOT_ON |
> + CLK_ROOT_SOURCE_SEL(1));
> + clock_enable(CCGR_USB_CTRL1, 1);
> + clock_enable(CCGR_USB_CTRL2, 1);
> + clock_enable(CCGR_USB_PHY1, 1);
> + clock_enable(CCGR_USB_PHY2, 1);
> + }
> +}
>
> void init_nand_clk(void)
> {
> --
> 2.7.4
>
Re: [PATCH 2/4] arm: dts: imx8mq: Add alias for two usb controllers
Am Sun, Feb 21, 2021 at 08:26:22AM -0800 schrieb Ye Li:
> Add alias for two DWC3 usb controllers to fix the seq index.
>
> Signed-off-by: Ye Li
> ---
> arch/arm/dts/imx8mq.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
> index a841a02..a44f729 100644
> --- a/arch/arm/dts/imx8mq.dtsi
> +++ b/arch/arm/dts/imx8mq.dtsi
> @@ -39,6 +39,8 @@
> spi0 =
> spi1 =
> spi2 =
> + usb0 = _dwc3_0;
> + usb1 = _dwc3_1;
I'm not sure what the policy is. Should changes to the device tree be
put into the u-boot.dtsi? At least it isn't part of torvald's master
branch. In any case:
Tested-by: Patrick Wildt
> };
>
> ckil: clock-ckil {
> --
> 2.7.4
>
Re: [PATCH 1/4] phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ
Am Sun, Feb 21, 2021 at 08:26:21AM -0800 schrieb Ye Li:
> Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller.
>
> Signed-off-by: Ye Li
Reviewed-by: Patrick Wildt
Tested-by: Patrick Wildt
> ---
> drivers/phy/Kconfig | 7 ++
> drivers/phy/Makefile | 1 +
> drivers/phy/phy-imx8mq-usb.c | 197
> +++
> 3 files changed, 205 insertions(+)
> create mode 100644 drivers/phy/phy-imx8mq-usb.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 008186a..09cb744 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -268,5 +268,12 @@ config PHY_MTK_TPHY
> multi-ports is first version, otherwise is second veriosn,
> so you can easily distinguish them by banks layout.
>
> +config PHY_IMX8MQ_USB
> + bool "NXP i.MX8MQ USB PHY Driver"
> + depends on PHY
> + depends on IMX8MQ
> + help
> + Support the USB3.0 PHY in NXP i.MX8MQ SoC
> +
> source "drivers/phy/rockchip/Kconfig"
> endmenu
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index 3c4a673..c6ad3b1 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -31,3 +31,4 @@ obj-$(CONFIG_MT7620_USB_PHY) += mt7620-usb-phy.o
> obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o
> obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o
> obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
> +obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
> diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c
> new file mode 100644
> index 000..afbc7ad
> --- /dev/null
> +++ b/drivers/phy/phy-imx8mq-usb.c
> @@ -0,0 +1,197 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2021 NXP
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define PHY_CTRL00x0
> +#define PHY_CTRL0_REF_SSP_EN BIT(2)
> +#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
> +#define PHY_CTRL0_FSEL_24M 0x2a
> +#define PHY_CTRL0_FSEL_100M 0x27
> +#define PHY_CTRL0_SSC_RANGE_MASK GENMASK(23, 21)
> +#define PHY_CTRL0_SSC_RANGE_4003PPM (0x2 << 21)
> +
> +#define PHY_CTRL10x4
> +#define PHY_CTRL1_RESET BIT(0)
> +#define PHY_CTRL1_COMMONONN BIT(1)
> +#define PHY_CTRL1_ATERESET BIT(3)
> +#define PHY_CTRL1_DCDENB BIT(17)
> +#define PHY_CTRL1_CHRGSELBIT(18)
> +#define PHY_CTRL1_VDATSRCENB0BIT(19)
> +#define PHY_CTRL1_VDATDETENB0BIT(20)
> +
> +#define PHY_CTRL20x8
> +#define PHY_CTRL2_TXENABLEN0 BIT(8)
> +#define PHY_CTRL2_OTG_DISABLEBIT(9)
> +
> +#define PHY_CTRL30xc
> +#define PHY_CTRL3_COMPDISTUNE_MASK GENMASK(2, 0)
> +#define PHY_CTRL3_TXPREEMP_TUNE_MASK GENMASK(16, 15)
> +#define PHY_CTRL3_TXPREEMP_TUNE_SHIFT15
> +#define PHY_CTRL3_TXRISE_TUNE_MASK GENMASK(21, 20)
> +#define PHY_CTRL3_TXRISE_TUNE_SHIFT 20
> +/* : +24% ... : -6% step: 2% */
> +#define PHY_CTRL3_TXVREF_TUNE_MASK GENMASK(25, 22)
> +#define PHY_CTRL3_TXVREF_TUNE_SHIFT 22
> +#define PHY_CTRL3_TX_VBOOST_LEVEL_MASK GENMASK(31, 29)
> +#define PHY_CTRL3_TX_VBOOST_LEVEL_SHIFT 29
> +
> +#define PHY_CTRL40x10
> +#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(20, 15)
> +#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_SHIFT 15
> +
> +#define PHY_CTRL50x14
> +#define PHY_CTRL5_DMPWD_OVERRIDE_SEL BIT(23)
> +#define PHY_CTRL5_DMPWD_OVERRIDE BIT(22)
> +#define PHY_CTRL5_DPPWD_OVERRIDE_SEL BIT(21)
> +#define PHY_CTRL5_DPPWD_OVERRIDE BIT(20)
> +#define PHY_CTRL5_PCS_TX_SWING_FULL_MASK GENMASK(6, 0)
> +
> +#define PHY_CTRL60x18
> +#define PHY_CTRL6_RXTERM_OVERRIDE_SELBIT(29)
> +#define PHY_CTRL6_ALT_CLK_EN BIT(1)
> +#define PHY_CTRL6_ALT_CLK_SELBIT(0)
> +
> +#define PHY_STS0 0x40
> +#define PHY_STS0_OTGSESSVLD BIT(7)
> +#define PHY_STS0_CHGDET BIT(4)
> +#define PHY_STS0_FSVPLUS BIT(3)
> +#define PHY_STS0_FSVMINUSBIT(2)
> +
> +struct imx8mq_usb_phy {
> +#if CONFIG_IS_ENABLED(CLK)
> + struct clk phy_clk;
> +#endif
> + void __iomem *base;
> +};
> +
> +static const struct udevice_id imx8mq_usb_phy_of_match[] = {
> + {
> + .compatible = "fsl,imx8mq-usb-phy",
> + },
> + {},
> +};
> +
> +static int imx8mq_usb_phy_init(struct phy *u
Re: [EXT] Re: [PATCH 4/4] imx8mq_evk: Enable the USB3.0 host port
Am Mon, Jul 12, 2021 at 10:28:25AM -0300 schrieb Fabio Estevam: > Hi Patrick, > > On Sat, Jul 10, 2021 at 8:35 PM Patrick Wildt wrote: > > > is this patchset still being reviewed? I think the discussion has moved > > to some SD card problem, which is fixed now? Would be nice if USB 3.0 > > I think you are referring to > https://source.denx.de/u-boot/u-boot/-/commit/63756575b42b8b4fb3f59cbbf0cedf03331bc2d2 > > If so, I had to revert it as it caused boot time regression (10s in > SPL + 10 s in U-Boot proper) in several > i.MX boards: > > https://source.denx.de/u-boot/u-boot/-/commit/f132aab403271ff00c0cfdd3af6504e87c7d0aaf > > I haven't tested USB 3.0 in mainline U-Boot on imx8mq-evk. Maybe Peng > or Ye Li can comment. Hi Fabio, I cherry-picked this USB 3.0 series from Ye Ling on to the MNT Reform2 patchset I sent out, and I'm happy with the results. Best regards, Patrick
Re: [EXT] Re: [PATCH 4/4] imx8mq_evk: Enable the USB3.0 host port
Am Wed, Mar 03, 2021 at 08:53:52AM + schrieb Bough Chen:
> > -Original Message-
> > From: Ye Li
> > Sent: 2021年2月27日 14:05
> > To: feste...@gmail.com; Bough Chen
> > Cc: Peng Fan ; u-boot@lists.denx.de; dl-uboot-imx
> > ; sba...@denx.de
> > Subject: Re: [EXT] Re: [PATCH 4/4] imx8mq_evk: Enable the USB3.0 host port
> >
> > Hi Fabio,
> >
> > On Thu, 2021-02-25 at 10:49 -0300, Fabio Estevam wrote:
> > > Caution: EXT Email
> > >
> > > Hi Ye Li,
> > >
> > > On Thu, Feb 25, 2021 at 10:34 AM Ye Li wrote:
> > >
> > > >
> > > > Sure, I have tested it on 8mq evk. I can reproduce the two issues
> > > > you met.
> > > > The first issue is caused by the ALIGN. The implementation of
> > > > standard ALIGN requires the aligned size to be power of 2. But the
> > > > ALIGN in imx8mimage does not have this requirement. So below result
> > > > is wrong by using the standard ALIGN. Your fix should be OK for this
> > > > issue.
> > > Good, could you please reply to my ALIGN macro patch with your
> > > Tested-by tag then?
> > >
> > Replied it.
> >
> > > >
> > > > For the second issue, I did not debug into it. But our vendor tree
> > > > also uses off-on-delay-us in both u-boot and kernel. So it is likely
> > > > caused by other change.
> > > Considering we are already at 2021.04-rc2, I think it would be safer
> > > to go with my patch that removes off-on-delay-us.
> > >
> > > What do you think?
> > >
> > > Thanks
> > My debug shows the issue is triggered by below commit:
> >
> > commit 9098682200e6cca4b776638a51200dafa16f50fb
> > Author: Haibo Chen
> > Date: Tue Sep 22 18:11:43 2020 +0800
> >
> > mmc: fsl_esdhc_imx: remove the 1ms delay before sending command
> >
> > This 1ms delay before sending command already exist from the beginning
> > of the fsl_esdhc driver added in year 2008. Now this driver has been
> > split for two files: fsl_esdhc.c and fsl_esdhc_imx.c.
> > fsl_esdhc_imx.c
> > only for i.MX series. i.MX series esdhc/usdhc do not need this 1ms delay
> > before sending any command. So remove this 1ms, this will save a lot
> > time if handling a large mmc data.
> >
> > Signed-off-by: Haibo Chen
> >
> >
> > The first "go idle" command in mmc_get_op_cond seems not put SD card to
> > idle status, but if adding a delay before it (like 1ms delay), then
> > everything
> > works. This commit removed 1ms delay in sending command, so the issue is
> > triggered. The root cause might be "startup-delay-us"
> > needed for this regulator to reach a threshold voltage for SD working.
> > Below change also can fix the issue.
> >
> > --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > @@ -1,6 +1,7 @@
> > // SPDX-License-Identifier: (GPL-2.0 OR MIT)
> >
> > _usdhc2_vmmc {
> > + startup-delay-us = <1000>;
> > u-boot,off-on-delay-us = <2>;
> > };
> >
> >
> > @Haibo, Could you help looking into the issue. What's your opinion to add
> > the
> > startup-delay-us or revert your commit?
> >
>
> Hi Fabio,
>
> I co-debug with Ye, and find the issue is also related with clock
> enable/disable. For current logic on imx usdhc, hardware automatically gate
> off the card clock when idle.
> So before the first command "go idle", there is no clock on the clock line,
> which not align with the sd spec.
> Refer to SD3.0 spec 6.4.1 Power UP
> The host shall supply power to the card so that the voltage is reached to
> Vdd_min within 250ms and
> start to supply at least 74 SD clocks to the SD card with keeping CMD line to
> high. In case of SPI
> mode, CS shall be held to high during 74 clock cycles
>
> if we give the card the correct clock rate before the first "go idle"
> command, this issue gone.
> Please try to apply the patch I send on 2021/1/27 [PATCH] mmc:
> fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output
>
> > Best regards,
> > Ye Li
Hi,
is this patchset still being reviewed? I think the discussion has moved
to some SD card problem, which is fixed now? Would be nice if USB 3.0
worked on i.MX8MQ platforms.
I can also have a look at reviewing the functionality, but I don't think
I can spot U-Boot coding style issues.
Best regards,
Patrick
[PATCH 2/2] board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt
---
arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 +
arch/arm/mach-imx/imx8m/Kconfig |6 +
board/mntre/imx8mq_reform2/Kconfig| 12 +
board/mntre/imx8mq_reform2/MAINTAINERS|7 +
board/mntre/imx8mq_reform2/Makefile | 12 +
board/mntre/imx8mq_reform2/imx8mq_reform2.c | 215
board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 +
.../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++
board/mntre/imx8mq_reform2/spl.c | 260 +
configs/imx8mq_reform2_defconfig | 56 +
include/configs/imx8mq_reform2.h | 149 +++
11 files changed, 1837 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
create mode 100644 board/mntre/imx8mq_reform2/Kconfig
create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS
create mode 100644 board/mntre/imx8mq_reform2/Makefile
create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c
create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h
create mode 100644 board/mntre/imx8mq_reform2/spl.c
create mode 100644 configs/imx8mq_reform2_defconfig
create mode 100644 include/configs/imx8mq_reform2.h
diff --git a/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00..7e928e875b
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+ {
+ mmc-hs400-1_8v;
+};
+
+ {
+ cd-gpios = < 12 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 0669363c0f..623c852ae4 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -44,6 +44,11 @@ config TARGET_IMX8MQ_PHANBELL
select IMX8MQ
select IMX8M_LPDDR4
+config TARGET_IMX8MQ_REFORM2
+ bool "imx8mq_reform2"
+ select IMX8MQ
+ select IMX8M_LPDDR4
+
config TARGET_IMX8MM_EVK
bool "imx8mm LPDDR4 EVK board"
select BINMAN
@@ -149,6 +154,7 @@ source "board/freescale/imx8mn_evk/Kconfig"
source "board/freescale/imx8mp_evk/Kconfig"
source "board/gateworks/venice/Kconfig"
source "board/google/imx8mq_phanbell/Kconfig"
+source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
source "board/ronetix/imx8mq-cm/Kconfig"
diff --git a/board/mntre/imx8mq_reform2/Kconfig
b/board/mntre/imx8mq_reform2/Kconfig
new file mode 100644
index 00..8070ef377b
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_IMX8MQ_REFORM2
+
+config SYS_BOARD
+ default "imx8mq_reform2"
+
+config SYS_VENDOR
+ default "mntre"
+
+config SYS_CONFIG_NAME
+ default "imx8mq_reform2"
+
+endif
diff --git a/board/mntre/imx8mq_reform2/MAINTAINERS
b/board/mntre/imx8mq_reform2/MAINTAINERS
new file mode 100644
index 00..946f287ecf
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/MAINTAINERS
@@ -0,0 +1,7 @@
+REFORM2 IMX8MQ BOARD
+M: Lukas F. Hartmann
+M: Patrick Wildt
+S: Maintained
+F: board/mntre/imx8mq_reform2/
+F: include/configs/imx8mq_reform2.h
+F: configs/imx8mq_reform2_defconfig
diff --git a/board/mntre/imx8mq_reform2/Makefile
b/board/mntre/imx8mq_reform2/Makefile
new file mode 100644
index 00..2efd56bb4a
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mq_reform2.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/board/mntre/imx8mq_reform2/imx8mq_reform2.c
b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
new file mode 100644
index 00..c46af349eb
--- /dev/null
+++ b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ * Copyright (C) 2018, Boundary Devices
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+
+#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
+
+static iomux_v3_cfg_t const wdog_pads[] = {
+ IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_B
[PATCH 1/2] arm: dts: imx8mq: add MNT Reform 2
Device tree taken from v4 of the MNT Reform 2 series on the Linux ARM
Kernel Architecture mailing list:
https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=500045
Signed-off-by: Patrick Wildt
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mq-mnt-reform2.dts | 164 +++
arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 ++
3 files changed, 440 insertions(+)
create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts
create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 59d8078558..e01924c797 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -873,6 +873,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-evk.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
+ imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-evk.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mq-mnt-reform2.dts
b/arch/arm/dts/imx8mq-mnt-reform2.dts
new file mode 100644
index 00..099b0472db
--- /dev/null
+++ b/arch/arm/dts/imx8mq-mnt-reform2.dts
@@ -0,0 +1,164 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/*
+ * Copyright 2019-2021 MNT Research GmbH
+ * Copyright 2021 Lucas Stach
+ */
+
+/dts-v1/;
+
+#include "imx8mq-nitrogen-som.dtsi"
+
+/ {
+ model = "MNT Reform 2";
+ compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som",
"fsl,imx8mq";
+
+ pcie1_refclk: clock-pcie1-refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ };
+
+ reg_main_5v: regulator-main-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ };
+
+ reg_main_3v3: regulator-main-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ reg_main_usb: regulator-main-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_PWR";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_main_5v>;
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c3>;
+ status = "okay";
+
+ rtc@68 {
+ compatible = "nxp,pcf8523";
+ reg = <0x68>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pcie1>;
+ reset-gpio = < 23 GPIO_ACTIVE_LOW>;
+ clocks = < IMX8MQ_CLK_PCIE2_ROOT>,
+< IMX8MQ_CLK_PCIE2_AUX>,
+< IMX8MQ_CLK_PCIE2_PHY>,
+<_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ status = "okay";
+};
+
+_1p8v {
+ vin-supply = <_main_5v>;
+};
+
+_snvs {
+ vin-supply = <_main_5v>;
+};
+
+_arm_dram {
+ vin-supply = <_main_5v>;
+};
+
+_dram_1p1v {
+ vin-supply = <_main_5v>;
+};
+
+_soc_gpu_vpu {
+ vin-supply = <_main_5v>;
+};
+
+_rtc {
+ status = "disabled";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_uart2>;
+ status = "okay";
+};
+
+_phy0 {
+ vbus-supply = <_main_usb>;
+ status = "okay";
+};
+
+_phy1 {
+ vbus-supply = <_main_usb>;
+ status = "okay";
+};
+
+_dwc3_0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+_dwc3_1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+ {
+ assigned-clocks = < IMX8MQ_CLK_USDHC2>;
+ assigned-clock-rates = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc2>;
+ vqmmc-supply = <_main_3v3>;
+ vmmc-supply = <_main_3v3>;
+ bus-width = <4>;
+ status = "okay";
+};
+
+ {
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL
0x407f
+ MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA
0x407f
+ >;
+ };
+
+ pinctrl_pcie1: pcie1grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_SAI5_RXD2_GPIO
[PATCH 0/2] Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop. In its initial version it is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been lifted from BoundaryDevices official U-Boot downstream project. The device tree has not yet been merged into mainline Linux, but it's already available as v4 on the Linux ARM Kernel Architecture mailing list, which hopefully will now be merged as is. This U-Boot patchset supports the serial console, the SD card and eMMC, and Gigabit Ethernet. Best regards, Patrick Patrick Wildt (2): arm: dts: imx8mq: add MNT Reform 2 board: mntre: imx8mq: Add MNT Reform 2 board support arch/arm/dts/Makefile |1 + arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi | 11 + arch/arm/dts/imx8mq-mnt-reform2.dts | 164 +++ arch/arm/dts/imx8mq-nitrogen-som.dtsi | 275 + arch/arm/mach-imx/imx8m/Kconfig |6 + board/mntre/imx8mq_reform2/Kconfig| 12 + board/mntre/imx8mq_reform2/MAINTAINERS|7 + board/mntre/imx8mq_reform2/Makefile | 12 + board/mntre/imx8mq_reform2/imx8mq_reform2.c | 215 board/mntre/imx8mq_reform2/lpddr4_timing.c| 1014 + .../mntre/imx8mq_reform2/lpddr4_timing_ch2.h | 95 ++ board/mntre/imx8mq_reform2/spl.c | 260 + configs/imx8mq_reform2_defconfig | 56 + include/configs/imx8mq_reform2.h | 149 +++ 14 files changed, 2277 insertions(+) create mode 100644 arch/arm/dts/imx8mq-mnt-reform2-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mq-mnt-reform2.dts create mode 100644 arch/arm/dts/imx8mq-nitrogen-som.dtsi create mode 100644 board/mntre/imx8mq_reform2/Kconfig create mode 100644 board/mntre/imx8mq_reform2/MAINTAINERS create mode 100644 board/mntre/imx8mq_reform2/Makefile create mode 100644 board/mntre/imx8mq_reform2/imx8mq_reform2.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing.c create mode 100644 board/mntre/imx8mq_reform2/lpddr4_timing_ch2.h create mode 100644 board/mntre/imx8mq_reform2/spl.c create mode 100644 configs/imx8mq_reform2_defconfig create mode 100644 include/configs/imx8mq_reform2.h -- 2.32.0
Re: [PATCHv3 1/3] pci: pcie_dw_rockchip: Fixed the below compilation error
Am Fri, Jun 04, 2021 at 04:56:05AM + schrieb Anand Moon:
> Use the generic error number instead of specific error number.
> Changes fix the below error.
>
> drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_read':
> drivers/pci/pcie_dw_rockchip.c:70:10: error: 'PCIBIOS_UNSUPPORTED'
> undeclared (first use in this function)
>70 | return PCIBIOS_UNSUPPORTED;
> | ^~~
> drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_write':
> drivers/pci/pcie_dw_rockchip.c:90:10: error: 'PCIBIOS_UNSUPPORTED'
> undeclared (first use in this function)
>90 | return PCIBIOS_UNSUPPORTED;
> | ^~~
>
> Cc: Patrick Wildt
> Cc: Neil Armstrong
> Cc: Kever Yang
> Reviewed-by: Neil Armstrong
> Signed-off-by: Anand Moon
> ---
> v1: Drop the PCI ERROR MACRO,
> v2: added the Neil review tag.
> ---
> ---
> drivers/pci/pcie_dw_rockchip.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
> index bc22af4230..3ac2434b69 100644
> --- a/drivers/pci/pcie_dw_rockchip.c
> +++ b/drivers/pci/pcie_dw_rockchip.c
> @@ -67,7 +67,7 @@ static int rk_pcie_read(void __iomem *addr, int size, u32
> *val)
> {
> if ((uintptr_t)addr & (size - 1)) {
> *val = 0;
> - return PCIBIOS_UNSUPPORTED;
> + return -EOPNOTSUPP;
> }
>
> if (size == 4) {
> @@ -87,7 +87,7 @@ static int rk_pcie_read(void __iomem *addr, int size, u32
> *val)
> static int rk_pcie_write(void __iomem *addr, int size, u32 val)
> {
> if ((uintptr_t)addr & (size - 1))
> - return PCIBIOS_UNSUPPORTED;
> + return -EOPNOTSUPP;
>
> if (size == 4)
> writel(val, addr);
> --
> 2.31.1
>
Reviewed-by: Patrick Wildt
Re: [PATCHv3 2/3] pci: pcie_dw_rockchip: Drop the unused variable warning
Am Fri, Jun 04, 2021 at 04:56:06AM + schrieb Anand Moon:
> Drop the unused variable warning below.
>
> drivers/pci/pcie_dw_rockchip.c:161:6: warning: unused variable
> 'val' [-Wunused-variable]
> 161 | u32 val;
> | ^~~
> Cc: Patrick Wildt
> Cc: Neil Armstrong
> Cc: Kever Yang
> Reviewed-by: Neil Armstrong
> Signed-off-by: Anand Moon
> ---
> V1
> V2: Added Neil review tags.
> ---
> drivers/pci/pcie_dw_rockchip.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
> index 3ac2434b69..4e448c0a3d 100644
> --- a/drivers/pci/pcie_dw_rockchip.c
> +++ b/drivers/pci/pcie_dw_rockchip.c
> @@ -158,8 +158,6 @@ static inline void rk_pcie_writel_apb(struct rk_pcie
> *rk_pcie, u32 reg,
> */
> static void rk_pcie_configure(struct rk_pcie *pci, u32 cap_speed)
> {
> - u32 val;
> -
> dw_pcie_dbi_write_enable(>dw, true);
>
> clrsetbits_le32(pci->dw.dbi_base + PCIE_LINK_CAPABILITY,
> --
> 2.31.1
>
Reviewed-by: Patrick Wildt
Re: [PATCHv3 3/3] pci: pcie_dw_rockchip: Replace msleep occurences by udelay
Am Fri, Jun 04, 2021 at 04:56:07AM + schrieb Anand Moon:
> Replace msleep occurences by udelay.
>
> drivers/pci/pcie_dw_rockchip.c:254:3: warning: implicit
> declaration of function 'msleep' [-Wimplicit-function-declaration]
>
> Cc: Patrick Wildt
> Cc: Neil Armstrong
> Cc: Kever Yang
> Signed-off-by: Anand Moon
> ---
> V2: drop the msleep macro.
> ---
> drivers/pci/pcie_dw_rockchip.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
> index 4e448c0a3d..039266a357 100644
> --- a/drivers/pci/pcie_dw_rockchip.c
> +++ b/drivers/pci/pcie_dw_rockchip.c
> @@ -62,6 +62,7 @@ struct rk_pcie {
>
> /* Parameters for the waiting for #perst signal */
> #define PERST_WAIT_MS1000
> +#define MACRO_US 1000
>
> static int rk_pcie_read(void __iomem *addr, int size, u32 *val)
> {
> @@ -249,7 +250,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32
> cap_speed)
>* some wired devices need much more, such as 600ms.
>* Add a enough delay to cover all cases.
>*/
> - msleep(PERST_WAIT_MS);
> + udelay(PERST_WAIT_MS);
You're missing the * MACRO_US here. I'm not sure though that really
needs a macro for MS to US, or did someone request that?
> dm_gpio_set_value(>rst_gpio, 1);
> }
>
> @@ -271,12 +272,12 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32
> cap_speed)
> dev_info(priv->dw.dev, "PCIe Linking... LTSSM is 0x%x\n",
>rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
> rk_pcie_debug_dump(priv);
> - msleep(1000);
> + udelay(PERST_WAIT_MS * MACRO_US);
> }
>
> dev_err(priv->dw.dev, "PCIe-%d Link Fail\n", dev_seq(priv->dw.dev));
> /* Link maybe in Gen switch recovery but we need to wait more 1s */
> - msleep(1000);
> + udelay(PERST_WAIT_MS * MACRO_US);
> return -EIO;
> }
>
> @@ -296,7 +297,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
> }
> }
>
> - msleep(1000);
> + udelay(PERST_WAIT_MS * MACRO_US);
>
> ret = generic_phy_init(>phy);
> if (ret) {
> --
> 2.31.1
>
Re: [PATCH] rk3399: Add basic support for helios64【请注意，邮件由cglom...@redhat.com代发】
Any news on this? Uwe, Christian?
Am Tue, Mar 30, 2021 at 03:21:32PM +0800 schrieb Kever Yang:
> Hi
>
> Could you send new patch set if everything is ready.
>
>
> Thanks,
>
> - Kever
>
> On 2021/3/9 上午12:29, Christian Glombek wrote:
> > I've looked into this a bit over the weekend - my current WIP patch can
> > be found here:
> > https://src.fedoraproject.org/fork/lorbus/rpms/uboot-tools/blob/helios64/f/0001-arm-Add-support-for-Kobol-Helios64-board.patch
> >
> > It's essentially the entire devicetree used in Armbian, only that I had
> > to remove the gpio{1,2,4} initialization since `gpio-hog` doesn't appear
> > to work with upstream u-boot.
> > It boots fine with current Fedora IoT 34 nightlies, but kernel crashes
> > are very regular (sometimes recoverable, sometimes not), which looks to
> > me like the same problem that Armbian builds have, logs seem to point to
> > an issue with the dmc frequency.
> > I've compiled an excerpt of interesting looking logs from a couple of
> > boots here (you should be able to comment on the doc as well):
> > https://hackmd.io/@lorbus/SyXTj0lXu
> >
> > Please take a look and let me know what you think.
> >
> > Best regards,
> > Christian
>
>
Re: [PATCH 3/3] pci: pcie_dw_rockchip: Use udelay instead of msleep
Am Tue, Apr 27, 2021 at 11:11:19AM +0530 schrieb Anand Moon: > hi Patrick, > > On Tue, 27 Apr 2021 at 01:38, Patrick Wildt wrote: > > > > Am Mon, Apr 26, 2021 at 01:26:32PM + schrieb Anand Moon: > > > Use udelay instead of msleep fix the below warning. > > > > You sure that's correct? the m in msleep means milli, while the u > > in udelay means micro. That's a factor of 1000 of a difference. > > > Thanks for your review comments. > > Most of the u-boot driver prefers udelay and usleep_range internally > calls udelay. > > I don't have the HW to test and verify. > > -Anand Sure, I'm not complaining about that. My point is that if you pass e. g. 8 milliseconds to a function that takes microseconds, you need to add the factor. Not good: msleep(1000) -> udelay(1000) Much better: msleep(1000) -> udelay(1000 * 1000) Which also means that you either have to rename PERST_WAIT_MS and change its value, or do udelay(PERST_WAIT_MS * 1000)
Re: [PATCH 2/3] usb: ehci-mx6: add IMX8MM OTG support
Am Tue, Apr 27, 2021 at 10:50:34AM -0700 schrieb Tim Harvey:
> On Tue, Apr 27, 2021 at 10:44 AM Marek Vasut wrote:
> >
> > On 4/27/21 7:08 PM, Tim Harvey wrote:
> > > Add support for determining host vs peripheral mode for IMX8MM
> > > configured as OTG.
> > >
> > > Signed-off-by: Tim Harvey
> > > ---
> > > drivers/usb/host/ehci-mx6.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> > > index c2dfe49012..d055d2b1fe 100644
> > > --- a/drivers/usb/host/ehci-mx6.c
> > > +++ b/drivers/usb/host/ehci-mx6.c
> > > @@ -523,7 +523,7 @@ static int ehci_usb_phy_mode(struct udevice *dev)
> > > plat->init_type = USB_INIT_DEVICE;
> > > else
> > > plat->init_type = USB_INIT_HOST;
> > > - } else if (is_mx7()) {
> > > + } else if (is_mx7() || is_imx8mm()) {
> >
> > This likely also applies to 8mq/mm/mn/mp , i.e. all of them.
>
> Agreed. Perhaps Adam, Frieder, or Fabio have something to test with? I
> only have IMX8M Mini at the moment.
No, I don't think this applies to all of them, 8MM and 8MN should be
correct.
So from a historic point of view the first one that showed up is the
8MQ, which has a DesignWare xHCI controller. There's no eHCI, so this
driver doesn't attach and there is neither the fsl,imx27-usb nor the
fsl,imx7d-usb compatible. Hence not having imx8mq should be correct.
When the i.MX8MM showed up the biggest difference obviously was the
silicon technology, reducing temperature. But it also replaced the
DesignWare xHCI with ... what was it, the cadence OTG controller?
This is basically a carbon copy of the fsl,imx7d-usb (which has the
i.MX6 as heritage). Hence imx8mm is correct here.
Then the i.MX8MP showed up, which is builds on that, but it finally
gets the DesignWare xHCI back. So in that regard it's more a better
version of i.MX8MQ. The fsl,imx7d-usb compatible is not part of the
dts, hence not having imx8mp should be correct.
The i.MX8MN is new to me, but by grepping you can see that the MN also
has the fsl,imx7d-usb compatible.
Hence I think only 8MM and 8MN should be added, not 8MQ or 8MP.
Patrick
Re: [PATCH 1/3] pci: pcie_dw_rockchip: Fixed the below compilation error
Am Mon, Apr 26, 2021 at 01:26:30PM + schrieb Anand Moon:
> Use the Error values that may be returned by PCI functions
> Added the error macro from linux/include/linux/pci.h
>
> drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_read':
> drivers/pci/pcie_dw_rockchip.c:70:10: error: 'PCIBIOS_UNSUPPORTED'
> undeclared (first use in this function)
>70 | return PCIBIOS_UNSUPPORTED;
> | ^~~
> drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_write':
> drivers/pci/pcie_dw_rockchip.c:90:10: error: 'PCIBIOS_UNSUPPORTED'
> undeclared (first use in this function)
>90 | return PCIBIOS_UNSUPPORTED;
> | ^~~
>
> Cc: Neil Armstrong
> Cc: Kever Yang
> Signed-off-by: Anand Moon
> ---
> drivers/pci/pcie_dw_common.h | 9 +
> drivers/pci/pcie_dw_rockchip.c | 4 ++--
> 2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/pcie_dw_common.h b/drivers/pci/pcie_dw_common.h
> index 6b701645af..ba5feb5b51 100644
> --- a/drivers/pci/pcie_dw_common.h
> +++ b/drivers/pci/pcie_dw_common.h
> @@ -90,6 +90,15 @@
> #define PCIE_MISC_CONTROL_1_OFF 0x8bc
> #define PCIE_DBI_RO_WR_ENBIT(0)
>
> +/* Error values that may be returned by PCI functions */
> +#define PCIBIOS_SUCCESSFUL 0x00
> +#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
> +#define PCIBIOS_BAD_VENDOR_ID 0x83
> +#define PCIBIOS_DEVICE_NOT_FOUND0x86
> +#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
> +#define PCIBIOS_SET_FAILED 0x88
> +#define PCIBIOS_BUFFER_TOO_SMALL0x89
> +
> /* Parameters for the waiting for iATU enabled routine */
> #define LINK_WAIT_MAX_IATU_RETRIES 5
> #define LINK_WAIT_IATU 1
> diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
> index bc22af4230..9702b40019 100644
> --- a/drivers/pci/pcie_dw_rockchip.c
> +++ b/drivers/pci/pcie_dw_rockchip.c
> @@ -67,7 +67,7 @@ static int rk_pcie_read(void __iomem *addr, int size, u32
> *val)
> {
> if ((uintptr_t)addr & (size - 1)) {
> *val = 0;
> - return PCIBIOS_UNSUPPORTED;
> + return PCIBIOS_BAD_REGISTER_NUMBER;
Since this function seems to return normal error code, why not use
-EINVAL? Or even better -EOPNOTSUP? The callers only check for != 0
anyway.
> }
>
> if (size == 4) {
> @@ -87,7 +87,7 @@ static int rk_pcie_read(void __iomem *addr, int size, u32
> *val)
> static int rk_pcie_write(void __iomem *addr, int size, u32 val)
> {
> if ((uintptr_t)addr & (size - 1))
> - return PCIBIOS_UNSUPPORTED;
> + return PCIBIOS_BAD_REGISTER_NUMBER;
>
> if (size == 4)
> writel(val, addr);
> --
> 2.31.1
>
Re: [PATCH 3/3] pci: pcie_dw_rockchip: Use udelay instead of msleep
Am Mon, Apr 26, 2021 at 01:26:32PM + schrieb Anand Moon:
> Use udelay instead of msleep fix the below warning.
You sure that's correct? the m in msleep means milli, while the u
in udelay means micro. That's a factor of 1000 of a difference.
> drivers/pci/pcie_dw_rockchip.c:254:3: warning: implicit
> declaration of function 'msleep' [-Wimplicit-function-declaration]
>
> Cc: Neil Armstrong
> Cc: Kever Yang
> Signed-off-by: Anand Moon
> ---
> drivers/pci/pcie_dw_rockchip.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
> index e7f42604ab..6c87ee1ea0 100644
> --- a/drivers/pci/pcie_dw_rockchip.c
> +++ b/drivers/pci/pcie_dw_rockchip.c
> @@ -249,7 +249,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32
> cap_speed)
>* some wired devices need much more, such as 600ms.
>* Add a enough delay to cover all cases.
>*/
> - msleep(PERST_WAIT_MS);
> + udelay(PERST_WAIT_MS);
> dm_gpio_set_value(>rst_gpio, 1);
> }
>
> @@ -271,12 +271,12 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32
> cap_speed)
> dev_info(priv->dw.dev, "PCIe Linking... LTSSM is 0x%x\n",
>rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
> rk_pcie_debug_dump(priv);
> - msleep(1000);
> + udelay(1000);
> }
>
> dev_err(priv->dw.dev, "PCIe-%d Link Fail\n", dev_seq(priv->dw.dev));
> /* Link maybe in Gen switch recovery but we need to wait more 1s */
> - msleep(1000);
> + udelay(1000);
> return -EIO;
> }
>
> @@ -296,7 +296,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
> }
> }
>
> - msleep(1000);
> + udelay(1000);
>
> ret = generic_phy_init(>phy);
> if (ret) {
> --
> 2.31.1
>
Re: [PATCH] arm64: rk3399: Add support NanoPi R4s
Am Fri, Feb 26, 2021 at 09:37:58PM +0100 schrieb Patrick Wildt:
> Am Mon, Feb 08, 2021 at 04:56:35PM +0800 schrieb xiaobo:
> > From: Xiaobo Tian
> >
> > NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
> > dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card
> > support,
> > including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0
> > port.
> > port.It also has two GPIO headers which allows further peripherals to be
> > used.
> >
> > The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].
> >
> > [1]
> > https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6
> >
> > Signed-off-by: xiaobo
> > ---
> > arch/arm/dts/Makefile | 1 +
> > arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 17 +++
> > arch/arm/dts/rk3399-nanopi-r4s.dts | 138 +
> > board/rockchip/evb_rk3399/MAINTAINERS | 6 +
> > configs/nanopi-r4s-rk3399_defconfig| 62 +
> > 5 files changed, 224 insertions(+)
> > create mode 100644 arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> > create mode 100644 arch/arm/dts/rk3399-nanopi-r4s.dts
> > create mode 100644 configs/nanopi-r4s-rk3399_defconfig
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index 858b79ac97..528dfe069e 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -92,6 +92,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
> > rk3288-evb.dtb \
> > rk3288-firefly.dtb \
> > rk3288-miqi.dtb \
> > + rk3399-nanopi-r4s.dtb \
>
> This is in the wrong list. You need to put it into the RK3399 list, not
> RK3288.
>
> > rk3288-phycore-rdk.dtb \
> > rk3288-popmetal.dtb \
> > rk3288-rock2-square.dtb \
> > diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> > b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> > new file mode 100644
> > index 00..3f97867cc5
> > --- /dev/null
> > +++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> > @@ -0,0 +1,17 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * RK3399-based FriendlyElec boards device tree source
> > + *
> > + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
> > + *
> > + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
> > + * (http://www.friendlyarm.com)
> > + *
> > + * Copyright (c) 2018 Collabora Ltd.
> > + * Copyright (c) 2019 Arm Ltd.
> > + * Copyright (C) 2020 Xiaobo
> > + */
> > +
> > +#include "rk3399-nanopi4-u-boot.dtsi"
> > +#include "rk3399-sdram-lpddr4-100.dtsi"
> > +#include "rk3399-sdram-ddr3-1866.dtsi"
>
> This is wrong as well. I think there can only be lpddr4 *or* ddr3. I
> think the last one has precedence. I have a 4G machine, and it doesn't
> work with this. If I remove the ddr3 (since 4G machine has lpddr4),
> it works.
>
> > diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts
> > b/arch/arm/dts/rk3399-nanopi-r4s.dts
> > new file mode 100644
> > index 00..6f2cf17bf1
> > --- /dev/null
> > +++ b/arch/arm/dts/rk3399-nanopi-r4s.dts
> > @@ -0,0 +1,138 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
> > + *
> > + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
> > + * (http://www.friendlyarm.com)
> > + *
> > + * Copyright (c) 2018 Collabora Ltd.
> > + * Copyright (c) 2019 Arm Ltd.
> > + * Copyright (C) 2020 Xiaobo
> > + */
> > +
> > +/dts-v1/;
> > +#include "rk3399-nanopi4.dtsi"
> > +
> > +/ {
> > + model = "FriendlyElec NanoPi R4S";
> > + compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
> > +
> > + aliases {
> > + ethernet1 =
> > + };
> > +
> > + vdd_5v: vdd-5v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vdd_5v";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + };
> > +
> > + fan: pwm-fan {
> > + compatible = "pwm-fan";
> > + cooling-levels = <0 12 18 255>;
> > + #cooling-cells = <2>;
> > + fan-supply = <_5v>;
> > + pwms = < 0 5 0>;
> > + };
> > +};
> > +
> > +_thermal {
> > + trips
Re: [PATCH] arm64: rk3399: Add support NanoPi R4s
Am Mon, Feb 08, 2021 at 04:56:35PM +0800 schrieb xiaobo:
> From: Xiaobo Tian
>
> NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
> dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card
> support,
> including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0
> port.
> port.It also has two GPIO headers which allows further peripherals to be used.
>
> The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].
>
> [1]
> https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6
>
> Signed-off-by: xiaobo
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 17 +++
> arch/arm/dts/rk3399-nanopi-r4s.dts | 138 +
> board/rockchip/evb_rk3399/MAINTAINERS | 6 +
> configs/nanopi-r4s-rk3399_defconfig| 62 +
> 5 files changed, 224 insertions(+)
> create mode 100644 arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3399-nanopi-r4s.dts
> create mode 100644 configs/nanopi-r4s-rk3399_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 858b79ac97..528dfe069e 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -92,6 +92,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
> rk3288-evb.dtb \
> rk3288-firefly.dtb \
> rk3288-miqi.dtb \
> + rk3399-nanopi-r4s.dtb \
This is in the wrong list. You need to put it into the RK3399 list, not
RK3288.
> rk3288-phycore-rdk.dtb \
> rk3288-popmetal.dtb \
> rk3288-rock2-square.dtb \
> diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> new file mode 100644
> index 00..3f97867cc5
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
> @@ -0,0 +1,17 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * RK3399-based FriendlyElec boards device tree source
> + *
> + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
> + *
> + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
> + * (http://www.friendlyarm.com)
> + *
> + * Copyright (c) 2018 Collabora Ltd.
> + * Copyright (c) 2019 Arm Ltd.
> + * Copyright (C) 2020 Xiaobo
> + */
> +
> +#include "rk3399-nanopi4-u-boot.dtsi"
> +#include "rk3399-sdram-lpddr4-100.dtsi"
> +#include "rk3399-sdram-ddr3-1866.dtsi"
This is wrong as well. I think there can only be lpddr4 *or* ddr3. I
think the last one has precedence. I have a 4G machine, and it doesn't
work with this. If I remove the ddr3 (since 4G machine has lpddr4),
it works.
> diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts
> b/arch/arm/dts/rk3399-nanopi-r4s.dts
> new file mode 100644
> index 00..6f2cf17bf1
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-nanopi-r4s.dts
> @@ -0,0 +1,138 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
> + *
> + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
> + * (http://www.friendlyarm.com)
> + *
> + * Copyright (c) 2018 Collabora Ltd.
> + * Copyright (c) 2019 Arm Ltd.
> + * Copyright (C) 2020 Xiaobo
> + */
> +
> +/dts-v1/;
> +#include "rk3399-nanopi4.dtsi"
> +
> +/ {
> + model = "FriendlyElec NanoPi R4S";
> + compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
> +
> + aliases {
> + ethernet1 =
> + };
> +
> + vdd_5v: vdd-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_5v";
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + fan: pwm-fan {
> + compatible = "pwm-fan";
> + cooling-levels = <0 12 18 255>;
> + #cooling-cells = <2>;
> + fan-supply = <_5v>;
> + pwms = < 0 5 0>;
> + };
> +};
> +
> +_thermal {
> + trips {
> + cpu_warm: cpu_warm {
> + temperature = <55000>;
> + hysteresis = <2000>;
> + type = "active";
> + };
> +
> + cpu_hot: cpu_hot {
> + temperature = <65000>;
> + hysteresis = <2000>;
> + type = "active";
> + };
> + };
> +
> + cooling-maps {
> + map2 {
> + trip = <_warm>;
> + cooling-device = < THERMAL_NO_LIMIT 1>;
> + };
> +
> + map3 {
> + trip = <_hot>;
> + cooling-device = < 2 THERMAL_NO_LIMIT>;
> + };
> + };
> +};
> +
> +_phy {
> + status = "disabled";
> +};
> +
> + {
> + status = "disabled";
> +};
> +
> + {
> + lan_led: led-1 {
> + gpios = < RK_PA1 GPIO_ACTIVE_HIGH>;
> + label = "nanopi-r4s:green:lan";
> + };
> +
> + wan_led: led-2 {
> + gpios = < RK_PA0 GPIO_ACTIVE_HIGH>;
> + label =
Re: [PATCH v2] serial: s5p: Allow independent selection
Am Fri, Feb 12, 2021 at 11:22:18PM +0100 schrieb Mark Kettenis: > Currently support for the Samsung serial port driver is part > of CONFIG_S5P which controls selection of several drivers for > the S5P family. Give it its own config option such that we > can use it on other SoCs as well. > > Signed-off-by: Mark Kettenis Reviewed-by: Patrick Wildt > --- > > v2: fix Kconfig > > drivers/serial/Kconfig | 7 +++ > drivers/serial/Makefile | 2 +- > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig > index 9db4cae1df..2ada150526 100644 > --- a/drivers/serial/Kconfig > +++ b/drivers/serial/Kconfig > @@ -722,6 +722,13 @@ config ROCKCHIP_SERIAL > This uses the ns16550 driver, converting the platdata from of-platdata > to the ns16550 format. > > +config S5P_SERIAL > + bool "Support for Samsung S5P UART" > + depends on ARCH_EXYNOS || ARCH_S5PC1XX > + default y > + help > + Select this to enable Samsung S5P UART support. > + > config SANDBOX_SERIAL > bool "Sandbox UART support" > depends on SANDBOX > diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile > index 0c3810f5d5..92bcb30b85 100644 > --- a/drivers/serial/Makefile > +++ b/drivers/serial/Makefile > @@ -41,7 +41,7 @@ obj-$(CONFIG_EFI_APP) += serial_efi.o > obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o > obj-$(CONFIG_MCFUART) += serial_mcf.o > obj-$(CONFIG_SYS_NS16550) += ns16550.o > -obj-$(CONFIG_S5P) += serial_s5p.o > +obj-$(CONFIG_S5P_SERIAL) += serial_s5p.o > obj-$(CONFIG_MXC_UART) += serial_mxc.o > obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o > obj-$(CONFIG_MESON_SERIAL) += serial_meson.o > -- > 2.30.0 >
Re: [PATCH v3 2/2] efi_loader: fix use after free in receive path
On Fri, Nov 20, 2020 at 06:31:52PM -0500, Tom Rini wrote: > On Fri, Nov 20, 2020 at 11:56:27PM +0100, Patrick Wildt wrote: > > Am Wed, Oct 07, 2020 at 03:26:38PM +0200 schrieb Heinrich Schuchardt: > > > On 07.10.20 11:04, Patrick Wildt wrote: > > > > With DM enabled the ethernet code will receive a packet, call > > > > the push method that's set by the EFI network implementation > > > > and then free the packet. Unfortunately the push methods only > > > > sets a flag that the packet needs to be handled, but the code > > > > that provides the packet to an EFI application runs after the > > > > packet has already been freed. > > > > > > > > To rectify this issue, adjust the push method to accept the packet > > > > and store it in a temporary buffer. The EFI application then gets > > > > the data copied from that buffer. This way the packet is cached > > > > until is is needed. > > > > > > > > The DM Ethernet stack tries to receive 32 packets at once, thus > > > > we better allocate as many buffers as the stack. > > > > > > > > Signed-off-by: Patrick Wildt > > > > > > Reviewed-by: Heinrich Schuchardt > > > > Was this patchset ever merged? > > commit 42f804fbba2836e64f472306ff7616c812d5c54d > Author: Patrick Wildt > Date: Wed Oct 7 11:04:33 2020 +0200 > > efi_loader: fix use after free in rece > > is what I see atm. Ah, yes, sorry, thanks! :)
Re: [PATCH v3 2/2] efi_loader: fix use after free in receive path
Am Wed, Oct 07, 2020 at 03:26:38PM +0200 schrieb Heinrich Schuchardt: > On 07.10.20 11:04, Patrick Wildt wrote: > > With DM enabled the ethernet code will receive a packet, call > > the push method that's set by the EFI network implementation > > and then free the packet. Unfortunately the push methods only > > sets a flag that the packet needs to be handled, but the code > > that provides the packet to an EFI application runs after the > > packet has already been freed. > > > > To rectify this issue, adjust the push method to accept the packet > > and store it in a temporary buffer. The EFI application then gets > > the data copied from that buffer. This way the packet is cached > > until is is needed. > > > > The DM Ethernet stack tries to receive 32 packets at once, thus > > we better allocate as many buffers as the stack. > > > > Signed-off-by: Patrick Wildt > > Reviewed-by: Heinrich Schuchardt Was this patchset ever merged?
[PATCH v3 2/2] efi_loader: fix use after free in receive path
With DM enabled the ethernet code will receive a packet, call
the push method that's set by the EFI network implementation
and then free the packet. Unfortunately the push methods only
sets a flag that the packet needs to be handled, but the code
that provides the packet to an EFI application runs after the
packet has already been freed.
To rectify this issue, adjust the push method to accept the packet
and store it in a temporary buffer. The EFI application then gets
the data copied from that buffer. This way the packet is cached
until is is needed.
The DM Ethernet stack tries to receive 32 packets at once, thus
we better allocate as many buffers as the stack.
Signed-off-by: Patrick Wildt
---
Changes from v2:
- Inverted the logic of efi_net_receive() reflecting the fill level,
since in v2 it was the wrong way around.
- Clearing the packet queue by simply setting the amount of packets
in the queue to zero.
Changes from v1:
- Reimplemented the buffer handling approach to use pre-allocated
buffers.
lib/efi_loader/efi_net.c | 92 ++--
1 file changed, 69 insertions(+), 23 deletions(-)
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 22f0123eca..69276b275d 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -24,9 +24,12 @@ static const efi_guid_t efi_net_guid =
EFI_SIMPLE_NETWORK_PROTOCOL_GUID;
static const efi_guid_t efi_pxe_base_code_protocol_guid =
EFI_PXE_BASE_CODE_PROTOCOL_GUID;
static struct efi_pxe_packet *dhcp_ack;
-static bool new_rx_packet;
static void *new_tx_packet;
static void *transmit_buffer;
+static uchar **receive_buffer;
+static size_t *receive_lengths;
+static int rx_packet_idx;
+static int rx_packet_num;
/*
* The notification function of this event is called in every timer cycle
@@ -115,6 +118,8 @@ static efi_status_t EFIAPI efi_net_stop(struct
efi_simple_network *this)
} else {
/* Disable hardware and put it into the reset state */
eth_halt();
+ /* Clear cache of packets */
+ rx_packet_num = 0;
this->mode->state = EFI_NETWORK_STOPPED;
}
out:
@@ -160,6 +165,8 @@ static efi_status_t EFIAPI efi_net_initialize(struct
efi_simple_network *this,
net_init();
/* Disable hardware and put it into the reset state */
eth_halt();
+ /* Clear cache of packets */
+ rx_packet_num = 0;
/* Set current device according to environment variables */
eth_set_current();
/* Get hardware ready for send and receive operations */
@@ -602,16 +609,16 @@ static efi_status_t EFIAPI efi_net_receive
break;
}
- if (!new_rx_packet) {
+ if (!rx_packet_num) {
ret = EFI_NOT_READY;
goto out;
}
/* Fill export parameters */
- eth_hdr = (struct ethernet_hdr *)net_rx_packet;
+ eth_hdr = (struct ethernet_hdr *)receive_buffer[rx_packet_idx];
protlen = ntohs(eth_hdr->et_protlen);
if (protlen == 0x8100) {
hdr_size += 4;
- protlen = ntohs(*(u16 *)_rx_packet[hdr_size - 2]);
+ protlen = ntohs(*(u16 *)_buffer[rx_packet_idx][hdr_size
- 2]);
}
if (header_size)
*header_size = hdr_size;
@@ -621,17 +628,22 @@ static efi_status_t EFIAPI efi_net_receive
memcpy(src_addr, eth_hdr->et_src, ARP_HLEN);
if (protocol)
*protocol = protlen;
- if (*buffer_size < net_rx_packet_len) {
+ if (*buffer_size < receive_lengths[rx_packet_idx]) {
/* Packet doesn't fit, try again with bigger buffer */
- *buffer_size = net_rx_packet_len;
+ *buffer_size = receive_lengths[rx_packet_idx];
ret = EFI_BUFFER_TOO_SMALL;
goto out;
}
/* Copy packet */
- memcpy(buffer, net_rx_packet, net_rx_packet_len);
- *buffer_size = net_rx_packet_len;
- new_rx_packet = 0;
- this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
+ memcpy(buffer, receive_buffer[rx_packet_idx],
+ receive_lengths[rx_packet_idx]);
+ *buffer_size = receive_lengths[rx_packet_idx];
+ rx_packet_idx = (rx_packet_idx + 1) % ETH_PACKETS_BATCH_RECV;
+ rx_packet_num--;
+ if (rx_packet_num)
+ wait_for_packet->is_signaled = true;
+ else
+ this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
out:
return EFI_EXIT(ret);
}
@@ -664,7 +676,26 @@ void efi_net_set_dhcp_ack(void *pkt, int len)
*/
static void efi_net_push(void *pkt, int len)
{
- new_rx_packet = true;
+ int rx_packet_next;
+
+ /* Check that we at least received an Ethernet header */
+ if (len < sizeof(struct ethernet_hdr))
+ return;
+
+ /
[PATCH v3 1/2] net: add a define for the number of packets received as batch
With a define for the magic number of packets received as batch
we can make sure that the EFI network stack caches the same amount
of packets.
Signed-off-by: Patrick Wildt
---
Changes in v3:
- Simple rebase to resend patches together.
Changes in v2:
- Split this commit out of another one.
include/net.h| 3 +++
net/eth-uclass.c | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/net.h b/include/net.h
index 219107194f..eab4ebdd38 100644
--- a/include/net.h
+++ b/include/net.h
@@ -44,6 +44,9 @@ struct udevice;
#define PKTALIGN ARCH_DMA_MINALIGN
+/* Number of packets processed together */
+#define ETH_PACKETS_BATCH_RECV 32
+
/* ARP hardware address length */
#define ARP_HLEN 6
/*
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 396418eb39..963a0beaab 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -380,7 +380,7 @@ int eth_rx(void)
/* Process up to 32 packets at one time */
flags = ETH_RECV_CHECK_DEVICE;
- for (i = 0; i < 32; i++) {
+ for (i = 0; i < ETH_PACKETS_BATCH_RECV; i++) {
ret = eth_get_ops(current)->recv(current, flags, );
flags = 0;
if (ret > 0)
--
2.28.0
[PATCH v2 2/2] efi_loader: fix use after free in receive path
With DM enabled the ethernet code will receive a packet, call
the push method that's set by the EFI network implementation
and then free the packet. Unfortunately the push methods only
sets a flag that the packet needs to be handled, but the code
that provides the packet to an EFI application runs after the
packet has already been freed.
To rectify this issue, adjust the push method to accept the packet
and store it in a temporary buffer. The EFI application then gets
the data copied from that buffer. This way the packet is cached
until is is needed.
The DM Ethernet stack tries to receive 32 packets at once, thus
we better allocate as many buffers as the stack.
Signed-off-by: Patrick Wildt
---
lib/efi_loader/efi_net.c | 88 +---
1 file changed, 65 insertions(+), 23 deletions(-)
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 22f0123eca..ed72df42b8 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -24,9 +24,12 @@ static const efi_guid_t efi_net_guid =
EFI_SIMPLE_NETWORK_PROTOCOL_GUID;
static const efi_guid_t efi_pxe_base_code_protocol_guid =
EFI_PXE_BASE_CODE_PROTOCOL_GUID;
static struct efi_pxe_packet *dhcp_ack;
-static bool new_rx_packet;
static void *new_tx_packet;
static void *transmit_buffer;
+static uchar **receive_buffer;
+static size_t *receive_lengths;
+static int rx_packet_idx;
+static int rx_packet_num;
/*
* The notification function of this event is called in every timer cycle
@@ -602,16 +605,16 @@ static efi_status_t EFIAPI efi_net_receive
break;
}
- if (!new_rx_packet) {
+ if (!rx_packet_num) {
ret = EFI_NOT_READY;
goto out;
}
/* Fill export parameters */
- eth_hdr = (struct ethernet_hdr *)net_rx_packet;
+ eth_hdr = (struct ethernet_hdr *)receive_buffer[rx_packet_idx];
protlen = ntohs(eth_hdr->et_protlen);
if (protlen == 0x8100) {
hdr_size += 4;
- protlen = ntohs(*(u16 *)_rx_packet[hdr_size - 2]);
+ protlen = ntohs(*(u16 *)_buffer[rx_packet_idx][hdr_size
- 2]);
}
if (header_size)
*header_size = hdr_size;
@@ -621,17 +624,22 @@ static efi_status_t EFIAPI efi_net_receive
memcpy(src_addr, eth_hdr->et_src, ARP_HLEN);
if (protocol)
*protocol = protlen;
- if (*buffer_size < net_rx_packet_len) {
+ if (*buffer_size < receive_lengths[rx_packet_idx]) {
/* Packet doesn't fit, try again with bigger buffer */
- *buffer_size = net_rx_packet_len;
+ *buffer_size = receive_lengths[rx_packet_idx];
ret = EFI_BUFFER_TOO_SMALL;
goto out;
}
/* Copy packet */
- memcpy(buffer, net_rx_packet, net_rx_packet_len);
- *buffer_size = net_rx_packet_len;
- new_rx_packet = 0;
- this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
+ memcpy(buffer, receive_buffer[rx_packet_idx],
+ receive_lengths[rx_packet_idx]);
+ *buffer_size = receive_lengths[rx_packet_idx];
+ rx_packet_idx = (rx_packet_idx + 1) % ETH_PACKETS_BATCH_RECV;
+ rx_packet_num--;
+ if (rx_packet_num)
+ this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
+ else
+ wait_for_packet->is_signaled = true;
out:
return EFI_EXIT(ret);
}
@@ -664,7 +672,26 @@ void efi_net_set_dhcp_ack(void *pkt, int len)
*/
static void efi_net_push(void *pkt, int len)
{
- new_rx_packet = true;
+ int rx_packet_next;
+
+ /* Check that we at least received an Ethernet header */
+ if (len < sizeof(struct ethernet_hdr))
+ return;
+
+ /* Check that the buffer won't overflow */
+ if (len > PKTSIZE_ALIGN)
+ return;
+
+ /* Can't store more than pre-alloced buffer */
+ if (rx_packet_num >= ETH_PACKETS_BATCH_RECV)
+ return;
+
+ rx_packet_next = (rx_packet_idx + rx_packet_num) %
+ ETH_PACKETS_BATCH_RECV;
+ memcpy(receive_buffer[rx_packet_next], pkt, len);
+ receive_lengths[rx_packet_next] = len;
+
+ rx_packet_num++;
}
/**
@@ -689,20 +716,14 @@ static void EFIAPI efi_network_timer_notify(struct
efi_event *event,
if (!this || this->mode->state != EFI_NETWORK_INITIALIZED)
goto out;
- if (!new_rx_packet) {
+ if (!rx_packet_num) {
push_packet = efi_net_push;
eth_rx();
push_packet = NULL;
- if (new_rx_packet) {
- /* Check that we at least received an Ethernet header */
- if (net_rx_packet_len >=
- sizeof(struct ethernet_hdr)) {
-
[PATCH v2 1/2] net: add a define for the number of packets received as batch
With a define for the magic number of packets received as batch
we can make sure that the EFI network stack caches the same amount
of packets.
Signed-off-by: Patrick Wildt
---
include/net.h| 3 +++
net/eth-uclass.c | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/net.h b/include/net.h
index 219107194f..eab4ebdd38 100644
--- a/include/net.h
+++ b/include/net.h
@@ -44,6 +44,9 @@ struct udevice;
#define PKTALIGN ARCH_DMA_MINALIGN
+/* Number of packets processed together */
+#define ETH_PACKETS_BATCH_RECV 32
+
/* ARP hardware address length */
#define ARP_HLEN 6
/*
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 396418eb39..963a0beaab 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -380,7 +380,7 @@ int eth_rx(void)
/* Process up to 32 packets at one time */
flags = ETH_RECV_CHECK_DEVICE;
- for (i = 0; i < 32; i++) {
+ for (i = 0; i < ETH_PACKETS_BATCH_RECV; i++) {
ret = eth_get_ops(current)->recv(current, flags, );
flags = 0;
if (ret > 0)
--
2.28.0
Re: [PATCH] efi_loader: fix use after free in receive path
On Wed, Oct 07, 2020 at 12:45:17AM +0200, Heinrich Schuchardt wrote:
> Am 7. Oktober 2020 00:30:51 MESZ schrieb Patrick Wildt :
> >With DM enabled the ethernet code will receive a packet, call
> >the push method that's set by the EFI network implementation
> >and then free the packet. Unfortunately the push methods only
> >sets a flag that the packet needs to be handled, but the code
> >that provides the packet to an EFI application runs after the
> >packet has already been freed.
> >
> >To rectify this issue, adjust the push method to accept the packet
> >and store it in a temporary buffer. The EFI application then gets
> >the data copied from that buffer. This way the packet is cached
> >until is is needed.
> >
> >The DM Ethernet stack tries to receive 32 packets at once, thus
> >we better allocate as many buffers as the stack. Make that magic
> >number a define, so it only needs to be changed in one place.
>
> I am missing the maintainer for the network patch on cc.
>
> Moving the constant should be a separate patch.
>
Sure, will split it up and send it to that one as well.
>
> >
> >Signed-off-by: Patrick Wildt
> >---
> > include/net.h| 3 ++
> > lib/efi_loader/efi_net.c | 88 +---
> > net/eth-uclass.c | 2 +-
> > 3 files changed, 69 insertions(+), 24 deletions(-)
> >
> >diff --git a/include/net.h b/include/net.h
> >index 219107194f..eab4ebdd38 100644
> >--- a/include/net.h
> >+++ b/include/net.h
> >@@ -44,6 +44,9 @@ struct udevice;
> >
> > #define PKTALIGNARCH_DMA_MINALIGN
> >
> >+/* Number of packets processed together */
> >+#define ETH_PACKETS_BATCH_RECV 32
> >+
> > /* ARP hardware address length */
> > #define ARP_HLEN 6
> > /*
> >diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
> >index 22f0123eca..ed72df42b8 100644
> >--- a/lib/efi_loader/efi_net.c
> >+++ b/lib/efi_loader/efi_net.c
> >@@ -24,9 +24,12 @@ static const efi_guid_t efi_net_guid =
> >EFI_SIMPLE_NETWORK_PROTOCOL_GUID;
> > static const efi_guid_t efi_pxe_base_code_protocol_guid =
> > EFI_PXE_BASE_CODE_PROTOCOL_GUID;
> > static struct efi_pxe_packet *dhcp_ack;
> >-static bool new_rx_packet;
> > static void *new_tx_packet;
> > static void *transmit_buffer;
> >+static uchar **receive_buffer;
> >+static size_t *receive_lengths;
> >+static int rx_packet_idx;
> >+static int rx_packet_num;
> >
> > /*
> >* The notification function of this event is called in every timer
> >cycle
> >@@ -602,16 +605,16 @@ static efi_status_t EFIAPI efi_net_receive
> > break;
> > }
> >
> >-if (!new_rx_packet) {
> >+if (!rx_packet_num) {
> > ret = EFI_NOT_READY;
> > goto out;
> > }
> > /* Fill export parameters */
> >-eth_hdr = (struct ethernet_hdr *)net_rx_packet;
> >+eth_hdr = (struct ethernet_hdr *)receive_buffer[rx_packet_idx];
> > protlen = ntohs(eth_hdr->et_protlen);
> > if (protlen == 0x8100) {
> > hdr_size += 4;
> >-protlen = ntohs(*(u16 *)_rx_packet[hdr_size - 2]);
> >+protlen = ntohs(*(u16 *)_buffer[rx_packet_idx][hdr_size
> >-
> >2]);
> > }
> > if (header_size)
> > *header_size = hdr_size;
> >@@ -621,17 +624,22 @@ static efi_status_t EFIAPI efi_net_receive
> > memcpy(src_addr, eth_hdr->et_src, ARP_HLEN);
> > if (protocol)
> > *protocol = protlen;
> >-if (*buffer_size < net_rx_packet_len) {
> >+if (*buffer_size < receive_lengths[rx_packet_idx]) {
> > /* Packet doesn't fit, try again with bigger buffer */
> >-*buffer_size = net_rx_packet_len;
> >+*buffer_size = receive_lengths[rx_packet_idx];
> > ret = EFI_BUFFER_TOO_SMALL;
> > goto out;
> > }
> > /* Copy packet */
> >-memcpy(buffer, net_rx_packet, net_rx_packet_len);
> >-*buffer_size = net_rx_packet_len;
> >-new_rx_packet = 0;
> >-this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
> >+memcpy(buffer, receive_buffer[rx_packet_idx],
> >+ receive_lengths[rx_packet_idx]);
> >+*buffer_size = receive_lengths[rx_packet_idx];
> >+rx_packet_idx = (rx_packet_idx + 1) % ETH_PACKETS_BATCH_RECV;
> >+rx_packet_num--;
> >+if (rx_packet_num)
> >+this-&
[PATCH] efi_loader: fix use after free in receive path
With DM enabled the ethernet code will receive a packet, call
the push method that's set by the EFI network implementation
and then free the packet. Unfortunately the push methods only
sets a flag that the packet needs to be handled, but the code
that provides the packet to an EFI application runs after the
packet has already been freed.
To rectify this issue, adjust the push method to accept the packet
and store it in a temporary buffer. The EFI application then gets
the data copied from that buffer. This way the packet is cached
until is is needed.
The DM Ethernet stack tries to receive 32 packets at once, thus
we better allocate as many buffers as the stack. Make that magic
number a define, so it only needs to be changed in one place.
Signed-off-by: Patrick Wildt
---
include/net.h| 3 ++
lib/efi_loader/efi_net.c | 88 +---
net/eth-uclass.c | 2 +-
3 files changed, 69 insertions(+), 24 deletions(-)
diff --git a/include/net.h b/include/net.h
index 219107194f..eab4ebdd38 100644
--- a/include/net.h
+++ b/include/net.h
@@ -44,6 +44,9 @@ struct udevice;
#define PKTALIGN ARCH_DMA_MINALIGN
+/* Number of packets processed together */
+#define ETH_PACKETS_BATCH_RECV 32
+
/* ARP hardware address length */
#define ARP_HLEN 6
/*
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 22f0123eca..ed72df42b8 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -24,9 +24,12 @@ static const efi_guid_t efi_net_guid =
EFI_SIMPLE_NETWORK_PROTOCOL_GUID;
static const efi_guid_t efi_pxe_base_code_protocol_guid =
EFI_PXE_BASE_CODE_PROTOCOL_GUID;
static struct efi_pxe_packet *dhcp_ack;
-static bool new_rx_packet;
static void *new_tx_packet;
static void *transmit_buffer;
+static uchar **receive_buffer;
+static size_t *receive_lengths;
+static int rx_packet_idx;
+static int rx_packet_num;
/*
* The notification function of this event is called in every timer cycle
@@ -602,16 +605,16 @@ static efi_status_t EFIAPI efi_net_receive
break;
}
- if (!new_rx_packet) {
+ if (!rx_packet_num) {
ret = EFI_NOT_READY;
goto out;
}
/* Fill export parameters */
- eth_hdr = (struct ethernet_hdr *)net_rx_packet;
+ eth_hdr = (struct ethernet_hdr *)receive_buffer[rx_packet_idx];
protlen = ntohs(eth_hdr->et_protlen);
if (protlen == 0x8100) {
hdr_size += 4;
- protlen = ntohs(*(u16 *)_rx_packet[hdr_size - 2]);
+ protlen = ntohs(*(u16 *)_buffer[rx_packet_idx][hdr_size
- 2]);
}
if (header_size)
*header_size = hdr_size;
@@ -621,17 +624,22 @@ static efi_status_t EFIAPI efi_net_receive
memcpy(src_addr, eth_hdr->et_src, ARP_HLEN);
if (protocol)
*protocol = protlen;
- if (*buffer_size < net_rx_packet_len) {
+ if (*buffer_size < receive_lengths[rx_packet_idx]) {
/* Packet doesn't fit, try again with bigger buffer */
- *buffer_size = net_rx_packet_len;
+ *buffer_size = receive_lengths[rx_packet_idx];
ret = EFI_BUFFER_TOO_SMALL;
goto out;
}
/* Copy packet */
- memcpy(buffer, net_rx_packet, net_rx_packet_len);
- *buffer_size = net_rx_packet_len;
- new_rx_packet = 0;
- this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
+ memcpy(buffer, receive_buffer[rx_packet_idx],
+ receive_lengths[rx_packet_idx]);
+ *buffer_size = receive_lengths[rx_packet_idx];
+ rx_packet_idx = (rx_packet_idx + 1) % ETH_PACKETS_BATCH_RECV;
+ rx_packet_num--;
+ if (rx_packet_num)
+ this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
+ else
+ wait_for_packet->is_signaled = true;
out:
return EFI_EXIT(ret);
}
@@ -664,7 +672,26 @@ void efi_net_set_dhcp_ack(void *pkt, int len)
*/
static void efi_net_push(void *pkt, int len)
{
- new_rx_packet = true;
+ int rx_packet_next;
+
+ /* Check that we at least received an Ethernet header */
+ if (len < sizeof(struct ethernet_hdr))
+ return;
+
+ /* Check that the buffer won't overflow */
+ if (len > PKTSIZE_ALIGN)
+ return;
+
+ /* Can't store more than pre-alloced buffer */
+ if (rx_packet_num >= ETH_PACKETS_BATCH_RECV)
+ return;
+
+ rx_packet_next = (rx_packet_idx + rx_packet_num) %
+ ETH_PACKETS_BATCH_RECV;
+ memcpy(receive_buffer[rx_packet_next], pkt, len);
+ receive_lengths[rx_packet_next] = len;
+
+ rx_packet_num++;
}
/**
@@ -689,20 +716,14 @@ static void EFIAPI efi_network_timer_notify(struct
efi_event *event,
if (!this || this->mode->state != EFI_N
Re: efi_loader: fix free() before use in RX path
On Tue, Oct 06, 2020 at 10:26:44PM +0200, Heinrich Schuchardt wrote:
> On 10/6/20 6:32 PM, Patrick Wildt wrote:
> > On Tue, Oct 06, 2020 at 04:56:31PM +0200, Patrick Wildt wrote:
> >> Hi,
> >>
> >> I have an EFI application doing TFTP on an i.MX8MM board. The EFI
> >> application uses the Simple Network Protocol and does ARP itself.
> >> ARP didn't work, and I saw that the replies that were received on
> >> the board were broken.
> >>
> >> Good, as seen from the sending host:
> >> 2acbc7b16422001999ed548808060001080006040002001999ed5488ac1f00012acbc7b16422ac1f007f
> >>
> >> Bad, as seen on the i.MX8MM board:
> >> 60a7fc7f60a7fc7f080006040002001999ed5488ac1f00012acbc7b16422ac1f007f
> >>
> >> As you can see, in the received packet, it looks like the the first
> >> 16 bytes were overwritten, and those look like two 64-bit pointer.
> >>
> >> Looking through the stack, with uclass enabled, the code does:
> >>
> >> eth_rx():
> >> [..]
> >> ret = eth_get_ops(current)->recv(current, flags, );
> >> flags = 0;
> >> if (ret > 0)
> >> net_process_received_packet(packet, ret);
> >> if (ret >= 0 && eth_get_ops(current)->free_pkt)
> >> eth_get_ops(current)->free_pkt(current, packet, ret);
> >> [..]
> >>
> >> recv returns the packet, free_pkt free()s the packet. Thus we may
> >> only use the packet's contents between the recv and the free_pkt.
> >>
> >> net_process_received_packet():
> >> [..]
> >> net_rx_packet = in_packet;
> >> net_rx_packet_len = len;
> >> [..]
> >> if (push_packet) {
> >> (*push_packet)(in_packet, len);
> >> return;
> >>}
> >> [..]
> >>
> >> push_packet is set to efi_net_push during efi_network_timer_notify,
> >> which does nothing more than to set a status flag:
> >>
> >> static void efi_net_push(void *pkt, int len)
> >> {
> >> new_rx_packet = true;
> >> }
> >>
> >> This does *not* touch the packet at all. Instead, efi_net_receive
> >> will, as soon as the EFI application calls it, access net_rx_packet
> >> directly. But this only happens *after* the packet has already been
> >> free()d. Something else could have already started using that memory!
> >>
> >> The following diff changes efi_net_push() to allocate a new buffer, but
> >> I think it's not enough since eth_rx() will try to receive 32 packets
> >> at one time. So I think maybe efi_net_push() needs to add the packets
> >> to a list, and efi_net_receive() takes the first packet from that list.
> >>
> >> Best regards,
> >> Patrick
> >
> > This is a better version, since it maintains a list of packets. This
> > way no packet is missed, since the push method simple pushes a packet
> > onto the list.
> >
> > Do we need to purge the list in efi_net_stop() and/or efi_net_reset()?
> >
>
> Thanks for your analysis.
>
> Could you, please, send a patch with a proper commit message.
>
> Yes, efi_net_stop() and efi_net_reset() both should empty the queue.
>
> > Signed-off-by: Patrick Wildt
> >
> > diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
> > index 22f0123eca..6381c3898d 100644
> > --- a/lib/efi_loader/efi_net.c
> > +++ b/lib/efi_loader/efi_net.c
> > @@ -24,10 +24,28 @@ static const efi_guid_t efi_net_guid =
> > EFI_SIMPLE_NETWORK_PROTOCOL_GUID;
> > static const efi_guid_t efi_pxe_base_code_protocol_guid =
> > EFI_PXE_BASE_CODE_PROTOCOL_GUID;
> > static struct efi_pxe_packet *dhcp_ack;
> > -static bool new_rx_packet;
> > static void *new_tx_packet;
> > static void *transmit_buffer;
> >
> > +/*
> > + * List of packets that still need to be popped by an application
> > + * calling efi_net_receive().
> > + */
> > +LIST_HEAD(efi_packet_queue);
> > +
> > +/**
> > + * struct efi_net_packet - structure containing packet info
> > + *
> > + * @link: link to the list of packets to be processed
> > + * @pkt: network packet
> > + * @len: length
> > + */
> > +struct efi_net_packet {
> > + struct list_head link;
> > + uchar *pkt;
> > + int len;
> > +};
> > +
> > /*
Re: efi_loader: fix free() before use in RX path
On Tue, Oct 06, 2020 at 04:56:31PM +0200, Patrick Wildt wrote:
> Hi,
>
> I have an EFI application doing TFTP on an i.MX8MM board. The EFI
> application uses the Simple Network Protocol and does ARP itself.
> ARP didn't work, and I saw that the replies that were received on
> the board were broken.
>
> Good, as seen from the sending host:
> 2acbc7b16422001999ed548808060001080006040002001999ed5488ac1f00012acbc7b16422ac1f007f
>
> Bad, as seen on the i.MX8MM board:
> 60a7fc7f60a7fc7f080006040002001999ed5488ac1f00012acbc7b16422ac1f007f
>
> As you can see, in the received packet, it looks like the the first
> 16 bytes were overwritten, and those look like two 64-bit pointer.
>
> Looking through the stack, with uclass enabled, the code does:
>
> eth_rx():
> [..]
> ret = eth_get_ops(current)->recv(current, flags, );
> flags = 0;
> if (ret > 0)
> net_process_received_packet(packet, ret);
> if (ret >= 0 && eth_get_ops(current)->free_pkt)
> eth_get_ops(current)->free_pkt(current, packet, ret);
> [..]
>
> recv returns the packet, free_pkt free()s the packet. Thus we may
> only use the packet's contents between the recv and the free_pkt.
>
> net_process_received_packet():
> [..]
> net_rx_packet = in_packet;
> net_rx_packet_len = len;
> [..]
> if (push_packet) {
> (*push_packet)(in_packet, len);
> return;
>}
> [..]
>
> push_packet is set to efi_net_push during efi_network_timer_notify,
> which does nothing more than to set a status flag:
>
> static void efi_net_push(void *pkt, int len)
> {
> new_rx_packet = true;
> }
>
> This does *not* touch the packet at all. Instead, efi_net_receive
> will, as soon as the EFI application calls it, access net_rx_packet
> directly. But this only happens *after* the packet has already been
> free()d. Something else could have already started using that memory!
>
> The following diff changes efi_net_push() to allocate a new buffer, but
> I think it's not enough since eth_rx() will try to receive 32 packets
> at one time. So I think maybe efi_net_push() needs to add the packets
> to a list, and efi_net_receive() takes the first packet from that list.
>
> Best regards,
> Patrick
This is a better version, since it maintains a list of packets. This
way no packet is missed, since the push method simple pushes a packet
onto the list.
Do we need to purge the list in efi_net_stop() and/or efi_net_reset()?
Signed-off-by: Patrick Wildt
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 22f0123eca..6381c3898d 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -24,10 +24,28 @@ static const efi_guid_t efi_net_guid =
EFI_SIMPLE_NETWORK_PROTOCOL_GUID;
static const efi_guid_t efi_pxe_base_code_protocol_guid =
EFI_PXE_BASE_CODE_PROTOCOL_GUID;
static struct efi_pxe_packet *dhcp_ack;
-static bool new_rx_packet;
static void *new_tx_packet;
static void *transmit_buffer;
+/*
+ * List of packets that still need to be popped by an application
+ * calling efi_net_receive().
+ */
+LIST_HEAD(efi_packet_queue);
+
+/**
+ * struct efi_net_packet - structure containing packet info
+ *
+ * @link: link to the list of packets to be processed
+ * @pkt: network packet
+ * @len: length
+ */
+struct efi_net_packet {
+ struct list_head link;
+ uchar *pkt;
+ int len;
+};
+
/*
* The notification function of this event is called in every timer cycle
* to check if a new network packet has been received.
@@ -577,6 +595,7 @@ static efi_status_t EFIAPI efi_net_receive
efi_status_t ret = EFI_SUCCESS;
struct ethernet_hdr *eth_hdr;
size_t hdr_size = sizeof(struct ethernet_hdr);
+ struct efi_net_packet *pkt;
u16 protlen;
EFI_ENTRY("%p, %p, %p, %p, %p, %p, %p", this, header_size,
@@ -602,16 +621,18 @@ static efi_status_t EFIAPI efi_net_receive
break;
}
- if (!new_rx_packet) {
+ pkt = list_first_entry_or_null(_packet_queue,
+ struct efi_net_packet, link);
+ if (pkt == NULL) {
ret = EFI_NOT_READY;
goto out;
}
/* Fill export parameters */
- eth_hdr = (struct ethernet_hdr *)net_rx_packet;
+ eth_hdr = (struct ethernet_hdr *)pkt->pkt;
protlen = ntohs(eth_hdr->et_protlen);
if (protlen == 0x8100) {
hdr_size += 4;
- protlen = ntohs(*(u16 *)_rx_packet[hdr_size - 2]);
+ protlen = ntohs(*(u16 *)>pkt[hdr_size - 2]);
}
if (header_si
efi_loader: fix free() before use in RX path
Hi,
I have an EFI application doing TFTP on an i.MX8MM board. The EFI
application uses the Simple Network Protocol and does ARP itself.
ARP didn't work, and I saw that the replies that were received on
the board were broken.
Good, as seen from the sending host:
2acbc7b16422001999ed548808060001080006040002001999ed5488ac1f00012acbc7b16422ac1f007f
Bad, as seen on the i.MX8MM board:
60a7fc7f60a7fc7f080006040002001999ed5488ac1f00012acbc7b16422ac1f007f
As you can see, in the received packet, it looks like the the first
16 bytes were overwritten, and those look like two 64-bit pointer.
Looking through the stack, with uclass enabled, the code does:
eth_rx():
[..]
ret = eth_get_ops(current)->recv(current, flags, );
flags = 0;
if (ret > 0)
net_process_received_packet(packet, ret);
if (ret >= 0 && eth_get_ops(current)->free_pkt)
eth_get_ops(current)->free_pkt(current, packet, ret);
[..]
recv returns the packet, free_pkt free()s the packet. Thus we may
only use the packet's contents between the recv and the free_pkt.
net_process_received_packet():
[..]
net_rx_packet = in_packet;
net_rx_packet_len = len;
[..]
if (push_packet) {
(*push_packet)(in_packet, len);
return;
}
[..]
push_packet is set to efi_net_push during efi_network_timer_notify,
which does nothing more than to set a status flag:
static void efi_net_push(void *pkt, int len)
{
new_rx_packet = true;
}
This does *not* touch the packet at all. Instead, efi_net_receive
will, as soon as the EFI application calls it, access net_rx_packet
directly. But this only happens *after* the packet has already been
free()d. Something else could have already started using that memory!
The following diff changes efi_net_push() to allocate a new buffer, but
I think it's not enough since eth_rx() will try to receive 32 packets
at one time. So I think maybe efi_net_push() needs to add the packets
to a list, and efi_net_receive() takes the first packet from that list.
Best regards,
Patrick
Signed-off-by: Patrick Wildt
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 22f0123eca..6e3c29cba2 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -25,6 +25,8 @@ static const efi_guid_t efi_pxe_base_code_protocol_guid =
EFI_PXE_BASE_CODE_PROTOCOL_GUID;
static struct efi_pxe_packet *dhcp_ack;
static bool new_rx_packet;
+static uchar *efi_net_rx_packet;
+static int efi_net_rx_packet_len;
static void *new_tx_packet;
static void *transmit_buffer;
@@ -607,11 +609,11 @@ static efi_status_t EFIAPI efi_net_receive
goto out;
}
/* Fill export parameters */
- eth_hdr = (struct ethernet_hdr *)net_rx_packet;
+ eth_hdr = (struct ethernet_hdr *)efi_net_rx_packet;
protlen = ntohs(eth_hdr->et_protlen);
if (protlen == 0x8100) {
hdr_size += 4;
- protlen = ntohs(*(u16 *)_rx_packet[hdr_size - 2]);
+ protlen = ntohs(*(u16 *)_net_rx_packet[hdr_size - 2]);
}
if (header_size)
*header_size = hdr_size;
@@ -621,16 +623,19 @@ static efi_status_t EFIAPI efi_net_receive
memcpy(src_addr, eth_hdr->et_src, ARP_HLEN);
if (protocol)
*protocol = protlen;
- if (*buffer_size < net_rx_packet_len) {
+ if (*buffer_size < efi_net_rx_packet_len) {
/* Packet doesn't fit, try again with bigger buffer */
- *buffer_size = net_rx_packet_len;
+ *buffer_size = efi_net_rx_packet_len;
ret = EFI_BUFFER_TOO_SMALL;
goto out;
}
/* Copy packet */
- memcpy(buffer, net_rx_packet, net_rx_packet_len);
- *buffer_size = net_rx_packet_len;
+ memcpy(buffer, efi_net_rx_packet, efi_net_rx_packet_len);
+ *buffer_size = efi_net_rx_packet_len;
new_rx_packet = 0;
+ free(efi_net_rx_packet);
+ efi_net_rx_packet = NULL;
+ efi_net_rx_packet_len = 0;
this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
out:
return EFI_EXIT(ret);
@@ -664,6 +669,13 @@ void efi_net_set_dhcp_ack(void *pkt, int len)
*/
static void efi_net_push(void *pkt, int len)
{
+ efi_net_rx_packet = malloc(len);
+ if (efi_net_rx_packet == NULL)
+ return;
+
+ memcpy(efi_net_rx_packet, pkt, len);
+ efi_net_rx_packet_len = len;
+
new_rx_packet = true;
}
Re: [PATCH v3] spl: allow board_spl_fit_post_load() to fail
On Fri, Jun 05, 2020 at 03:54:14PM -0400, Tom Rini wrote: > On Mon, Jun 01, 2020 at 12:08:45PM +0200, Marek Vasut wrote: > > On 6/1/20 4:30 AM, Peng Fan wrote: > > >> Subject: [PATCH v3] spl: allow board_spl_fit_post_load() to fail > > >> > > >> On i.MX platforms board_spl_fit_post_load() can check the loaded SPL > > >> image > > >> for authenticity using its HAB engine. U-Boot's SPL mechanism allows > > >> booting images from other sources as well, but in the current setup the > > >> SPL > > >> would just hang if it encounters an image that does not pass scrutiny. > > > > > > security. > > > > > >> Allowing the function to return an error, allows the SPL to try booting > > >> from > > >> another source as a fallback instead of ending up as a brick. > > > > > > This will break secure boot chain. > > > > How? Please elaborate. > > > > jump_to_image_no_args() will authenticate the image before starting it, > > so I don't think so. However, that is still prone to > > time-of-check/time-of-use attack anyway. > > Yes, please elaborate, thanks! Ping? How will this break the secure boot chain?
Re: rockchip: correctly set vop0 or vop1
On Mon, Jun 08, 2020 at 02:24:32PM +0200, Arnaud Patard wrote:
> Patrick Wildt writes:
>
> > On Mon, Jun 08, 2020 at 10:18:19AM +0200, Arnaud Patard wrote:
> >> Patrick Wildt writes:
> >>
> >> Hi,
> >>
> >> > The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
> >> > vop1, but so far we have set it in both conditions, which is not
> >> > correct.
> >> >
> >> > Can someone verify this is the correct way round? vop1 -> set,
> >> > vop0 -> clear?
> >> >
> >> > Signed-off-by: Patrick Wildt
> >> >
> >> > diff --git a/drivers/video/rockchip/rk_edp.c
> >> > b/drivers/video/rockchip/rk_edp.c
> >> > index 92188be9275..000bd481408 100644
> >> > --- a/drivers/video/rockchip/rk_edp.c
> >> > +++ b/drivers/video/rockchip/rk_edp.c
> >> > @@ -1062,7 +1062,8 @@ static int rk_edp_probe(struct udevice *dev)
> >> > rk_setreg(>grf->soc_con12, 1 << 4);
> >> >
> >> > /* select epd signal from vop0 or vop1 */
> >> > -rk_setreg(>grf->soc_con6, (vop_id == 1) ? (1 << 5) : (1
> >> > << 5));
> >> > +rk_clrsetreg(>grf->soc_con6, (1 << 5),
> >> > +(vop_id == 1) ? (1 << 5) : (0 << 5));
> >>
> >> While working on PBP EDP support, found this too but I'm not sure it's
> >> fine or not. For rk3399, my (not yet published) patch is doing:
> >>
> >> + if (vop_id == 0)
> >> + rk_clrreg(>grf->soc_con20, (1 << 5));
> >> + else
> >> + rk_setreg(>grf->soc_con20, (1 << 5));
> >>
> >> I believe that the rk3288 may need similar treatment but I've yet to
> >> look at the rk3288 manual.
> >>
> >> Arnaud
> >
> > Yes, it does. If you look at the linux code, they have:
> >
> > static const struct rockchip_dp_chip_data rk3399_edp = {
> > .lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
> > .lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
> > .lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL,
> > RK3399_EDP_LCDC_SEL),
> > .chip_type = RK3399_EDP,
> > };
> >
> > static const struct rockchip_dp_chip_data rk3288_dp = {
> > .lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
> > .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
> > .lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL,
> > RK3288_EDP_LCDC_SEL),
> > .chip_type = RK3288_DP,
> > };
> >
> > which indicates that for rk3399 *and* rk3288 the bit has to be set to
> > select "lit". Now your diff looks equivalent to mine, apart from using
> > a different operation to achieve the same goal.
> >
> > The linux code does
> >
> > ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
> > if (ret < 0)
> > return;
> >
> > if (ret)
> > val = dp->data->lcdsel_lit;
> > else
> > val = dp->data->lcdsel_big;
> >
> > Assuming that endpoint_id essentiall returns vop id 0 or vop id 1, this
> > would mean that vop1 -> lit -> set bit and vop0 -> big -> clr bit.
> >
> > That said, my diff seems to be fine, and your RK3399 code as well. Do
> > you agree?
>
> According to the code you've shown, it should be fine for rk3288 I guess
> but not for rk3399. Please note that it's grf soc_con6 register for rk3288
> but grf soc_con20 for rk3399.
>
> Arnaud
Exactly, which is why you had that if defined() in your diff, to compile
one part of the code for RK3288, and the other for RK3399. :) The bit
though happens to be the same.
Re: rockchip: correctly set vop0 or vop1
On Mon, Jun 08, 2020 at 10:18:19AM +0200, Arnaud Patard wrote:
> Patrick Wildt writes:
>
> Hi,
>
> > The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
> > vop1, but so far we have set it in both conditions, which is not
> > correct.
> >
> > Can someone verify this is the correct way round? vop1 -> set,
> > vop0 -> clear?
> >
> > Signed-off-by: Patrick Wildt
> >
> > diff --git a/drivers/video/rockchip/rk_edp.c
> > b/drivers/video/rockchip/rk_edp.c
> > index 92188be9275..000bd481408 100644
> > --- a/drivers/video/rockchip/rk_edp.c
> > +++ b/drivers/video/rockchip/rk_edp.c
> > @@ -1062,7 +1062,8 @@ static int rk_edp_probe(struct udevice *dev)
> > rk_setreg(>grf->soc_con12, 1 << 4);
> >
> > /* select epd signal from vop0 or vop1 */
> > - rk_setreg(>grf->soc_con6, (vop_id == 1) ? (1 << 5) : (1 << 5));
> > + rk_clrsetreg(>grf->soc_con6, (1 << 5),
> > + (vop_id == 1) ? (1 << 5) : (0 << 5));
>
> While working on PBP EDP support, found this too but I'm not sure it's
> fine or not. For rk3399, my (not yet published) patch is doing:
>
> + if (vop_id == 0)
> + rk_clrreg(>grf->soc_con20, (1 << 5));
> + else
> + rk_setreg(>grf->soc_con20, (1 << 5));
>
> I believe that the rk3288 may need similar treatment but I've yet to
> look at the rk3288 manual.
>
> Arnaud
Yes, it does. If you look at the linux code, they have:
static const struct rockchip_dp_chip_data rk3399_edp = {
.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
.lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
.lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
.chip_type = RK3399_EDP,
};
static const struct rockchip_dp_chip_data rk3288_dp = {
.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
.lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
.chip_type = RK3288_DP,
};
which indicates that for rk3399 *and* rk3288 the bit has to be set to
select "lit". Now your diff looks equivalent to mine, apart from using
a different operation to achieve the same goal.
The linux code does
ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
if (ret < 0)
return;
if (ret)
val = dp->data->lcdsel_lit;
else
val = dp->data->lcdsel_big;
Assuming that endpoint_id essentiall returns vop id 0 or vop id 1, this
would mean that vop1 -> lit -> set bit and vop0 -> big -> clr bit.
That said, my diff seems to be fine, and your RK3399 code as well. Do
you agree?
Patrick
rockchip: correctly set vop0 or vop1
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or vop1, but so far we have set it in both conditions, which is not correct. Can someone verify this is the correct way round? vop1 -> set, vop0 -> clear? Signed-off-by: Patrick Wildt diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c index 92188be9275..000bd481408 100644 --- a/drivers/video/rockchip/rk_edp.c +++ b/drivers/video/rockchip/rk_edp.c @@ -1062,7 +1062,8 @@ static int rk_edp_probe(struct udevice *dev) rk_setreg(>grf->soc_con12, 1 << 4); /* select epd signal from vop0 or vop1 */ - rk_setreg(>grf->soc_con6, (vop_id == 1) ? (1 << 5) : (1 << 5)); + rk_clrsetreg(>grf->soc_con6, (1 << 5), + (vop_id == 1) ? (1 << 5) : (0 << 5)); rockchip_edp_wait_hpd(priv);
Re: [PATCH v3 2/2] rockchip: Enable PCIe and NVMe on ROCKPro64
On Sun, Jun 07, 2020 at 02:57:00PM +0100, Peter Robinson wrote: > On Sun, Jun 7, 2020 at 2:47 PM Peter Robinson wrote: > > > > On Sun, Jun 7, 2020 at 1:07 PM Mark Kettenis wrote: > > > > > > Enable CONFIG_PCI and CONFIG_NVME and related configs for the > > > ROCKPro64 board. > > > > > > Signed-off-by: Mark Kettenis > > > Reviewed-by: Kever Yang > > Reviewed-by: Peter Robinson > > > > It's generally considered good taste to cc: the maintainer, you can > > find out who that is with "./scripts/get_maintainer.pl > > configs/pinebook-pro-rk3399_defconfig" > > Oh and that comment was meant against the Pinebook pro, I think > someone else already sent patches for the RockPro64 to do this Heh. I just took the same list of people that was CCed here. I trusted Mark's mail-sending-skills to already CC the people that are likely to respond to diffs. ;) Maybe next time I'll remember how the script is called.
rockchip: enable PCIe and NVMe on Pinebook Pro
Enable CONFIG_PCI and CONFIG_NVME and related configs for the Pinebook Pro. Signed-off-by: Patrick Wildt diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 9cce7ac00c1..0c129b9aebb 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y @@ -47,12 +48,15 @@ CONFIG_SF_DEFAULT_SPEED=2000 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SPI=y
[PATCH v3] spl: allow board_spl_fit_post_load() to fail
On i.MX platforms board_spl_fit_post_load() can check the loaded
SPL image for authenticity using its HAB engine. U-Boot's SPL
mechanism allows booting images from other sources as well, but
in the current setup the SPL would just hang if it encounters an
image that does not pass scrutiny. Allowing the function to return
an error, allows the SPL to try booting from another source as a
fallback instead of ending up as a brick.
Signed-off-by: Patrick Wildt
---
Changes in v3:
- use EINVAL as return value to have a proper errno
Changes in v2:
- set SPL_FIT_FOUND only after successful post load
arch/arm/mach-imx/spl.c | 6 --
common/spl/spl_fit.c| 10 ++
include/spl.h | 2 +-
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 1a231c67f5a..1a0d979e2d0 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -313,7 +313,7 @@ ulong board_spl_fit_size_align(ulong size)
return size;
}
-void board_spl_fit_post_load(ulong load_addr, size_t length)
+int board_spl_fit_post_load(ulong load_addr, size_t length)
{
u32 offset = length - CONFIG_CSF_SIZE;
@@ -321,8 +321,10 @@ void board_spl_fit_post_load(ulong load_addr, size_t
length)
offset + IVT_SIZE + CSF_PAD_SIZE,
offset)) {
puts("spl: ERROR: image authentication unsuccessful\n");
- hang();
+ return -EINVAL;
}
+
+ return 0;
}
#endif
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f581a224213..ead4c6713af 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -26,8 +26,9 @@ DECLARE_GLOBAL_DATA_PTR;
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
#endif
-__weak void board_spl_fit_post_load(ulong load_addr, size_t length)
+__weak int board_spl_fit_post_load(ulong load_addr, size_t length)
{
+ return 0;
}
__weak ulong board_spl_fit_size_align(ulong size)
@@ -677,11 +678,12 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
if (spl_image->entry_point == FDT_ERROR || spl_image->entry_point == 0)
spl_image->entry_point = spl_image->load_addr;
- spl_image->flags |= SPL_FIT_FOUND;
-
#ifdef CONFIG_IMX_HAB
- board_spl_fit_post_load((ulong)fit, size);
+ ret = board_spl_fit_post_load((ulong)fit, size);
+ if (ret)
+ return ret;
#endif
+ spl_image->flags |= SPL_FIT_FOUND;
return 0;
}
diff --git a/include/spl.h b/include/spl.h
index b31c9bb4ab2..2607767d940 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -564,7 +564,7 @@ int board_return_to_bootrom(struct spl_image_info
*spl_image,
* board_spl_fit_post_load - allow process images after loading finished
*
*/
-void board_spl_fit_post_load(ulong load_addr, size_t length);
+int board_spl_fit_post_load(ulong load_addr, size_t length);
/**
* board_spl_fit_size_align - specific size align before processing payload
--
2.26.2
Re: [PATCH] ARM: imx: hab: panic on authentication failure
On Sun, May 31, 2020 at 06:51:14PM +0200, Marek Vasut wrote: > On 5/31/20 5:53 PM, Patrick Wildt wrote: > > On Sun, May 31, 2020 at 05:38:05PM +0200, Marek Vasut wrote: > >> On 5/30/20 10:53 PM, Patrick Wildt wrote: > >>> On Sat, May 30, 2020 at 10:29:19PM +0200, Marek Vasut wrote: > >>>> On 5/30/20 10:14 PM, Patrick Wildt wrote: > >>>>> On Sat, May 30, 2020 at 03:31:29PM -0300, Fabio Estevam wrote: > >>>>>> Hi Marek, > >>>>>> > >>>>>> [Adding Breno] > >>>>>> > >>>>>> On Sat, May 30, 2020 at 3:29 PM Marek Vasut wrote: > >>>>>>> > >>>>>>> Instead of hang()ing the system and thus disallowing any automated > >>>>>>> recovery possibility from a HAB authentication failure, panic() . > >>>>>>> The panic() function can be configured to hang() the system after > >>>>>>> printing an error message, however the default is to reset the > >>>>>>> system instead. > >>>>>>> > >>>>>>> This allows redundant boot to work correctly. In case the primary > >>>>>>> or secondary image cannot be authenticated, the system reboots and > >>>>>>> bootrom can try to start the other one. > >>>>>>> > >>>>>>> Signed-off-by: Marek Vasut > >>>>>>> Cc: Fabio Estevam > >>>>>>> Cc: NXP i.MX U-Boot Team > >>>>>>> Cc: Peng Fan > >>>>>>> Cc: Stefano Babic > >>>>>> > >>>>>> This is a better behavior indeed: > >>>>>> > >>>>>> Reviewed-by: Fabio Estevam > >>>>> > >>>>> What about this? Have you ignored this patch for a reason? :/ > >>>>> > >>>>> https://marc.info/?l=u-boot=159069441005730=2 > >>>> > >>>> Yes, and the reason is I was not even aware of your patch, sorry. The CC > >>>> list in this mail should cover all the interested parties, so use it > >>>> when sending V2, or use patman. > >>> > >>> I already had 11 people on CC, but apparently I missed you. > >>> > >>>> The patch looks fine, one nit is that you should return errno.h return > >>>> value and another is that it changes the current behavior. Now that I > >>>> look at this imx code, board_spl_fit_post_load() should not even be in > >>>> arch/ , sigh, but that's for separate patch either way. > >>>> > >>>> So I think if you want to support this sort of fallback, you should make > >>>> the board_spl_fit_post_load() be in board/ files, with default __weak > >>>> implementation calling some arch_hab_authenticate...() which implements > >>>> current content of board_spl_fit_post_load(), and let boards decide how > >>>> to handle the fallback if it needs to be altered. > >>>> > >>>> Would that work ? > >>> > >>> I'm not sure. In comparison to the people from NXP who are paid to > >>> upstream their code and still don't do it correctly, I'm doing this > >>> in my spare time and I'm not sure I want to bikeshed all day long. > >>> > >>> I can send a V3 that replaces the -1 with EINVAL, EACCESS, EPERM or > >>> something the like. If you want to clean up after NXP, feel free to. > >> > >> In fact, what is it that you're trying to achieve with this fallback ? > >> What are you falling back to , another fallback fitImage ? > > > > Exactly. > > > > I have a device with a glued enclosure, with no external sources, apart > > from a serial console. If the SPL fails to load the U-Boot main image > > from eMMC, the only way to fix it is to destroy the case, open up the > > enclosure and short some lines. That's not really nice, since we'd have > > to get a new enclosure, new serial number label,... it's a hassle. > > Look for SRC PERSIST_SECONDARY_BOOT in your datasheet then. This will > let you use two copies of SPL, two copies of U-Boot, etc. I'll have a look! > > If the SPL was gone as well, the BootROM would fall back to other > > sources. But with only one half of U-Boot missing, it would just hang. > > I'm sure that's also why you replace the hang() with a panic(). > > > > I thought that if the SPL is still fine, but only the U-Boot image was > > gone, why not make use of the spl_boot_list to try and boot from another > > source? Like yModem. For that I sent the following fix, also with many > > people CCd: > > > > https://marc.info/?l=u-boot=158893200030861=2 > > > > Now the board spl boot order can have eMMC as first, and yModem as > > second. If eMMC fails, it falls back to yModem. If none work, it > > though hang()s, doing > > > > puts(SPL_TPL_PROMPT "failed to boot from all boot devices\n"); > > hang(); > > > > Maybe you want this as panic instead? > > > > Anyway, I think this is nicer option for recovery, instead of simply > > hanging or rebooting. > > The problem is, this only works for fitImage and not for raw uImage. But > in your case, that is probably OK. > > So if you can just fix the errno return value to some -EINVAL (?) and > send a V3, I think that would be good. Ok, will do, thanks!
Re: [PATCH] ARM: imx: hab: panic on authentication failure
On Sun, May 31, 2020 at 05:38:05PM +0200, Marek Vasut wrote: > On 5/30/20 10:53 PM, Patrick Wildt wrote: > > On Sat, May 30, 2020 at 10:29:19PM +0200, Marek Vasut wrote: > >> On 5/30/20 10:14 PM, Patrick Wildt wrote: > >>> On Sat, May 30, 2020 at 03:31:29PM -0300, Fabio Estevam wrote: > >>>> Hi Marek, > >>>> > >>>> [Adding Breno] > >>>> > >>>> On Sat, May 30, 2020 at 3:29 PM Marek Vasut wrote: > >>>>> > >>>>> Instead of hang()ing the system and thus disallowing any automated > >>>>> recovery possibility from a HAB authentication failure, panic() . > >>>>> The panic() function can be configured to hang() the system after > >>>>> printing an error message, however the default is to reset the > >>>>> system instead. > >>>>> > >>>>> This allows redundant boot to work correctly. In case the primary > >>>>> or secondary image cannot be authenticated, the system reboots and > >>>>> bootrom can try to start the other one. > >>>>> > >>>>> Signed-off-by: Marek Vasut > >>>>> Cc: Fabio Estevam > >>>>> Cc: NXP i.MX U-Boot Team > >>>>> Cc: Peng Fan > >>>>> Cc: Stefano Babic > >>>> > >>>> This is a better behavior indeed: > >>>> > >>>> Reviewed-by: Fabio Estevam > >>> > >>> What about this? Have you ignored this patch for a reason? :/ > >>> > >>> https://marc.info/?l=u-boot=159069441005730=2 > >> > >> Yes, and the reason is I was not even aware of your patch, sorry. The CC > >> list in this mail should cover all the interested parties, so use it > >> when sending V2, or use patman. > > > > I already had 11 people on CC, but apparently I missed you. > > > >> The patch looks fine, one nit is that you should return errno.h return > >> value and another is that it changes the current behavior. Now that I > >> look at this imx code, board_spl_fit_post_load() should not even be in > >> arch/ , sigh, but that's for separate patch either way. > >> > >> So I think if you want to support this sort of fallback, you should make > >> the board_spl_fit_post_load() be in board/ files, with default __weak > >> implementation calling some arch_hab_authenticate...() which implements > >> current content of board_spl_fit_post_load(), and let boards decide how > >> to handle the fallback if it needs to be altered. > >> > >> Would that work ? > > > > I'm not sure. In comparison to the people from NXP who are paid to > > upstream their code and still don't do it correctly, I'm doing this > > in my spare time and I'm not sure I want to bikeshed all day long. > > > > I can send a V3 that replaces the -1 with EINVAL, EACCESS, EPERM or > > something the like. If you want to clean up after NXP, feel free to. > > In fact, what is it that you're trying to achieve with this fallback ? > What are you falling back to , another fallback fitImage ? Exactly. I have a device with a glued enclosure, with no external sources, apart from a serial console. If the SPL fails to load the U-Boot main image from eMMC, the only way to fix it is to destroy the case, open up the enclosure and short some lines. That's not really nice, since we'd have to get a new enclosure, new serial number label,... it's a hassle. If the SPL was gone as well, the BootROM would fall back to other sources. But with only one half of U-Boot missing, it would just hang. I'm sure that's also why you replace the hang() with a panic(). I thought that if the SPL is still fine, but only the U-Boot image was gone, why not make use of the spl_boot_list to try and boot from another source? Like yModem. For that I sent the following fix, also with many people CCd: https://marc.info/?l=u-boot=158893200030861=2 Now the board spl boot order can have eMMC as first, and yModem as second. If eMMC fails, it falls back to yModem. If none work, it though hang()s, doing puts(SPL_TPL_PROMPT "failed to boot from all boot devices\n"); hang(); Maybe you want this as panic instead? Anyway, I think this is nicer option for recovery, instead of simply hanging or rebooting. Patrick
Re: [PATCH] ARM: imx: hab: panic on authentication failure
On Sat, May 30, 2020 at 10:29:19PM +0200, Marek Vasut wrote: > On 5/30/20 10:14 PM, Patrick Wildt wrote: > > On Sat, May 30, 2020 at 03:31:29PM -0300, Fabio Estevam wrote: > >> Hi Marek, > >> > >> [Adding Breno] > >> > >> On Sat, May 30, 2020 at 3:29 PM Marek Vasut wrote: > >>> > >>> Instead of hang()ing the system and thus disallowing any automated > >>> recovery possibility from a HAB authentication failure, panic() . > >>> The panic() function can be configured to hang() the system after > >>> printing an error message, however the default is to reset the > >>> system instead. > >>> > >>> This allows redundant boot to work correctly. In case the primary > >>> or secondary image cannot be authenticated, the system reboots and > >>> bootrom can try to start the other one. > >>> > >>> Signed-off-by: Marek Vasut > >>> Cc: Fabio Estevam > >>> Cc: NXP i.MX U-Boot Team > >>> Cc: Peng Fan > >>> Cc: Stefano Babic > >> > >> This is a better behavior indeed: > >> > >> Reviewed-by: Fabio Estevam > > > > What about this? Have you ignored this patch for a reason? :/ > > > > https://marc.info/?l=u-boot=159069441005730=2 > > Yes, and the reason is I was not even aware of your patch, sorry. The CC > list in this mail should cover all the interested parties, so use it > when sending V2, or use patman. I already had 11 people on CC, but apparently I missed you. > The patch looks fine, one nit is that you should return errno.h return > value and another is that it changes the current behavior. Now that I > look at this imx code, board_spl_fit_post_load() should not even be in > arch/ , sigh, but that's for separate patch either way. > > So I think if you want to support this sort of fallback, you should make > the board_spl_fit_post_load() be in board/ files, with default __weak > implementation calling some arch_hab_authenticate...() which implements > current content of board_spl_fit_post_load(), and let boards decide how > to handle the fallback if it needs to be altered. > > Would that work ? I'm not sure. In comparison to the people from NXP who are paid to upstream their code and still don't do it correctly, I'm doing this in my spare time and I'm not sure I want to bikeshed all day long. I can send a V3 that replaces the -1 with EINVAL, EACCESS, EPERM or something the like. If you want to clean up after NXP, feel free to. Which errno would you like to see? Best regards, Patrick
Re: [PATCH] ARM: imx: hab: panic on authentication failure
On Sat, May 30, 2020 at 03:31:29PM -0300, Fabio Estevam wrote: > Hi Marek, > > [Adding Breno] > > On Sat, May 30, 2020 at 3:29 PM Marek Vasut wrote: > > > > Instead of hang()ing the system and thus disallowing any automated > > recovery possibility from a HAB authentication failure, panic() . > > The panic() function can be configured to hang() the system after > > printing an error message, however the default is to reset the > > system instead. > > > > This allows redundant boot to work correctly. In case the primary > > or secondary image cannot be authenticated, the system reboots and > > bootrom can try to start the other one. > > > > Signed-off-by: Marek Vasut > > Cc: Fabio Estevam > > Cc: NXP i.MX U-Boot Team > > Cc: Peng Fan > > Cc: Stefano Babic > > This is a better behavior indeed: > > Reviewed-by: Fabio Estevam What about this? Have you ignored this patch for a reason? :/ https://marc.info/?l=u-boot=159069441005730=2
[PATCH v2] spl: allow board_spl_fit_post_load() to fail
On i.MX platforms board_spl_fit_post_load() can check the loaded
SPL image for authenticity using its HAB engine. U-Boot's SPL
mechanism allows booting images from other sources as well, but
in the current setup the SPL would just hang if it encounters an
image that does not pass scrutiny. Allowing the function to return
an error, allows the SPL to try booting from another source as a
fallback instead of ending up as a brick.
Signed-off-by: Patrick Wildt
---
Changes in v2:
- set SPL_FIT_FOUND only after successful post load
arch/arm/mach-imx/spl.c | 6 --
common/spl/spl_fit.c| 10 ++
include/spl.h | 2 +-
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 1a231c67f5a..bbf398f18a7 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -313,7 +313,7 @@ ulong board_spl_fit_size_align(ulong size)
return size;
}
-void board_spl_fit_post_load(ulong load_addr, size_t length)
+int board_spl_fit_post_load(ulong load_addr, size_t length)
{
u32 offset = length - CONFIG_CSF_SIZE;
@@ -321,8 +321,10 @@ void board_spl_fit_post_load(ulong load_addr, size_t
length)
offset + IVT_SIZE + CSF_PAD_SIZE,
offset)) {
puts("spl: ERROR: image authentication unsuccessful\n");
- hang();
+ return -1;
}
+
+ return 0;
}
#endif
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f581a224213..ead4c6713af 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -26,8 +26,9 @@ DECLARE_GLOBAL_DATA_PTR;
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
#endif
-__weak void board_spl_fit_post_load(ulong load_addr, size_t length)
+__weak int board_spl_fit_post_load(ulong load_addr, size_t length)
{
+ return 0;
}
__weak ulong board_spl_fit_size_align(ulong size)
@@ -677,11 +678,12 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
if (spl_image->entry_point == FDT_ERROR || spl_image->entry_point == 0)
spl_image->entry_point = spl_image->load_addr;
- spl_image->flags |= SPL_FIT_FOUND;
-
#ifdef CONFIG_IMX_HAB
- board_spl_fit_post_load((ulong)fit, size);
+ ret = board_spl_fit_post_load((ulong)fit, size);
+ if (ret)
+ return ret;
#endif
+ spl_image->flags |= SPL_FIT_FOUND;
return 0;
}
diff --git a/include/spl.h b/include/spl.h
index b31c9bb4ab2..2607767d940 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -564,7 +564,7 @@ int board_return_to_bootrom(struct spl_image_info
*spl_image,
* board_spl_fit_post_load - allow process images after loading finished
*
*/
-void board_spl_fit_post_load(ulong load_addr, size_t length);
+int board_spl_fit_post_load(ulong load_addr, size_t length);
/**
* board_spl_fit_size_align - specific size align before processing payload
--
2.26.2
Re: imx: move ATF to the back of the FIT to fix loading over yModem
Ping?
On Fri, May 08, 2020 at 11:59:47AM +0200, Patrick Wildt wrote:
> With yModem the FIT Image is only supplied once, so we can only
> seek forward in the yModem supplied image and never backwards.
> With the recent changes to the SPL mechanism, including loading
> U-Boot first, FDT after, then the loadables, we must also reorder
> the FIT image script to make sure that the loadables are last in
> the FIT image.
>
> Signed-off-by: Patrick Wildt
>
> diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh
> b/arch/arm/mach-imx/mkimage_fit_atf.sh
> index dd1ca5ad3fd..fe12b7bb4bd 100755
> --- a/arch/arm/mach-imx/mkimage_fit_atf.sh
> +++ b/arch/arm/mach-imx/mkimage_fit_atf.sh
> @@ -62,6 +62,23 @@ cat << __HEADER_EOF
> compression = "none";
> load = <$BL33_LOAD_ADDR>;
> };
> +__HEADER_EOF
> +
> +cnt=1
> +for dtname in $*
> +do
> + cat << __FDT_IMAGE_EOF
> + fdt@$cnt {
> + description = "$(basename $dtname .dtb)";
> + data = /incbin/("$dtname");
> + type = "flat_dt";
> + compression = "none";
> + };
> +__FDT_IMAGE_EOF
> +cnt=$((cnt+1))
> +done
> +
> +cat << __HEADER_EOF
> atf@1 {
> description = "ARM Trusted Firmware";
> os = "arm-trusted-firmware";
> @@ -88,20 +105,6 @@ cat << __HEADER_EOF
> __HEADER_EOF
> fi
>
> -cnt=1
> -for dtname in $*
> -do
> - cat << __FDT_IMAGE_EOF
> - fdt@$cnt {
> - description = "$(basename $dtname .dtb)";
> - data = /incbin/("$dtname");
> - type = "flat_dt";
> - compression = "none";
> - };
> -__FDT_IMAGE_EOF
> -cnt=$((cnt+1))
> -done
> -
> cat << __CONF_HEADER_EOF
> };
> configurations {
Re: [PATCH 1/1] imx: rom api: fix image offset computation
On Tue, May 12, 2020 at 03:09:54PM +0200, S??bastien Szymanski wrote: > According to the table 6-25 "Primary image offset and IVT offset > details", in the IMX8MNRM, the ROM expects the following image offset: > > SD: 32KB > eMMC: 0 if image is in boot partion and 32KB if it is on user partition > NAND: 0 > FlexSPI: 4KB > SPI: 0 > > On eMMC, it is more likely that U-Boot is on the boot partion, so rework > the offset computation by handling the two specific cases (SD and > FlexSPI). Likely, but not really. I have a product where it's on the eMMC but not in a boot partition. If this gets committed, should I sent a diff to revert it? :-) I'm not (yet?) using that code, but shouldn't there be a way to see if we are on a boot partition or not? Best regards, Patrick > Signed-off-by: S??bastien Szymanski > --- > arch/arm/mach-imx/spl_imx_romapi.c | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-imx/spl_imx_romapi.c > b/arch/arm/mach-imx/spl_imx_romapi.c > index 5dc0f7174e..1e9d7bd9ab 100644 > --- a/arch/arm/mach-imx/spl_imx_romapi.c > +++ b/arch/arm/mach-imx/spl_imx_romapi.c > @@ -84,10 +84,12 @@ static int spl_romapi_load_image_seekable(struct > spl_image_info *spl_image, > image_offset, pagesize, offset); > > if (((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_FLEXSPINOR) > - offset = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512; > + offset = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x1000; > + else if (((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_SD) > + offset = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000; > else > offset = image_offset + > - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000; > + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512; > > size = ALIGN(sizeof(struct image_header), pagesize); > ret = g_rom_api->download_image((u8 *)header, offset, size, > -- > 2.26.2 >
Re: efi_loader: tighten PE verification code?
On Sun, May 10, 2020 at 02:36:51PM -0600, Simon Glass wrote: > Hi Patrick, > > On Fri, 8 May 2020 at 12:56, Patrick Wildt wrote: > > > > Hi, > > > > even though this mail has a diff, it's not supposed to be a patch. I > > have started adjusting my fuzzer to the upstreamed EFI Secure Boot code > > and I hit a few issues right away. Two of those I have already sent and > > were reviewed. I have seen more, but since I needed to reschedule some > > things I couldn't continue and unfortunately have to postpone fuzzing > > the code. I can assure you if someone starts fuzzing that code, we will > > find a few more bugs. > > > > Especially since this is "Secure Boot", this part should definitely be > > air tight. > > > > One thing I saw is that the virt_size is smaller then the memcpy below > > at the "Copy PE headers" line then actually copies. > > > > Another thing I saw is SizeOfRawData can be bigger then the VirtualSize, > > and PointerToRawData + SizeOfRawData bigger then the allocated size. > > > > I'm not sure if this is the right place to do the checks. Maybe they > > need to be at the place where we are adding the image regions. I guess > > the fields should be properly verified in view of "does it make sense?". > > > > Also I'm questioning whether it's a good idea to continue parsing the > > file if it's already clear that the signature can't be verified against > > the "db". I can understand that you'd like to finish loading the file > > into an object, and some other instance decides whether or not it's fine > > to start that image, but you also open yourself to issues when you're > > parsing a file that obviously is against the current security policy. > > > > If you keep on parsing a file that obviously (because tested against the > > "db") cannot be allowed to boot anyway, the checks for the headers need > > to be even tighter. > > > > I'd be unhappy to see U-Boot CVEs come up regarding PE parsing issues. > > > > Best regards, > > Patrick > > Can I suggest adding some more unit tests? > > Regards, > Simon Hi, It's a good suggestion. Now it only needs someone with enough time to actually do it. :-) I'll come back to this in a few weeks when my current project becomes quieter. I wish I could right now. Regards, Patrick
