Re: [U-Boot-Users] Loading from NAND using 'nboot' Periodically Fails Where 'nand read' Succeeds
Hi Grant, On Monday 02 June 2008, Grant Erickson wrote: Before I jump in with the BDI and start debugging, has anyone else using 'nboot' and FIT images noticed that 'nboot' periodically fails where 'nand read.i' of the SAME region of NAND succeeds? Not sure here, since I never used nboot before. But nand read.i skips bad blocks and perhaps nboot not? I suggest that you check if this is the case and if you have bad blocks in this NAND area. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] U-boot and ethernet on a Lubbock board
2008/6/2 Wolfgang Denk [EMAIL PROTECTED]: In message [EMAIL PROTECTED] you wrote: I recently read the FAQ again and found about using valid MAC addresses: * Should I recompile my u-boot with the new local-admin MAC address or just I need to write the new config on the board? Neither one nor the other. You just have to define a correct value for the ethaddr variable in your environment and save that. Thanks. That's what I wanted to mean when I said writing config on the board. :) - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH] 83xx/85xx/86xx: add more MxMR local bus definitions
83xx/85xx/86xx: add more MxMR local bus definitions This patch adds more macro definitions for the UPM Machine Mode Registers They are copied from include/mpc82xx.h to simplify the merge of all 8xxx common local bus definitions into include/asm-ppc/fsl_lbc.h. They are required for my forthcoming FSL NAND UPM driver re-write and the support for the TQM8548 module. This patch is based on the following two patches from Anton Vorontsov: http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06511.html http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html I leave coding style violation fixes, code beautification and name corrections to somebody else ;-(. Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] --- include/asm-ppc/fsl_lbc.h | 43 ++- 1 file changed, 38 insertions(+), 5 deletions(-) Index: u-boot/include/asm-ppc/fsl_lbc.h === --- u-boot.orig/include/asm-ppc/fsl_lbc.h +++ u-boot/include/asm-ppc/fsl_lbc.h @@ -161,11 +161,6 @@ #define OR_UPM_EAD 0x0001 #define OR_UPM_EAD_SHIFT 0 -#define MxMR_OP_NORM 0x /* Normal Operation */ -#define MxMR_DSx_2_CYCL0x0040 /* 2 cycle Disable Period */ -#define MxMR_OP_WARR 0x1000 /* Write to Array */ -#define MxMR_BSEL 0x8000 /* Bus Select */ - #define OR_SDRAM_AM0x8000 #define OR_SDRAM_AM_SHIFT 15 #define OR_SDRAM_XAM 0x6000 @@ -198,6 +193,44 @@ #define OR_AM_2GB 0x8000 #define OR_AM_4GB 0x +/* MxMR - UPM Machine A/B/C Mode Registers + */ +#define MxMR_MAD_MSK 0x003f /* Machine Address Mask */ +#define MxMR_TLFx_MSK 0x03c0 /* Refresh Loop Field Mask */ +#define MxMR_WLFx_MSK 0x3c00 /* Write Loop Field Mask*/ +#define MxMR_WLFx_1X 0x0400 /* executed 1 time*/ +#define MxMR_WLFx_2X 0x0800 /* executed 2 times */ +#define MxMR_WLFx_3X 0x0c00 /* executed 3 times */ +#define MxMR_WLFx_4X 0x1000 /* executed 4 times */ +#define MxMR_WLFx_5X 0x1400 /* executed 5 times */ +#define MxMR_WLFx_6X 0x1800 /* executed 6 times */ +#define MxMR_WLFx_7X 0x1c00 /* executed 7 times */ +#define MxMR_WLFx_8X 0x2000 /* executed 8 times */ +#define MxMR_WLFx_9X 0x2400 /* executed 9 times */ +#define MxMR_WLFx_10X 0x2800 /* executed 10 times */ +#define MxMR_WLFx_11X 0x2c00 /* executed 11 times */ +#define MxMR_WLFx_12X 0x3000 /* executed 12 times */ +#define MxMR_WLFx_13X 0x3400 /* executed 13 times */ +#define MxMR_WLFx_14X 0x3800 /* executed 14 times */ +#define MxMR_WLFx_15X 0x3c00 /* executed 15 times */ +#define MxMR_WLFx_16X 0x /* executed 16 times */ +#define MxMR_RLFx_MSK 0x0003c000 /* Read Loop Field Mask */ +#define MxMR_GPL_x4DIS 0x0004 /* GPL_A4 Ouput Line Disable*/ +#define MxMR_G0CLx_MSK 0x0038 /* General Line 0 Control Mask */ +#define MxMR_DSx_1_CYCL0x /* 1 cycle Disable Period */ +#define MxMR_DSx_2_CYCL0x0040 /* 2 cycle Disable Period */ +#define MxMR_DSx_3_CYCL0x0080 /* 3 cycle Disable Period */ +#define MxMR_DSx_4_CYCL0x00c0 /* 4 cycle Disable Period */ +#define MxMR_DSx_MSK 0x00c0 /* Disable Timer Period Mask*/ +#define MxMR_AMx_MSK 0x0700 /* Addess Multiplex Size Mask */ +#define MxMR_OP_NORM 0x /* Normal Operation */ +#define MxMR_OP_WARR 0x1000 /* Write to Array */ +#define MxMR_OP_RARR 0x2000 /* Read from Array */ +#define MxMR_OP_RUNP 0x3000 /* Run Pattern */ +#define MxMR_OP_MSK0x3000 /* Command Opcode Mask */ +#define MxMR_RFEN 0x4000 /* Refresh Enable */ +#define MxMR_BSEL 0x8000 /* Bus Select */ + #define LBLAWAR_EN 0x8000 #define LBLAWAR_4KB0x000B #define LBLAWAR_8KB0x000C - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/
[U-Boot-Users] [PATCH] PPC: add accessor macros to clear and set bits in one shot
PPC: add accessor macros to clear and set bits in one shot This patch adds macros from linux/include/asm-powerpc/io.h to clear and set bits in one shot using the in_be32, out_be32, etc. accessor functions. They are very handy to manipulate bits it I/O registers. This patch is required for my forthcoming FSL NAND UPM driver re-write and the support for the TQM8548 module. Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] --- include/asm-ppc/io.h | 28 1 file changed, 28 insertions(+) Index: u-boot/include/asm-ppc/io.h === --- u-boot.orig/include/asm-ppc/io.h +++ u-boot/include/asm-ppc/io.h @@ -238,6 +238,34 @@ extern inline void out_be32(volatile uns __asm__ __volatile__(sync; stw%U0%X0 %1,%0 : =m (*addr) : r (val)); } +/* access ports */ +#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v)) +#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) ~(_v)) + +#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v)) +#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) ~(_v)) + +#define setbits8(_addr, _v) out_8((_addr), in_8(_addr) | (_v)) +#define clrbits8(_addr, _v) out_8((_addr), in_8(_addr) ~(_v)) + +/* Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single read-modify-write. These + * macros can also be used to set a multiple-bit bit pattern using a mask, + * by specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) ~(clear)) | (set)) + +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + /* * Given a physical address and a length, return a virtual address * that can be used to access the memory range with the caching - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH] MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
This patch is based on the following patch sent a few minutes ago:
[PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback
It is untested, of course. Anton, could you please give it a try.
Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED]
---
board/freescale/mpc8360erdk/nand.c | 29 +++--
1 file changed, 27 insertions(+), 2 deletions(-)
Index: u-boot/board/freescale/mpc8360erdk/nand.c
===
--- u-boot.orig/board/freescale/mpc8360erdk/nand.c
+++ u-boot/board/freescale/mpc8360erdk/nand.c
@@ -39,6 +39,28 @@ static const u32 upm_array[] = {
0xfc00, 0xfc00, 0xfc00, 0xfc01, /* Words 60 to 63 */
};
+static int upm_setup_done;
+
+static void upm_setup(struct fsl_upm *upm)
+{
+ int i;
+
+ /* write upm array */
+ out_be32(upm-mxmr, MxMR_OP_WARR);
+
+ for (i = 0; i 64; i++) {
+ out_be32(upm-mdr, upm_array[i]);
+ out_8(upm-io_addr, 0x0);
+ }
+
+ /* normal operation */
+ out_be32(upm-mxmr, MxMR_OP_NORM);
+ while (in_be32(upm-mxmr) != MxMR_OP_NORM)
+ eieio();
+
+ upm_setup_done = 1;
+}
+
static int dev_ready(void)
{
if (in_be32(im-qepio.ioport[4].pdat) 0x2000) {
@@ -52,10 +74,9 @@ static int dev_ready(void)
static struct fsl_upm_nand fun = {
.upm = {
- .array = upm_array,
.io_addr = (void *)CFG_NAND_BASE,
},
- .width = 1,
+ .width = 8,
.upm_cmd_offset = 8,
.upm_addr_offset = 16,
.dev_ready = dev_ready,
@@ -68,5 +89,9 @@ int board_nand_init(struct nand_chip *na
fun.upm.mxmr = im-lbus.mamr;
fun.upm.mdr = im-lbus.mdr;
fun.upm.mar = im-lbus.mar;
+
+ if (!upm_setup_done)
+ upm_setup(fun.upm);
+
return fsl_upm_nand_init(nand, fun);
}
-
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[U-Boot-Users] Ethernet POST freeze on 440EPx boards (PMC440, sequoia)
Hi, I noticed some strange issues with our PMC440 (PPC440PEx based) board and also with the sequoia eval platform. In a certain configuration these boards stuck during the Ethernet POST tests. When they got stuck, it is even not possible to attach with a BDI2000. On the console you only see this: U-Boot 1.3.1 (May 30 2008 - 17:01:42) CPU: AMCC PowerPC 440EPx Rev. A at 533.333 MHz (PLB=133, OPB=66, EBC=66 MHz) Security/Kasumi support Bootstrap Option H - Boot ROM Location I2C (Addr 0x52) Internal PCI arbiter enabled, PCI async ext clock used 32 kB I-Cache 32 kB D-Cache Board: Sequoia - AMCC PPC440EPx Evaluation Board, Rev. F, PCI=33 MHz I2C: ready DTT: 1 is 38 C DRAM: 256 MB FLASH: 64 MB NAND: 32 MiB PCI: Bus Dev VenId DevId Class Int 00 0c 168c 0013 0200 43 In: serial Out: serial Err: serial USB: Host(int phy) Device(ext phy) Net: ppc_4xx_eth0, ppc_4xx_eth1 I first noticed this behavior on our PMC440 boards. These boards are similiar to the Sequoia platform (256MB DDR2 RAM, 2x Gigabit Ethernet, ...). Playing with some printfs I found out that the board got stuck in the Ethernet POST. When I disable U-Boot's LOG_BUFFER feature the problem dissapears. First I never noticed this bahavior on the sequoia platform and I thought about a PMC440 specific issue. Then I compiled U-Boot 1.3.1 for the sequoia platform (1.3.1 is used on PMC440 until now). Last week I got the same issue on the sequoia platform. Not that often as on the PMC440, but the same issue. Because it is easy to reproduce on PMC440 boards, I played a little bit with different configurations: 1) With LOG_BUFFER enabled: often, about every 2nd boot 2) Without LOG_BUFFER (POST messages come out in the console) - issue never seens 3) Modified 4xx Ether POST with RX Buffers in OCM - issue never seens 4) DCACHE turned on - issue never seens On the sequoia board I've only seens it after a reboot from Linux. But on PMC440 also after poweron. This must not have any meaning because I do more testing with our board than with the eval board :-) printf debugging showed up that the boards get stuck in post/cpu/ppc4xx/ether.c in test_ctlr()/ether_post_send(). Some packets are send, recevied and checked correctly. Then suddenly at a random packet size ether_post_send() freezes the board. Did anybody else see this behavior? Did we miss any EMAC errata? Matthias - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] AX88180: new gigabit network driver
On Sunday 01 June 2008, Mike Frysinger wrote: On Sunday 01 June 2008, Wolfgang Denk wrote: In message [EMAIL PROTECTED] wrote: From: Michael Hennerich [EMAIL PROTECTED] = + * $Log:$ + * 1.0.0 2006-09-06 + * New release for AX88180 US2 chip. Also, this is old stuff. Why did you not base your work on more recent code (like version 1.0.1 , 2006-06-14) ? we based our work on the latest at the time. i guess a new version has come out huh. actually, it would seem that ASIX sent us this code directly i guess i'll just keep this Blackfin local as there isnt real interest on our side to get it cleaned up ... sorry for the noise -mike signature.asc Description: This is a digitally signed message part. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback
On Mon, Jun 02, 2008 at 12:11:11PM +0200, Wolfgang Grandegger wrote: NAND FSL UPM: driver re-write using the hwcontrol callback This is a re-write of the NAND FSL UPM driver using the more universal hwcontrol callback (instead of the cmdfunc callback). Here is a brief list of furher modifications: - For the time being, the UPM setup writing the UPM array has been removed from the driver and must now be done by the board specific code. - The bus width definition in struct fsl_upm_nand is now in bits to comply with the corresponding Linux driver. - chip-dev_read is only set if fun-dev_ready != NULL, which is required for boards not connecting the R/B pin. - A few issue have been fixed with MxMR bit manipulation like in the corresponding Linux driver. Note: I think the io_addr field of struct fsl_upm could be removed as well, because the address is already determined by nand-IO_ADDR_[RW], but I'm not 100% sure. This patch has been tested on a TQM8548 modules with the NAND chip Micron MT29F8G08FABWP. This patch is based on the following patches posted to this list a few minutes ago: [PATCH] PPC: add accessor macros to clear and set bits in one shot [PATCH] 83xx/85xx/86xx: add more MxMR local bus definitions Anton, could you please verify if it works on your MPC8360ERDK board as well. A patch will follow. In principle, the NAND driver of the TQM8272 should work with it as well. Works great here (tested on MPC8360E-RDK). Thanks! Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] Acked-by: Anton Vorontsov [EMAIL PROTECTED] - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback
NAND FSL UPM: driver re-write using the hwcontrol callback
This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:
- For the time being, the UPM setup writing the UPM array has been
removed from the driver and must now be done by the board specific
code.
- The bus width definition in struct fsl_upm_nand is now in bits to
comply with the corresponding Linux driver.
- chip-dev_read is only set if fun-dev_ready != NULL, which is
required for boards not connecting the R/B pin.
- A few issue have been fixed with MxMR bit manipulation like in the
corresponding Linux driver.
Note: I think the io_addr field of struct fsl_upm could be removed
as well, because the address is already determined by
nand-IO_ADDR_[RW], but I'm not 100% sure.
This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.
This patch is based on the following patches posted to this list a few
minutes ago:
[PATCH] PPC: add accessor macros to clear and set bits in one shot
[PATCH] 83xx/85xx/86xx: add more MxMR local bus definitions
Anton, could you please verify if it works on your MPC8360ERDK board as
well. A patch will follow. In principle, the NAND driver of the TQM8272
should work with it as well.
Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED]
---
drivers/mtd/nand/fsl_upm.c | 133 +---
include/linux/mtd/fsl_upm.h |1
2 files changed, 52 insertions(+), 82 deletions(-)
Index: u-boot/drivers/mtd/nand/fsl_upm.c
===
--- u-boot.orig/drivers/mtd/nand/fsl_upm.c
+++ u-boot/drivers/mtd/nand/fsl_upm.c
@@ -20,112 +20,89 @@
#include linux/mtd/fsl_upm.h
#include nand.h
-#define FSL_UPM_MxMR_OP_NO (0 28) /* normal operation */
-#define FSL_UPM_MxMR_OP_WA (1 28) /* write array */
-#define FSL_UPM_MxMR_OP_RA (2 28) /* read array */
-#define FSL_UPM_MxMR_OP_RP (3 28) /* run pattern */
+static int fsl_upm_in_pattern;
static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)
{
- out_be32(upm-mxmr, FSL_UPM_MxMR_OP_RP | pat_offset);
+ clrsetbits_be32(upm-mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset);
}
static void fsl_upm_end_pattern(struct fsl_upm *upm)
{
- out_be32(upm-mxmr, FSL_UPM_MxMR_OP_NO);
- while (in_be32(upm-mxmr) != FSL_UPM_MxMR_OP_NO)
+ clrbits32(upm-mxmr, MxMR_OP_RUNP);
+
+ while (in_be32(upm-mxmr) MxMR_OP_RUNP)
eieio();
}
static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, u32 cmd)
{
- out_be32(upm-mar, cmd (32 - width * 8));
- out_8(upm-io_addr, 0x0);
-}
-
-static void fsl_upm_setup(struct fsl_upm *upm)
-{
- int i;
-
- /* write upm array */
- out_be32(upm-mxmr, FSL_UPM_MxMR_OP_WA);
-
- for (i = 0; i 64; i++) {
- out_be32(upm-mdr, upm-array[i]);
+ out_be32(upm-mar, cmd (32 - width));
+ switch (width) {
+ case 8:
out_8(upm-io_addr, 0x0);
+ break;
+ case 16:
+ out_be16(upm-io_addr, 0x0);
+ break;
+ case 32:
+ out_be32(upm-io_addr, 0x0);
+ break;
}
-
- /* normal operation */
- out_be32(upm-mxmr, FSL_UPM_MxMR_OP_NO);
- while (in_be32(upm-mxmr) != FSL_UPM_MxMR_OP_NO)
- eieio();
}
-static void fun_cmdfunc(struct mtd_info *mtd, unsigned command, int column,
- int page_addr)
+static void nand_hwcontrol (struct mtd_info *mtd, int cmd)
{
struct nand_chip *chip = mtd-priv;
struct fsl_upm_nand *fun = chip-priv;
- fsl_upm_start_pattern(fun-upm, fun-upm_cmd_offset);
-
- if (command == NAND_CMD_SEQIN) {
- int readcmd;
-
- if (column = mtd-oobblock) {
- /* OOB area */
- column -= mtd-oobblock;
- readcmd = NAND_CMD_READOOB;
- } else if (column 256) {
- /* First 256 bytes -- READ0 */
- readcmd = NAND_CMD_READ0;
- } else {
- column -= 256;
- readcmd = NAND_CMD_READ1;
- }
- fsl_upm_run_pattern(fun-upm, fun-width, readcmd);
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ fsl_upm_start_pattern(fun-upm, fun-upm_cmd_offset);
+ fsl_upm_in_pattern++;
+ break;
+ case NAND_CTL_SETALE:
+ fsl_upm_start_pattern(fun-upm, fun-upm_addr_offset);
+ fsl_upm_in_pattern++;
+ break;
+ case NAND_CTL_CLRCLE:
+ case NAND_CTL_CLRALE:
+ fsl_upm_end_pattern(fun-upm);
+ fsl_upm_in_pattern--;
+ break;
}
+#if 1
+ /* Temorary check */
+ if
Re: [U-Boot-Users] [PATCH] MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
On Mon, Jun 02, 2008 at 12:14:51PM +0200, Wolfgang Grandegger wrote: MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver This patch is based on the following patch sent a few minutes ago: [PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback It is untested, of course. Anton, could you please give it a try. Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] Acked-by: Anton Vorontsov [EMAIL PROTECTED] [...] @@ -68,5 +89,9 @@ int board_nand_init(struct nand_chip *na fun.upm.mxmr = im-lbus.mamr; fun.upm.mdr = im-lbus.mdr; fun.upm.mar = im-lbus.mar; + + if (!upm_setup_done) Not sure if this is really needed for this board though, nobody will call this function more than once... - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] TQM85xx: NAND support via local bus UPMB
Anton Vorontsov wrote: On Fri, May 30, 2008 at 08:00:32PM +0200, Wolfgang Grandegger wrote: [...] Fix that, but I can still not access the device properly. I'm a bit puzzled because it uses a different algorithm to access the device. While my and the Linux fsl_upm driver uses NAND_ALE, NAND_CLE and friends to manage the access via hwcontrol callback, the fsl_upm driver of U-Boot uses the cmdfunc callback doing different things. I wonder if your NAND chip is a large page one? Because currently fsl_upm_nand hardcodes OOB stuff (bad thing, but with old mtd subsystem I didn't find better way ;-). As for u-boot and linux doing different things... with this patch u-boot and linux are identical: http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot/u-boot-nand-flash.git;a=commitdiff;h=dffa9a8b31b2c21fd3a72ba1f58dd04911b95b6f This is in U-Boot's mtd-2.6.22.1 branch though. :-/ Your approach with hwctl seem to be more universal (for old mtd subsystem), since it doesn't duplicate MTD cmdfunc, thus should work for all NAND chips... Could you prepare a patch that replacing fsl_upm_nand.c's current logic with yours (that should work for your NAND chip), and I'll test it on MPC8360E-RDK? Here we go. I'm going to send 4 patches that work for me on my TQM8548 module. Could you please give it a try? Thanks, Wolfgang. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] Pull request u-boot-blackfin.git
In message [EMAIL PROTECTED] you wrote: I cannot find any of the other subjects. For example, where is any posting that contained the string fix up comment about CONFIG_BFIN_BOOT_MODE i can find them just fine with the same exact subject as well as your replies. dont know what to tell you. Hm... That's strange. Now that I look on external achives, I can indeed for example fine your fix up comment about CONFIG_BFIN_BOOT_MODE posting. OK, got it. My mistake was to just grep for the Subjects, and this didn't work because your subject lines were so long that they were broken into two lines. Sory... You did not repost a cleaned up patch? to fix whitespace ? no, i didnt So how should anybody know if this is the old patch, or if you did any changes, and if so, which changes you did? you have all the source in the open. there's no secrets. if you dont trust me, you can check things by running `diff`. This is not a question of trust, it's a question of rules. And the rule is that the submitter of a patch is supposed to provide cleaned up patches on the mailing list, and only when all issues have been resolved the custodian should pick up the stuff. We don't want to pull unreviewed code. for things that are substantial, reposting makes sense. you want to see reposts of only whitespace changes ? Yes, definitely. How else should anybody know if you ever saw the comments? please keep in mind that your situation is special as you are both the submitter of the patch and the custodian who will pick it up. Please try to act as if you were two different persons communicating only over the mailing list. This is your opinion. Fact is, that I rejected it, and I did not revert this reject, and I do not revert it now. then follow up with what needs to happen. your proposals in the thread werent a solution to the problem at hand and you've rejected anything ive tried to do to appease you. I don't have anything new to add to that topic. I wrote on Tue, 22 Apr 2008 00:19:25: | I accept that the default settings may be not optimal for your use | case, so please accept that your settings may not be always optimal, | either. As a solution I imagine options to the go command. If you | consider this too complicated for your users, please feel free to | provide an alias in an envrionment variable which your users can | run. ... | I see zero justification for a new command (and very little for | changes to the implementation of go, but I am still willing to | allow for such extensions if you think it's necessary or more | convenient). Actually it is pretty foul game to try and make me pull in stuff which I explicitely rejected. please refrain from such irrelevant comments Please don't try to make me pull rejected code. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] Anyone attempting to generate random numbers by deterministic means is, of course, living in a state of sin. - John Von Neumann - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
Anton Vorontsov wrote: On Mon, Jun 02, 2008 at 12:14:51PM +0200, Wolfgang Grandegger wrote: MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver This patch is based on the following patch sent a few minutes ago: [PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback It is untested, of course. Anton, could you please give it a try. Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] Acked-by: Anton Vorontsov [EMAIL PROTECTED] [...] @@ -68,5 +89,9 @@ int board_nand_init(struct nand_chip *na fun.upm.mxmr = im-lbus.mamr; fun.upm.mdr = im-lbus.mdr; fun.upm.mar = im-lbus.mar; + +if (!upm_setup_done) Not sure if this is really needed for this board though, nobody will call this function more than once... Right, also because io_addr is hard coded. I will remove it. Wolfgang. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH] Add missing define to mpc83xx.h
Signed-off-by: Tor Krill [EMAIL PROTECTED] --- include/mpc83xx.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/mpc83xx.h b/include/mpc83xx.h index d2e1e2b..3dc926d 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -820,6 +820,7 @@ #define CSCONFIG_EN0x8000 #define CSCONFIG_AP0x0080 #define CSCONFIG_ODT_WR_ACS0x0001 +#define CSCONFIG_BANK_BIT_30x4000 #define CSCONFIG_ROW_BIT 0x0700 #define CSCONFIG_ROW_BIT_120x #define CSCONFIG_ROW_BIT_130x0100 -- 1.5.5.3 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH v2] MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
This patch is based on the following patch sent a few minutes ago:
[PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback
Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED]
Acked-by: Anton Vorontsov [EMAIL PROTECTED]
---
board/freescale/mpc8360erdk/nand.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
Index: u-boot/board/freescale/mpc8360erdk/nand.c
===
--- u-boot.orig/board/freescale/mpc8360erdk/nand.c
+++ u-boot/board/freescale/mpc8360erdk/nand.c
@@ -39,6 +39,24 @@ static const u32 upm_array[] = {
0xfc00, 0xfc00, 0xfc00, 0xfc01, /* Words 60 to 63 */
};
+static void upm_setup(struct fsl_upm *upm)
+{
+ int i;
+
+ /* write upm array */
+ out_be32(upm-mxmr, MxMR_OP_WARR);
+
+ for (i = 0; i 64; i++) {
+ out_be32(upm-mdr, upm_array[i]);
+ out_8(upm-io_addr, 0x0);
+ }
+
+ /* normal operation */
+ out_be32(upm-mxmr, MxMR_OP_NORM);
+ while (in_be32(upm-mxmr) != MxMR_OP_NORM)
+ eieio();
+}
+
static int dev_ready(void)
{
if (in_be32(im-qepio.ioport[4].pdat) 0x2000) {
@@ -52,10 +70,9 @@ static int dev_ready(void)
static struct fsl_upm_nand fun = {
.upm = {
- .array = upm_array,
.io_addr = (void *)CFG_NAND_BASE,
},
- .width = 1,
+ .width = 8,
.upm_cmd_offset = 8,
.upm_addr_offset = 16,
.dev_ready = dev_ready,
@@ -68,5 +85,8 @@ int board_nand_init(struct nand_chip *na
fun.upm.mxmr = im-lbus.mamr;
fun.upm.mdr = im-lbus.mdr;
fun.upm.mar = im-lbus.mar;
+
+ upm_setup(fun.upm);
+
return fsl_upm_nand_init(nand, fun);
}
-
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[U-Boot-Users] [PATCH 1/2] Add support for mpc8313 based BUBBATWO
These patches add support for the mpc8313 based BUBBATWO board. Signed-off-by: Tor Krill [EMAIL PROTECTED] --- MAINTAINERS|4 + MAKEALL|1 + Makefile |3 + include/configs/BUBBATWO.h | 516 4 files changed, 524 insertions(+), 0 deletions(-) create mode 100644 include/configs/BUBBATWO.h diff --git a/MAINTAINERS b/MAINTAINERS index ac7572c..c188728 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -224,6 +224,10 @@ Sangmoon Kim [EMAIL PROTECTED] debris MPC8245 KVME080 MPC8245 +Tor Krill [EMAIL PROTECTED] + + BUBBATWOMPC8313 + Thomas Lange [EMAIL PROTECTED] GTH MPC860 diff --git a/MAKEALL b/MAKEALL index 0674069..da28c7a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -332,6 +332,7 @@ LIST_83xx= \ MPC837XERDB \ sbc8349 \ TQM834x \ + BUBBATWO\ diff --git a/Makefile b/Makefile index 3401203..93f563f 100644 --- a/Makefile +++ b/Makefile @@ -1993,6 +1993,9 @@ MPC8313ERDB_66_config: unconfig fi ; @$(MKCONFIG) -a MPC8313ERDB ppc mpc83xx mpc8313erdb freescale +BUBBATWO_config: unconfig + @$(MKCONFIG) BUBBATWO ppc mpc83xx bubbatwo excito + MPC8315ERDB_config: unconfig @$(MKCONFIG) -a MPC8315ERDB ppc mpc83xx mpc8315erdb freescale diff --git a/include/configs/BUBBATWO.h b/include/configs/BUBBATWO.h new file mode 100644 index 000..4e27c6f --- /dev/null +++ b/include/configs/BUBBATWO.h @@ -0,0 +1,516 @@ +/* + * Copyright (C) Freescale Semiconductor, Inc. 2006. + * Copyright (C) Excito Elektronik i Skåne, 2008. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +/* + * Excito Bubba|TWO board configuration file + * Based on the devikit config MPC8313ERDB.h + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_E3001 +#define CONFIG_MPC83XX 1 +#define CONFIG_MPC831X 1 +#define CONFIG_MPC8313 1 +#define CONFIG_EXCB2 1 + +#define CONFIG_PCI +#define CONFIG_83XX_GENERIC_PCI + +#define CONFIG_83XX_CLKIN 6667/* in Hz */ + +#define CONFIG_SYS_CLK_FREQCONFIG_83XX_CLKIN + +#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ + +#define CFG_IMMR 0xE000 + +#define CFG_MEMTEST_START 0x1000 +#define CFG_MEMTEST_END0x0fe0 + +#define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ +#define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ + +/* + * DDR Setup + */ +#define CFG_DDR_BASE 0x /* DDR is system memory*/ +#define CFG_SDRAM_BASE CFG_DDR_BASE +#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE + +/* + * DDR configs for different memsizes. + * Memory size is read out from boardversion. + */ +#define CFG_DDR_CONFIG_256 ( CSCONFIG_EN \ + | CSCONFIG_BANK_BIT_3 | 0x0001 /* TODO */ \ + | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10 ) + /* 0x80014102 */ +#define CFG_DDR_CONFIG_128 ( CSCONFIG_EN \ + | 0x0001 /* TODO */ \ + | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10 ) + /* 0x80010102 */ + +#define CFG_DDR_TIMING_3 0x +#define CFG_DDR_TIMING_0 ( ( 0 TIMING_CFG0_RWT_SHIFT ) \ + | ( 0 TIMING_CFG0_WRT_SHIFT ) \ + | ( 0 TIMING_CFG0_RRT_SHIFT ) \ + | ( 0 TIMING_CFG0_WWT_SHIFT ) \ + | ( 2 TIMING_CFG0_ACT_PD_EXIT_SHIFT ) \ + | ( 2 TIMING_CFG0_PRE_PD_EXIT_SHIFT ) \ + | ( 8 TIMING_CFG0_ODT_PD_EXIT_SHIFT ) \ + | ( 2 TIMING_CFG0_MRS_CYC_SHIFT ) ) + /* 0x00220802 */ +#define CFG_DDR_TIMING_1 ( ( 3 TIMING_CFG1_PRETOACT_SHIFT ) \ +
[U-Boot-Users] [PATCH 2/2] Add board specific files for BUBBATWO
Signed-off-by: Tor Krill [EMAIL PROTECTED]
---
board/excito/bubbatwo/Makefile | 50 +
board/excito/bubbatwo/bubba_commands.c | 93 +
board/excito/bubbatwo/bubbatwo.c | 175
board/excito/bubbatwo/bubbatwo.h | 30 ++
board/excito/bubbatwo/config.mk|1 +
board/excito/bubbatwo/sdram.c | 167 ++
6 files changed, 516 insertions(+), 0 deletions(-)
create mode 100644 board/excito/bubbatwo/Makefile
create mode 100644 board/excito/bubbatwo/bubba_commands.c
create mode 100644 board/excito/bubbatwo/bubbatwo.c
create mode 100644 board/excito/bubbatwo/bubbatwo.h
create mode 100644 board/excito/bubbatwo/config.mk
create mode 100644 board/excito/bubbatwo/sdram.c
diff --git a/board/excito/bubbatwo/Makefile b/board/excito/bubbatwo/Makefile
new file mode 100644
index 000..e379e0e
--- /dev/null
+++ b/board/excito/bubbatwo/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o sdram.o bubba_commands.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/excito/bubbatwo/bubba_commands.c
b/board/excito/bubbatwo/bubba_commands.c
new file mode 100644
index 000..7ac76e4
--- /dev/null
+++ b/board/excito/bubbatwo/bubba_commands.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) Excito Elektronik i Skåne AB, All rights reserved.
+ * Author: Tor Krill [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef BUBBA_COMMANDS_H
+#define BUBBA_COMMANDS_H
+
+#include common.h
+#include config.h
+#include command.h
+
+#include mpc83xx.h
+
+#include bubbatwo.h
+
+/* Prototypes from sata_sil3114.c */
+
+u8 sil3114_spin_up (int num);
+u8 sil3114_spin_down (int num);
+
+static int pollbutton ()
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+
+ return im-gpio[0].dat BUTTON;
+}
+
+int do_bubbacmd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ int ret = 0, dev;
+
+ switch (argc) {
+ case 0:
+ case 1:
+ case 2:
+ if (strncmp (argv[1], button, 6) == 0) {
+ printf (Button status: %d\n, pollbutton ());
+ } else {
+ printf (Usage:\n%s\n, cmdtp-usage);
+ return 1;
+ }
+ break;
+ case 3:
+ if (strncmp (argv[1], spindown, 8) == 0) {
+ dev = (int)simple_strtoul (argv[2], NULL, 10);
+ if (dev = CFG_SATA_MAX_DEVICE) {
+ puts (Unknown device\n);
+ return 1;
+ }
+ ret = sil3114_spin_down (dev);
+ } else if (strncmp (argv[1], spinup, 6) == 0) {
+ dev = (int)simple_strtoul (argv[2], NULL, 10);
+ if
[U-Boot-Users] Booting hangs after tranferring control from Uboot to Linux Kernel
Hi all, I am new here. Currently, I am facing a problem when using bootm to boot linux from uboot: the booting hangs after tranferring control from Uboot to Linux Kernel. However, I found that the linux kernel setup works well with the Uboot 1.2.0, while fail with the latest Uboot 1.3.2/1.3.3. In Uboot 1.2.0: Kernel is entered through the following calling theKernel (linux_argc, linux_argv, linux_env, 0); while in Uboot 1.3.2: (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end); Any suggestion to make the Uboot 1.3.2 works the same as Uboot 1.2.0? And I was told that with the older u-boots you don't pass the dtb, with the new commands you use a - as a place holder: bootm $loadkernaddr - $loaddtbaddr. Can anyone explain some detail about this? Thanks, Mike Qin - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback
On Monday 02 June 2008, Wolfgang Grandegger wrote: Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] Acked-by: Anton Vorontsov [EMAIL PROTECTED] All 4 patches are maintained by different people. What is the fastest way to get these patches in? Maybe Stefan could pick them up directly? No. I can't. Simply because it's not my responsibility anymore. :) Scott Wood is now the custodian for NAND FLASH stuff. So he will probably pick it up. Scott? Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] Pull Request for mpc86xx repository
On Mon, 2008-05-19 at 11:06 -0500, Jon Loeliger wrote: The following changes since commit 180a90abdae72587c0f679edf8991455e559440d: Wolfgang Denk (1): Release v1.3.3 are available in the git repository at: git://www.denx.de/git/u-boot-mpc86xx.git master Jon Loeliger (1): mpc86xx: Removed unused and unconfigured memory test code. board/freescale/mpc8610hpcd/mpc8610hpcd.c | 36 - board/freescale/mpc8641hpcn/mpc8641hpcn.c | 36 - include/configs/MPC8610HPCD.h |2 - include/configs/MPC8641HPCN.h |1 - 4 files changed, 0 insertions(+), 75 deletions(-) Wolfgang, Wasn't sure if this was still on your radar or not. Just wanted to make sure it hit this merge window. Thanks, jdl - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 8/8] New board SIMPC8313 support: nand_boot.c, sdram.c, simpc8313.c
On Sat, May 31, 2008 at 03:11:27PM +0200, Stefan Roese wrote: One advantage of the current nand_spl subsystem is that it uses the same NAND board/platform driver as the normal, full blown U-Boot NAND subsystem does. So there is no need to maintain multiple NAND drivers for one board/platform. The elbc nand driver alone is over 4K, so that's not going to work. It could be cut down a bit by removing erase/program support, and only supporting the page size present on the target hardware, but even then I'd rather use the space for things like SPD-based SDRAM initialization. So again, please try to use the current nand_spl infrastructure. Or at least explain why it doesn't work for you, so that we can work on these problems. The NAND controller on the 8313 exposes a very different programming interface than what nand_spl expects. I don't think there's much that could be re-used, other than the high-level functions like nand_load(). -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] eth0 not geting enabled
Hi there I am working on at91sam9260ek. I have put kernel and rfs on dataflash. Now this board boots up but doesn't enable eth0. I searched net and found that if I do a ping it enables phy (MD9161A). But if I do that when there is no network u-boot never recovers. Can someone tell me the way out. It is successful when network is available, though. Thanks Avinash - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] eth0 not geting enabled
Avinash Vijayvergia wrote: Hi there I am working on at91sam9260ek. I have put kernel and rfs on dataflash. Now this board boots up but doesn't enable eth0. I searched net and found that if I do a ping it enables phy (MD9161A). But if I do that when there is no network u-boot never recovers. Can someone tell me the way out. It is successful when network is available, though. What do you mean by 'u-boot never recovers'? It should time out if you try a network operation and are not connected to anything useful. regards, Ben - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] Loading from NAND using 'nboot' Periodically Fails Where 'nand read' Succeeds
On Mon, Jun 02, 2008 at 08:22:21AM +0200, Stefan Roese wrote: Hi Grant, On Monday 02 June 2008, Grant Erickson wrote: Before I jump in with the BDI and start debugging, has anyone else using 'nboot' and FIT images noticed that 'nboot' periodically fails where 'nand read.i' of the SAME region of NAND succeeds? Not sure here, since I never used nboot before. But nand read.i skips bad blocks and perhaps nboot not? I suggest that you check if this is the case and if you have bad blocks in this NAND area. It is indeed the case -- you need to use nboot.i. -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 8/8] New board SIMPC8313 support: nand_boot.c, sdram.c, simpc8313.c
On Monday 02 June 2008, Scott Wood wrote: On Sat, May 31, 2008 at 03:11:27PM +0200, Stefan Roese wrote: One advantage of the current nand_spl subsystem is that it uses the same NAND board/platform driver as the normal, full blown U-Boot NAND subsystem does. So there is no need to maintain multiple NAND drivers for one board/platform. The elbc nand driver alone is over 4K, so that's not going to work. It could be cut down a bit by removing erase/program support, and only supporting the page size present on the target hardware, Too bad. but even then I'd rather use the space for things like SPD-based SDRAM initialization. Are you talking about a full-blown I2C SPD DIMM detection and autoconfiguration? The code I know from 4xx is much too complicated and big for a 4k NAND booting image. So again, please try to use the current nand_spl infrastructure. Or at least explain why it doesn't work for you, so that we can work on these problems. The NAND controller on the 8313 exposes a very different programming interface than what nand_spl expects. I don't think there's much that could be re-used, other than the high-level functions like nand_load(). Isn't there a chance to change those NAND handling functions (like nand_read_page()) in nand_boot.c to be more flexible, that they can be used by different NAND drivers too? Could be that we need to simplify the current implementation somehow. Perhaps to use something as you did in your implementation like nand_read_next_block() instead of this nand_read_page(). Addressing arbitrary blocks/pages seems not needed and could cut down the current code quite a bit. I would really like to avoid that all newer NAND booting platforms (and I expact there will come more and more in the near future), to implement their own NAND loading routines. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH 0/8] ppc4xx: Patches for 1.3.4
The 8 following patches posted as followups to this mail are ppc4xx-related changes I intend to get merged in this merge period. Sorry for the late posting, but it took me much longer to get this clean and I feel its a big improvement to the current status of 4xx SDRAM/DDR/DDR2 init code and especially the headers. These patches require the patches from Grant Erickson to be applied first: PPC4xx: Enable Primordial Stack for 40x and Unify ECC Handling (1 2) Please review and let me know if you have any comments. Thanks. Stefan Roese (8): ppc4xx: Consolidate 405 and 440 NAND booting code in start.S ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1 ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2 ppc4xx: Change Kilauea to use the common DDR2 init function ppc4xx: Fix common ECC generation code for 440GP style platforms ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code ppc4xx: Remove superfluous dram_init() call or replace it by initdram() ppc4xx: Remove implementations of testdram() board/amcc/acadia/memory.c | 15 - board/amcc/bamboo/bamboo.c | 67 -- board/amcc/bubinga/bubinga.c | 16 - board/amcc/canyonlands/canyonlands.c | 38 - board/amcc/ebony/ebony.c | 30 - board/amcc/katmai/katmai.c | 30 - board/amcc/kilauea/Makefile|3 +- board/amcc/kilauea/init.S | 167 - board/amcc/kilauea/memory.c| 84 --- board/amcc/luan/luan.c | 44 -- board/amcc/makalu/makalu.c |5 - board/amcc/ocotea/ocotea.c | 30 - board/amcc/sequoia/sequoia.c | 38 - board/amcc/taihu/taihu.c | 42 -- board/amcc/taishan/taishan.c | 30 - board/amcc/walnut/walnut.c | 16 - board/amcc/yosemite/yosemite.c | 52 +-- board/amcc/yucca/yucca.c | 30 - board/amirix/ap1000/init.S |4 - board/cray/L1/init.S | 11 - board/csb272/csb272.c |9 + board/csb472/csb472.c |9 + board/eric/eric.c |8 + board/esd/ar405/ar405.c| 22 - board/esd/canbt/canbt.c| 19 - board/exbitgen/exbitgen.c |9 + board/g2000/g2000.c| 35 - board/jse/init.S | 10 - board/lwmon5/lwmon5.c | 38 - board/ml2/init.S |4 - board/mpl/mip405/init.S| 13 - board/mpl/pip405/init.S| 13 - board/netstal/hcu4/hcu4.c |9 - board/netstal/hcu5/sdram.c | 26 +- board/netstal/mcu25/mcu25.c|9 - board/pcs440ep/pcs440ep.c | 38 - board/prodrive/alpr/alpr.c | 30 - board/w7o/w7o.c|8 + board/xilinx/ml300/init.S |4 - board/zeus/zeus.c | 45 -- cpu/ppc4xx/44x_spd_ddr.c | 151 - cpu/ppc4xx/44x_spd_ddr2.c | 11 + cpu/ppc4xx/ecc.c | 19 +- cpu/ppc4xx/ecc.h | 27 + cpu/ppc4xx/sdram.c | 10 +- cpu/ppc4xx/start.S | 212 +++ include/asm-ppc/ppc4xx-sdram.h | 1156 include/configs/alpr.h |1 - include/configs/bamboo.h |1 - include/configs/ebony.h|1 - include/configs/katmai.h |1 - include/configs/kilauea.h |8 +- include/configs/luan.h |1 - include/configs/ocotea.h |1 - include/configs/taishan.h |1 - include/configs/yucca.h|1 - include/ppc405.h | 414 include/ppc440.h | 896 - include/ppc4xx.h | 25 + nand_spl/board/amcc/kilauea/Makefile | 21 +- nand_spl/board/amcc/kilauea/config.mk |5 +- nand_spl/board/amcc/kilauea/u-boot.lds |1 - 62 files changed, 1383 insertions(+), 2691 deletions(-) delete mode 100644 board/amcc/kilauea/init.S delete mode 100644 board/amcc/kilauea/memory.c create mode 100644 include/asm-ppc/ppc4xx-sdram.h - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH 1/8] ppc4xx: Consolidate 405 and 440 NAND booting code in start.S
This patch consolidates the 405 and 440 parts of the NAND booting code selected via CONFIG_NAND_SPL. Now common code is used to initialize the SDRAM by calling initdram() and to copy/relocate to SDRAM/OCM/etc. Only *after* running from this location, nand_boot() is called. Please note that the initsdram() call is now moved from nand_boot.c to start.S. I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: Stefan Roese [EMAIL PROTECTED] --- cpu/ppc4xx/start.S | 206 1 files changed, 80 insertions(+), 126 deletions(-) diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index a5d9ec9..25ee369 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -187,6 +187,10 @@ * at CFG_SDRAM_BASE and another 128MB cacheable instruction region covering * NOR flash at CFG_FLASH_BASE. Disable all cacheable data regions. */ +#if !defined(CFG_FLASH_BASE) +/* If not already defined, set it to the last 128MByte region */ +# define CFG_FLASH_BASE0xf800 +#endif #if !defined(CFG_ICACHE_SACR_VALUE) # define CFG_ICACHE_SACR_VALUE \ (PPC_128MB_SACR_VALUE(CFG_SDRAM_BASE + ( 0 20)) | \ @@ -486,97 +490,6 @@ rsttlb:tlbwe r0,r1,0x/* Invalidate all entries (V=0)*/ /* Continue from 'normal' start */ /**/ 2: - -#if defined(CONFIG_NAND_SPL) -#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ -defined(CONFIG_460EX) || defined(CONFIG_460GT) - /* -* Enable internal SRAM (only on 440EPx/GRx, 440EP/GR have no OCM) -*/ - lis r2,0x7fff - ori r2,r2,0x - mfdcr r1,isram0_dpc - and r1,r1,r2/* Disable parity check */ - mtdcr isram0_dpc,r1 - mfdcr r1,isram0_pmeg - and r1,r1,r2/* Disable pwr mgmt */ - mtdcr isram0_pmeg,r1 -#if defined(CONFIG_460EX) || defined(CONFIG_460GT) - lis r1,0x4000 /* BAS = 8000_ */ - ori r1,r1,0x4580/* 16k */ - mtdcr isram0_sb0cr,r1 -#endif -#endif -#if defined(CONFIG_440EP) - /* -* On 440EP with no internal SRAM, we setup SDRAM very early -* and copy the NAND_SPL to SDRAM and jump to it -*/ - /* Clear Dcache to use as RAM */ - addis r3,r0,[EMAIL PROTECTED] - ori r3,r3,[EMAIL PROTECTED] - addis r4,r0,[EMAIL PROTECTED] - ori r4,r4,[EMAIL PROTECTED] - rlwinm. r5,r4,0,27,31 - rlwinm r5,r4,27,5,31 - beq ..d_ran3 - addir5,r5,0x0001 -..d_ran3: - mtctr r5 -..d_ag3: - dcbzr0,r3 - addir3,r3,32 - bdnz..d_ag3 - /**/ - /* Setup the stack in internal SRAM */ - /**/ - lis r1,[EMAIL PROTECTED] - ori r1,r1,[EMAIL PROTECTED] - li r0,0 - stwur0,-4(r1) - stwur0,-4(r1) /* Terminate call chain */ - - stwur1,-8(r1) /* Save back chain and move SP */ - lis r0,[EMAIL PROTECTED]/* Address of reset vector */ - ori r0,r0, [EMAIL PROTECTED] - stwur1,-8(r1) /* Save back chain and move SP */ - stw r0,+12(r1) /* Save return addr (underflow vect) */ - sync - bl early_sdram_init - sync -#endif /* CONFIG_440EP */ - - /* -* Copy SPL from cache into internal SRAM -*/ - li r4,(CFG_NAND_BOOT_SPL_SIZE 2) - 1 - mtctr r4 - lis r2,[EMAIL PROTECTED] - ori r2,r2,[EMAIL PROTECTED] - lis r3,[EMAIL PROTECTED] - ori r3,r3,[EMAIL PROTECTED] -spl_loop: - lwzur4,4(r2) - stwur4,4(r3) - bdnzspl_loop - - /* -* Jump to code in RAM -*/ - bl 00f -00:mflrr10 - lis r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@h - ori r3,r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@l - sub r10,r10,r3 - addir10,r10,28 - mtlrr10 - blr - -start_ram: - sync - isync -#endif /* CONFIG_NAND_SPL */ - bl 3f b _start @@ -831,7 +744,7 @@ _start: stw r0,+12(r1) /* Save return addr (underflow vect) */ #ifdef CONFIG_NAND_SPL - bl nand_boot /* will not return */ + bl nand_boot_common/* will not return */ #else GET_GOT @@ -992,12 +905,13 @@
[U-Boot-Users] [PATCH 4/8] ppc4xx: Change Kilauea to use the common DDR2 init function
This patch changes the kilauea and kilauea_nand (for NAND booting) board port to not use a board specific DDR2 init routine anymore. Now the common code from cpu/ppc4xx is used. Thanks to Grant Erickson for all his basic work on this 405EX early bootup. Signed-off-by: Stefan Roese [EMAIL PROTECTED] --- board/amcc/kilauea/Makefile|3 +- board/amcc/kilauea/init.S | 167 board/amcc/kilauea/memory.c| 84 cpu/ppc4xx/44x_spd_ddr2.c | 11 ++ include/configs/kilauea.h |8 +- nand_spl/board/amcc/kilauea/Makefile | 21 ++-- nand_spl/board/amcc/kilauea/config.mk |5 +- nand_spl/board/amcc/kilauea/u-boot.lds |1 - 8 files changed, 29 insertions(+), 271 deletions(-) delete mode 100644 board/amcc/kilauea/init.S delete mode 100644 board/amcc/kilauea/memory.c diff --git a/board/amcc/kilauea/Makefile b/board/amcc/kilauea/Makefile index 39328c2..981ef3a 100644 --- a/board/amcc/kilauea/Makefile +++ b/board/amcc/kilauea/Makefile @@ -25,8 +25,7 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(BOARD).a -COBJS = $(BOARD).o cmd_pll.o memory.o -SOBJS = init.o +COBJS = $(BOARD).o cmd_pll.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/board/amcc/kilauea/init.S b/board/amcc/kilauea/init.S deleted file mode 100644 index bf47d6b..000 --- a/board/amcc/kilauea/init.S +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2008 Nuovation System Designs, LLC - * Grant Erickson [EMAIL PROTECTED] - * - * (C) Copyright 2007-2008 - * Stefan Roese, DENX Software Engineering, [EMAIL PROTECTED] - * - * Originally based on code provided from UDTech and AMCC - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include config.h -#include ppc4xx.h - -#include ppc_asm.tmpl -#include ppc_defs.h - -#define mtsdram_as(reg, value) \ - addir4,0,reg; \ - mtdcr memcfga,r4 ; \ - addis r4,0,[EMAIL PROTECTED] ; \ - ori r4,r4,[EMAIL PROTECTED] ; \ - mtdcr memcfgd,r4 ; - -#if defined(CONFIG_DDR_ECC) - .extern ecc_init -#endif /* defined(CONFIG_DDR_ECC) */ - - .globl ext_bus_cntlr_init -ext_bus_cntlr_init: -#if !defined(CFG_INIT_DCACHE_CS) -#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) - - /* -* DDR2 SDRAM Controller Setup -*/ - - /* Set Memory Bank Configuration Registers */ - mtsdram_as(SDRAM_MB0CF, CFG_SDRAM0_MB0CF); - mtsdram_as(SDRAM_MB1CF, CFG_SDRAM0_MB1CF); - mtsdram_as(SDRAM_MB2CF, CFG_SDRAM0_MB2CF); - mtsdram_as(SDRAM_MB3CF, CFG_SDRAM0_MB3CF); - - /* Set Memory Clock Timing Register */ - mtsdram_as(SDRAM_CLKTR, CFG_SDRAM0_CLKTR); - - /* Set Refresh Time Register */ - mtsdram_as(SDRAM_RTR, CFG_SDRAM0_RTR); - - /* Set SDRAM Timing Registers */ - mtsdram_as(SDRAM_SDTR1, CFG_SDRAM0_SDTR1); - mtsdram_as(SDRAM_SDTR2, CFG_SDRAM0_SDTR2); - mtsdram_as(SDRAM_SDTR3, CFG_SDRAM0_SDTR3); - - /* Set Mode and Extended Mode Registers */ - mtsdram_as(SDRAM_MMODE, CFG_SDRAM0_MMODE); - mtsdram_as(SDRAM_MEMODE, CFG_SDRAM0_MEMODE); - - /* Set Memory Controller Options 1 Register */ - mtsdram_as(SDRAM_MCOPT1, CFG_SDRAM0_MCOPT1); - - /* Set Manual Initialization Control Registers */ - mtsdram_as(SDRAM_INITPLR0, CFG_SDRAM0_INITPLR0); - mtsdram_as(SDRAM_INITPLR1, CFG_SDRAM0_INITPLR1); - mtsdram_as(SDRAM_INITPLR2, CFG_SDRAM0_INITPLR2); - mtsdram_as(SDRAM_INITPLR3, CFG_SDRAM0_INITPLR3); - mtsdram_as(SDRAM_INITPLR4, CFG_SDRAM0_INITPLR4); - mtsdram_as(SDRAM_INITPLR5, CFG_SDRAM0_INITPLR5); - mtsdram_as(SDRAM_INITPLR6, CFG_SDRAM0_INITPLR6); - mtsdram_as(SDRAM_INITPLR7, CFG_SDRAM0_INITPLR7); - mtsdram_as(SDRAM_INITPLR8, CFG_SDRAM0_INITPLR8); - mtsdram_as(SDRAM_INITPLR9, CFG_SDRAM0_INITPLR9); - mtsdram_as(SDRAM_INITPLR10, CFG_SDRAM0_INITPLR10); - mtsdram_as(SDRAM_INITPLR11, CFG_SDRAM0_INITPLR11); - mtsdram_as(SDRAM_INITPLR12, CFG_SDRAM0_INITPLR12); -
[U-Boot-Users] [PATCH 6/8] ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
Signed-off-by: Stefan Roese [EMAIL PROTECTED] --- cpu/ppc4xx/ecc.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/cpu/ppc4xx/ecc.c b/cpu/ppc4xx/ecc.c index 3e87c84..a2eb07b 100644 --- a/cpu/ppc4xx/ecc.c +++ b/cpu/ppc4xx/ecc.c @@ -45,7 +45,8 @@ #include ecc.h -#if !defined(CONFIG_440EPX) !defined(CONFIG_440GRX) +#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR) || \ +defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2) #if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) /* * void ecc_init() @@ -118,4 +119,4 @@ void ecc_init(unsigned long * const start, unsigned long size) SDRAM_ECC_CFG_MCHK_CHK)); } #endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */ -#endif /* !defined(CONFIG_440EPX) !defined(CONFIG_440GRX) */ +#endif /* defined(CONFIG_SDRAM_PPC4xx_IBM_DDR)... */ -- 1.5.5.3 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH 7/8] ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.
This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:
csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG
I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.
Signed-off-by: Stefan Roese [EMAIL PROTECTED]
---
board/amcc/acadia/memory.c | 15 ---
board/amcc/bubinga/bubinga.c | 16
board/amcc/makalu/makalu.c |5
board/amcc/walnut/walnut.c | 16
board/amcc/yosemite/yosemite.c | 52 ++-
board/amirix/ap1000/init.S |4 ---
board/cray/L1/init.S | 11
board/csb272/csb272.c |9 +++
board/csb472/csb472.c |9 +++
board/eric/eric.c |8 ++
board/esd/ar405/ar405.c| 22 -
board/esd/canbt/canbt.c| 19 --
board/exbitgen/exbitgen.c |9 +++
board/g2000/g2000.c| 35 ---
board/jse/init.S | 10 ---
board/ml2/init.S |4 ---
board/mpl/mip405/init.S| 13 --
board/mpl/pip405/init.S| 13 --
board/netstal/hcu4/hcu4.c |9 ---
board/netstal/hcu5/sdram.c | 26 +--
board/netstal/mcu25/mcu25.c|9 ---
board/w7o/w7o.c|8 ++
board/xilinx/ml300/init.S |4 ---
cpu/ppc4xx/sdram.c | 10 ++-
cpu/ppc4xx/start.S |6
25 files changed, 56 insertions(+), 286 deletions(-)
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c
index 709d41e..3dec315 100644
--- a/board/amcc/acadia/memory.c
+++ b/board/amcc/acadia/memory.c
@@ -33,14 +33,6 @@
extern void board_pll_init_f(void);
-/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
static void cram_bcr_write(u32 wr_val)
{
@@ -116,10 +108,3 @@ long int initdram(int board_type)
return (CFG_MBYTES_RAM 20);
}
-
-#ifndef CONFIG_NAND_SPL
-int testdram(void)
-{
- return (0);
-}
-#endif
diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c
index 66e7509..9d508b8 100644
--- a/board/amcc/bubinga/bubinga.c
+++ b/board/amcc/bubinga/bubinga.c
@@ -66,14 +66,6 @@ int checkboard(void)
return (0);
}
-/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
/* -
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
the necessary info for SDRAM controller configuration
@@ -85,11 +77,3 @@ long int initdram(int board_type)
ret = spd_sdram();
return ret;
}
-
-int testdram(void)
-{
- /* TODO: XXX XXX XXX */
- printf(test: xxx MB - ok\n);
-
- return (0);
-}
diff --git a/board/amcc/makalu/makalu.c b/board/amcc/makalu/makalu.c
index adf604f..9baec9a 100644
--- a/board/amcc/makalu/makalu.c
+++ b/board/amcc/makalu/makalu.c
@@ -351,8 +351,3 @@ void ft_board_setup(void *blob, bd_t *bd)
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) defined(CONFIG_OF_BOARD_SETUP) */
-
-void sdram_init(void)
-{
- return;
-}
diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c
index 292e026..641987e 100644
--- a/board/amcc/walnut/walnut.c
+++ b/board/amcc/walnut/walnut.c
@@ -86,14 +86,6 @@ int checkboard(void)
}
/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
-/*
* initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
* the necessary info for SDRAM controller configuration
*/
@@ -101,11 +93,3 @@ long int initdram(int board_type)
{
return spd_sdram();
}
-
-int testdram(void)
-{
- /* TODO: XXX XXX XXX */
- printf(test: xxx MB - ok\n);
-
- return (0);
-}
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index 212fab8..8345537 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -200,7 +200,7 @@ int
[U-Boot-Users] [PATCH 8/8] ppc4xx: Remove implementations of testdram()
This patch removes the used testdram() implementations of the board
that are maintained by myself.
Signed-off-by: Stefan Roese [EMAIL PROTECTED]
---
board/amcc/bamboo/bamboo.c | 67 --
board/amcc/canyonlands/canyonlands.c | 38 ---
board/amcc/ebony/ebony.c | 30 ---
board/amcc/katmai/katmai.c | 30 ---
board/amcc/luan/luan.c | 44 --
board/amcc/ocotea/ocotea.c | 30 ---
board/amcc/sequoia/sequoia.c | 38 ---
board/amcc/taihu/taihu.c | 42 -
board/amcc/taishan/taishan.c | 30 ---
board/amcc/yucca/yucca.c | 30 ---
board/lwmon5/lwmon5.c| 38 ---
board/pcs440ep/pcs440ep.c| 38 ---
board/prodrive/alpr/alpr.c | 30 ---
board/zeus/zeus.c| 45 ---
include/configs/alpr.h |1 -
include/configs/bamboo.h |1 -
include/configs/ebony.h |1 -
include/configs/katmai.h |1 -
include/configs/luan.h |1 -
include/configs/ocotea.h |1 -
include/configs/taishan.h|1 -
include/configs/yucca.h |1 -
22 files changed, 0 insertions(+), 538 deletions(-)
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 5077187..0c7d69e 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -466,73 +466,6 @@ long int initdram (int board_type)
#endif
}
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *)0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n, *p32, ctr;
- const unsigned long bend = CFG_MBYTES_SDRAM * 1024 * 1024;
-
- mtmsr(0);
-
- for (k = 0; k CFG_MBYTES_SDRAM*1024;
-++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k 1023) == 0) {
- printf(%3d MB\r, k / 1024);
- }
-
- memset(mem, 0x, 1024);
- for (n = 0; n kend; ++n) {
- if (mem[n] != 0x) {
- printf(SDRAM test fails at: %08x\n,
- (uint) mem[n]);
- return 1;
- }
- }
-
- memset(mem, 0x, 1024);
- for (n = 0; n kend; ++n) {
- if (mem[n] != 0x) {
- printf(SDRAM test fails at: %08x\n,
- (uint) mem[n]);
- return 1;
- }
- }
- }
-
- /*
-* Perform a sequence test to ensure that all
-* memory locations are uniquely addressable
-*/
- ctr = 0;
- p32 = 0;
- while ((unsigned long)p32 != bend) {
- if (0 == ((unsigned long)p32 ((120)-1)))
- printf(Writing %3d MB\r, (unsigned long)p32 20);
- *p32++ = ctr++;
- }
-
- ctr = 0;
- p32 = 0;
- while ((unsigned long)p32 != bend) {
- if (0 == ((unsigned long)p32 ((120)-1)))
- printf(Verifying %3d MB\r, (unsigned long)p32 20);
-
- if (*p32 != ctr) {
- printf(SDRAM test fails at: %08x\n, p32);
- return 1;
- }
-
- ctr++;
- p32++;
- }
-
- printf(SDRAM test passes\n);
- return 0;
-}
-#endif
-
/*
* pci_pre_init
*
diff --git a/board/amcc/canyonlands/canyonlands.c
b/board/amcc/canyonlands/canyonlands.c
index 0f66061..4e3b349 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -211,44 +211,6 @@ long int initdram(int board_type)
}
#endif
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *)0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
-
- mtmsr(0);
-
- for (k = 0; k CFG_KBYTES_SDRAM;
-++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k 1023) == 0) {
- printf(%3d MB\r, k / 1024);
- }
-
- memset(mem, 0x, 1024);
- for (n = 0; n kend; ++n) {
- if (mem[n] != 0x) {
- printf(SDRAM test fails at: %08x\n,
- (uint) mem[n]);
- return 1;
- }
- }
-
-
Re: [U-Boot-Users] [PATCH 8/8] New board SIMPC8313 support: nand_boot.c, sdram.c, simpc8313.c
Stefan Roese wrote: On Monday 02 June 2008, Scott Wood wrote: but even then I'd rather use the space for things like SPD-based SDRAM initialization. Are you talking about a full-blown I2C SPD DIMM detection and autoconfiguration? The code I know from 4xx is much too complicated and big for a 4k NAND booting image. Yeah, it may not be possible; my point was more along the the lines of if I were going to spend effort to squeeze in some bit of complex code, it wouldn't be the fully generic NAND driver with all the API glue. The NAND controller on the 8313 exposes a very different programming interface than what nand_spl expects. I don't think there's much that could be re-used, other than the high-level functions like nand_load(). Isn't there a chance to change those NAND handling functions (like nand_read_page()) in nand_boot.c to be more flexible, that they can be used by different NAND drivers too? Could be that we need to simplify the current implementation somehow. Perhaps to use something as you did in your implementation like nand_read_next_block() instead of this nand_read_page(). Addressing arbitrary blocks/pages seems not needed and could cut down the current code quite a bit. Possibly -- but the code in nand_command() and nand_read_page() is pretty much entirely inapplicable to the elbc fcm nand controller. The programming interface of elbc fcm is higher level than that. We can share nand_load(), but that's about it. I would really like to avoid that all newer NAND booting platforms (and I expact there will come more and more in the near future), to implement their own NAND loading routines. Agreed -- but at the very least we'll need a couple different implementations of nand_read_next_block(). -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] NAND_SPL: Remove initdram() call from nand_boot()
Stefan Roese wrote: This patch removes the SDRAM initilization call initdram() from nand_boot(). This is done mainly because I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Are there any existing platforms that need an initdram() added elsewhere to accomodate this? -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH] NAND_SPL: Remove initdram() call from nand_boot()
This patch removes the SDRAM initilization call initdram() from
nand_boot(). This is done mainly because I experienced problems with
some boards like Kilauea (405EX), which don't have internal SRAM (OCM)
and relocation needs to be done to SDRAM before the NAND controller
can get accessed. When initdram() is called later on in nand_boot(),
this can lead to problems with variables in the bss sections like
nand_ecc_pos[].
Signed-off-by: Stefan Roese [EMAIL PROTECTED]
---
nand_spl/nand_boot.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index bc57725..563a80b 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -221,20 +221,19 @@ static int nand_load(struct mtd_info *mtd, int offs, int
uboot_size, uchar *dst)
return 0;
}
+/*
+ * The main entry for NAND booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from NAND into SDRAM and starts it from there.
+ */
void nand_boot(void)
{
- ulong mem_size;
struct nand_chip nand_chip;
nand_info_t nand_info;
int ret;
void (*uboot)(void);
/*
-* Init sdram, so we have access to memory
-*/
- mem_size = initdram(0);
-
- /*
* Init board specific nand support
*/
nand_info.priv = nand_chip;
--
1.5.5.3
-
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Re: [U-Boot-Users] [PATCH] NAND_SPL: Remove initdram() call from nand_boot()
Stefan Roese wrote: This patch removes the SDRAM initilization call initdram() from nand_boot(). This is done mainly because I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: Stefan Roese [EMAIL PROTECTED] Acked-by: Scott Wood [EMAIL PROTECTED] Please send via the 4xx tree in order for the initdram move to be atomic. -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] NAND_SPL: Remove initdram() call from nand_boot()
On Monday 02 June 2008, Scott Wood wrote: Stefan Roese wrote: This patch removes the SDRAM initilization call initdram() from nand_boot(). This is done mainly because I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: Stefan Roese [EMAIL PROTECTED] Acked-by: Scott Wood [EMAIL PROTECTED] Please send via the 4xx tree in order for the initdram move to be atomic. OK, will do. Thanks. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] NAND_SPL: Remove initdram() call from nand_boot()
On Monday 02 June 2008, Scott Wood wrote: Stefan Roese wrote: This patch removes the SDRAM initilization call initdram() from nand_boot(). This is done mainly because I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Are there any existing platforms that need an initdram() added elsewhere to accomodate this? Currently only the 4xx ones. I sent the patch for them a few minutes ago as you already noticed. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback
Stefan Roese wrote: On Monday 02 June 2008, Wolfgang Grandegger wrote: Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] Acked-by: Anton Vorontsov [EMAIL PROTECTED] All 4 patches are maintained by different people. What is the fastest way to get these patches in? Maybe Stefan could pick them up directly? No. I can't. Simply because it's not my responsibility anymore. :) Ah, right, no I remember. At http://www.denx.de/wiki/UBoot/Custodians and http://git.denx.de/?p=u-boot.git;a=forks you are still listed as the owner of u-boot-nand-flash.git. Scott Wood is now the custodian for NAND FLASH stuff. So he will probably pick it up. Scott? That would be nice. Wolfgang. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH]env_nand.c Added bad block management for environment variables
On Fri, May 30, 2008 at 04:05:28PM -0400, Stuart Wood wrote: Scott, I this this one is it, and thnaks for pointing out the nand_erase_opts() function. Stuart --- Modified to check for bad blocks and to skipping over them when CFG_ENV_RANGE has been defined. CFG_ENV_RANGE must be larger than CFG_ENV_SIZE and aligned to the NAND flash block size. signed off by Stuart Wood [EMAIL PROTECTED] Applied to u-boot-nand-flash. -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] 83xx/85xx/86xx: add more MxMR local bus definitions
On Mon, Jun 02, 2008 at 12:09:30PM +0200, Wolfgang Grandegger wrote: 83xx/85xx/86xx: add more MxMR local bus definitions This patch adds more macro definitions for the UPM Machine Mode Registers They are copied from include/mpc82xx.h to simplify the merge of all 8xxx common local bus definitions into include/asm-ppc/fsl_lbc.h. We should move them rather than copy, and then include asm/fsl_lbc.h from asm/mpc8260.h. -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] 83xx/85xx/86xx: add more MxMR local bus definitions
Scott Wood wrote: On Mon, Jun 02, 2008 at 12:09:30PM +0200, Wolfgang Grandegger wrote: 83xx/85xx/86xx: add more MxMR local bus definitions This patch adds more macro definitions for the UPM Machine Mode Registers They are copied from include/mpc82xx.h to simplify the merge of all 8xxx common local bus definitions into include/asm-ppc/fsl_lbc.h. We should move them rather than copy, and then include asm/fsl_lbc.h from asm/mpc8260.h. Moving FSL local bus definitions from asm/mpc8260.h to asm/fsl_lbc.h is a big change as Anton already pointed out in http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html and not only restricted to the MxMR definitions. Wolfgang. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH]jffs2_1pass.c - Adding watchdog support
Adds watchdog support.
signed off by Stuart Wood [EMAIL PROTECTED]
---
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index a330438..9ff8e12 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -116,6 +116,7 @@
#include malloc.h
#include linux/stat.h
#include linux/time.h
+#include watchdog.h
#if defined(CONFIG_CMD_JFFS2)
@@ -1188,6 +1189,9 @@ jffs2_1pass_build_lists(struct part_info * part)
oldoffset = offset;
}
+ /* Kick and watch dog, if present */
+ WATCHDOG_RESET();
+
node = (struct jffs2_unknown_node *)
get_node_mem((u32)part-offset
+ offset);
if (node-magic == JFFS2_MAGIC_BITMASK hdr_crc(node)) {
/* if its a fragment add it */
-
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[U-Boot-Users] [PATCH]serial_pl010.c - Add watchdog support
Adding watch dog support
signed off by Stuart Wood [EMAIL PROTECTED]
diff --git a/drivers/serial/serial_pl010.c b/drivers/serial/serial_pl010.c
index 417b6ae..134ed09 100644
--- a/drivers/serial/serial_pl010.c
+++ b/drivers/serial/serial_pl010.c
@@ -29,6 +29,7 @@
/* Should be fairly simple to make it work with the PL010 as well */
#include common.h
+#include watchdog.h
#ifdef CFG_PL010_SERIAL
@@ -137,7 +138,8 @@ void serial_setbrg (void)
static void pl010_putc (int portnum, char c)
{
/* Wait until there is space in the FIFO */
- while (IO_READ (port[portnum] + UART_PL01x_FR) UART_PL01x_FR_TXFF);
+ while (IO_READ (port[portnum] + UART_PL01x_FR) UART_PL01x_FR_TXFF)
+ WATCHDOG_RESET();
/* Send the character */
IO_WRITE (port[portnum] + UART_PL01x_DR, c);
@@ -148,7 +150,8 @@ static int pl010_getc (int portnum)
unsigned int data;
/* Wait until there is data in the FIFO */
- while (IO_READ (port[portnum] + UART_PL01x_FR) UART_PL01x_FR_RXFE);
+ while (IO_READ (port[portnum] + UART_PL01x_FR) UART_PL01x_FR_RXFE)
+ WATCHDOG_RESET();
data = IO_READ (port[portnum] + UART_PL01x_DR);
@@ -164,6 +167,7 @@ static int pl010_getc (int portnum)
static int pl010_tstc (int portnum)
{
+ WATCHDOG_RESET();
return !(IO_READ (port[portnum] + UART_PL01x_FR)
UART_PL01x_FR_RXFE);
}
-
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Re: [U-Boot-Users] Loading from NAND using 'nboot' Periodically Fails Where 'nand read' Succeeds
On 6/2/08 11:21 AM, Scott Wood wrote: On Mon, Jun 02, 2008 at 08:22:21AM +0200, Stefan Roese wrote: Hi Grant, On Monday 02 June 2008, Grant Erickson wrote: Before I jump in with the BDI and start debugging, has anyone else using 'nboot' and FIT images noticed that 'nboot' periodically fails where 'nand read.i' of the SAME region of NAND succeeds? Not sure here, since I never used nboot before. But nand read.i skips bad blocks and perhaps nboot not? I suggest that you check if this is the case and if you have bad blocks in this NAND area. It is indeed the case -- you need to use nboot.i. -Scott Scott and Stefan, Thanks for the suggestion. That solved it. As an academic exercise, is there any practical reason a system would want to use nboot, as I erroneously chose to do, without .i|.jffs2|.e? Regards, Grant -- Principal Nuovation System Designs, LLC 998 Alpine Terrace Suite 3 Sunnyvale, CA 94086-2469 US T +1-408-749-0495 F +1-205-449-0495 M +1-408-489-5710 [EMAIL PROTECTED] http://www.nuovations.com/ - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] Non-block-skipping NAND commands (was: Loading from NAND using 'nboot' Periodically Fails Where 'nand read' Succeeds)
Grant Erickson wrote: Thanks for the suggestion. That solved it. As an academic exercise, is there any practical reason a system would want to use nboot, as I erroneously chose to do, without .i|.jffs2|.e? I don't think so, though I don't know the history involved. Does anyone actually use the non-block-skipping versions of any of the nand commands (intentionally, that is)? If the answer is no, then we could make it the default. -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] u-boot-1.2.0 cross compilation fails
Hi All, I was trying to build u-boot-1.2.0 for atmel (u-boot source code delivered by the board vendor). Tried this: $ make CROSS_COMPILE=arm-linux- sam9l9260_config $ make CROSS_COMPILE=arm-linux- but it failed: make -C tools all make[1]: Entering directory `/home/sam9l9260/u-boot-1.2.0-atmel/tools' make[1]: *** No rule to make target `/usr/lib/gcc/i686-pc-cygwin/3.4.4/include/stddef.h', needed by `img2srec.o'. Stop. make[1]: Leaving directory `/home/sam9l9260/u-boot-1.2.0-atmel/tools' make: *** [tools] Error 2 Looks like some header file related to Cygwin (which I don't need use). I'm cross-compiling on Linux etch. Tried poking into Makefile but to no avail. Thanks, g. - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] U-boot and ethernet on a Lubbock board
Victor (pfc) wrote: I've been working last months on a lubbock board and u-boot as a bootloader to run Linux. I always loaded my kernel via serial port, because I never got u-boot to activate my ethernet (I never got the link led on, only after booting Linux). I recently read the FAQ again and found about using valid MAC addresses: * Should I recompile my u-boot with the new local-admin MAC address or just I need to write the new config on the board? To change the MAC addresses, only the environment needs to change as follows ... u-boot setenv ethaddr valid MAC address (eth0) u-boot setenv eth1addr valid MAC address1(eth1) u-boot setenv eth2addr valid MAC address2(eth2) u-boot saveenv Omit references to eth1 or eth2, if they don't exist on your specific board. There is no need to recompile U-Boot. Sincerely, Ken Fuchs - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] NAND FSL UPM: driver re-write using the hwcontrol callback
On Mon, Jun 02, 2008 at 12:11:11PM +0200, Wolfgang Grandegger wrote: NAND FSL UPM: driver re-write using the hwcontrol callback This is a re-write of the NAND FSL UPM driver using the more universal hwcontrol callback (instead of the cmdfunc callback). Here is a brief list of furher modifications: [snip] This patch is based on the following patches posted to this list a few minutes ago: [PATCH] PPC: add accessor macros to clear and set bits in one shot [PATCH] 83xx/85xx/86xx: add more MxMR local bus definitions [snip] /* yet only 8 bit accessors implemented */ - if (fun-width != 1) + if (fun-width != 8 fun-width != 16 fun-width != 32) The above comment looks like it should be removed. Otherwise, Acked-by: Scott Wood [EMAIL PROTECTED] Feel free to send via a powerpc tree due to the dependencies. -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] MPC85xx: Change traps.c to not reference non-addressable memory
On Wed, May 14, 2008 at 1:10 PM, [EMAIL PROTECTED] wrote: From: Becky Bruce [EMAIL PROTECTED] Currently, END_OF_RAM is used by the trap code to determine if we should attempt to access the stack pointer or not. However, on systems with a lot of RAM, only a subset of the RAM is guaranteed to be mapped in and accessible. Change END_OF_RAM to use get_effective_memsize() instead of using the raw ram size out of the bd. Signed-off-by: Becky Bruce [EMAIL PROTECTED] Applied, merci Andy - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] UEC Driver - 83xx RGMII half duplex BUG FIX - RFC
All, I wanted to post this for comments before I submitted a patch. Anyone using the 83xx and maybe other families, may or may not have noticed that any half duplex connection will not work, except in MII or RMII modes. Although, I am guessing that many people never use this mode, real painful if somebody plugs an older hub into your box though. Anyway simple fix, in the Freescale manual according to Table 30-7 any attemps to clear the MACCFG2[FDX] bit while using RGMII mode will result in undefined QE operation, and from personal experience, it will lock up the QE and you have to issue a restart or reboot the box to recover. To work around this we need to remove the clearing of the FDX bit while in RGMII, RTBI, TBI, or GMII modes. The only modes that can clear the FDX bit are MII or RMII. Since I am not the author of the drivers, would the team want me to submit my idea on how to fix this, or would the author like to quickly add in this check before clearing the bit? Or alternatively before calling the uec_set_mac_duplex function(). Though I am a fan of making all functions self protecting against bad code. Comments? -Russ - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH 1/3] Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.
WARNING: This conversion was untested because I do not have a board to
test it on.
NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.
Signed-off-by: Gerald Van Baren [EMAIL PROTECTED]
---
board/freescale/mpc7448hpc2/mpc7448hpc2.c |9 +++
cpu/74xx_7xx/cpu.c| 35
include/configs/mpc7448hpc2.h |2 +-
3 files changed, 25 insertions(+), 21 deletions(-)
diff --git a/board/freescale/mpc7448hpc2/mpc7448hpc2.c
b/board/freescale/mpc7448hpc2/mpc7448hpc2.c
index 81846eb..fcbebc0 100644
--- a/board/freescale/mpc7448hpc2/mpc7448hpc2.c
+++ b/board/freescale/mpc7448hpc2/mpc7448hpc2.c
@@ -105,3 +105,12 @@ ft_board_setup (void *blob, bd_t *bd)
}
}
#endif
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+ fdt_fixup_memory(blob, (u64)bd-bi_memstart, (u64)bd-bi_memsize);
+}
+#endif
diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c
index 9c8998b..a6e3426 100644
--- a/cpu/74xx_7xx/cpu.c
+++ b/cpu/74xx_7xx/cpu.c
@@ -44,6 +44,11 @@
#include 74xx_7xx.h
#include asm/cache.h
+#if defined(CONFIG_OF_LIBFDT)
+#include libfdt.h
+#include fdt_support.h
+#endif
+
#if defined(CONFIG_OF_FLAT_TREE)
#include ft_build.h
#endif
@@ -301,29 +306,19 @@ watchdog_reset(void)
/* - */
-#ifdef CONFIG_OF_FLAT_TREE
-void
-ft_cpu_setup (void *blob, bd_t *bd)
+#ifdef CONFIG_OF_LIBFDT
+void ft_cpu_setup(void *blob, bd_t *bd)
{
- u32 *p;
- ulong clock;
- int len;
-
- clock = bd-bi_busfreq;
+ do_fixup_by_prop_u32(blob, device_type, cpu, 4,
+timebase-frequency, bd-bi_busfreq / 4, 1);
+ do_fixup_by_prop_u32(blob, device_type, cpu, 4,
+bus-frequency, bd-bi_busfreq, 1);
+ do_fixup_by_prop_u32(blob, device_type, cpu, 4,
+clock-frequency, bd-bi_intfreq, 1);
- p = ft_get_prop (blob, /cpus/ OF_CPU /bus-frequency, len);
- if (p != NULL)
- *p = cpu_to_be32 (clock);
+ fdt_fixup_memory(blob, (u64)bd-bi_memstart, (u64)bd-bi_memsize);
-#if defined(CONFIG_TSI108_ETH)
- p = ft_get_prop (blob, / OF_TSI /[EMAIL PROTECTED]/address, len);
- memcpy (p, bd-bi_enetaddr, 6);
-#endif
-
-#if defined(CONFIG_HAS_ETH1)
- p = ft_get_prop (blob, / OF_TSI /[EMAIL PROTECTED]/address, len);
- memcpy (p, bd-bi_enet1addr, 6);
-#endif
+ fdt_fixup_ethernet(blob, bd);
}
#endif
/* - */
diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h
index f614e67..c01d0a5 100644
--- a/include/configs/mpc7448hpc2.h
+++ b/include/configs/mpc7448hpc2.h
@@ -75,7 +75,7 @@
#define CFG_PROMPT_HUSH_PS2
/* Pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU PowerPC,[EMAIL PROTECTED]
--
1.5.5.1
-
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[U-Boot-Users] [PATCH 2/3] Change the stxxst to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change to CONFIG_OF_LIBFDT. WARNING: This conversion was untested because I do not have a board to test it on. It isn't apparent to me that a flattened device tree is used any more. Signed-off-by: Gerald Van Baren [EMAIL PROTECTED] --- include/configs/stxxtc.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 97a1032..fcafba5 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -590,8 +590,8 @@ typedef unsigned int led_id_t; /*/ -/* pass open firmware flat tree */ -#define CONFIG_OF_FLAT_TREE1 +/* pass open firmware flattened device tree */ +#define CONFIG_OF_LIBFDT 1 #define OF_CPU PowerPC,[EMAIL PROTECTED] #define OF_TBCLK (MPC8XX_HZ / 16) -- 1.5.5.1 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] Non-block-skipping NAND commands (was: Loading from NAND using 'nboot' Periodically Fails Where 'nand read' Succeeds)
I would vote for making bad black handling the default. I've been working on fixing up a design of ours that mistakenly used non block skipping version and I've been trying to find all the places were bad block's were not being skipped and fixes them. Our system only uses NAND flash and people are very concerned about it. Stuart On Mon, Jun 2, 2008 at 6:07 PM, Scott Wood [EMAIL PROTECTED] wrote: Grant Erickson wrote: Thanks for the suggestion. That solved it. As an academic exercise, is there any practical reason a system would want to use nboot, as I erroneously chose to do, without .i|.jffs2|.e? I don't think so, though I don't know the history involved. Does anyone actually use the non-block-skipping versions of any of the nand commands (intentionally, that is)? If the answer is no, then we could make it the default. -Scott - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users -- Stuart Wood Lab X Technologies, LLC 176 Anderson Ave. Suite 302 Rochester, NY 14607 Phone: (585) 271-7790 x207 Fax: (585) 473.4707 - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 0/3] Remove the deprecated CONFIG_OF_FLAT_TREE
Jerry Van Baren wrote: The following troika of patches switch the final two boards (mpc7448hpc2 and stxxst) from using CONFIG_OF_FLAT_TREE to CONFIG_OF_LIBFDT and then remove support for CONFIG_OF_FLAT_TREE. Sorry for the noise, I didn't do a full job, working on the rest of the job. gvb - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] MPC85xx: Beatify boot output of L2 cache configuration
On Wed, May 28, 2008 at 1:12 PM, Wolfgang Grandegger [EMAIL PROTECTED] wrote: The boot output is now aligned poperly with other boot output lines, e.g.: FLASH: 128 MB L2:512 KB enabled Signed-off-by: Wolfgang Grandegger [EMAIL PROTECTED] A silly comment, but let's spell it Beautify Andy - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] 83xx/85xx/86xx: add more MxMR local bus definitions
On Jun 2, 2008, at 3:38 PM, Wolfgang Grandegger wrote: Scott Wood wrote: On Mon, Jun 02, 2008 at 12:09:30PM +0200, Wolfgang Grandegger wrote: 83xx/85xx/86xx: add more MxMR local bus definitions This patch adds more macro definitions for the UPM Machine Mode Registers They are copied from include/mpc82xx.h to simplify the merge of all 8xxx common local bus definitions into include/asm-ppc/fsl_lbc.h. We should move them rather than copy, and then include asm/ fsl_lbc.h from asm/mpc8260.h. Moving FSL local bus definitions from asm/mpc8260.h to asm/fsl_lbc.h is a big change as Anton already pointed out in http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html and not only restricted to the MxMR definitions. We need to be careful here as the localbus on 8260 while similar to 83xx/85xx/86xx isn't nearly as close as the LBC and eLBC on the 83xx/ 85xx/86xx parts are to each other. - k - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] ColdFire: Add 10 base ethernet support for mcf5445x
Ben Warren wrote:
Tsi-Chung.Liew wrote:
From: TsiChung Liew [EMAIL PROTECTED]
Signed-off-by: TsiChung Liew [EMAIL PROTECTED]
---
drivers/net/mcffec.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index 5ab4726..8d4e248 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -125,11 +125,17 @@ void setFecDuplexSpeed(volatile fec_t * fecp, bd_t *
bd, int dup_spd)
}
if ((dup_spd 0x) == _100BASET) {
+#ifdef CONFIG_MCF5445x
+fecp-rcr = ~0x200;/* disabled 10T base */
Don't you mean = ~0x200? Negative hex is confusing stuff...
Never mind... Thunderbird is displaying tildes as hyphens.
+#endif
#ifdef MII_DEBUG
printf(100Mbps\n);
#endif
bd-bi_ethspeed = 100;
} else {
+#ifdef CONFIG_MCF5445x
+fecp-rcr |= 0x200; /* enabled 10T base */
+#endif
#ifdef MII_DEBUG
printf(10Mbps\n);
#endif
-
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Re: [U-Boot-Users] [PATCH] ColdFire: Add 10 base ethernet support for mcf5445x
Tsi-Chung.Liew wrote:
From: TsiChung Liew [EMAIL PROTECTED]
Signed-off-by: TsiChung Liew [EMAIL PROTECTED]
---
drivers/net/mcffec.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index 5ab4726..8d4e248 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -125,11 +125,17 @@ void setFecDuplexSpeed(volatile fec_t * fecp, bd_t *
bd, int dup_spd)
}
if ((dup_spd 0x) == _100BASET) {
+#ifdef CONFIG_MCF5445x
+ fecp-rcr = ~0x200;/* disabled 10T base */
Don't you mean = ~0x200? Negative hex is confusing stuff...
+#endif
#ifdef MII_DEBUG
printf(100Mbps\n);
#endif
bd-bi_ethspeed = 100;
} else {
+#ifdef CONFIG_MCF5445x
+ fecp-rcr |= 0x200; /* enabled 10T base */
+#endif
#ifdef MII_DEBUG
printf(10Mbps\n);
#endif
-
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[U-Boot-Users] Pull request: u-boot-net
Wolfgang, Please pull from the net repo: The following changes since commit 2c8d41969b47eb0b973912830c58689b2ba0e50a: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-testing are available in the git repository at: git://www.denx.de/git/u-boot-net.git master Jens Gehrlein (1): smc911x: add 16 bit support Ron Madrid (1): Add Marvell 88E1118 support for TSEC TsiChung Liew (1): ColdFire: Add 10 base ethernet support for mcf5445x Wolfgang Grandegger (1): E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop Adapter README| 15 +++ drivers/net/e1000.c |2 ++ drivers/net/e1000.h |3 ++- drivers/net/mcffec.c |6 ++ drivers/net/smc911x.c | 21 +++-- drivers/net/tsec.c| 31 +++ include/pci_ids.h |3 ++- 7 files changed, 77 insertions(+), 4 deletions(-) - This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse012070mrt/direct/01/ ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
