On Friday, October 14, 2016 3:59:13 PM EDT Shawn Starr wrote:
> On Monday, September 26, 2016 4:53:00 PM EDT Marek Olšák wrote:
> > Hi,
> >
> > You can try this patch:
> > drm/amdgpu: fix addr handling in amdgpu_vm_bo_update_mapping
> >
> > Marek
>
> Hello Marek,
>
> This has regressed, can w
On Monday, September 26, 2016 4:53:00 PM EDT Marek Olšák wrote:
> Hi,
>
> You can try this patch:
> drm/amdgpu: fix addr handling in amdgpu_vm_bo_update_mapping
>
> Marek
>
Hello Marek,
This has regressed, can wedge GPU again.
Kernel log:
[ 1581.488430] [drm:amdgpu_cs_ioctl [amdgpu]] *ERRO
copy paste typo when I re-arranged the code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 2eefa5d..48
Hi Dave,
Fixes for radeon and amdgpu for 4.9:
- allow an additional reg in the SI reg checker
- fix thermal sensor readback on CZ/ST
- misc bug fixes
The following changes since commit 69405d3da98b48633b78a49403e4f9cdb7c6a0f5:
Merge tag 'topic/drm-misc-2016-10-11' of
git://anongit.freedesktop
Using the cached values has less latency for bare metal
and SR-IOV, and prevents reading back bogus values if the
engine is powergated.
v2: fix typo in tile idx calculation
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vi.c | 117 +---
1 file cha
Simplify the code and properly set the csb for harvest values.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 30 ++
1 file changed, 2 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/am
Needed when for SR-IOV and when PG is enabled.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ba36db8..e066441 100644
-
We need to cache some additional values to handle SR-IOV
and PG.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 7d30a8e..efbd9ef
Up to you; whichever you think is easier.
Alex
From: Zhu, Rex
Sent: Friday, October 14, 2016 11:27 AM
To: Deucher, Alexander; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/7] drm/amdgpu: check min clock set by DAL before set ps.
Ok. i will add CI support in powerplay next week.
Best Re
and update a comment as well.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.h
index da5cf47..ee6e
Ok. i will add CI support in powerplay next week.
Best Regards
Rex
From: Deucher, Alexander
Sent: Friday, October 14, 2016 9:42:42 PM
To: Zhu, Rex; amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: RE: [PATCH 1/7] drm/amdgpu: check min clock set by DAL before
On Fri, Oct 14, 2016 at 10:54 AM, Tom St Denis wrote:
> Add the rest of the basic SQ WAVE fields to
> finish off the implementation. Eventually,
> a separate interface will be needed for GPRs.
>
> Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v7
Add the rest of the basic SQ WAVE fields to
finish off the implementation. Eventually,
a separate interface will be needed for GPRs.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 6 ++
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 6 ++
2 files changed, 12 insertions
Odd. We haven't seen any failures internally with Fiji and 3 VCE rings
enabled. Can you provide a log of the failure? Try manually loading amdgpu
after boot. E.g., append modprobe.blacklist=amdgpu to the kernel command line
and boot to a non-X runlevel, then manually modprobe amdgpu and capt
But I _am_ getting failures with drm-next-4.9 and drm-next-4.9-wip and
drm-next right now, so that's why I sent the patch that started this thread.
And as the subject says it fails to boot so there's no dmesg to show. It
hangs hard...
I have filed a bug for this also, but I had problems with the b
That change was squashed into the following patches along with the fix for UVD
as well:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.9-wip&id=d7ca7ab8259f43473bc387dda2a5b84aeb049961
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.9-wip&id=57da26e4c4c1c7cc042aba192
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.7-wip&id=9d24b304abbe5380da1bc782b4460596e7cb1109
2016-10-14 16:12 GMT+02:00 Deucher, Alexander :
> What patch are you referring to?
>
>
>
> Alex
>
>
>
> *From:* Ernst Sjöstrand [mailto:ern...@gmail.com]
> *Sent:* Friday, October 14,
On Fri, Oct 14, 2016 at 10:10 AM, Tom St Denis wrote:
> Move IP version specific code into a callback.
>
> Also add support for gfx7 devices.
>
> Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
> drivers/gpu/drm/amd/amdgpu/amdg
What patch are you referring to?
Alex
From: Ernst Sjöstrand [mailto:ern...@gmail.com]
Sent: Friday, October 14, 2016 10:06 AM
To: Deucher, Alexander
Cc: amd-gfx mailing list; StDenis, Tom
Subject: RE: [PATCH] amdgpu: Fix failing boot after support for third vce ring
next-4.9 and wip are the bro
Move IP version specific code into a callback.
Also add support for gfx7 devices.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 ++---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 25 +++
next-4.9 and wip are the broken branches for me so something is wrong. I
could cherry pick the patch Tom mentioned and got a delta so I don't think
you have it.
Den 14 okt. 2016 3:49 em skrev "Deucher, Alexander" <
alexander.deuc...@amd.com>:
> All of those patches are integrated:
>
> https://cgi
Hi Alex,
> We can use amdgpu_dpm_get_sclk() and amdgpu_dpm_get_mclk() for both powerplay
> and non-powerplay. No need to special case it.
Tested. It seems so. Updated the patch accordingly. Please have a check.
Regards,
Evan
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gma
All of those patches are integrated:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.9-wip&id=57da26e4c4c1c7cc042aba1925813fea7413dbeb
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.9-wip&id=d7ca7ab8259f43473bc387dda2a5b84aeb049961
From: amd-gfx [mailto:amd-gfx-boun
I squashed the phys mode fixes into the original patch patch for upstream:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.9-wip&id=d7ca7ab8259f43473bc387dda2a5b84aeb049961
Alex
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
StDenis, Tom
Sent: Friday, O
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Friday, October 14, 2016 8:07 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 1/7] drm/amdgpu: check min clock set by DAL before set ps.
>
> Change-Id:
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Zhu, Rex
> Sent: Friday, October 14, 2016 8:12 AM
> To: Alex Deucher
> Cc: Maling list - DRI developers; amd-gfx list
> Subject: RE: [PATCH] drm/amd/powerplay: don't give up if DPM is already
Hi Alex,
Sounds like a plan since I want to add a few fields anyways.
Tom
From: Deucher, Alexander
Sent: Friday, October 14, 2016 09:33
To: StDenis, Tom; Nicolai Hähnle
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 1/3] drm/amd/amdgpu: Add wave reader
You could make the wave decode a gfx callback and move the code into the IP
modules.
Alex
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
StDenis, Tom
Sent: Friday, October 14, 2016 6:56 AM
To: Nicolai Hähnle
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/3] d
> -Original Message-
> From: Quan, Evan
> Sent: Thursday, October 13, 2016 8:59 PM
> To: Alex Deucher
> Cc: Deucher, Alexander; amd-gfx@lists.freedesktop.org; Zhang, Jerry; Huan,
> Alvin; Huang, Ray
> Subject: RE: drm/amd/powerplay: expose max engine and memory clock
> info for powerplay en
You'd need
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.7-wip&id=9ab4662c313d25731e53cc4f044bddb9c506ca13
and
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.7-wip&id=da00756f75422b04befae381e7e48d0cacf299f3
I'll let Alex speak for the drm-next branches since
Means the drm pull request for 4.9 is broken then also, FYI.
2016-10-14 15:17 GMT+02:00 Ernst Sjöstrand :
> 9d24b304abbe5380da1bc782b4460596e7cb1109
> cherry-picks cleanly on drm-next-4.9-wip but then fails to build:
>
> CC [M] drivers/gpu/drm/amd/amdgpu/vce_v3_0.o
> drivers/gpu/drm/amd/amdgpu
You definitely need the patch from staging-4.7.
The "amd-staging-4.x" branches are what we (amd folk) normally develop against
on a daily basis and then alex cherry picks them to drm-next-*. Sometimes
patches are missed.
Hopefully Alex can cherry pick it to drm-next branches shortly [😊]
Tom
9d24b304abbe5380da1bc782b4460596e7cb1109
cherry-picks cleanly on drm-next-4.9-wip but then fails to build:
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v3_0.o
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c:854:2: error: unknown field ‘type’
specified in initializer
.type = AMDGPU_RING_TYPE_VCE,
^
drivers/g
I'm testing both drm-next-4.9 and drm-next-4.9-wip from ~agd5f.
I think the problem is in drm-next now also.
They all have
6f0359f drm/amdgpu/vce3: add support for third vce ring
75c6548 drm/amdgpu: track the number of vce rings
But not
9d24b30 drm/amdgpu: fix broken VCE startup in phys mode
which
Do you have
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.7-wip&id=9d24b304abbe5380da1bc782b4460596e7cb1109
as well?
I've booted the tip of our staging-4.7 branch with a FIJI device (FURY) and was
able to play videos (vdpau) and normal GL apps.
Tom
Yes, the 6f0359ff73076483902de0c17f9649bf55651e2a I'm referring to is the
same as
780605db12c52f2c22d4d2cc05ceb7d2a9d55579 (only exists in amd-staging).
So the last of those two commits is the one that causes my problem.
Regards
//Ernst
2016-10-14 14:53 GMT+02:00 StDenis, Tom :
> Does your tree
Does your tree have
2f3d686d0ee95332d169c7b6788bb2d9f5ad
780605db12c52f2c22d4d2cc05ceb7d2a9d55579
in it? Those are fixes for when the third ring were added.
Tom
From: amd-gfx on behalf of Ernst
Sjöstrand
Sent: Friday, October 14, 2016 08:49
To: amd-
My Fiji class Fury fails to boot after commit
6f0359ff73076483902de0c17f9649bf55651e2a
"drm/amdgpu/vce3: add support for third vce ring"
This commits reverts the number of vce rings back to 2,
but leaves the other changes intact.
Signed-off-by: Ernst Sjöstrand
---
drivers/gpu/drm/amd/amdgpu/vce_
Patch3-8 are Reviewed-by: Rex Zhu
Best Regards
Rex
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian König
Sent: Thursday, October 13, 2016 3:15 PM
To: Alex Deucher; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: Re: [P
Change-Id: Iaff11c514927fc596cdf9677b2ebde92fcb2d31e
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 2 ++
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 6 --
drivers/gpu/drm/amd/amdgpu/si_dpm.c | 2 ++
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/am
Change-Id: I74e719454e1c048bb3d31f4dc3e3f39bad0e
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 81 +++---
1 file changed, 16 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/amdg
Change-Id: Id71b9a3329a8a143a189b275926b0a2054bf0bb8
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 1d8c375..fd2fe85 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
Change-Id: I3dcfda30f93f3a7cf94988097f34b7e1a8298968
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 4cfd55c..366418e 100644
---
Change-Id: I00186c6d316c22fdf065fd8525e927dd2ee79685
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
index f80a083..1ae2b95 100644
--- a/dri
Change-Id: I6d214800a2bcf4781656905afc1643bca0dd07d5
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/si_dpm.c | 52 +
1 file changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index 3de7bca..
Change-Id: Ib774eeff0f3f19a5f593668dd3329f5cfd111eaa
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 51 +
1 file changed, 51 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index fd2fe85..
Hi Alex,
Your new attached patch is Tested-by and Reviewed-by: Rex Zhu
Just one question,
Do we need to set clock_gate for smu?
Best Regards
Rex
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gmail.com]
Sent: Thursday, October 13, 2016 11:29 PM
To: Zhu, Rex
Cc: Grazvyda
Hi Nicolai,
I was trying to avoid having ASIC specific includes/etc in the amdgpu_device.c
file. Agreed that de-numberifying it would be nice. Maybe we can add some
/**/ comments to clear it up. I imagine in the future we'll add more fields
(upto 32 in this design) anyways.
Cheers,
Tom
Am 14.10.2016 um 01:13 schrieb Alex Deucher:
On Thu, Oct 13, 2016 at 12:16 PM, Tom St Denis wrote:
On non VI/CZ platforms it would not free
the grbm index lock.
Signed-off-by: Tom St Denis
---
Reviewed-by: Alex Deucher
Reviewed-by: Christian König .
drivers/gpu/drm/amd/amdgpu/amdgpu
Am 13.10.2016 um 23:58 schrieb Alex Deucher:
This makes it easier to replace specific IP blocks on
asics for handling virtual_dce, DAL, etc. and for building
IP lists for hw or tables. This also stored the status
information in the same structure.
Signed-off-by: Alex Deucher
...
diff --git a
Am 14.10.2016 um 04:29 schrieb zhoucm1:
On 2016年10月14日 05:22, Alex Deucher wrote:
IP types are not an index. Each asic may have number and
type of IPs. Properly check the the type rather than
using the type id as an index.
v2: fix all the IPs to not use IP type as an idx as well.
Signed-of
Am 13.10.2016 um 23:37 schrieb Alex Deucher:
It's not used outside the file.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König .
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 3 +++
drivers/gpu/drm/amd/amdgpu/dce_virtual.h | 1 -
2 files changed, 3 insertions(+), 1 deletion(-)
Alex Deucher wrote:
On Tue, Oct 11, 2016 at 7:48 PM, Andy Furniss wrote:
The boot vce/uvd issue is fixed in 4.9-wip now, so I can boot latest but -
The segfault on startx is still there.
Fixed in v2.
Yea, all OK now.
___
amd-gfx mailing list
amd
On 11.10.2016 21:18, Tom St Denis wrote:
Currently supports CZ/VI. Allows nearly atomic read
of wave data from GPU.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 74 ++
1 file changed, 74 insertions(+)
diff --git a/drivers/gpu/drm/am
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