[PATCH] drm/amd/display: validate plane format on primary plane

In dce110, the plane configuration is such that plane 0 or the primary plane should be rendered with only RGB data. This patch adds the validation to ensure that no video data is rendered on plane 0. Signed-off-by: Shirish S Reviewed-by: Tony Cheng ---

RE: [PATCH v2] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

Reviewed-by: Xiangliang Yu > -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Emily Deng > Sent: Wednesday, March 07, 2018 9:52 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deng, Emily > Subject:

Re: [PATCH] drm/amd/pp: Fix "Add auto power profilng switch based on workloads"

Reviewed-by: Alex Deucher From: amd-gfx on behalf of Rex Zhu Sent: Tuesday, March 6, 2018 9:56 PM To: amd-gfx@lists.freedesktop.org Cc: Zhu, Rex Subject: [PATCH] drm/amd/pp: Fix

Re: [PATCH xf86-video-ati] Only change Set/MoveCursor hooks from what we expect

On 03/05/2018 10:56 PM, Alex Deucher wrote: On Mon, Mar 5, 2018 at 12:44 PM, Michel Dänzer wrote: From: Michel Dänzer Since xf86CursorCloseScreen runs after RADEONCloseScreen_KMS, PointPriv->spriteFuncs doesn't point to the same struct in the

Re: [PATCH 1/2] drm/amdgpu: imlement mmio byte access helpers

Actually, for mailbox registers once the byte field is touched even not changed, the mailbox behaves, so we need the byte width accessing to those sort of regs. Please correct the typo in commit title. With that change, Reviewed-by: Pixel Ding — Sincerely Yours, Pixel

[PATCH] drm/amd/pp: Fix "Add auto power profilng switch based on workloads"

1. fix typo "<" should be "<<" 2. fix code style 3. fix uninitialized point *workload Signed-off-by: Rex Zhu Change-Id: I35d03d19360c75e8eb2021bd3db63e52c93e1e61 --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 14 +++---

RE: [PATCH] drm/atomic: Add new reverse iterator over all plane state

Hi Alex, Have resent the V2 with R-B of Daniel. Regards, Shirish S -Original Message- From: Alex Deucher [mailto:alexdeuc...@gmail.com] Sent: Tuesday, March 6, 2018 11:01 PM To: Vishwakarma, Pratik Cc: Daniel Vetter ; Deucher, Alexander

[PATCH] drm/atomic: Add new reverse iterator over all plane state (V2)

Add reverse iterator for_each_oldnew_plane_in_state_reverse to compliment the for_each_oldnew_plane_in_state way or reading plane states. The plane states are required to be read in reverse order for amd drivers, cause the z order convention followed in linux is opposite to how the planes are

[PATCH v2] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean up the sdma wptr directly to fix this issue. v2:add comment above the code and correct coding style Signed-off-by:

Re: amdgpu with 8+ cards for GPU mining?

Thanks for all of the help. I've purchased a Gigabyte GA-B250-Fintech motherboard, and was able to get 9 cards running on the system. So the 8 card limit does appear to be a BIOS issue with the ASUS B250 Mining Expert Here are some of my experiences with mining motherboards.

[PATCH 20/28] drm/amd/display: Fix handling of linear transfer function

From: Vitaly Prosyak Signed-off-by: Vitaly Prosyak Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/modules/color/color_gamma.c | 6 -- 1 file changed, 4

[PATCH 09/28] drm/amd/display: Fix takover from VGA mode

From: Bhawanpreet Lakha HW Engineer's Notes: During switch from vga->extended, if we set the VGA_TEST_ENABLE and then hit the VGA_TEST_RENDER_START, then the DCHUBP timing gets updated correctly. Then vBIOS will have it poll for the VGA_TEST_RENDER_DONE and unset

[PATCH 15/28] drm/amd/display: Enable backlight support for pre-DCE11 ASICs

From: Mikita Lipski Initializing ABM and DMCU modules for dce 80/81/83/100 as in DCE110 Adding constructors and destructors for each module. Adding register list for DMCU in dce80 as some registers are missing in dce80 from the basic list. DMCU is never used, so it would

[PATCH 28/28] drm/amd/display: clean up dcn pplib notification call

From: Dmytro Laktyushkin We have unused variables being populated when notifying pplib. This change amends that. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 23/28] drm/amd/display: Set disp clk in a safe way to avoid over high dpp clk.

From: Yongqiang Sun Increase clock, if current dpp div is 0 and request dpp div is 1, request clk is higher than maximum dpp clk as per dpm table. set dispclk to the value of maximum supported dpp clk set div to 1 set dispclk to request value.

[PATCH 17/28] drm/amd/display: Implement stats logging

From: Anthony Koo Stats will be used for debug purposes Signed-off-by: Anthony Koo Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/basics/logger.c | 3 +-

[PATCH 00/28] DC Patches Mar 6, 2018

Note: sending with --no-validate since dce_calcs has ridiculously long lines. * Fix corrupt screen issue when booting on Raven * Enable backlight support for pre-DCE11 ASICs * Update dce_calcs formula * Bunch of Raven patches and fixes all around Anthony Koo (2): drm/amd/display: Implement

[PATCH 05/28] drm/amd/display: Varibright add null check

From: SivapiriyanKumarasamy Add null check for stream update Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Krunoslav Kovac Acked-by: Harry Wentland ---

[PATCH 26/28] drm/amd/display: Use actual TG instance instead of pipe instance

From: "Jerry (Fangzhi) Zuo" Signed-off-by: Jerry (Fangzhi) Zuo Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c | 10 +-

[PATCH 01/28] drm/amd/display: Fix memleaks when atomic check fails.

From: "Leo (Sunpeng) Li" While checking plane states for updates during atomic check, we create dc_plane_states in preparation. These dc states should be freed if something errors. Although the input transfer function is also freed by dc_plane_state_release(), we should free

[PATCH 19/28] drm/amd/display: dal 3.1.38

From: Tony Cheng Signed-off-by: Tony Cheng Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 02/28] drm/amd/display: Use correct error codes

From: "Leo (Sunpeng) Li" Should return -ENOMEM when allocation fails. Also, just return the error code instead of using a variable. Signed-off-by: Leo (Sunpeng) Li Reviewed-by: Harry Wentland ---

[PATCH 07/28] drm/amd/display: Remove 300Mhz minimum disp clk limit.

From: Yongqiang Sun 300Mhz disp clk limit was a workaround that was fixed in SMU and is no longer needed. Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 06/28] drm/amd/display: Convert CTM to 2's complement

From: "Leo (Sunpeng) Li" DRM's documentation for the color transform matrix does not specify whether the values are in signed-magnitude, or 2's complement. Therefore, it was assumed to use 2's complement. However, existing usermode implementations use signed-magnitude.

[PATCH 10/28] drm/amd/display: fix check condition for edp power control

From: Eric Yang Per discussion with VBIOS team, the orginal check is not correct in all cases on latest VBIOS. Additional check is needed. This change should maintain old behaviour on older VBIOS. Signed-off-by: Eric Yang Reviewed-by: Charlene Liu

[PATCH 27/28] drm/amd/display: Fixed dim around 1sec when resume from S3

From: Yongqiang Sun root cause: DMCU try to perform a smoothness brightness change.Incorrect initial brightness level causes the 1 sec dim. Change: Cache brightness level in stream, and clear it when edp backlight on. If brightness level in stream is 0, set brightness with

[PATCH 14/28] drm/amd/display: use HW hdr mult for brightness boost

From: Krunoslav Kovac In MPO scenario when playing SDR clip in HDR desktop mode, Win is boosting desktop and requests driver to boost MPO. But driver boosting is currently done in regamma which is stream property and thus shared between grph and video. Redesigning the

[PATCH 08/28] drm/amd/display: Allow passing of syspll id to get_smu_clock_info

From: "Jerry (Fangzhi) Zuo" Signed-off-by: Jerry (Fangzhi) Zuo Reviewed-by: Hersen Wu Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 6 +++---

[PATCH 22/28] drm/amd/display: add support for regkey "LCDFreeSyncDefault"

From: Samson Tam Signed-off-by: Samson Tam Reviewed-by: Anthony Koo Acked-by: Harry Wentland --- .../drm/amd/display/modules/freesync/freesync.c| 26 ++ 1 file changed, 26

[PATCH 24/28] drm/amd/display: update dce_calcs to latest version

From: Dmytro Laktyushkin Bw spreadsheet was updated while dce_calcs was not Change-Id: I66bb120aa855afbb90647047a39f32a2b10886eb Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 03/28] drm/amd/display: Vari-bright looks disabled near end of MM14

From: SivapiriyanKumarasamy Avoid hanging DMCU by setting abm level only when OTG unblanked Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 18/28] drm/amd/display: Add variable refresh rate parameters to DC structures

From: Anthony Koo Time stamping will be part of surface, and will be updated when address is flipped. FreeSync parameters will be attached to stream, as it adjusts the timing dynamically. Signed-off-by: Anthony Koo Reviewed-by: Tony Cheng

[PATCH 13/28] drm/amd/display: Use MACROS instead of dm_logger

From: Bhawanpreet Lakha Use DC_LOGGER macro for logs. Signed-off-by: Bhawanpreet Lakha Reviewed-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc_debug.c| 14 +-

[PATCH 21/28] drm/amd/display: Correct the plane enumeration order

From: Shirish S The order of planes is given by the order they are enumerated by kms. Planes with a higher ID appears above planes with a lower ID. Currently the planes are enumerated in the wrong order, putting the nv12 only plane after the two RGBA planes. This patch

[PATCH 11/28] drm/amd/display: Modified set bandwidth sequence.

From: Yongqiang Sun This change make sure bandwidth is set properly. For increase bandwidth, set bandwidth before backend and front end programming. For decrease bandwidth, set bandwidth after. To avoid smu hang when reboot and dpms due to 0 disp clk, keep min disp clock

[PATCH 16/28] drm/amd/display: early return if not in vga mode in disable_vga

From: Eric Yang The work around for hw bug causes S3 resume failure. Don't execute disable vga logic if not in vga mode. Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 12/28] drm/amd/display: Move DTRACE and dml_print defines

From: Bhawanpreet Lakha These MACROS are only being used by a few files but gets pulled in by dc.h Signed-off-by: Bhawanpreet Lakha Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 25/28] drm/amd/display: Check for HW blocks in HWSS, rather than DC core for cursor

Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 +-- drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 9 ++---

[PATCH 04/28] drm/amd/display: Varibright fix bug and review comments

From: SivapiriyanKumarasamy Fix bug and make changes from review 132656 Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

Re: New KFD ioctls: taking the skeletons out of the closet

On Tue, Mar 06, 2018 at 05:44:41PM -0500, Felix Kuehling wrote: > Hi all, > > Christian raised two potential issues in a recent KFD upstreaming code > review that are related to the KFD ioctl APIs: > > 1. behaviour of -ERESTARTSYS > 2. transactional nature of KFD ioctl definitions, or lack

Re: New KFD ioctls: taking the skeletons out of the closet

On 7 March 2018 at 08:44, Felix Kuehling wrote: > Hi all, > > Christian raised two potential issues in a recent KFD upstreaming code > review that are related to the KFD ioctl APIs: > > 1. behaviour of -ERESTARTSYS > 2. transactional nature of KFD ioctl definitions, or

New KFD ioctls: taking the skeletons out of the closet

Hi all, Christian raised two potential issues in a recent KFD upstreaming code review that are related to the KFD ioctl APIs: 1. behaviour of -ERESTARTSYS 2. transactional nature of KFD ioctl definitions, or lack thereof I appreciate constructive feedback, but I also want to encourage an

Re: [PATCH 2/2] drm/amdgpu:Always save uvd vcpu_bo in VM Mode

Series are: Reviewed-by: Leo Liu On 03/06/2018 03:14 PM, James Zhu wrote: When UVD is in VM mode, there is not uvd handle exchanged, uvd.handles are always 0. So vcpu_bo always need save, Otherwise amdgpu driver will fail during suspend/resume. Bugzilla:

[PATCH 2/2] drm/amdgpu:Always save uvd vcpu_bo in VM Mode

When UVD is in VM mode, there is not uvd handle exchanged, uvd.handles are always 0. So vcpu_bo always need save, Otherwise amdgpu driver will fail during suspend/resume. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105021 Signed-off-by: James Zhu ---

[PATCH 1/2] drm/amdgpu:Correct max uvd handles

Max uvd handles should use adev->uvd.max_handles instead of AMDGPU_MAX_UVD_HANDLES here. Signed-off-by: James Zhu --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

Am 06.03.2018 um 19:15 schrieb Michel Dänzer: On 2018-03-06 07:02 PM, Christian König wrote: Am 06.03.2018 um 18:51 schrieb Michel Dänzer: On 2018-03-06 06:44 PM, Christian König wrote: Am 06.03.2018 um 18:22 schrieb Li, Samuel: addition to that I agree with Michel that the module parameter

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

On 2018-03-06 07:02 PM, Christian König wrote: > Am 06.03.2018 um 18:51 schrieb Michel Dänzer: >> On 2018-03-06 06:44 PM, Christian König wrote: >>> Am 06.03.2018 um 18:22 schrieb Li, Samuel: > addition to that I agree with Michel that the module parameter is > overkill. That I

RE: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

> Buffer placement is specified by the DDX/Mesa, when we override that in the > kernel we just force unnecessary buffer moves. Since scan out buffer is moved to GTT now, DDX/Mesa might need to make some changes for this too. Regards, Samuel Li > -Original Message- > From: Christian

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

Am 06.03.2018 um 18:51 schrieb Michel Dänzer: On 2018-03-06 06:44 PM, Christian König wrote: Am 06.03.2018 um 18:22 schrieb Li, Samuel: addition to that I agree with Michel that the module parameter is overkill. That I already explained. Currently SG display feature needs to provide options

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

On 2018-03-06 06:44 PM, Christian König wrote: > Am 06.03.2018 um 18:22 schrieb Li, Samuel: >> >>> addition to that I agree with Michel that the module parameter is >>> overkill. >> That I already explained. Currently SG display feature needs to >> provide options for all kinds of use cases. All

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

Am 06.03.2018 um 18:22 schrieb Li, Samuel: And exactly that's the problematical assumption. Not assumption, I tested. You have any typical use case that it might become a problem? Not 100% sure, but I doubt you have tried that with different userspace programs. Especially animated boot

Re: Modesetting (amdgpudrmfb) artifacts on RAVEN APU

On 2018-03-06 18:28, Tom St Denis wrote: I routinely rebase this patch on top of our amd-staging-drm-next tree at fdo. https://cgit.freedesktop.org/~agd5f/linux/log/?h=amd-staging-drm-next Awesome. So I used this tree, branch amd-staging-drm-next, and applied the patch - and my screen

[ANNOUNCE] xf86-video-ati 18.0.0

I'm pleased to announce the 18.0.0 release of xf86-video-ati, the Xorg driver for ATI/AMD Radeon GPUs supported by the radeon kernel driver. This release supports xserver versions 1.13-1.19. It also works with xserver 1.20 RC1, so unless something unexpected happens, it should work with xserver

Re: Modesetting (amdgpudrmfb) artifacts on RAVEN APU

Hi, On 2018-03-06 12:18, Tom St Denis wrote: I believe this is the same issue I had which is a VGA handoff problem. Can you try this patch the display team sent me? Harry:  Will this patch be promoted in the next cycle? What is the base for this patch? I cannot apply it on the top of any

Re: [PATCH] drm/atomic: Add new reverse iterator over all plane state

On Tue, Mar 6, 2018 at 5:52 AM, Vishwakarma, Pratik wrote: > Hi Daniel, > > I have checked make htmldocs on v2 of this patch. I have attached output > drm-kms.html on that thread. > No indentation issue is observed. Attached again for reference. > Can you please

Re: Modesetting (amdgpudrmfb) artifacts on RAVEN APU

I routinely rebase this patch on top of our amd-staging-drm-next tree at fdo. https://cgit.freedesktop.org/~agd5f/linux/log/?h=amd-staging-drm-next Tom On 03/06/2018 12:27 PM, KARBOWSKI Piotr wrote: Hi, On 2018-03-06 12:18, Tom St Denis wrote: I believe this is the same issue I had which

RE: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

> And exactly that's the problematical assumption. Not assumption, I tested. You have any typical use case that it might become a problem? > addition to that I agree with Michel that the module parameter is overkill. That I already explained. Currently SG display feature needs to provide options

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

And exactly that's the problematical assumption. This doesn't print only when the module is loaded, but rather when a framebuffer object is created. And depending on the use case that can even be many many times per second. Please remove that printing, addition to that I agree with Michel

RE: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

This information is kind of important, and it only prints once typically when module is loaded. Regards, Samuel Li > -Original Message- > From: Alex Deucher [mailto:alexdeuc...@gmail.com] > Sent: Tuesday, March 06, 2018 12:04 PM > To: Li, Samuel > Cc: Koenig,

Re: [PATCH xf86-video-amdgpu] Only change Set/MoveCursor hooks from what we expect

On Tue, Mar 6, 2018 at 12:02 PM, Michel Dänzer wrote: > From: Michel Dänzer > > Since xf86CursorCloseScreen runs after AMDGPUCloseScreen_KMS, > PointPriv->spriteFuncs doesn't point to the same struct in the latter as > in AMDGPUCursorInit_KMS. So we

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

On Tue, Mar 6, 2018 at 11:49 AM, Samuel Li wrote: >>> domain = amdgpu_display_framebuffer_domains(adev); >>> +if (domain == AMDGPU_GEM_DOMAIN_GTT) { >>> +DRM_INFO("Scatter gather display: enabled\n"); >>> +} else if (domain & AMDGPU_GEM_DOMAIN_GTT) { >>> +

[PATCH xf86-video-amdgpu] Only change Set/MoveCursor hooks from what we expect

From: Michel Dänzer Since xf86CursorCloseScreen runs after AMDGPUCloseScreen_KMS, PointPriv->spriteFuncs doesn't point to the same struct in the latter as in AMDGPUCursorInit_KMS. So we were restoring info->Set/MoveCursor to the wrong struct. Then in the next server

Re: Modesetting (amdgpudrmfb) artifacts on RAVEN APU

On 2018-03-06 11:13 AM, Alex Deucher wrote: > On Tue, Mar 6, 2018 at 6:18 AM, Tom St Denis wrote: >> I believe this is the same issue I had which is a VGA handoff problem. >> >> Can you try this patch the display team sent me? >> >> Harry: Will this patch be promoted in the

Re: [PATCH 1/2] drm/amdgpu: Enable scatter gather display support

>> domain = amdgpu_display_framebuffer_domains(adev); >> +if (domain == AMDGPU_GEM_DOMAIN_GTT) { >> +DRM_INFO("Scatter gather display: enabled\n"); >> +} else if (domain & AMDGPU_GEM_DOMAIN_GTT) { >> +DRM_INFO("Scatter gather display: auto\n"); >> +} > > Dito and

Re: [PATCH 1/4] drm/amd/pp: Replace files name rv_* with smu10_*

On Tue, Mar 6, 2018 at 5:10 AM, Rex Zhu wrote: > Powerplay is for the hw ip smu, for RV, smu10 is used, > so use smu10 as the prefix of the files name. > > Change-Id: Icf9c8a9d4b5deccd4fbfb9ecfab443db79934c77 > Signed-off-by: Rex Zhu > --- >

Re: Modesetting (amdgpudrmfb) artifacts on RAVEN APU

On Tue, Mar 6, 2018 at 6:18 AM, Tom St Denis wrote: > I believe this is the same issue I had which is a VGA handoff problem. > > Can you try this patch the display team sent me? > > Harry: Will this patch be promoted in the next cycle? I think it will eventually. IIRC, there

Re: [PATCH] drm/amd/pp: Add #ifdef checks for CONFIG_ACPI

Reviewed-by: Alex Deucher From: amd-gfx on behalf of Rex Zhu Sent: Tuesday, March 6, 2018 1:47:24 AM To: amd-gfx@lists.freedesktop.org Cc: Zhu, Rex Subject: [PATCH] drm/amd/pp:

RE: [PATCH] drm/atomic: Add new reverse iterator over all plane state

Below mail was rejected, maybe due to attachment. Sending again without attachment. Regards Pratik -Original Message- From: Vishwakarma, Pratik Sent: Tuesday, March 6, 2018 4:22 PM To: 'Daniel Vetter' ; Alex Deucher Cc: Deucher, Alexander

[PATCH 3/6] drm/ttm: move initializing ttm->sg into ttm_tt_init_fields

Better to set this with all other fields as well. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_tt.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c index

[PATCH 1/6] drm/ttm: add ttm_bo_pipeline_gutting

Allows us to gut a BO of it's backing store when the driver says that it isn't needed any more. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo.c | 15 --- drivers/gpu/drm/ttm/ttm_bo_util.c | 24

[PATCH 4/6] drm/amdgpu: drop the backing store when DMA-buf imports are evicted

Instead of moving this to the SYSTEM domain just drop the backing store and let the resulting allocation be freed. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH 6/6] drm/amdgpu: explicit give BO type to amdgpu_bo_create

Drop the "kernel" and sg parameter and give the BO type to create explicit to amdgpu_bo_create instead of figuring it out from the parameters. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-

[PATCH 5/6] drm/amdgpu: initial validate the prime BOs into the CPU domain

Just set the GTT domain as mandatory, so that the BO is validated into it on first use. This allows us to setup the sg table later on. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

[PATCH 2/6] drm/ttm: add bo as parameter to the ttm_tt_create callback

Instead of calculating the size in bytes just to recalculate the number of pages from it pass the BO directly to the function. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 drivers/gpu/drm/ast/ast_ttm.c | 6

Re: [PATCH 2/2] drm/amdgpu: fix KV harvesting

Acked-by: Rex Zhu for the series. Best Regards Rex From: amd-gfx on behalf of Alex Deucher Sent: Tuesday, March 6, 2018 2:30 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher,

Re: [PATCH] drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory"

Reviewed-by: Rex Zhu Best Regards Rex From: Christian König Sent: Tuesday, March 6, 2018 9:58 PM To: Zhu, Rex; amd-gfx@lists.freedesktop.org Subject: [PATCH] drm/amd/pp: fix "Delete the wrapper layer of

Re: Modesetting (amdgpudrmfb) artifacts on RAVEN APU

I believe this is the same issue I had which is a VGA handoff problem. Can you try this patch the display team sent me? Harry: Will this patch be promoted in the next cycle? Tom On 03/05/2018 11:40 AM, KARBOWSKI Piotr wrote: Hi list, I'd like to report a very odd screen artifacts while

[PATCH 2/2] drm/amdgpu: refactoring mailbox to fix TDR handshake bugs

this patch actually refactor mailbox implmentations, and all below changes are needed together to fix all those mailbox handshake issues exposured by heavey TDR test. 1)refactor all mailbox functions based on byte accessing for mb_control reason is to avoid touching non-related bits when writing

[PATCH 1/2] drm/amdgpu: imlement mmio byte access helpers

mailbox register can be accessed with a byte boundry according to BIF team, so this patch prepares register byte access and will be used by following patches Change-Id: I1e84f1c6e8e75dc42eb5be09c492fa5e7eb7502a Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu.h

Re: [PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

Am 06.03.2018 um 10:59 schrieb Emily Deng: The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean up the sdma wptr directly to fix this issue. Signed-off-by: Emily Deng

Re: [PATCH] drm/atomic: Add new reverse iterator over all plane state

On Wed, Feb 28, 2018 at 09:26:26AM -0500, Alex Deucher wrote: > + dri-devel > > > On Wed, Feb 28, 2018 at 4:33 AM, S, Shirish wrote: > > From: Shirish S > > > > Add reverse iterator "for_each_oldnew_plane_in_state_reverse" to > > complement

RE: [PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

The sdma v4 doesn't have the issue about the conflict between doorbell and sdma wptr polling. Best Wishes, Emily Deng > -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of zhoucm1 > Sent: Tuesday, March 06, 2018 6:03 PM > To: Deng, Emily

Re: [PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

looks we didn't hit similar issues during vega10 testing ... From: amd-gfx on behalf of zhoucm1 Sent: Tuesday, March 6, 2018 6:02:35 PM To: Deng, Emily; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH]

Re: [PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

How about other sdma version? like sdma v4 etc. Regards, David Zhou On 2018年03月06日 17:59, Emily Deng wrote: The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean

Re: [PATCH 3/5] drm/ttm: move ttm_tt defines into ttm_tt.h

Acked-by: Thomas Hellstrom On 03/06/2018 10:13 AM, Christian König wrote: Hi Michel & Thomas, any more comments on this? Or can I commit it? Thanks, Christian. Am 27.02.2018 um 12:49 schrieb Christian König: Let's stop mangling everything in a single header and

[PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean up the sdma wptr directly to fix this issue. Signed-off-by: Emily Deng ---

Re: [PATCH 3/5] drm/ttm: move ttm_tt defines into ttm_tt.h

On 2018-03-06 10:13 AM, Christian König wrote: > Hi Michel & Thomas, > > any more comments on this? Or can I commit it? Acked-by: Michel Dänzer -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast |

RE: [PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

Better to add comment above the code. Reviewed-by: Xiangliang Yu > -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Emily Deng > Sent: Tuesday, March 06, 2018 5:17 PM > To: amd-gfx@lists.freedesktop.org > Cc: Deng,

Re: [PATCH 1/5] drm/prime: fix potential race in drm_gem_map_detach

On Tue, Mar 06, 2018 at 10:30:56AM +0100, Christian König wrote: > Am 06.03.2018 um 10:15 schrieb Daniel Vetter: > > On Wed, Feb 28, 2018 at 11:25:59AM +0100, Christian König wrote: > > > Am 28.02.2018 um 10:48 schrieb Lucas Stach: > > > > Hi Christian, > > > > > > > > Am Dienstag, den

Re: [PATCH 2/5] drm/prime: make the pages array optional for drm_prime_sg_to_page_addr_arrays

On Tue, Mar 06, 2018 at 10:25:03AM +0100, Christian König wrote: > Am 06.03.2018 um 10:21 schrieb Daniel Vetter: > > On Tue, Feb 27, 2018 at 12:49:57PM +0100, Christian König wrote: > > > Most of the time we only need the dma addresses. > > > > > > Signed-off-by: Christian König

Re: [PATCH 1/5] drm/prime: fix potential race in drm_gem_map_detach

Am 06.03.2018 um 10:15 schrieb Daniel Vetter: On Wed, Feb 28, 2018 at 11:25:59AM +0100, Christian König wrote: Am 28.02.2018 um 10:48 schrieb Lucas Stach: Hi Christian, Am Dienstag, den 27.02.2018, 12:49 +0100 schrieb Christian König: Unpin the GEM object only after freeing the sg table.

Re: [PATCH 2/5] drm/prime: make the pages array optional for drm_prime_sg_to_page_addr_arrays

Am 06.03.2018 um 10:21 schrieb Daniel Vetter: On Tue, Feb 27, 2018 at 12:49:57PM +0100, Christian König wrote: Most of the time we only need the dma addresses. Signed-off-by: Christian König --- drivers/gpu/drm/drm_prime.c | 20 ++-- 1 file

Re: [PATCH 2/5] drm/prime: make the pages array optional for drm_prime_sg_to_page_addr_arrays

On Tue, Feb 27, 2018 at 12:49:57PM +0100, Christian König wrote: > Most of the time we only need the dma addresses. > > Signed-off-by: Christian König > --- > drivers/gpu/drm/drm_prime.c | 20 ++-- > 1 file changed, 10 insertions(+), 10 deletions(-) >

Re: [Nouveau] [PATCH 4/5] drm/ttm: add ttm_sg_tt_init

On Tue, Feb 27, 2018 at 01:07:06PM +0100, Christian König wrote: > Hi guys, > > at least on amdgpu and radeon the page array allocated by ttm_dma_tt_init is > completely unused in the case of DMA-buf sharing. So I'm trying to get rid > of that by only allocating the DMA address array. > > Now

[PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean up the sdma wptr directly to fix this issue. Signed-off-by: Emily Deng ---

Re: [PATCH 1/5] drm/prime: fix potential race in drm_gem_map_detach

On Wed, Feb 28, 2018 at 11:25:59AM +0100, Christian König wrote: > Am 28.02.2018 um 10:48 schrieb Lucas Stach: > > Hi Christian, > > > > Am Dienstag, den 27.02.2018, 12:49 +0100 schrieb Christian König: > > > Unpin the GEM object only after freeing the sg table. > > What is the race that is being

Re: [PATCH 3/5] drm/ttm: move ttm_tt defines into ttm_tt.h

Hi Michel & Thomas, any more comments on this? Or can I commit it? Thanks, Christian. Am 27.02.2018 um 12:49 schrieb Christian König: Let's stop mangling everything in a single header and create one header per object instead. Signed-off-by: Christian König ---

RE: [PATCH] drm/amdgpu: Disable sdma wptr polling memory for sriov

Hi all, Please ignore this patch, the root cause about the sdma hang introduced by sdma wptr polling has been found, will submit another patch. Best Wishes, Emily Deng > -Original Message- > From: Emily Deng [mailto:emily.d...@amd.com] > Sent: Tuesday, March 06, 2018 10:15 AM > To:

RE: [PATCH] Revert "drm/amdgpu: use polling mem to set SDMA3 wptr for VF"

Hi all, Please ignore this patch, the root cause about the sdma hang introduced by sdma wptr polling has been found, will submit another patch. Best Wishes, Emily Deng > -Original Message- > From: Deng, Emily > Sent: Tuesday, March 06, 2018 9:50 AM > To: Deng, Emily

Re: [PATCH] drm/atomic: Add new reverse iterator over all plane state (V2)

On Mon, 05 Mar 2018, Harry Wentland wrote: > make DOCBOOKS="" htmldocs DOCBOOKS is no more. Simply 'make htmldocs' will do the same. BR, Jani. -- Jani Nikula, Intel Open Source Technology Center ___ amd-gfx mailing list

  1   2   >