Re: [ath9k-devel] Help clarifying TX power setting
Just as a follow-up to let future readers know what I did.
On Thu, Sep 15, 2011 at 1:10 PM, Adrian Chadd adr...@freebsd.org wrote:
On 16 September 2011 01:00, Daniel Smith viscous.liq...@gmail.com wrote:
I can't help with the radiotap stuff, sorry.
No problem, that was provided more for context of what I am doing.
Which I already had the radiotap portion written.
Yes, it looks like the TPC value being written to the TX frame is the raw
value.
If there are any corrections that need to be applied, such as the -5
dBm offset in Merlin and later; CCK differences, some differences with
AR9285 calibration values, etc - these need to be written out too.
Sorry I can't be more help at the moment; just look at the code which
configures the current and the maximum TX power values in the eeprom.c
files.
So looking that the set_txpower for each type of eeprom, they
apparently do basically the same thing except for the 9003_eeprom.
Just before writing the rate power array, it iterates over the array
doing a -= {factor} * 2 where factor is either a define with a value
of -5 or the value in EEP_PWR_TABLE_OFFSET. For the 9285 I deal with
that has an 4k eeprom (which uses a define for the factor),
EEP_PWR_TABLE_OFFSET also has a value of -5. So I just went with using
EEP_PWR_TABLE_OFFSET * 2 for my offset, but will have to do something
more complicated when I have to start dealing with cards using the
9003_eeprom.
Daniel
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Re: [ath9k-devel] Help clarifying TX power setting
Daniel Smith wrote: I would appreciate if some clarification could be provided on how the chip determines it's tx power. There will most likely be none. :\ //Peter ___ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
Re: [ath9k-devel] Help clarifying TX power setting
I think the rule is: * if the TPC enable bit is set, it's set in the descriptor * else it's set in AR_PHY_POWER_* per-rate registers and the ACK/CTS/CHIRP power register. adrian ___ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
[ath9k-devel] Help clarifying TX power setting
Thanks for responding! On Thu, Sep 15, 2011 at 10:32 AM, Adrian Chadd adr...@freebsd.org wrote: I think the rule is: * if the TPC enable bit is set, it's set in the descriptor * else it's set in AR_PHY_POWER_* per-rate registers and the ACK/CTS/CHIRP power register. I just found this thread from July, http://thread.gmane.org/gmane.linux.drivers.ath9k.devel/6597/focus=6610, which is very similar to what I need to do. The difference is that while I want to do per frame power control, I need to enforce that the power level coming in through radiotap is not greater than what is dictated by the reg domain. The only other item I need to confirm is if there is any correction need for the incoming dBm value before writing it to the descriptor. Daniel ___ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
Re: [ath9k-devel] Help clarifying TX power setting
On 16 September 2011 01:00, Daniel Smith viscous.liq...@gmail.com wrote: http://thread.gmane.org/gmane.linux.drivers.ath9k.devel/6597/focus=6610, which is very similar to what I need to do. The difference is that while I want to do per frame power control, I need to enforce that the power level coming in through radiotap is not greater than what is dictated by the reg domain. The only other item I need to confirm is if there is any correction need for the incoming dBm value before writing it to the descriptor. I can't help with the radiotap stuff, sorry. Yes, it looks like the TPC value being written to the TX frame is the raw value. If there are any corrections that need to be applied, such as the -5 dBm offset in Merlin and later; CCK differences, some differences with AR9285 calibration values, etc - these need to be written out too. Sorry I can't be more help at the moment; just look at the code which configures the current and the maximum TX power values in the eeprom.c files. adrian ___ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
[ath9k-devel] Help clarifying TX power setting
I would appreciate if some clarification could be provided on how the chip determines it's tx power. I have reviewed the code and see that when the card is initialized it gets the power level from the reg dom and sets that value in the eeprom. Later when a packet is passed down the value MAX_RATE _POWER is used for the txpower in the tx descriptor. Can I assume that the actually power used will be MAX_RATE_POWER unless a lower power has been set in the eeprom? Finally and the reason I ask, is that I do not see anywhere in the code where the radio tap field for tx power is used, would expect it to be processed by the function __ieee80211_parse_tx_radiotap. So if I want to limit tx power via radiotap I will have to parse it in mac80211, in someway ensure it gets passed down to ath9k, and then make ath9k act on it? I would appreciate any help. Thanks! v/r, Daniel Smith ___ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
