Hi, Ryan,
What is in the coregen.log file (whose name is terribly mangled)?
On May 9, 2013, at 8:43 AM, Ryan Monroe wrote:
All runtime messages will be recorded in
/nas/users/monroe/Desktop/new_algo_v3/monroe_library/dev/v6/radix_4/r4_12ghz_
top
Hi, Ron,
On May 6, 2013, at 2:28 PM, r...@physics.ucsb.edu wrote:
Having one ADC filling the FIFO with
its own clock would cause one signal to have a
delay relative to the other. Are you suggesting
the FIFO in the FPGA corrects this problem by
cancelling the delay?
I don't know how/whether
On May 3, 2013, at 12:09 PM, Dan Werthimer wrote:
the yellow block initialization checks the clock
output from both adc's and resets one of
the adc's until both clocks are synced up.
I know this happened on the iBobs, but I'm not sure it is still the case on the
ROACH (or ROACH2).
Ron, are
Hi, Jason,
Why only a factor of 2 faster instead of a factor of 10? What is the limiting
factor other than ethernet speed?
10 Mbps throughput over a 100 Mbps link (10% efficiency) seems not so great but
understandable/acceptable.
20 Mbps throughput over a 1,000 Mbps link (2% efficiency)
Hi, Sameed,
I think the only existing yellow blocks that use the MGTs are the 10 GbE block
and the XAUI block. If you have other high speed serial data that you want to
interface with the CASPER toolflow, you'll need to dive into the depths of
building your own yellow block.
Hope this helps,
Hi, John,
It's odd that just_built.jpeg doesn't show ROACH (or ROACH2) in the XSG
block. I think missing that is what leads to the error dialog shown in
error.jpg. In after_ok.jpeg, the XSG block has ROACH in it.
Does the model build OK now? FWIW, I've used 14.2 with the new Shared BRAM
Hi, Taka,
On Apr 24, 2013, at 5:43 PM, Takahiro NAOI wrote:
Hello, I’m Taka in Kagoshima university.
I have a question about saving process of the mdl file. When I save a
mdl file through the top menu on the model window (File Save), does
the Simulink record some information even if I did
Hi, Ross,
The ROACH1 BORPH kernel can be found in the old CASPER Subversion repository.
I don't know where the older BEE2 BORPH code is located, but the ROACH1 BORPH
work was almost certainly based on that.
I don't know for sure which Linux source code version the original Subversion
commit
Hi, Katty,
The first error report in the timing file shows this:
Source:
Hi, Nimish,
We followed these instructions and had good results:
http://www.mail-archive.com/casper@lists.berkeley.edu/msg03351.html
The files specified might be somewhat out of date now, but the general ideas
are the same. I've updated the ROACH2's /etc directory. You can get my latest
to that first if you're having timing issues.
On 04/08/2013 04:52 PM, David MacMahon wrote:
Hi, Katty,
The first error report in the timing file shows this:
Source:
tut3_XSG_core_config/tut3_XSG_core_config/tut3_x0/fft_wideband_real_e4c9925378
Hi, Andrea,
On Apr 4, 2013, at 2:20 AM, Andrea Mattana wrote:
I have updated to the latest mlib_devel, and installed the 14.4. I
cannot run the simulation because my MATLAB 8.0 doesn't have yet the
DSP Toolbox needed for the downsampler into the iADC block, anyway I
found a difference with
Hi, Andrea,
Are you seeing problems in simulation or on actual hardware? I just made a
quick test model and the sync input was propagated fine in simulation. Can you
please explain your symptoms in more detail? Which version of mlib_devel are
you using? What hardware platform are you
Hi, Isaac,
On Apr 3, 2013, at 3:45 PM, isaac...@caltech.edu wrote:
ERROR: 1 constraint not met.
PAR could not meet all timing constraints. A bitstream will not be generated.
I have read lot of documents and everybody said that is better solve the
problem adding delays and no disable the
Hi, Sarfraz,
What do you mean by treated as invalid? Do you get any error message(s) when
you try to login as root or does it just return you to the login prompt?
Since it's not asking for a password when logging in as root, I suspect that
the /etc/password and /etc/shadow files are correct
Hi, Glenn,
I don't know about getting tcpborphserver to log messages. For logging in
general, I recommend running syslog on the ROACH (1 or 2) configured to send
its messages to a logserver host on on your network. With some syslog
configuration setup on the receive side (e.g. on logserver)
Our logserver host (which is just an alias to our netboot server) runs Ubuntu
12.04 LTS and uses rsyslog.
I've attached our /etc/rsyslog.conf file and the /etc/rsyslog.d/10-remote.conf
file. The former is mostly standard but with the three following changes:
1) Enables UDP reception (maybe it
Hi Katherine,
On Mar 22, 2013, at 11:47 AM, katherine viviana cortes urbina wrote:
running the casper_xps the tut3.slx I got one error message:
gmake: *** [implementation/system.bit] Error 1
ERROR:EDK -
Hi, Ryan,
On Mar 18, 2013, at 2:21 PM, Ryan Monroe wrote:
root@roach:/proc/618/hw/ioreg# echo 0 ../ioreg_mode
root@roach:/proc/618/hw/ioreg# echo -e \x00\x00\x00\x00 acc_always_valid
-bash: echo: write error: Invalid argument
You need to either double up the backslashes or put the
Hi, Nimish,
Does this occur in simulation as well?
Dave
On Mar 15, 2013, at 12:14 PM, Nimish Sane wrote:
Hi all:
I am attaching a plot for Power of two inputs vs frequency channels. As can
be seen, we have this persistent problem where some channels at the end just
do not make any
Hi, Wes,
On Mar 12, 2013, at 10:35 AM, Wesley New wrote:
There
might be 1 or 2 tweeks to the tools that you would have to do.
The only tweak that I've needed to do so far is to export model files (e.g.
xps_library.mdl) that have been saved in the latest Simulink version to an
older Simulink
that is not 32 bits wide.
On 3/12/13, David MacMahon dav...@astro.berkeley.edu wrote:
Hi, Wes,
On Mar 12, 2013, at 10:35 AM, Wesley New wrote:
There
might be 1 or 2 tweeks to the tools that you would have to do.
The only tweak that I've needed to do so far is to export model files
(e.g
Hi, Jack,
We noticed that one of our designs gave bogus results when run on a ROACH 1
board with a serial number in the range 02, but valid results when run on a
ROACH 1 board with a serial number in the ranges 03 or 04.
After much head scratching, we opened up one 02, one
Hi, Andrew,
On Feb 13, 2013, at 11:27 PM, Andrew Martens wrote:
Hi Dave
It would be good to add an optional Latency parameter to the Shared BRAM
block
This is on a (rather long) list of library upgrades we are keen on here
in SA.
I just looked into this and discovered that the
Hi, Rich,
We've sustained 9.9 Gpbs simultaneously from two 10 GbE ports (19.8 Gbps
aggregate) on a ROACH into a PC with two 10 GbE NICs without dropping any
packets. This was direct connect (i.e. no switch) and transmit only (i.e. no
packets were sent back to the ROACH).
Hope this helps,
Hi, John,
My current work is on ROACH2 and the 10_Gbe_v2 block is the only 10 GbE block
supported on ROACH2 so that's the one I'm currently designing with (but not yet
using myself). I'm not sure which block Christopher used in the packet
generator. His design ran on a ROACH so it could have
not updated the repository of late
and have been using ten_Gbe_v2 for my ROACH2 design.
Thanks,
Nimish
On Wed, Feb 13, 2013 at 5:07 PM, David MacMahon dav...@astro.berkeley.edu
wrote:
Hi, John,
My current work is on ROACH2 and the 10_Gbe_v2 block is the only 10 GbE
block supported
I've noticed that the Virtex 6 BRAM clock-to-output time is kind of long when
NOT using the optional output register (Trcko_DO = 2.08 ns) as compared to
using the optional output register (Trcko_DOA_REG = 0.75 ns). Using the
optional output register adds an extra cycle of latency, but that
Can anyone clarify the use of jumpers/shunts for getting a ROACH2 rev2 to power
on automatically when A/C power is applied? JP2 in the schematic has the
comment Bridge to enable main power on initial power-up, but that doesn't
seem to behave in the way I want (doesn't power on when A/C power
Hi, John,
You can find my copy by cloning this git repo:
http://astro.berkeley.edu/~davidm/roach2_netboot_etc.git
Dave
Does anyone have a test and/or demo model for ROACH2 that exercises the QDR
chips? (Preferably one saved in Simulink version 7 format.)
Thanks,
Dave
When I place a QDR yellow block in a ROACH model, the data out port is 36
bits wide. In a ROACH2 model, the QDR data out port is 72 bits wide. The
data in port seems to double in expected width as well on ROACH2 as compared
to ROACH.
Why the dramatic interface change for ROACH2? Are the
Thanks, Glenn!
Dave
On Feb 5, 2013, at 3:58 PM, G Jones wrote:
I'm pretty sure they're twice as wide to keep up with the increased
processing throughput possible with the bigger FPGA.
On Tue, Feb 5, 2013 at 3:10 PM, David MacMahon
dav...@astro.berkeley.edu wrote:
When I place a QDR
, David MacMahon dav...@astro.berkeley.edu
wrote:
Does anyone have a test and/or demo model for ROACH2 that exercises the QDR
chips? (Preferably one saved in Simulink version 7 format.)
Thanks,
Dave
--
Henno Kriel
DSP Engineer
Digital Back End
meerKAT
SKA South Africa
Third
Hi, Jack,
Thanks for your helpful reply!
On Jan 31, 2013, at 2:01 AM, Jack Hickish wrote:
However, digging through the library, calibration flags (cal_fail and
phy_ready and a software qdr_reset) for the 4 QDR chips should be available
in 0x7000, 0x8000, 0x9000, 0xA (does one of these
Thanks Wes! Jonathon is using the new ADC16x250-8 that is not able to provide
a sync input since it uses ALL differential pairs of the ZDOK for clocks and
data. I guess we'll be adding it to the ROACH2 GPIO block.
Thanks again for the pointers,
Dave
On Jan 29, 2013, at 11:55 AM, Wesley New
Hi, David,
I think this is becoming more and more common in the industry, at least for
networking chips. I think Marvell also requires an NDA to get the datasheet
for the 1 GbE PHYs on the ROACH2 itself. Are you aware of any similar SFP+
PHYs that do NOT require an NDA for the datasheet?
Hi, Homin,
Could this problem possibly be caused by planAhead not finding the necessary
OPB cores?
Dave
On Jan 20, 2013, at 6:01 PM, homin wrote:
Hello:
I am trying to push the fabric clock faster and faster, so that i am trying
the newest version 14.3 and planahead.
I got a problem
Hi, Glenn,
I don't know if this is practical, but you could build tcpborphserver3 with
debugging enabled (-g compiler option) and then run tcpborphserver under gdb in
a screen session of the roach. When/if it crashes you can go to the gdb
session to see exactly where/why it crashed.
Dave
On
Hi, Ioana,
I think the details of the error were output earlier than the snippet you
included. They might also be in platgen.log, which you can find in your
model_name/XPS_ROACH2_base directory.
My guess is that it's a bug in the 1 GbE yellow block. Which mlib_devel
version are you using?
Hi, Jeff and Ioana,
To get the /proc/*/hw/io_reg/* devices you will need to run a BORPH enabled
linux kernel. This will lock you into an older kernel (unless you want to
migrate the BORPH linux changes to a newer kernel, but that would be a lot of
work). I am not sure what level (or
On Dec 21, 2012, at 12:49 AM, Marc Welz wrote:
Is there any setup here that could be used with both rev1 and rev2 roach2s?
I have a netboot filesystem that I would like to use for both rev1 and rev2
boards.
Yes. Create two init files with different limits, then start
tcpborphserver3
Hi, Marc,
Thanks for your thoughtful response.
On Dec 21, 2012, at 2:17 AM, Marc Welz wrote:
So we have been thinking about this (and actually the kcs code does
use dlopen), but two things are giving us pause:
1 - The .so files will have to be compiled, and if the toolchain and libraries
Hi, Alec (and Marc),
Thanks for all this!
On Dec 20, 2012, at 7:46 AM, Alec Rust wrote:
Marc has modified tcpborphserver3 to work with normal 8 bit writes now.
Please get the latest one here: https://github.com/ska-sa/roach2_nfs_uboot
(the files are in boot). If you are running a NFS just
It's clear that tcpborphserver is going to become the de facto method of
interacting with user gateware on ROACH2 boards as well as an important method
for interacting with the ROACH2 board itself. This is great for programming
and configuring designs across multiple ROACH2 boards. It's so
Hi, Nimish,
On Dec 18, 2012, at 8:12 AM, Nimish Sane wrote:
Also, upload command does not copy the design to /usr/bof/ directory.
?listbof does not list anything. Is this an expected behavior? Also, then is
progdev command redundant if one is using upload?
Yes, that's how I interpret the
.
And as Jason mentioned earlier, just to reconfirm upload command has not
made it to corr package yet, right?
Thanks,
Nimish
On Tue, Dec 18, 2012 at 12:14 PM, David MacMahon dav...@astro.berkeley.edu
wrote:
Hi, Nimish,
On Dec 18, 2012, at 8:12 AM, Nimish Sane wrote:
Also, upload command
Hi, Nimish,
tcpborhpservr3 provides an upload command that can used to upload a bof file
to the FPGA. From the KATCP README that Marc Welz sent on December 4:
?upload port
Upload and program a local gateware image file to the roach. Send
the local image to the tcp port on the
Hi, Nimish,
On Dec 13, 2012, at 3:10 PM, Nimish Sane wrote:
com.xilinx.sysgen.netlist.NetlistInternal: mkdir
/home/observer/.Xilinx/Sysgen: Permission denied at
/opt/Xilinx/11.1/DSP_Tools/lin64/sysgen/scripts/SgGenerateCores.pm
line 741
It looks like mkdir is getting a permission denied
Hi, Marc,
I can confirm that the wordwrite workaround works. Hopefully the fix for byte
enables (either to make tcpborphserver3 not use them or to make the gateware
support them) will not be too hard.
Thanks,
Dave
On Dec 10, 2012, at 7:06 AM, Marc Welz wrote:
Hello
We have picked up on
:12 AM, Alec Rust wrote:
Dave if the wordwrite workaround works lets stick to that for now. The
workaround Marc compiled is not really good for release. We'll work on a
proper release but for now use wordwrite if thats ok?
Regards
Alec
On Mon, Dec 10, 2012 at 8:42 PM, David MacMahon dav
Sounds great!
Thanks,
Dave
On Dec 10, 2012, at 12:05 PM, Alec Rust wrote:
Jup, Marc is working on this, he has already fixed it but the corner cases
are tricky and needs a bit of attention before it is ready for release.
On Mon, Dec 10, 2012 at 9:32 PM, David MacMahon dav
Hi, Nimish,
I think you can find the information in the output of dmesg as (or after) you
connect the USB cable. It might also be in /var/log/messages.
Dave
On Dec 6, 2012, at 9:04 AM, Nimish Sane wrote:
Hi Jason,
This is regarding the FTDI part. I am using RHEL 5.8. We could not
Hi, Andrew,
Thanks for looking into this.
On Dec 6, 2012, at 12:40 AM, Andrew Martens wrote:
Just done some sims and can't replicate the behaviour.
Interesting. I just did some sims and also can't replicate this behavior in
simulation.
Your problem is therefore interesting. Is this with
one need to install some drivers for this FTDI
component?
Thanks,
Nimish
On Thu, Dec 6, 2012 at 12:20 PM, David MacMahon dav...@astro.berkeley.edu
wrote:
Hi, Nimish,
I think you can find the information in the output of dmesg as (or after) you
connect the USB cable. It might also
USB
OK) that is ON (Red) on the board. Do you know what is that suppose to
indicate?
Thanks,
Nimish
On Thu, Dec 6, 2012 at 2:14 PM, David MacMahon dav...@astro.berkeley.edu
wrote:
Hi, Nimish,
What does dmesg | grep -i ftdi show?
Does lsmod | grep ftdi_sio show anything
Converters Driver
Nimish
On Thu, Dec 6, 2012 at 2:28 PM, David MacMahon dav...@astro.berkeley.edu
wrote:
OK, the fact that the modprobe command showed nothing means that it
succeeded, so try running dmesg | grep -i ftdi again.
Dave
On Dec 6, 2012, at 11:20 AM, Nimish Sane wrote
Sane wrote:
dmesg | grep -i ftdi still shows the same output.
On Thu, Dec 6, 2012 at 2:45 PM, Nimish Sane nimish.s...@njit.edu wrote:
I tried this, but it did not create ttyUSB devices.
Nimish
On Thu, Dec 6, 2012 at 2:41 PM, David MacMahon dav...@astro.berkeley.edu
wrote:
Now try
Hi, Dave,
I think whether a udev rule needs to be created depends on whether the ftdi_sio
module knows about the vendor/product ID. If the module already has an alias
for the necessary vendor/product ID then the rule is already built-in.
Nimish, does modinfo ftdi_sio | grep v0403p6011 output
On Dec 6, 2012, at 1:29 PM, Nimish Sane wrote:
Having done this, we can now use picocom to establish a communication over
these ports. However, we do not see any roach login/prompt on any of the 4
ports. So we are stuck at that point now. Any clue?
Make sure you're using the right baud
I've noticed that tcpborphserver3 (from the ROACH2 NFS root filesystem)
implements a somewhat different set of commands than tcpborphserver2.
Is there a document that documents the latest KATCP commands and the latest
tcpborhserver3 commands?
The old KATCP spec...
.
On Fri, Nov 16, 2012 at 1:53 AM, David MacMahon dav...@astro.berkeley.edu
wrote:
Hi, Alec,
Thanks for the updates!
On Oct 25, 2012, at 7:55 AM, Alec Rust wrote:
To program the new u-boot (NB! choose the correct binary for your revision
of R2, programming the wrong binary will cause
Hi, Alec,
I have some more feedback on the root filesystem image for ROACH2. It looks
like the roach2-debian-fs-snapshot-24-10-2012.tar.gz tarball has nothing in
lib/modules. When using that as an NFS root filesystem, this leads to a number
of error messages like:
modprobe: FATAL: Could not
Hi, Alec,
On Nov 16, 2012, at 11:35 AM, David MacMahon wrote:
A couple of minor annoyances are that ntpdate did not use the NTP server that
DHCP provided:
1 Jan 00:00:14 ntpdate[410]: no server suitable for synchronization found
...nor was the ntpd.conf file updated with the NTP server
Based on the ROACH-2 Production Test Machine Setup document...
https://docs.google.com/a/ska.ac.za/document/d/1tqw4C6uZ6EULl1OykTFL_vQTnK52UBr0aYqTg44E5wg/edit?pli=1
...it seems like ROACH2s should have MAC addresses that match this pattern:
02:*:01:*;*;*
Is there a convention for the
Hi, Alec,
On Oct 25, 2012, at 5:29 PM , Alec Rust wrote:
Correction: To get the new macros to load one must also erase another section
of flash. This can be done in one step so please replace the instruction in
4b with: setenv writeuboot protect off 0xfff4 0x\; era
0xfff4
Thanks, Shanly,
Is it correct to assume that each manufacturer's batch number is unique for
that manufacturer only? IOW, Digicom ('D' = 0x44) could build a roach2 rev 2,
batch 1, board 1 and another manufacturer could also build a roach2 rev 2,
batch 1, board 1 and the only distinction
On Nov 15, 2012, at 10:10 PM, David MacMahon wrote:
= reset
U-Boot 2011.06-rc2-0-g8f3f444-dirty (Oct 25 2012 - 15:40:35)
CPU: AMCC PowerPC 440EPx Rev. A at 533.333 MHz (PLB=133 OPB=66 EBC=66)
No Security/Kasumi support
Bootstrap Option C - Boot ROM Location EBC (16
Hi, Wes,
Are you converting all yellow blocks to wishbone en masse or can they be
converted one by one over time?
Thanks,
Dave
On Sep 27, 2012, at 10:23 AM, Wesley New wrote:
Hi Rurik
These updates don't contain the wishbone port, that is the next item
on my to-do list.
Wes
On
Hi, Wes,
Thanks for taking on this effort! Here are a few comments:
On Sep 3, 2012, at 4:43 AM, Wesley New wrote:
Removing the following yellow blocks:
XAUI - Only supported by BEE2 and iBOB
I didn't realize that XAUI is not supported on the ROACH. I guess if someone
needs it on ROACH
Hi, Tom,
On Aug 28, 2012, at 3:39 PM, Tom Kuiper wrote:
I don't know how to get Python to read more than teh nominal file size if it
is supposed to look like a file.
If you want to read the register value a second time, you need to seek to the
beginning of the file first, then read four
Hi, Tom,
On Aug 28, 2012, at 4:00 PM, Tom Kuiper wrote:
If you want to read the register value a second time, you need to seek to
the beginning of the file first, then read four bytes. You should be able
to repeat the seek/read pattern as many times as you want.
I close the file after
Hi, Dale,
On Jun 19, 2012, at 7:14 AM, Gary, Dale wrote:
Does anyone know an accurate way to find the location of GPS satellites? I
wrote software to calculate this, nominally to an accuracy of a few meters
for the satellites, but I never succeed in getting steady phases after
correction
Hi, Tom,
That's definitely not the most helpful error message. Here are a couple of
things to check: Does the bof file have execute permissions? Is it in the
right directory?
Dave
On Mar 2, 2012, at 3:09 PM, Kuiper, Thomas (3266) wrote:
After the challenges I shared with you and more that
by Optimize
CASPER Development by 'Black Boxing'
Designs by David MacMahon November 23,
2010. David's procedure seems to easily
build black boxes, but when I use bee_xps
to compile simple models that use them, I
get the following dreaded messages.
ERROR:NgdBuild:604 - logical block
Hi, Patrick,
This web page seems to have some good info about using i2c from user space in
linux...
https://xgoat.com/wp/2007/11/11/using-i2c-from-userspace-in-linux/
Dave
On Jan 9, 2012, at 9:32 AM, Patrick Brandt wrote:
David George wrote:
Hi Patrick.
First up; are you using IIC driven
Hi, John,
That's very interesting. How does this compare with a laptop or other PC? Why
was it tested with the lid off? Is that how it will be deployed?
Thanks,
Dave
On Sep 6, 2011, at 1:14 PM, John Ford wrote:
Hi all.
We tested a ROACH and and 2 ADC boards (3 GS/s boards) in our
Thanks, John!
On Sep 6, 2011, at 1:47 PM, John Ford wrote:
Hi, John,
That's very interesting. How does this compare with a laptop or other PC?
Why was it tested with the lid off? Is that how it will be deployed?
Laptops and other PCs are a different kettle of fish altogether. They
Arecibo Remote Command Center Scholar
Center for Gravitational Wave Astronomy
University of Texas at Brownsville
(956) 372-5812
On Aug 17, 2011 12:04 PM, David MacMahon dav...@astro.berkeley.edu wrote:
Hi, Sam,
I have some more details for you. Many of the casper_library blocks remember
their mask parameters so that their initialization scripts can quickly
determine whether any parameter has changed. If an initialization script sees
that no parameter has changed, it will not run any
Hi, Glenn,
One thing you didn't mention is bandwidth/data rate. This matters because it
affects how many inputs you have per F board (i.e. iBOB or ROACH). The PAPER
correlator processes 100 MHz of bandwidth, so it uses 2 quad ADCs (i.e. 8
inputs) per F board (currently iBOBs, but eventually
The new Black Box Memo has been made an update to Memo 27. Here is the
abstract...
The CASPER toolflow uses Xilinx System Generator as its top level design
entry tool. This document describes how to use Xilinx System Generator’s
Black Box block to develop System Generator models (including
I uploaded the Black Box Memo to the CASPER Wiki...
http://casper.berkeley.edu/wiki/images/a/a4/Black_box_memo.pdf
I wasn't sure if this should replace Memo 27 or become a new memo, so I didn't
update the Memos page of the wiki. If anyone can offer guidance on that, I'd
be happy to add a link
On Nov 22, 2010, at 7:43 AM, Andrew Martens wrote:
Have not
tested other library sections and many FFTs related unit tests
crashed Matlab on opening and had to be re-created (Do 'older'
mdl files go off so that Simulink does not like them anymore?)
I have experienced simulink-crashing
Hi Sean,
On Oct 29, 2010, at 2:10 PM, mch...@physics.ucsb.edu wrote:
Here are the outputs of print_10gbe_core_details and tcpdump. It looks to
me that the ARP table is configured properly. Do you still see something
funny in the received packet?
ARP Table:
IP: 10. 0. 0. 20: MAC: 02
On Oct 29, 2010, at 4:34 PM, mch...@physics.ucsb.edu wrote:
[r...@arcons controlScripts]# /sbin/arp -a
? (10.0.0.20) at incomplete on eth1
This show that the PC is not able to get the MAC address for 10.0.0.20 (the
ROACH). I guess it's probably a routing problem or a firewall problem. What
Hi, Sean,
On Oct 28, 2010, at 3:05 PM, mch...@physics.ucsb.edu wrote:
s = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
s.bind(('10.0.0.30', 6))
data = s.recv(5000)
[r...@arcons controlScripts]# /usr/sbin/tcpdump -xx -i eth1 -c 1
tcpdump: verbose output suppressed, use -v or -vv
Hi, Jason,
Looking at the recent commit activity for tcpborphserver2, it seems like a lot
of instrument-specific functionality is being added, which moves it away from
being a general purpose BORPH over TCP/IP utility. If everybody adds their
own instrument-specific functionality to
Hi, Billy,
On Oct 13, 2010, at 6:23 PM, Barott, William Chauncey wrote:
I'm running version 7 of the toolflow compiling for BEE2s.
In addition to the info others have provided about your subnet question, you
might want to seriously consider upgrading your toolflow to 10.1. The current
Hi, Jack,
On Oct 14, 2010, at 10:02 PM, Jack Hickish wrote:
I remember an issue with borph hanging on read/writes, which the mail archive
suggests you may have solved. Could you just confirm -- does the current
version of 10.1 in the git repo successfully create bof files that work with
On Oct 14, 2010, at 10:22 PM, David MacMahon wrote:
I can happily confirm that the current version of mlib_devel (ever since
commit e7c407c) in the git repo can indeed successfully create bof files that
work with the BEE2 using the Xilinx 10.1 tools.
Technically, it's since commit 87070ee
Hi, Danny,
On Sep 23, 2010, at 9:05 , Danny Price wrote:
* adc_10_1.png is a snap block grab of the ADC output, on a compile
at 250MHz using 10.1 (git repo a few weeks old)
* adc_11_4.png: same thing, but with random spikey things, compiled
on our 11.4 Centos machine (latest git repo)
The
Hi, Kris,
On Sep 21, 2010, at 12:02 , Kristian Zarb Adami wrote:
We have terminated two inputs
on the 1GSA/s ADC board and run them through an FX-correlator.
Can you describe your FX-correlator in more detail? Is the F and/or
X part done using CASPER blocks? If so, which ones from which
On Sep 20, 2010, at 7:40 , Jason Manley wrote:
You should check that it's executable, that it was correctly
transferred to the ROACH filesystem (md5 checksum is a reliable
check) and that your build environment compiled a working bitstream/
boffile.
Since a bof file is basically just a
I have just pushed updates to the mlib_devel.git repository. Notable
changes include:
05a6916 Fix-up of coarse delay block
e2acd87 Split casper_library into smaller sub-libraries
d7f9aba Redo library links in xeng block
fd35002 Make xeng_descramble masks quieter
Commit e2acd87 is a fairly
Hi, Guy,
I searched for error and found this...
Running XST synthesis
INSTANCE:xaui_phy_0 -
/home/roach/dev/test_example/tut2_ramp/tut2/XPS_ROACH_base/
system.mhs line 414 -
Running XST synthesis
ERROR:Xst:1484 - A core is unlicensed !
ERROR:EDK:546 - Aborting XST flow execution!
Hi, Andrea,
On Sep 3, 2010, at 2:07 , Andrea Mattana wrote:
yes, I have often done the 'git pull' that's why I was sure to be
up to
date, but I never tried to use the '--ff-only' argument.
The --ff-only option is not necessary; it is only for a sanity
check to make sure that nothing has
Hi, Andrea,
I'm glad to hear that things are working for you now!
On Sep 2, 2010, at 9:15 , Andrea Mattana wrote:
I have used a different string to clone the git repository, and
consist
on:
git clone http://casper.berkeley.edu/git/mlib_devel.git
I really don't know why the results, in
Hi, Andrew,
On Sep 1, 2010, at 7:58 , Andrew Martens wrote:
The casper_library.mdl file seems to be misaligned relative to the
scripts. The
scripts are trying to set mask parameters that don't exist and are
failing.
I completely agree with the above two sentences, but...
I
may be wrong
On Sep 1, 2010, at 15:11 , John Ford wrote:
For what it's worth, I just cloned the git tree from berkeley with:
git clone git://casper.berkeley.edu/mlib_devel.git
and it works fine, as far as a quick test.
Thanks, John!
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