Hi all,
I know this is an old thread, but I wanted to report that me and my team
have been working in an RFI mitigation technique for ROACH2, based in
frequency domain adaptive filter. This requires a reference antenna no
measure the RFI in the environment, I understand that there have been FPGA
i
hi xavier,
it sounds like you are switching between two signal sources,
one is a reference load with a very small signal level,
and the other is a signal from the sky with strong RFI?
if that's the case, can you turn up the signal level on your reference
level?
it would be best if the RMS is arou
Hi Bob,
Thank you for your answer.
Yes, calibrating the 8-bit 5-GSPS ASIAA ADC is a must! I worked on that
some time ago.
I always make sure that the 4-cores OGP and IODELAYS calibration residual
error is within a acceptable range before starting any data acquisition.
We also have checked the who
Hi Xavier,
One problem with the the 8-bit 5-GSPS ASIAA ADC board is that the ADC has
four cores and if they are not exactly aligned, a strong RFI signal will be
modulated by and mix with the periodic errors producing a number of
artifacts.
Bob Wilson
On Thu, Dec 7, 2017 at 5:10 PM, Xavier Bosch
Hi Xavier
I understand your problem -- we face similar impulsive RFI at the ATA.
You are trying to "observe through" the periods of RFI, hence need a lot
of bits. A method we sometimes use is to "blank" the spectrometer output
if the input signal exceeds a certain threshold. When the RFI is so
http://www.naic.edu/~jeffh/vanvleck.html
Cheers,
Richard
-Original Message-
From: Ryan Monroe [mailto:ryan.m.mon...@gmail.com]
Sent: Friday, December 08, 2017 4:15 AM
To: casper@lists.berkeley.edu; Jean Borsenberger
Subject: Re: [casper] Dealing
On 12/08/2017 01:04 AM, Jean Borsenberger wrote:
I knew that correlators could operate using only the sign bit trough
the van-vleck correction and total-power denormalization, but I did
not know that this also applies to spectrometers. I will look into it.
"To the extent of my (imperfect) kn
Hello,
In Nançay, we deal with such high RFI, with a 8bits ADC. We
experienced no problem. It is to be noticed anyhow that we work with
analog filters that almost completely cut low frequencies, and have a
usually a smoother edge for hi freq. For some observations, we have
discretisat
Hi all,
Thank you for your comprehensive responses!
Changing the hardware increasing the number of bits might be the long term
solution.
The RFI power is 50 times (17 dB) the total power form the noise form the
whole times
We adjusted the total output power to make sure it does not clip the
sample
On 12/07/2017 06:43 PM, Dan Werthimer wrote:
hi xavier,
we use 8 bit wideband digitizers at arecibo and parkes where the RFI
is fairly strong.
do you think you might be able to get away with 8 bits ? :
perhaps you know all this adc and dsp dynamic range stuff already, but
here are some th
hi xavier,
we use 8 bit wideband digitizers at arecibo and parkes where the RFI is
fairly strong.
do you think you might be able to get away with 8 bits ? :
perhaps you know all this adc and dsp dynamic range stuff already, but here
are some thoughts:
an 8 bit digitizer usually works well if the
Hi Xavier,
For what it's worth, our SNAP2 collaborators in China made an FMC card with
the 12 bit version of the ASIAA ADC chip. This might be a reasonable
starting point if you don't want to go to wild with JESD.
The post-Virtex6 version of the toolflow (i.e., that used by SNAP / SKARAB)
began l
Hi CASPERites,
We are developing a wideband spectrometer (~1.6 GHz ) in a band that has a
lot of RFI. Currently we are using the 8-bit 5-GSPS ASIAA ADC board and the
ROACH2, and the ADC resolution appears to be inadequate for our extreme RFI
environment.
We would like to move over to a higher
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