[PATCH] D52074: [PowerPC] [Clang] Add vector int128 pack/unpack builtins

steven.zhang added a comment. I will commit the patch for you. Repository: rC Clang https://reviews.llvm.org/D52074 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

steven.zhang added inline comments. Comment at: clang/lib/Basic/Targets/PPC.cpp:272 .Default(false); Features["qpx"] = (CPU == "a2q"); Do we miss to define this macro ? ``` __POWER10_VECTOR__ ``` Comment at:

[PATCH] D80020: [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

steven.zhang added inline comments. Comment at: clang/lib/Basic/Targets/PPC.cpp:272 .Default(false); Features["qpx"] = (CPU == "a2q"); steven.zhang wrote: > Do we miss to define this macro ? > ``` > __POWER10_VECTOR__ > ```

[PATCH] D82725: [PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang

steven.zhang added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10054 + + case Intrinsic::ppc_altivec_mtvsrbm: { +// The llvm.ppc.altivec.mtvsrbm intrinsic can correspond to two different Can we handle this inside the .td ? i.e.

[PATCH] D82726: [PowerPC] Implement Vector Count Mask Bits builtins in LLVM/Clang

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82726/new/ https://reviews.llvm.org/D82726

[PATCH] D85874: [PowerPC] Add readflm/setflm intrinsics to Clang

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM, thank you! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D85874/new/ https://reviews.llvm.org/D85874

[PATCH] D88278: [PowerPC] Add builtins for xvtdiv(dp|sp) and xvtsqrt(dp|sp).

steven.zhang added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:2584 +// Vector test software functions. +def : Pat<(i32 (int_ppc_vsx_xvtdivdp v2f64:$A, v2f64:$B)), Vector test for software divide and sqrt Repository: rG LLVM Github

[PATCH] D82725: [PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82725/new/ https://reviews.llvm.org/D82725

[PATCH] D88278: [PowerPC] Add builtins for xvtdiv(dp|sp) and xvtsqrt(dp|sp).

steven.zhang accepted this revision. steven.zhang added a comment. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D88278/new/ https://reviews.llvm.org/D88278 ___ cfe-commits mailing list

[PATCH] D88278: [PowerPC] Add builtins for xvtdiv(dp|sp) and xvtsqrt(dp|sp).

steven.zhang added a comment. I think some follow up is needed to optimize the code sequence for cr = vec_test_div if (rotate_and_mask(cr, 62)) ... For now, we will copy the cr to gpr, and shift it to 61-64 bit,then, extract the bit and then compare to 0. the shift is not needed.

[PATCH] D80723: [PowerPC] Convert vec_splats functions to macros

steven.zhang added inline comments. Comment at: clang/lib/Headers/altivec.h:13670 + ) +#elif defined(__VSX__) +#define vec_splats(N) \ I am not sure if this is by intention. It is not semantics the same with this change.

[PATCH] D80723: [PowerPC] Convert vec_splats functions to macros

steven.zhang added inline comments. Comment at: clang/lib/Headers/altivec.h:13670 + ) +#elif defined(__VSX__) +#define vec_splats(N) \ vddvss wrote: > steven.zhang wrote: > > I am not sure if this is by intention. It is not

[PATCH] D82431: [PowerPC][Power10] Implement Test LSB by Byte Builtins in LLVM/Clang

steven.zhang added inline comments. Comment at: llvm/test/MC/Disassembler/PowerPC/vsx.txt:2 # RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-linux-gnu \ +# RUN:

[PATCH] D80952: [FPEnv][Clang][Driver] Disable constrained floating point on targets lacking support.

steven.zhang added inline comments. Comment at: clang/lib/Basic/Targets/PPC.h:86 + +HasStrictFP = true; } nemanjai wrote: > I don't think we need this for now. Close is not quite there. @steven.zhang I > would prefer that we initially turn this off and

[PATCH] D81355: [PowerPC] Enable -fstack-clash-protection option for ppc64

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81355/new/ https://reviews.llvm.org/D81355

[PATCH] D82020: PowerPC-specific builtin constrained FP enablement

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM now and thank you for doing this. Please hold on for 2-3 days in case others have comments. And thank you for pointing a potential issue of the folding of fneg + fma. We will

[PATCH] D81836: [PowerPC][Power10] Implement Vector Permute Builtins in LLVM/Clang

steven.zhang added a comment. This is a huge patch. I suggest you to split them into small ones for each kind of builtins, so that, it would be more easy to review. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81836/new/

[PATCH] D82020: PowerPC-specific builtin constrained FP enablement

steven.zhang added a comment. LGTM overall with some minor comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:14238 BuiltinID == PPC::BI__builtin_vsx_xvrspi) - ID = Intrinsic::round; + ID = Builder.getIsFPConstrained() ?

[PATCH] D82020: PowerPC-specific builtin constrained FP enablement

steven.zhang added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:14069 + BuiltinID == PPC::BI__builtin_vsx_xvrspim) +ID = Intrinsic::floor; + else if (BuiltinID == PPC::BI__builtin_vsx_xvrdpi || Can we do it like this to

[PATCH] D80952: [FPEnv][Clang][Driver][WIP] Disable constrained floating point on targets lacking support.

steven.zhang added a comment. The PowerPC backend is also adding the constraint float point support and almost done. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80952/new/ https://reviews.llvm.org/D80952

[PATCH] D81355: [PowerPC] Enable -fstack-clash-protection option for ppc64

steven.zhang added a comment. Herald added a subscriber: wuzish. Shouldn't this be the last patch to commit after the backend supporting this feature ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81355/new/ https://reviews.llvm.org/D81355

[PATCH] D80723: [PowerPC] Convert vec_splats functions to macros

steven.zhang added a comment. It LGTM now except one comment on the test. And it seems that, we still have many other builtins implementation that didn't use the _Generic. Comment at: clang/test/CodeGen/ppc-emmintrin.c:1 -// NOTE: Assertions have been autogenerated by

[PATCH] D84622: [PowerPC] Implement Vector Extract Low/High Order Builtins in LLVM/Clang

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM. But please hold on for one more days to see if there is other comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D92329: [PowerPC][Clang] Remove QPX support

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM as I grep the whole repo with this patch applied, no QPX any more. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92329/new/

[PATCH] D90213: [PowerPC] [Clang] Enable float128 feature on P9 by default

steven.zhang accepted this revision. steven.zhang added a comment. This revision is now accepted and ready to land. LGTM as it seems the missing part. Please also fix the error message if with Power8. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D93377: [Clang] Add __ibm128 type to represent ppc_fp128

steven.zhang added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:2668 // ::= g # __float128 + // ::= g # __ibm128 // UNSUPPORTED:::= Dd # IEEE 754r decimal floating point (64 bits) This is a bit

[PATCH] D91279: [PowerPC] DForm instructions should be preferred when using zero register

steven.zhang added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:418 + // should prefer D-form if LXVX / STXVX uses a ZERO or ZERO8 + if (MI.getOpcode() == PPC::LXVX || MI.getOpcode() == PPC::STXVX) { +LLVM_DEBUG(dbgs()

[PATCH] D90208: [PowerPC] [Clang] Define macros to identify quad-fp semantics

steven.zhang added a comment. LGTM now and thank you for the double check. But please hold on for some days in case someone has concern on enabling the new macros(we are enabling the __LONG_DOUBLE_IBM128__ by default now). CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90208/new/

[PATCH] D90208: [PowerPC] [Clang] Define macros to identify quad-fp semantics

steven.zhang added a comment. Sorry, accept the revision by mistake. Please hold on until my comments addressed. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90208/new/ https://reviews.llvm.org/D90208

[PATCH] D90208: [PowerPC] [Clang] Define macros to identify quad-fp semantics

steven.zhang accepted this revision. steven.zhang added inline comments. This revision is now accepted and ready to land. Comment at: clang/lib/Basic/Targets/PPC.cpp:122 if (LongDoubleWidth == 128) { Builder.defineMacro("__LONG_DOUBLE_128__");

[PATCH] D92935: Introduce support for PowerPC devices with an Embedded Floating-point APU version 2 (efpu2)

steven.zhang added a comment. Some code style comments. Comment at: clang/include/clang/Driver/Options.td:2603 def mno_spe : Flag<["-"], "mno-spe">, Group; +def mefpu2 : Flag<["-"], "mefpu2">, Group; def mabi_EQ_vec_extabi : Flag<["-"], "mabi=vec-extabi">, Group,

[PATCH] D92815: [PowerPC] [Clang] Enable float128 feature on VSX targets

steven.zhang accepted this revision. steven.zhang added a comment. LGTM now. But please hold on for at least one week to see if @nemanjai has concern. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92815/new/ https://reviews.llvm.org/D92815

[PATCH] D106431: [clang-tidy] Fix cppcoreguidelines-init-variables with enum judgement

steven.zhang added a comment. In D106431#2892866 , @MTC wrote: > In D106431#2892859 , @whisperity > wrote: > >> Is this the right decision to make, conceptually? It will leave the variable >> uninitialised

[PATCH] D106431: [clang-tidy] Fix cppcoreguidelines-init-variables with enum judgement

steven.zhang added inline comments. Comment at: clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines-init-variables.cpp:103 + // Expect no warning given here. + Color color; + // Expect no warning given here. Technical speaking, we should warn about

[PATCH] D106431: [clang-tidy] Fix cppcoreguidelines-init-variables with enum judgement

steven.zhang added a comment. In D106431#2907688 , @whisperity wrote: > In D106431#2907002 , @Sockke wrote: > >> Any thoughts? : ) > > First, let's first fix that we should still warn for the uninitialised