Hi,
On Thu, Jul 9, 2020 at 8:43 PM Steev Klimaszewski wrote:
>
>
> On 7/9/20 10:17 PM, Steev Klimaszewski wrote:
> >
> > On 7/9/20 10:12 PM, Steev Klimaszewski wrote:
> >>
> >> On 7/9/20 9:14 PM, Doug Anderson wrote:
> >>> Hi,
> >>>
> >>> On Thu, Jul 9, 2020 at 6:38 PM Doug Anderson
> >>>
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
between commit:
c564b8601ae9 ("drm/amdgpu: add TMR destory function for psp")
from the drm-fixes tree and commit:
3bda8acd974e ("drm/amdgpu/sriov: Add clear vf fw support")
from
Hi,
On Thu, Jul 9, 2020 at 6:38 PM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Jul 9, 2020 at 6:19 PM Steev Klimaszewski wrote:
> >
> > Hi Doug,
> >
> > I've been testing 5.8 and linux-next on the Lenovo Yoga C630, and with this
> > patch applied, there is really bad banding on the display.
> >
>
The pull request you sent on Fri, 10 Jul 2020 11:13:41 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2020-07-10
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/42f82040ee66db13525dc6f14b8559890b2f4c1c
Thank you!
--
Deet-doot-dot, I am a bot.
Hi,
On Thu, Jul 9, 2020 at 6:19 PM Steev Klimaszewski wrote:
>
> Hi Doug,
>
> I've been testing 5.8 and linux-next on the Lenovo Yoga C630, and with this
> patch applied, there is really bad banding on the display.
>
> I'm really bad at explaining it, but you can see the differences in the
>
Hi Sam,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next drm-tip/drm-tip linus/master v5.8-rc4
next-20200709]
[cannot apply to drm/drm-next]
[If your patch
Hi Linus,
I've been off most of the week, but some fixes have piled up. Seems a
bit busier than last week, but they are pretty spread out across a
bunch of drivers, none of them seem that big or worried me too much.
Regards,
Dave.
drm-fixes-2020-07-10:
drm fixes for 5.8-rc5
amdgpu:
- Fix a
On Sat, 04 Jul 2020 12:28:05 +0200, Sam Ravnborg wrote:
> v2:
> - Add missing types (Rob)
> - Fix example to specify panel@0 (Rob)
>
> Signed-off-by: Sam Ravnborg
> Cc: Rob Herring
> Cc: Andrzej Hajda
> Cc: Thierry Reding
> Cc: Sam Ravnborg
> ---
> .../display/panel/samsung,s6e8aa0.txt
On Sat, Jul 04, 2020 at 12:34:08PM +0200, Sam Ravnborg wrote:
> On Sat, Jul 04, 2020 at 12:28:03PM +0200, Sam Ravnborg wrote:
> > This patch-set convert 3 of the remaining panel bindings to yaml.
> >
> > This is a follow-up on v2 that converted a lot of panel bindings:
> >
On Sat, 04 Jul 2020 12:28:04 +0200, Sam Ravnborg wrote:
> As the binding matches panel-simple-dsi, added the compatible to the
> panel-simple-dsi list.
> With this change enable-gpios is now optional.
>
> v2:
> - It is a DSI panel, add it to panel-simple-dsi (Rob)
>
> Signed-off-by: Sam
On Thu, Jul 09, 2020 at 07:47:32PM +0300, Laurentiu Palcu wrote:
> From: Laurentiu Palcu
>
> Add bindings for iMX8MQ Display Controller Subsystem.
>
> Signed-off-by: Laurentiu Palcu
> ---
> .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 84 +++
> 1 file changed, 84
On Thu, Jul 02, 2020 at 06:37:19PM +0200, Sylwester Nawrocki wrote:
> Add documentation for new optional properties in the exynos bus nodes:
> samsung,interconnect-parent, #interconnect-cells, bus-width.
> These properties allow to specify the SoC interconnect structure which
> then allows the
On Sat, 04 Jul 2020 14:54:39 +0530, Vinay Simha BN wrote:
> - converted from .txt to .yaml
> - dual-link lvds port added and implemented
> - dsi data-lanes property removed, it will be picked
> from dsi0 ports
> - VESA/JEIDA formats picked from panel-lvds dts
> - proper indentation
> -
Adding an msm_gem_object object to the inactive_list before completing
its initialization is a bad idea because shrinker may pick it up from the
inactive_list. Fix this by making sure that the initialization is complete
before moving the msm_obj object to the inactive list.
This patch fixes the
On Tue, Jun 30, 2020 at 11:45:01AM -0700, Tanmay Shah wrote:
> These patches add Display-Port driver on SnapDragon/msm hardware.
> This series also contains device-tree bindings for msm DP driver.
> It also contains Makefile and Kconfig changes to compile msm DP driver.
>
> The block diagram of
From: Sharat Masetty
This patch changes the plumbing to send the devfreq recommended opp rather
than the frequency. Also consolidate and rearrange the code in a6xx to set
the GPU frequency and the icc vote in preparation for the upcoming
changes for GPU->DDR scaling votes.
Signed-off-by: Sharat
From: Sharat Masetty
This patch adds the interconnects property to the GPU node. This enables
the GPU->DDR path bandwidth voting.
Signed-off-by: Sharat Masetty
Signed-off-by: Akhil P Oommen
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Sharat Masetty
Add opp-peak-kBps bindings to the GPU opp table, listing the peak
GPU -> DDR bandwidth requirement for each opp level. This will be
used to scale the DDR bandwidth along with the GPU frequency dynamically.
Signed-off-by: Sharat Masetty
Reviewed-by: Matthias Kaehlcke
From: Sharat Masetty
Update documentation to list the gpu opp table bindings including the
newly added "opp-peak-kBps" needed for GPU-DDR bandwidth scaling.
Signed-off-by: Sharat Masetty
Acked-by: Rob Herring
Signed-off-by: Akhil P Oommen
---
.../devicetree/bindings/display/msm/gpu.txt
Newer targets support changing gpu frequency through HFI. So
use that wherever supported instead of the legacy method.
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
This is mostly a rebase of Sharat's patches [1] on the tip of msm-next branch.
Changes compared to v3:
1. Rebased on top of Jonathan's patch which adds support for changing
gpu freq through hfi on newer targets. Created patch 1 to make
this the generic approach of setting
From: Sharat Masetty
This patches replaces the previously used static DDR vote and uses
dev_pm_opp_set_bw() to scale GPU->DDR bandwidth along with scaling
GPU frequency. Also since the icc path voting is handled completely
in the opp driver, remove the icc_path handle and its usage in the
drm
From: Sharat Masetty
This patch adds the interconnects property for the gpu node and the
opp-peak-kBps property to the opps of the gpu opp table. This should
help enable DDR bandwidth scaling dynamically and proportionally to the
GPU frequency.
Signed-off-by: Sharat Masetty
Signed-off-by:
Mark reported that sparc64 would panic while booting using qemu.
Mark bisected this to a patch that introduced generic fbdev emulation to
the bochs DRM driver.
Mark pointed out that a similar bug was fixed before where
the sys helpers was replaced by cfb helpers.
The culprint here is that the
Hi Dave, Daniel,
Fixes for 5.8.
The following changes since commit dcb7fd82c75ee2d6e6f9d8cc71c52519ed52e258:
Linux 5.8-rc4 (2020-07-05 16:20:22 -0700)
are available in the Git repository at:
git://people.freedesktop.org/~agd5f/linux tags/amd-drm-fixes-5.8-2020-07-09
for you to fetch
Some parameters not documented. Others misspelled.
Also, functions must follow directly after the header that documents them.
Fixes the following W=1 kernel build warning(s):
drivers/scsi/aacraid/commsup.c:223: warning: Function parameter or member
'scmd' not described in 'aac_fib_alloc_tag'
Quoting Sudeep Holla (2020-07-09 16:49:31)
> Both cmp_u32 and cmp_u64 are comparing the pointers instead of the value
> at those pointers. This will result in incorrect/unsorted list. Fix it
> by deferencing the pointers before comparison.
>
> Cc: Chris Wilson
> Cc: Mika Kuoppala
>
From: Laurentiu Palcu
This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
Some of its capabilities include:
* 4K@60fps;
* HDR10;
* one graphics and 2 video pipelines;
* on-the-fly decompression of compressed video and graphics;
The reference manual can be found here:
From: Laurentiu Palcu
Component framework is needed by HDP driver.
Signed-off-by: Laurentiu Palcu
---
drivers/gpu/drm/imx/dcss/dcss-drv.c | 89 ++---
drivers/gpu/drm/imx/dcss/dcss-kms.c | 14 -
drivers/gpu/drm/imx/dcss/dcss-kms.h | 4 +-
3 files changed, 80
From: Laurentiu Palcu
Hi,
This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).
Support for the rest of the features
From: Laurentiu Palcu
This patch adds the node for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
From: Laurentiu Palcu
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
.../bindings/display/imx/nxp,imx8mq-dcss.yaml | 84 +++
1 file changed, 84 insertions(+)
create mode 100644
From: Laurentiu Palcu
Currently the drm/imx/ directory is compiled only if DRM_IMX is set. Adding a
new IMX related IP in the same directory would need DRM_IMX to be set, which
would
bring in also IPUv3 core driver...
The current patch would allow adding new IPs in the imx/ directory without
On Sat, Jul 4, 2020 at 3:26 PM Sam Ravnborg wrote:
>
> On Sat, Jul 04, 2020 at 11:03:21PM +0200, Geert Uytterhoeven wrote:
> > Hi Sam,
> >
> > Thanks for your patch!
> >
> > On Sat, Jul 4, 2020 at 4:37 PM Sam Ravnborg wrote:
> > > Now that dt-extract-example gained support for using root nodes
>
On Fri, Jul 03, 2020 at 09:04:49AM -0700, Rob Clark wrote:
> On Fri, Jul 3, 2020 at 7:53 AM Sai Prakash Ranjan
> wrote:
> >
> > Hi Will,
> >
> > On 2020-07-03 19:07, Will Deacon wrote:
> > > On Mon, Jun 29, 2020 at 09:22:50PM +0530, Sai Prakash Ranjan wrote:
> > >> diff --git
On 09/07/2020 16:44, Rob Herring wrote:
On Sun, Jun 14, 2020 at 12:27 AM Navid Emamdoost
wrote:
in panfrost_job_hw_submit, pm_runtime_get_sync is called which
increments the counter even in case of failure, leading to incorrect
ref count. In case of failure, decrement the ref count before
Hi,
On 7/9/20 4:50 PM, Andy Shevchenko wrote:
On Wed, Jul 08, 2020 at 11:14:22PM +0200, Hans de Goede wrote:
The datasheet specifies that programming the base_unit part of the
ctrl register to 0 results in a contineous low signal.
Adjust the get_state method to reflect this by setting
On Sun, Jun 14, 2020 at 12:27 AM Navid Emamdoost
wrote:
>
> in panfrost_job_hw_submit, pm_runtime_get_sync is called which
> increments the counter even in case of failure, leading to incorrect
> ref count. In case of failure, decrement the ref count before returning.
>
> Signed-off-by: Navid
On Wed, Jul 8, 2020 at 3:06 AM Randy Dunlap wrote:
>
> Drop the doubled word "the".
>
> Signed-off-by: Randy Dunlap
> Cc: Jonathan Corbet
> Cc: linux-...@vger.kernel.org
> Cc: Masahiro Yamada
I guess this series will go in via the doc sub-system.
If so, please feel free to add:
Acked-by:
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Thursday, July 9, 2020 8:40 PM
To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
Cc: Chauhan, Madhav
Subject: [PATCH 2/2] drm/amdgpu: stop allocating dummy GTT nodes v2
Now that TTM is fixed up we can
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Thursday, July 9, 2020 8:40 PM
To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
Cc: Chauhan, Madhav
Subject: [PATCH 1/2] drm/ttm: further cleanup ttm_mem_reg handling
Stop touching the backend private
Hi,
On Thu, Jul 09, 2020 at 04:40:56PM +0200, Hans de Goede wrote:
> Hi,
>
> On 7/9/20 4:14 PM, Sam Ravnborg wrote:
> > Hi Hans.
> >
> > On Wed, Jul 08, 2020 at 11:14:16PM +0200, Hans de Goede wrote:
> > > Hi All,
> > >
> > > Here is v4 of my patch series converting the i915 driver's code for
>
On Thu, Jul 9, 2020 at 7:35 AM Jonathan Marek wrote:
>
> Check for errors instead of silently not using icc if the msm driver
> probes before the interconnect driver.
>
> Allow ENODATA for ocmem path, as it is optional and this error
> is returned when "gfx-mem" path is provided but not "ocmem".
Stop touching the backend private pointer alltogether and
make sure we never put the same mem twice by.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c| 46 +++--
include/drm/ttm/ttm_bo_driver.h | 2 --
2 files changed, 26 insertions(+), 22
Now that TTM is fixed up we can finally stop that nonsense.
v2: Update the documentation as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 106 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++-
2 files changed, 43
Hi,
On 7/9/20 4:14 PM, Sam Ravnborg wrote:
Hi Hans.
On Wed, Jul 08, 2020 at 11:14:16PM +0200, Hans de Goede wrote:
Hi All,
Here is v4 of my patch series converting the i915 driver's code for
controlling the panel's backlight with an external PWM controller to
use the atomic PWM API. See
Hi,
On 7/9/20 4:21 PM, Andy Shevchenko wrote:
On Thu, Jul 09, 2020 at 03:23:13PM +0200, Hans de Goede wrote:
On 7/9/20 2:53 PM, Andy Shevchenko wrote:
On Wed, Jul 08, 2020 at 11:14:20PM +0200, Hans de Goede wrote:
When the user requests a high enough period ns value, then the
calculations in
Am 09.07.20 um 14:31 schrieb Daniel Vetter:
On Thu, Jul 9, 2020 at 2:11 PM Daniel Stone wrote:
On Thu, 9 Jul 2020 at 09:05, Daniel Vetter wrote:
On Thu, Jul 09, 2020 at 08:36:43AM +0100, Daniel Stone wrote:
On Tue, 7 Jul 2020 at 21:13, Daniel Vetter wrote:
Comes up every few years, gets
Am 09.07.20 um 15:54 schrieb Steven Price:
On 09/07/2020 09:48, Christian König wrote:
Am 08.07.20 um 18:19 schrieb Daniel Vetter:
On Wed, Jul 8, 2020 at 6:11 PM Daniel Vetter wrote:
On Wed, Jul 8, 2020 at 5:05 PM Christian König
wrote:
Am 08.07.20 um 17:01 schrieb Daniel Vetter:
On Wed,
Hi Hans.
On Wed, Jul 08, 2020 at 11:14:16PM +0200, Hans de Goede wrote:
> Hi All,
>
> Here is v4 of my patch series converting the i915 driver's code for
> controlling the panel's backlight with an external PWM controller to
> use the atomic PWM API. See below for the changelog.
Why is it that
On Thu, Jul 09, 2020 at 02:33:39PM +0200, Daniel Vetter wrote:
> Exactly matches the one in the helpers.
>
> This avoids me having to roll out dma-fence critical section
> annotations to this copy.
>
> Signed-off-by: Daniel Vetter
> Cc: David Airlie
> Cc: Gerd Hoffmann
> Cc:
On 09/07/2020 09:48, Christian König wrote:
Am 08.07.20 um 18:19 schrieb Daniel Vetter:
On Wed, Jul 8, 2020 at 6:11 PM Daniel Vetter wrote:
On Wed, Jul 8, 2020 at 5:05 PM Christian König
wrote:
Am 08.07.20 um 17:01 schrieb Daniel Vetter:
On Wed, Jul 8, 2020 at 4:37 PM Christian König
Hi,
On 7/9/20 3:36 PM, Andy Shevchenko wrote:
On Wed, Jul 08, 2020 at 11:14:21PM +0200, Hans de Goede wrote:
Before this commit a suspend + resume of the LPSS PWM controller
would result in the controller being reset to its defaults of
output-freq = clock/256, duty-cycle=100%, until someone
Hi,
On 7/9/20 2:53 PM, Andy Shevchenko wrote:
On Wed, Jul 08, 2020 at 11:14:20PM +0200, Hans de Goede wrote:
When the user requests a high enough period ns value, then the
calculations in pwm_lpss_prepare() might result in a base_unit value of 0.
But according to the data-sheet the way the
Hi K,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on staging/staging-testing]
[also build test ERROR on v5.8-rc4 next-20200709]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented
On 2020-07-02 at 20:07:36 +0530, Anshuman Gupta wrote:
> On 2020-06-30 at 12:48:34 -0400, Sean Paul wrote:
> > On Tue, Jun 30, 2020 at 10:21 AM Anshuman Gupta
> > wrote:
> > >
> > > On 2020-06-23 at 21:29:05 +0530, Sean Paul wrote:
> > > Hi Sean,
> > > I am new to DP MST stuff, I am looking to DP
On Thu, Jul 09, 2020 at 02:33:39PM +0200, Daniel Vetter wrote:
> Exactly matches the one in the helpers.
>
> This avoids me having to roll out dma-fence critical section
> annotations to this copy.
>
> Signed-off-by: Daniel Vetter
> Cc: David Airlie
> Cc: Gerd Hoffmann
> Cc:
Hi,
On 7/8/20 11:25 PM, Alex Deucher wrote:
On Wed, Jul 8, 2020 at 12:43 PM Hans de Goede wrote:
Hi All,
Here is the privacy-screen related code which we discussed a while ago.
This series consists of a number of different parts:
1. A new version of Rajat's privacy-screen connector
On 2020-07-09 at 16:07:12 +0530, Ramalingam C wrote:
> On 2020-06-23 at 11:59:07 -0400, Sean Paul wrote:
> > From: Sean Paul
> >
> > Now that all the groundwork has been laid, we can turn on HDCP 1.4 over
> > MST. Everything except for toggling the HDCP signalling and HDCP 2.2
> > support is the
Exactly matches the one in the helpers.
This avoids me having to roll out dma-fence critical section
annotations to this copy.
Signed-off-by: Daniel Vetter
Cc: David Airlie
Cc: Gerd Hoffmann
Cc: virtualizat...@lists.linux-foundation.org
---
drivers/gpu/drm/virtio/virtgpu_display.c | 20
Comes up every few years, gets somewhat tedious to discuss, let's
write this down once and for all.
What I'm not sure about is whether the text should be more explicit in
flat out mandating the amdkfd eviction fences for long running compute
workloads or workloads where userspace fencing is
On Thu, Jul 9, 2020 at 2:11 PM Daniel Stone wrote:
>
> On Thu, 9 Jul 2020 at 09:05, Daniel Vetter wrote:
> > On Thu, Jul 09, 2020 at 08:36:43AM +0100, Daniel Stone wrote:
> > > On Tue, 7 Jul 2020 at 21:13, Daniel Vetter wrote:
> > > > Comes up every few years, gets somewhat tedious to discuss,
On Thu, 9 Jul 2020 at 09:05, Daniel Vetter wrote:
> On Thu, Jul 09, 2020 at 08:36:43AM +0100, Daniel Stone wrote:
> > On Tue, 7 Jul 2020 at 21:13, Daniel Vetter wrote:
> > > Comes up every few years, gets somewhat tedious to discuss, let's
> > > write this down once and for all.
> >
> > Thanks
Am 07.07.20 um 22:12 schrieb Daniel Vetter:
Comes up every few years, gets somewhat tedious to discuss, let's
write this down once and for all.
What I'm not sure about is whether the text should be more explicit in
flat out mandating the amdkfd eviction fences for long running compute
workloads
Patchset Summary:
Enhance a PCIe host controller driver. Because of its unusual design
we are foced to change dev->dma_pfn_offset into a more general role
allowing multiple offsets. See the 'v1' notes below for more info.
v7:
Commit: "device core: Introduce DMA range map, supplanting
On Wed, 8 Jul 2020, Thomas Zimmermann wrote:
> Hi
>
> Am 08.07.20 um 12:05 schrieb Ilpo Järvinen:
> > Hi,
> >
> > After upgrading kernel from 5.3 series to 5.6.16 something seems to
> > prevent me from achieving high resolutions with the ast driver.
>
> Thanks for reporting. It's not a bug,
On Wed, 8 Jul 2020, Thomas Zimmermann wrote:
> Am 08.07.20 um 16:26 schrieb Daniel Vetter:
> > On Wed, Jul 8, 2020 at 4:22 PM Thomas Zimmermann
> > wrote:
> >>
> >> Am 08.07.20 um 15:46 schrieb Ilpo Järvinen:
> >>> On Wed, 8 Jul 2020, Thomas Zimmermann wrote:
> >>>
> Am 08.07.20 um 12:05
The new field 'dma_range_map' in struct device is used to facilitate the
use of single or multiple offsets between mapping regions of cpu addrs and
dma addrs. It subsumes the role of "dev->dma_pfn_offset" which was only
capable of holding a single uniform offset and had no region bounds
checking.
Hi,
After upgrading kernel from 5.3 series to 5.6.16 something seems to
prevent me from achieving high resolutions with the ast driver.
With 5.6.16:
$ xrandr
Screen 0: minimum 320 x 200, current 1600 x 1200, maximum 1920 x 2048
VGA-1 connected primary 1600x1200+0+0 (normal left inverted right
On SDM845 and SC7180 DSI needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
dev_pm_opp_set_rate() is designed to be equivalent to
On some qualcomm platforms DPU needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
Signed-off-by: Rajendra Nayak
Reviewed-by: Rob Clark
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 49
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 59
Changes in v3
- Added dev_pm_opp_put_clkname() in the error path
Changes in v2
- Patch 2: Dropped dsi_link_clk_set_rate_6g_v2 and dsi_link_clk_disable_6g_v2
as suggested by Matthias
These patches add DVFS support for DPU and DSI.
These patches have no other dependency. Patch 1 and 2 will need
On 2020-06-23 at 11:59:03 -0400, Sean Paul wrote:
> From: Sean Paul
>
> This patch plumbs port through hdcp init instead of relying on
> intel_attached_encoder() to return a non-NULL encoder which won't work
> for MST connectors.
>
> Cc: Ville Syrjälä
> Signed-off-by: Sean Paul
Reviewed-by:
> -Original Message-
> From: Sean Paul
> Sent: Tuesday, June 23, 2020 9:29 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org
> Cc: Li, Juston ; C, Ramalingam
> ; ville.syrj...@linux.intel.com;
> jani.nik...@linux.intel.com; joonas.lahti...@linux.intel.com; Vivi,
> -Original Message-
> From: Sean Paul
> Sent: Tuesday, June 23, 2020 9:29 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org
> Cc: Li, Juston ; C, Ramalingam
> ; ville.syrj...@linux.intel.com;
> jani.nik...@linux.intel.com; joonas.lahti...@linux.intel.com; Vivi,
> -Original Message-
> From: Sean Paul
> Sent: Tuesday, June 23, 2020 9:29 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org
> Cc: Li, Juston ; C, Ramalingam
> ; ville.syrj...@linux.intel.com;
> jani.nik...@linux.intel.com; joonas.lahti...@linux.intel.com; Vivi,
On 2020-06-23 at 11:59:07 -0400, Sean Paul wrote:
> From: Sean Paul
>
> Now that all the groundwork has been laid, we can turn on HDCP 1.4 over
> MST. Everything except for toggling the HDCP signalling and HDCP 2.2
> support is the same as the DP case, so we'll re-use those callbacks
>
> Cc:
Hi Laurent,
On 2020-06-16 03:50, Laurent Pinchart wrote:
> Hi Stefan,
>
> On Thu, Jun 11, 2020 at 09:33:11PM +0200, Stefan Agner wrote:
>> On 2020-05-30 05:10, Laurent Pinchart wrote:
>> > The DRM simple display pipeline helper only supports a single plane. In
>> > order to prepare for support
On 2020-06-23 at 11:59:00 -0400, Sean Paul wrote:
> From: Sean Paul
>
> Although DP_MST fake encoders are not subclassed from digital ports,
> they are associated with them. Support these encoders.
>
> Signed-off-by: Sean Paul
Reviewed-by: Ramalingam C
> Link:
>
On 28.06.20 10:50, Jürgen Groß wrote:
Ping?
On 10.06.20 16:10, Juergen Gross wrote:
efifb_probe() will issue an error message in case the kernel is booted
as Xen dom0 from UEFI as EFI_MEMMAP won't be set in this case. Avoid
that message by calling efi_mem_desc_lookup() only if EFI_PARAVIRT
Am 08.07.20 um 18:11 schrieb Daniel Vetter:
On Wed, Jul 8, 2020 at 5:05 PM Christian König wrote:
Am 08.07.20 um 17:01 schrieb Daniel Vetter:
On Wed, Jul 8, 2020 at 4:37 PM Christian König wrote:
Am 08.07.20 um 11:54 schrieb Daniel Vetter:
On Wed, Jul 08, 2020 at 11:22:00AM +0200,
Am 08.07.20 um 18:19 schrieb Daniel Vetter:
On Wed, Jul 8, 2020 at 6:11 PM Daniel Vetter wrote:
On Wed, Jul 8, 2020 at 5:05 PM Christian König wrote:
Am 08.07.20 um 17:01 schrieb Daniel Vetter:
On Wed, Jul 8, 2020 at 4:37 PM Christian König wrote:
Am 08.07.20 um 11:54 schrieb Daniel
Hi Jason,
Below the paragraph I've added after our discussions around dma-fences
outside of drivers/gpu. Good enough for an ack on this, or want something
changed?
Thanks, Daniel
> + * Note that only GPU drivers have a reasonable excuse for both requiring
> + * _interval_notifier and callbacks
On Thu, Jul 09, 2020 at 08:36:43AM +0100, Daniel Stone wrote:
> Hi,
>
> On Tue, 7 Jul 2020 at 21:13, Daniel Vetter wrote:
> > Comes up every few years, gets somewhat tedious to discuss, let's
> > write this down once and for all.
>
> Thanks for writing this up! I wonder if any of the notes from
On Thu, Jul 09, 2020 at 08:29:21AM +0100, Daniel Stone wrote:
> Hi,
> Jumping in after a couple of weeks where I've paged most everything
> out of my brain ...
>
> On Fri, 19 Jun 2020 at 10:43, Daniel Vetter wrote:
> > On Fri, Jun 19, 2020 at 10:13:35AM +0100, Chris Wilson wrote:
> > > > The
On 7/8/20 7:08 PM, Angelo Ribeiro wrote:
> Hi,
>
> Is this patch good to go?
> @dan...@ffwll.ch, @Philippe CORNU
>
> Was already tested by @Yannick FERTRE
> and @Adrian Pop
> on https://lkml.org/lkml/2020/4/6/691 .
>
> Thanks,
> Angelo
>
> From: Yannick
> FERTRE
> Date: Wed, Jun 24, 2020 at
On Tue, Jul 07, 2020 at 01:08:59PM +0200, Marek Szyprowski wrote:
> Add a proper cast on the exynos_gem->kvaddr assignment to avoid a sparse
> warning.
>
> Reported-by: kernel test robot
> Fixes: 9940d9d93406 ("drm/exynos: gem: Get rid of the internal 'pages' array")
> Signed-off-by: Marek
On Thu, Jul 09, 2020 at 08:32:41AM +0100, Daniel Stone wrote:
> Hi,
>
> On Wed, 8 Jul 2020 at 16:13, Daniel Vetter wrote:
> > On Wed, Jul 8, 2020 at 4:57 PM Christian König
> > wrote:
> > > Could we merge this controlled by a separate config option?
> > >
> > > This way we could have the
https://bugzilla.kernel.org/show_bug.cgi?id=207383
--- Comment #52 from Michel Dänzer (mic...@daenzer.net) ---
(In reply to rtmasura+kernel from comment #51)
> that didn't read well, with vblank_mode off for XFWM I don't have this issue
> at all.
That just avoids the problem by not doing any
Hi,
On Tue, 7 Jul 2020 at 21:13, Daniel Vetter wrote:
> Comes up every few years, gets somewhat tedious to discuss, let's
> write this down once and for all.
Thanks for writing this up! I wonder if any of the notes from my reply
to the previous-version thread would be helpful to more explicitly
Hi,
On Wed, 8 Jul 2020 at 16:13, Daniel Vetter wrote:
> On Wed, Jul 8, 2020 at 4:57 PM Christian König
> wrote:
> > Could we merge this controlled by a separate config option?
> >
> > This way we could have the checks upstream without having to fix all the
> > stuff before we do this?
>
>
Hi,
Jumping in after a couple of weeks where I've paged most everything
out of my brain ...
On Fri, 19 Jun 2020 at 10:43, Daniel Vetter wrote:
> On Fri, Jun 19, 2020 at 10:13:35AM +0100, Chris Wilson wrote:
> > > The proposed patches might very well encode the wrong contract, that's
> > > all up
Am 09.07.20 um 08:51 schrieb Joel Stanley:
> On Wed, 1 Jul 2020 at 09:10, Sam Ravnborg wrote:
>>
>> Hi Guenter.
>>
>> On Tue, Jun 30, 2020 at 05:10:02PM -0700, Guenter Roeck wrote:
>>> The following backtrace is seen when running aspeed G5 kernels.
>>>
>>> WARNING: CPU: 0 PID: 1 at
Dear Linux folks,
Building Linux v5.8-rc4-25-gbfe91da29bfad with Clang/LLD
1:11~++20200701093119+ffee8040534-1~exp1 from Debian experimental for
32-bit (`ARCH=i386`), starting Weston (Wayland) or X.Org Server results
in non-working screen, and Linux shows the trace below [1].
[
Hello,
syzbot found the following crash on:
HEAD commit:9e50b94b Add linux-next specific files for 20200703
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=121cf75510
kernel config: https://syzkaller.appspot.com/x/.config?x=f99cc0faa1476ed6
dashboard
The vc4 CRTC will use the encoder type to control its output clock
muxing. However, this will be different from HDMI0 to HDMI1, so let's
store our type in the variant structure so that we can support multiple
controllers later on.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c
Both of the two LVDS channels should be disabled for split mode
in the encoder's ->disable() callback, because they are enabled
in the encoder's ->enable() callback.
Fixes: 6556f7f82b9c ("drm: imx: Move imx-drm driver out of staging")
Cc: Philipp Zabel
Cc: Sascha Hauer
Cc: Pengutronix Kernel
Since the components for a given device in ASoC are identified by their
name, it makes sense to add one even though it's not strictly necessary.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c
1 - 100 of 196 matches
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