Hi Jonathan,
Sorry for sending the same email again. I miss to reply all in the last email..
Thanks for your valuable suggestions!
Jonathan Cameron 於 2022年5月31日 週二 下午9:21寫道：
>
> On Tue, 31 May 2022 19:18:56 +0800
> ChiaEn Wu wrote:
>
> > From: ChiaEn Wu
> >
> > Add Mediatek MT6370 ADC
Hi Daniel,
Thanks for your valuable feedback!
Daniel Thompson 於 2022年6月1日 週三 下午5:46寫道：
>
> On Tue, May 31, 2022 at 07:19:00PM +0800, ChiaEn Wu wrote:
> > From: ChiaEn Wu
> >
> > Add Mediatek MT6370 Backlight support.
> >
> > Signed-off-by: ChiaEn Wu
> > ---
> >
Hi Krzysztof,
Thank you for the valuable suggestion.
Sorry for sending the same email again. I forgot to reply to everyone
in my last email..
Krzysztof Kozlowski 於 2022年6月1日 週三 上午4:15寫道：
>
> On 31/05/2022 12:42, ChiaEn Wu wrote:
> > From: ChiaEn Wu
> >
>
> Subject - remove "binding
Hi all,
In commit
8caad14e7224 ("drm/msm/dpu: Fix pointer dereferenced before checking")
Fixes tag
Fixes: d7d0e73f7de33 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for
has these problem(s):
- Subject has leading but no trailing parentheses
- Subject has leading but no trailing
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
libdrm 2.4.111, just a few things built up, and drop libkms.
Alex Deucher (3):
test/amdgpu: only disable deadlock tests on asics without GPU reset
amdgpu: add marketing names from 21.50
amdgpu: add marketing names from 22.10
On Fri, Jun 3, 2022 at 5:51 AM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Jun 1, 2022 at 2:46 AM Hsin-Yi Wang wrote:
> >
> > To return the orientation property to drm/kms driver.
> >
> > Signed-off-by: Hsin-Yi Wang
> > Reviewed-by: Hans de Goede
> > ---
> > drivers/gpu/drm/panel/panel-edp.c | 8
Hi Linus,
It's been a long "my first covid" isolated week. hopefully stop
coughing sometime next week!
This is mostly regular fixes, msm and amdgpu. There is a tegra patch
that is bit of prep work for a 5.20 feature to avoid some inter-tree
syncs, and a couple of late addition amdgpu uAPI
On Wed, Jun 1, 2022 at 11:01 AM Christian König
wrote:
>
> Am 01.06.22 um 10:48 schrieb Bas Nieuwenhuizen:
> > On Wed, Jun 1, 2022 at 10:40 AM Christian König
> > wrote:
> >> Am 01.06.22 um 10:16 schrieb Bas Nieuwenhuizen:
> >>> On Wed, Jun 1, 2022 at 10:03 AM Christian König
> >>> wrote:
>
On 6/2/2022 3:51 PM, Dmitry Baryshkov wrote:
On 28/05/2022 01:23, Jessica Zhang wrote:
On 5/27/2022 12:46 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR
On 6/2/2022 3:31 PM, Dmitry Baryshkov wrote:
On 27/05/2022 23:11, Jessica Zhang wrote:
On 5/27/2022 12:38 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for setting MISR registers within the interface
Signed-off-by: Jessica Zhang
---
Ponte Vecchio no longer has MSLICE or LNCF steering, but the bspec does
document several new types of multicast register ranges. Fortunately,
most of the different MCR types all provide valid values at instance
(0,0) so there's no need to read fuse registers and calculate a valid
instance. We'll
From: Badal Nilawar
Even though PVC doesn't have an RCS engine, this workaround updates a
register in the 0x2xxx range that traditionally belongs to the RCS. We
need to set a special flag to tell the GuC that the presence of an "RCS"
register on a CCS save/restore list is okay/expected.
Cc:
We missed this setting in the initial device info patch's definition of
XE_HPC_FEATURES.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index
Hi Zack,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-exynos/exynos-drm-next drm-intel/for-linux-next
drm-tip/drm-tip v5.18 next-20220602]
[cannot apply to airlied/drm-next tegra-drm/drm/tegra/for-next]
[If your patch
On 6/2/2022 1:24 PM, Dmitry Baryshkov wrote:
Rather than checking hwversion, follow the usual patter and add special
bit to the lm->features to check whether the LM has combined or separate
alpha registers. While we are at it, rename
dpu_hw_lm_setup_blend_config_sdm845() to
On 6/1/22 13:02, Peter Robinson wrote:
> From: Nicolas Saenz Julienne
>
> BCM2711, the SoC used on the Raspberry Pi 4 has a different GPU than its
> predecessors. Enable it.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Peter Robinson
> ---
Reviewed-by: Javier Martinez Canillas
On 6/1/22 13:02, Peter Robinson wrote:
> BCM2711, the SoC used on the Raspberry Pi 4 has a different 3D
> render GPU IP than its predecessors. Enable it it on multi v7
> and bcm2835 configs.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Peter Robinson
> ---
Reviewed-by: Javier
On 6/1/22 13:02, Peter Robinson wrote:
> This adds the entry for V3D for bcm2711 (used in the Raspberry Pi 4)
> and the associated firmware clock entry.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Peter Robinson
> ---
Once you fix the typo mentioned by Stefan already:
On 6/1/22 13:02, Peter Robinson wrote:
> Add compatible string and Kconfig options for bcm2711.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Peter Robinson
> ---
Reviewed-by: Javier Martinez Canillas
I've one small nit though.
[snip]
> # SPDX-License-Identifier: GPL-2.0-only
On 6/1/22 13:02, Peter Robinson wrote:
> Runtime PM doesn't seem to work correctly on this driver. On top of
> that, commit 8b6864e3e138 ("drm/v3d/v3d_drv: Remove unused static
> variable 'v3d_v3d_pm_ops'") hints that it most likely never did as the
> driver's PM ops were not hooked-up.
>
> So,
Hello Peter,
On 6/1/22 13:02, Peter Robinson wrote:
> BCM2711, Raspberry Pi 4's SoC, contains a V3D core. So add its specific
> compatible to the bindings.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Peter Robinson
> ---
Reviewed-by: Javier Martinez Canillas
--
Best regards,
On 28/05/2022 01:23, Jessica Zhang wrote:
On 5/27/2022 12:46 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup/collect methods.
Signed-off-by: Jessica Zhang
---
Hello! This is just a reminder that the CFP for XDC in 2022 is still open!
The 2022 X.Org Developers Conference is being held in conjunction with
the 2022 Wine Developers Conference. This is a meeting to bring
together developers working on all things open graphics (Linux kernel,
Mesa, DRM,
On 27/05/2022 23:11, Jessica Zhang wrote:
On 5/27/2022 12:38 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for setting MISR registers within the interface
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 55
Hi,
On Tue, May 10, 2022 at 12:30 PM Douglas Anderson wrote:
>
> This patch is v3 of the first 2 patches from my RFC series ("drm/dp:
> Improvements
> for DP AUX channel") [1]. I've broken the series in two so we can make
> progress on the two halves separately.
>
> v2 of this series tries to
Hi Zack,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-exynos/exynos-drm-next drm-intel/for-linux-next
drm-tip/drm-tip v5.18 next-20220602]
[cannot apply to airlied/drm-next tegra-drm/drm/tegra/for-next]
[If your patch
Hi Roman,
On Thu, Jun 02, 2022 at 06:01:18PM +, Roman Stratiienko wrote:
> According to DE2.0/DE3.0 manual VI scaler enable register is double
> buffered, but de facto it doesn't, or the hardware has the shadow
> register latching issues which causes single-frame picture corruption
> after
Hi,
On Wed, Jun 1, 2022 at 2:46 AM Hsin-Yi Wang wrote:
>
> To return the orientation property to drm/kms driver.
>
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: Hans de Goede
> ---
> drivers/gpu/drm/panel/panel-edp.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git
Hi,
On Wed, Jun 1, 2022 at 2:46 AM Hsin-Yi Wang wrote:
>
> Panels usually call drm_connector_set_panel_orientation(), which is
> later than drm/kms driver calling drm_dev_register(). This leads to a
> WARN()[1].
>
> The orientation property is known earlier. For example, some panels
> parse the
On 02/06/2022 23:24, Abhinav Kumar wrote:
On 6/2/2022 1:22 PM, Dmitry Baryshkov wrote:
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Changes since v2:
- Add DPU_MIXER_COMBINED_ALPHA to
This lock is only needed if you're iterating through the in-memory topology
(e.g. drm_dp_mst_branch->ports, drm_dp_mst_port->mstb, etc.). This doesn't
actually seem to be what's going on here though, so we can just drop this
lock.
Signed-off-by: Lyude Paul
---
A lot of code in amdgpu seems to sprinkle in
if (foo != NULL)
…
Checks pretty much all over the place, many times in locations where it's
clear foo (whatever foo may be) should never be NULL unless we've run into
a programming error. This is definitely one of those places, as
Noticed this while trying to update amdgpu for the non-atomic MST removal
changes - for some reason we appear to grab mst_mgr->lock before computing
mst DSC configs. This is wrong though - mst_mgr->lock is only needed while
traversing the actual MST topology state - which is not typically
On Wed, Jun 01, 2022 at 07:13:16PM -0700, Zeng, Oak wrote:
Regards,
Oak
-Original Message-
From: dri-devel On Behalf Of
Niranjana Vishwanathapura
Sent: May 17, 2022 2:32 PM
To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Vetter,
Daniel
Cc: Brost, Matthew ;
On Thu, 2022-06-02 at 23:42 +0300, Ville Syrjälä wrote:
> On Thu, Jun 02, 2022 at 04:17:56PM -0400, Lyude Paul wrote:
> > I noticed a rather surprising issue here while working on removing all of
> > the non-atomic MST code: drm_atomic_get_mst_topology_state() doesn't check
> > the return value of
On Thu, Jun 02, 2022 at 04:17:56PM -0400, Lyude Paul wrote:
> I noticed a rather surprising issue here while working on removing all of
> the non-atomic MST code: drm_atomic_get_mst_topology_state() doesn't check
> the return value of drm_atomic_get_private_obj_state() and instead just
> passes it
On Thu, Jun 2, 2022 at 3:11 PM Niranjana Vishwanathapura <
niranjana.vishwanathap...@intel.com> wrote:
> On Wed, Jun 01, 2022 at 01:28:36PM -0700, Matthew Brost wrote:
> >On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
> >> On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
On Thu, Jun 02, 2022 at 09:22:46AM -0700, Matthew Brost wrote:
On Thu, Jun 02, 2022 at 08:42:13AM +0300, Lionel Landwerlin wrote:
On 02/06/2022 00:18, Matthew Brost wrote:
> On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
> > On 17/05/2022 21:32, Niranjana Vishwanathapura
Mark struct dpu_mdss_cfg instance as a const pointer. This is mostly a
preparation for the next patch.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++--
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 475 --
Rather than checking hwversion, follow the usual patter and add special
bit to the lm->features to check whether the LM has combined or separate
alpha registers. While we are at it, rename
dpu_hw_lm_setup_blend_config_sdm845() to
dpu_hw_lm_setup_blend_config_combined_alpha().
Signed-off-by:
The driver should not depend on hw revision for detecting features.
Instead it should use features from the hw catalog. Drop the hwversion
field from struct dpu_mdss_cfg and struct dpu_hw_blk_reg_map.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Change dpu_mdss_cfg::dma_cfg to be a const pointer rather than embedding
the dpu_reg_dma_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++--
Change dpu_mdss_cfg::perf to be a const pointer rather than embedding
the dpu_perf_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 20 +--
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Changes since v3:
- Add missed Reviewed-by tags by Abhinav.
Changes since v2:
- Add DPU_MIXER_COMBINED_ALPHA to sc7180's mixer features mask
On 6/2/2022 1:22 PM, Dmitry Baryshkov wrote:
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Changes since v2:
- Add DPU_MIXER_COMBINED_ALPHA to sc7180's mixer features mask (noted
by
Rather than detecting VBIF_XINL_QOS_LVL_REMAP_000 based on the
hwversion, push the offset to the hw_catalog.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 475 --
Mark struct dpu_mdss_cfg instance as a const pointer. This is mostly a
preparation for the next patch.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++--
Change dpu_mdss_cfg::dma_cfg to be a const pointer rather than embedding
the dpu_reg_dma_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++--
Change dpu_mdss_cfg::perf to be a const pointer rather than embedding
the dpu_perf_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 20 +--
Rather than detecting VBIF_XINL_QOS_LVL_REMAP_000 based on the
hwversion, push the offset to the hw_catalog.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
The driver should not depend on hw revision for detecting features.
Instead it should use features from the hw catalog. Drop the hwversion
field from struct dpu_mdss_cfg and struct dpu_hw_blk_reg_map.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 1 -
Rather than checking hwversion, follow the usual patter and add special
bit to the lm->features to check whether the LM has combined or separate
alpha registers. While we are at it, rename
dpu_hw_lm_setup_blend_config_sdm845() to
dpu_hw_lm_setup_blend_config_combined_alpha().
Signed-off-by:
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Changes since v2:
- Add DPU_MIXER_COMBINED_ALPHA to sc7180's mixer features mask (noted
by Abhinav).
Changes since v1:
- Turn catalog->perf and
We don't actually care about connection_mutex here anymore, so let's get
rid of the comment mentioning it in this function's kdocs.
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
I'm now (finally!) finishing up my work with getting rid of the legacy
MST code and makng everything atomic only, and while doing that I ended
up coming up with a few unrelated patches along the way. These are those
patches.
Lyude Paul (3):
drm/display/dp_mst: Don't validate port refs in
I noticed a rather surprising issue here while working on removing all of
the non-atomic MST code: drm_atomic_get_mst_topology_state() doesn't check
the return value of drm_atomic_get_private_obj_state() and instead just
passes it directly to to_dp_mst_topology_state(). This means that if we
hit a
Drive-by cleanup, we don't need to validate the port references here as we
already previously went through the effort of refactoring things such that
we're guaranteed to be able to access ->mstb and ->port safely from
drm_dp_check_and_send_link_address(), since the only two places in the
codebase
On Thu, Jun 2, 2022 at 7:42 AM Lionel Landwerlin
wrote:
>
> On 02/06/2022 00:18, Matthew Brost wrote:
> > On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
> >> On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
> >>> +VM_BIND/UNBIND ioctl will immediately start
On Thu, 2 Jun 2022 at 21:37, Abhinav Kumar wrote:
>
>
>
> On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
> > Rather than checking hwversion, follow the usual patter and add special
> > bit to the lm->features to check whether the LM has combined or separate
> > alpha registers. While we are at it,
On Thu, 2 Jun 2022 at 21:18, Abhinav Kumar wrote:
>
>
>
> On 6/1/2022 1:04 PM, Dmitry Baryshkov wrote:
> > On Wed, 1 Jun 2022 at 20:38, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 6/1/2022 2:46 AM, Dmitry Baryshkov wrote:
> >>> On Wed, 1 Jun 2022 at 01:01, Abhinav Kumar
> >>> wrote:
>
On Wed, Jun 01, 2022 at 01:28:36PM -0700, Matthew Brost wrote:
On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
> +VM_BIND/UNBIND ioctl will immediately start binding/unbinding the mapping in
an
> +async worker. The
There is no need to directly skip over to the SCROLL_REDRAW case while
the logo is still shown.
When using DRM, this change has no effect because the code will reach
the SCROLL_REDRAW case immediately anyway.
But if you run an accelerated fbdev driver and have
The user may use the fbcon=vc:- option to tell fbcon to take
over the given range (n1...n2) of consoles. The value for n1 and n2
needs to be a positive number and up to (MAX_NR_CONSOLES - 1).
The given values were not fully checked against those boundaries yet.
To fix the issue, convert
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
Mark struct dpu_mdss_cfg instance as a const pointer. This is mostly a
preparation for the next patch.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++--
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
Change dpu_mdss_cfg::dma_cfg to be a const pointer rather than embedding
the dpu_reg_dma_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
Change dpu_mdss_cfg::perf to be a const pointer rather than embedding
the dpu_perf_cfg struct into the struct dpu_mdss_cfg.
Reported-by: kernel test robot
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
The driver should not depend on hw revision for detecting features.
Instead it should use features from the hw catalog. Drop the hwversion
field from struct dpu_mdss_cfg and struct dpu_hw_blk_reg_map.
Signed-off-by: Dmitry Baryshkov
Since the
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
Rather than detecting VBIF_XINL_QOS_LVL_REMAP_000 based on the
hwversion, push the offset to the hw_catalog.
Signed-off-by: Dmitry Baryshkov
This one is fine because sc7180 and sc7280 use sdm845_vbif.
All chipsets listed in the catalog are
On 6/2/2022 6:30 AM, Dmitry Baryshkov wrote:
Rather than checking hwversion, follow the usual patter and add special
bit to the lm->features to check whether the LM has combined or separate
alpha registers. While we are at it, rename
dpu_hw_lm_setup_blend_config_sdm845() to
On 6/1/2022 1:04 PM, Dmitry Baryshkov wrote:
On Wed, 1 Jun 2022 at 20:38, Abhinav Kumar wrote:
On 6/1/2022 2:46 AM, Dmitry Baryshkov wrote:
On Wed, 1 Jun 2022 at 01:01, Abhinav Kumar wrote:
On 5/31/2022 5:18 AM, Dmitry Baryshkov wrote:
Replace magic register writes in
According to DE2.0/DE3.0 manual VI scaler enable register is double
buffered, but de facto it doesn't, or the hardware has the shadow
register latching issues which causes single-frame picture corruption
after changing the state of scaler enable register.
Allow the user to keep the scaler always
On 6/2/22 19:12, David Gow wrote:
> On Mon, May 30, 2022 at 9:29 AM José Expósito
> wrote:
[snip]
>>
>> A .kuniconfig example is present in the cover letter. (...)
>
> FYI: it's also possible to run these tests under UML with the extra options:
> CONFIG_VIRTIO_UML=y
>
We are seeing error message of "No response for request". Some cases happened
while waiting for response and reset/suspend action was triggered. In this
case, no response is not an error, active requests will be cancelled.
This patch will handle this condition and change the error message into
Hello David,
On 6/2/22 19:07, David Gow wrote:
> On Thu, Jun 2, 2022 at 9:27 AM Javier Martinez Canillas
[snip]
>>
>> And doing that will also allow you to get rid of this, since just selecting
>> CONFIG_DRM_KUNIT_TEST=y would be enough for the tests built and run by KUnit.
>>
>
> This is
On Thu, Jun 02, 2022 at 07:08:33PM +0200, Sebastian Wick wrote:
> On Thu, Jun 2, 2022 at 6:40 PM Ville Syrjälä
> wrote:
> >
> > On Thu, Jun 02, 2022 at 10:47:59AM +0300, Pekka Paalanen wrote:
> > > On Wed, 1 Jun 2022 17:06:25 +0300
> > > Ville Syrjälä wrote:
> > >
> > > > On Wed, Jun 01, 2022 at
On Tue, May 24, 2022 at 01:39:28PM +0300, Jani Nikula wrote:
> Add default action when .get_modes() not set. This also defines what a
> .get_modes() hook should do.
>
> Cc: David Airlie
> Cc: Daniel Vetter
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_probe_helper.c | 14
On Tue, May 24, 2022 at 01:39:26PM +0300, Jani Nikula wrote:
> Add a new function drm_edid_connector_update() to replace the
> combination of calls drm_connector_update_edid_property() and
> drm_add_edid_modes(). Usually they are called in the drivers in this
> order, however the former needs
On Thu, Jun 2, 2022 at 6:40 PM Ville Syrjälä
wrote:
>
> On Thu, Jun 02, 2022 at 10:47:59AM +0300, Pekka Paalanen wrote:
> > On Wed, 1 Jun 2022 17:06:25 +0300
> > Ville Syrjälä wrote:
> >
> > > On Wed, Jun 01, 2022 at 10:21:26AM +0300, Pekka Paalanen wrote:
> > > > On Tue, 31 May 2022 20:37:31
On Thu, 02 Jun 2022, Ville Syrjälä wrote:
> On Tue, May 24, 2022 at 01:39:23PM +0300, Jani Nikula wrote:
>> Add drm_edid based block count and data access helper functions that
>> take the EDID allocated size into account.
>>
>> At the moment, the allocated size should always match the EDID size
Thank you for the valuable suggestion.
Andy Shevchenko 於 2022年6月1日 週三 下午5:57寫道：
>
> On Tue, May 31, 2022 at 1:32 PM ChiaEn Wu wrote:
> >
> > From: Alice Chen
> >
> > Add Mediatek MT6370 flashlight support
>
> Same comments about the commit message.
>
> ...
>
> > +#include
> > +#include
> >
clk_put() already checks the clk ptr using !clk and IS_ERR()
so there is no need to check it again before calling it.
Signed-off-by: Yihao Han
---
drivers/video/fbdev/simplefb.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/video/fbdev/simplefb.c
On Tue, May 24, 2022 at 01:39:23PM +0300, Jani Nikula wrote:
> Add drm_edid based block count and data access helper functions that
> take the EDID allocated size into account.
>
> At the moment, the allocated size should always match the EDID size
> indicated by the extension count, but this
On Thu, Jun 02, 2022 at 10:47:59AM +0300, Pekka Paalanen wrote:
> On Wed, 1 Jun 2022 17:06:25 +0300
> Ville Syrjälä wrote:
>
> > On Wed, Jun 01, 2022 at 10:21:26AM +0300, Pekka Paalanen wrote:
> > > On Tue, 31 May 2022 20:37:31 +0300
> > > Ville Syrjälä wrote:
> > >
> > > > On Wed, May 25,
On Thu, Jun 02, 2022 at 08:42:13AM +0300, Lionel Landwerlin wrote:
> On 02/06/2022 00:18, Matthew Brost wrote:
> > On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
> > > On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
> > > > +VM_BIND/UNBIND ioctl will immediately start
Hello José,
On 5/30/22 12:20, José Expósito wrote:
> Test the conversion from XRGB to RGB332.
>
> What is tested?
>
> - Different values for the X in XRGB to make sure it is ignored
> - Different clip values: Single pixel and full and partial buffer
> - Well know colors: White,
of_get_child_by_name() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
So add of_node_put() in error paths.
Fixes: format:d8f4a9eda006 ("drm: Add NVIDIA Tegra20 support")
Signed-off-by: Miaoqian Lin
---
drivers/gpu/drm/tegra/rgb.c | 31
Hi Daniel,
On Wed, Mar 30, 2022 at 3:27 PM Daniel Vetter wrote:
>
> On Wed, Mar 30, 2022 at 10:52:54AM +0200, Maxime Ripard wrote:
> > On Tue, Mar 29, 2022 at 11:38:32PM +0530, Jagan Teki wrote:
> > > Hi all,
> > >
> > > I have implemented runtime display switching in the MIPI switch design
> >
From: Zack Rusin
Atomic modesetting support mouse cursor offsets via the hotspot
properties that are creates on cursor planes. All drivers which
support hotspot are atomic and the legacy code has been implemented
in terms of the atomic properties as well.
Due to the above the lagacy cursor
From: Zack Rusin
Atomic modesetting got support for mouse hotspots via the hotspot
properties. Drivers need to create those properties on cursor planes
which require the mouse hotspot coordinates.
Add the code creating hotspot properties and port away from old legacy
hotspot API. The legacy
From: Zack Rusin
Atomic modesetting got support for mouse hotspots via the hotspot
properties. Drivers need to create those properties on cursor planes
which require the mouse hotspot coordinates.
Add the code creating hotspot properties and port away from old legacy
hotspot API. The legacy
From: Zack Rusin
Atomic modesetting got support for mouse hotspots via the hotspot
properties. Drivers need to create those properties on cursor planes
which require the mouse hotspot coordinates.
Add the code creating hotspot properties and port away from old legacy
hotspot API. The legacy
From: Zack Rusin
Atomic modesetting got support for mouse hotspots via the hotspot
properties. Drivers need to create those properties on cursor planes
which require the mouse hotspot coordinates.
Add the code creating hotspot properties and port away from old legacy
hotspot API. The legacy
From: Zack Rusin
Atomic modesetting code lacked support for specifying mouse cursor
hotspots. The legacy kms DRM_IOCTL_MODE_CURSOR2 had support for setting
the hotspot but the functionality was not implemented in the new atomic
paths.
Due to the lack of hotspots in the atomic paths userspace
From: Zack Rusin
Support for setting mouse cursor hotspot never made the transition from
the legacy kms to atomic. This left virtualized drivers, all which
are atomic, in a weird spot because all userspace compositors put
those drivers on deny-lists for atomic kms due to the fact that mouse
Krzysztof Kozlowski 於 2022年6月2日 週四 下午9:58寫道：
>
> On 02/06/2022 15:56, Rob Herring wrote:
> > On Thu, May 26, 2022 at 12:32:12PM +0200, Krzysztof Kozlowski wrote:
> >> On 26/05/2022 10:13, ChiYuan Huang wrote:
> >>> Krzysztof Kozlowski 於 2022年5月26日 週四
> >>> 下午4:06寫道：
>
> On 26/05/2022
On 18/04/2022 20:17, Douglas Anderson wrote:
Let's add support for being able to read the HPD pin even if it's
hooked directly to the controller. This will allow us to get more
accurate delays also lets us take away the waiting in the AUX transfer
functions of the eDP controller drivers.
On 18/04/2022 20:17, Douglas Anderson wrote:
This implements the callback added by the patch ("drm/dp: Add
wait_hpd_asserted() callback to struct drm_dp_aux").
With this change and all the two "DP AUX Endpoint" drivers changed to
use wait_hpd_asserted(), we no longer need to have an long delay
On Wed, 01 Jun 2022 12:02:44 +0100, Peter Robinson wrote:
> BCM2711, Raspberry Pi 4's SoC, contains a V3D core. So add its specific
> compatible to the bindings.
>
> Signed-off-by: Nicolas Saenz Julienne
> Signed-off-by: Peter Robinson
> ---
> Changes since v5:
> - Change compatible to align
1 - 100 of 177 matches
Mail list logo
