On Thu, 27 Mar 2025, Yongbang Shi wrote:
在 2025/3/26 17:32, Jani Nikula 写道:
On Tue, 25 Mar 2025, Yongbang Shi wrote:
On Mon, 24 Mar 2025, Yongbang Shi wrote:
On Wed, 19 Mar 2025, Yongbang Shi wrote:
From: Baihan Li
Add registering drm_aux and use it to get connector edid with drm
fun
Follow-on from the companion dt-bindings change ("dt-bindings: gpu: img:
More explicit compatible strings"), deprecating "img,img-axe" in favour of
the more explicit combination of "img,img-rogue" and "img,img-axe-1-16m".
Since all relevant details are interrogated from the device at runtime,
we c
Removed unused function mpc401_get_3dlut_fast_load_status.
Signed-off-by: James Flowers
---
drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 17 -
.../drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c | 11 ---
.../drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h | 14 -
> On Wed, 26 Mar 2025 06:03:27 +
> "Murthy, Arun R" wrote:
>
> > > On Wed, 19 Mar 2025 12:08:15 +
> > > "Murthy, Arun R" wrote:
> > >
> > > > > On Mon, 3 Mar 2025 13:23:42 +0530 "Murthy, Arun R"
> > > > > wrote:
> > > > >
> > > > > > On 20-02-2025 21:20, Pekka Paalanen wrote:
> > > > >
On Tue, Mar 25, 2025 at 4:14 PM Fei Shao wrote:
>
> Simply clear the INTERFACE_CHANGE_INT register with 0 and replace the
> indirect `x & (~x)` pattern, since they are logically the same.
> No functional change.
>
> Signed-off-by: Fei Shao
> ---
Hi,
I noticed that Xin sent out another patch [1]
Jonathan,
I triggered several page faults by hacking UMD and can see multiple
faults from 4 engines are generated and reported from KMD with this
series (patchwork rev15). Although the hack cannot cover every case, I
belive the new ioctl interface is working now. I will let you know any
findi
On Thu, Mar 27, 2025 at 4:54 PM Doug Anderson wrote:
> Hi,
>
> On Wed, Mar 26, 2025 at 8:29 PM Anusha Srivatsa
> wrote:
> >
> > Move away from using deprecated API and use _multi variants
> > if available. Use mipi_dsi_msleep() and mipi_dsi_usleep_range()
> > instead of msleep() and usleep_range
Introduce qcomtee_object, which represents an object in both QTEE and
the kernel. QTEE clients can invoke an instance of qcomtee_object to
access QTEE services. If this invocation produces a new object in QTEE,
an instance of qcomtee_object will be returned.
Similarly, QTEE can request services fr
Add documentation for the Qualcomm TEE driver.
Signed-off-by: Amirreza Zarrabi
---
Documentation/tee/index.rst | 1 +
Documentation/tee/qtee.rst | 150
2 files changed, 151 insertions(+)
diff --git a/Documentation/tee/index.rst b/Documentation/tee
Enable userspace to allocate shared memory with QTEE. Since
QTEE handles shared memory as object, a wrapper is implemented
to represent tee_shm as an object. The shared memory identifier,
obtained through TEE_IOC_SHM_ALLOC, is transferred to the driver using
TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF_INPUT/O
Qualcomm TEE (QTEE) hosts Trusted Applications (TAs) and services in
the secure world, accessed via objects. A QTEE client can invoke these
objects to request services. Similarly, QTEE can request services from
the nonsecure world using objects exported to the secure world.
Add low-level primitive
For drivers that can transfer data to the TEE without using shared
memory from client, it is necessary to receive the user address
directly, bypassing any processing by the TEE subsystem. Introduce
TEE_IOCTL_PARAM_ATTR_TYPE_UBUF_INPUT/OUTPUT/INOUT to represent
userspace buffers.
Signed-off-by: Ami
The tee_context can be used to manage TEE user resources, including
those allocated by the driver for the TEE on behalf of the user.
The release() callback is invoked only when all resources, such as
tee_shm, are released and there are no references to the tee_context.
When a user closes the devic
A TEE driver doesn't always need to provide a pool if it doesn't
support memory sharing ioctls and can allocate memory for TEE
messages in another way. Although this is mentioned in the
documentation for tee_device_alloc(), it is not handled correctly.
Signed-off-by: Amirreza Zarrabi
---
drivers
After booting, the kernel provides a static object known as the
primordial object. This object is utilized by QTEE for native
kernel services such as yield or privileged operations.
Signed-off-by: Amirreza Zarrabi
---
drivers/tee/qcomtee/Makefile | 1 +
drivers/tee/qcomtee/core.c
The TEE subsystem allows session-based access to trusted services,
requiring a session to be established to receive a service. This
is not suitable for an environment that represents services as objects.
An object supports various operations that a client can invoke,
potentially generating a result
shm_bridge create/delete functions always use the scm device.
There is no need to pass it as an argument.
Signed-off-by: Amirreza Zarrabi
---
drivers/firmware/qcom/qcom_scm.c | 4 ++--
drivers/firmware/qcom/qcom_tzmem.c | 8
include/linux/firmware/qcom/qcom_scm.h | 4 ++--
3 f
Anyone with access to contiguous physical memory should be able to
share memory with QTEE using shm_bridge.
Signed-off-by: Amirreza Zarrabi
---
drivers/firmware/qcom/qcom_tzmem.c | 57 +---
include/linux/firmware/qcom/qcom_tzmem.h | 15 +
2 files changed
This patch series introduces a Trusted Execution Environment (TEE)
driver for Qualcomm TEE (QTEE). QTEE enables Trusted Applications (TAs)
and services to run securely. It uses an object-based interface, where
each service is an object with sets of operations. Clients can invoke
these operations on
Add support for userspace to request a list of observed faults
from a specified VM.
v2:
- Only allow querying of failed pagefaults (Matt Brost)
v3:
- Remove unnecessary size parameter from helper function, as it
is a property of the arguments. (jcavitt)
- Remove unnecessary copy_from_user (Jain
On 3/27/25 18:25, Aaron Ruby wrote:
>
> Since the context-type additions to the virtio-gpu spec, these have been
> defined locally in guest user-space, and virtio-gpu backend library code.
>
> Now, these capsets have been stabilized, and should be defined in
> a common space, in both the virtio_g
On 3/27/25 06:00, Huang, Honglei1 wrote:
>
>
> On 2025/3/26 22:46, Dmitry Osipenko wrote:
>> On 3/6/25 13:51, Huang, Honglei1 wrote:
>>>
>>> On 2025/3/1 5:21, Demi Marie Obenour wrote:
On 2/28/25 12:36 AM, Honglei Huang wrote:
> From: Honglei Huang
>
> Add a new resource for blo
On 3/27/25 10:14, Kasireddy, Vivek wrote:
>> Another question, why do we need this fencing for imported dmabuf?
>> Fencing isn't done host/guest blobs in this code, while dmabuf is
>> essentially a guest blob. Could you please clarify why this fence is
>> needed? Maybe we shouldn't allocate fence i
https://bugzilla.kernel.org/show_bug.cgi?id=219929
--- Comment #1 from Mario Limonciello (AMD) (mario.limoncie...@amd.com) ---
It's an optional firmware. Only needed for some hardware.
Please see this commit:
https://github.com/torvalds/linux/commit/ea5d49349894a7a74ce8dba242e3a487d24b6c0e
You
https://bugzilla.kernel.org/show_bug.cgi?id=219929
Mario Limonciello (AMD) (mario.limoncie...@amd.com) changed:
What|Removed |Added
Status|NEW |RESO
https://bugzilla.kernel.org/show_bug.cgi?id=219929
--- Comment #2 from Atiq (ati...@gmail.com) ---
Thanks for the clarification and quick reply.
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the assignee of the bug.
Use refcount_t helper for vmap_use_count to make refcounting consistent
with pages_use_count and pages_pin_count that use refcount_t. This also
makes vmapping to benefit from the refcount_t's overflow checks.
Acked-by: Maxime Ripard
Reviewed-by: Boris Brezillon
Suggested-by: Boris Brezillon
Sig
https://bugzilla.kernel.org/show_bug.cgi?id=219929
Bug ID: 219929
Summary: Direct firmware load for amdgpu/isp_4_1_0.bin failed
with error -2
Product: Drivers
Version: 2.5
Hardware: All
OS: Linux
Hi Dave, Simona,
Fixes for 6.15.
The following changes since commit cf05922d63e2ae6a9b1b52ff5236a44c3b29f78c:
Merge tag 'drm-intel-gt-next-2025-03-12' of
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next (2025-03-25
08:21:07 +1000)
are available in the Git repository at:
https
On 3/28/25 00:36, Rob Clark wrote:
...
> static int drm_syncobj_import_sync_file_fence(struct drm_file *file_private,
> - int fd, int handle)
> + int fd, int handle, u64 point)
> {
> struct dma_fence *fence
The rz-du driver uses GEM DMA helpers, but does not implement the
drm_driver .gem_prime_import_sg_table operation. This prevents
importing dmabufs. Fix it by implementing the missing operation using
the DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE() helper macro.
Signed-off-by: Laurent Pinchart
---
K
From: Paul-pl Chen
This patch series adds support for the MediaTek MT8196 SoC's display
subsystem in the DRM driver.
Changes in v2:
- add support for MT8196's new hardware components (EXDMA, BLENDER,
OUTPROC) following the previous MTK OVL software architecture.
- reuse mtk_ovl drivers in Med
Reviewed-by: Simon Ser
Reviewed-by: Simon Ser
Replace multi-line SPDX license headers with single-line
equivalents (// SPDX-License-Identifier: MIT or /* ... */ for
headers), as preferred by current kernel coding style.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_busy.c | 3 +--
drivers/gpu/drm/i915/gem/i915_gem
From: Tang Dongxing
Replace the open-code with device_match_of_node().
Signed-off-by: Tang Dongxing
Signed-off-by: Shao Mingyin
---
drivers/gpu/drm/drm_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.
On Wed, Mar 26, 2025 at 2:16 PM Alyssa Rosenzweig wrote:
>
> This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> M1 and M2 series systems on chip. The UAPI design is based on other
> modern Vulkan-capable drivers, including Xe and Panthor. Memory
> management is based on expli
From: Tang Dongxing
Replace the open-code with device_match_of_node().
Signed-off-by: Tang Dongxing
Signed-off-by: Shao Mingyin
---
drivers/gpu/drm/drm_panel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
index c
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:49PM +0200, Tomi Valkeinen wrote:
> Add XVUY2101010, a 10 bits per component YCbCr format in a 32 bit
> container.
>
> Signed-off-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/drm_fourcc.c | 1 +
> i
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:54PM +0200, Tomi Valkeinen wrote:
> Add support for XVUY2101010 format.
>
> Signed-off-by: Tomi Valkeinen
> ---
> drivers/gpu/drm/xlnx/zynqmp_disp.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/xl
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:47PM +0200, Tomi Valkeinen wrote:
> Add Y10_P32, a 10 bit greyscale format, with 3 pixels packed into
> 32-bit container.
>
> The fourcc for the format is 'YPA4', which comes from Y - Y only, P -
> packed, A - 10 (as in 0xA), 4 - 4
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:53PM +0200, Tomi Valkeinen wrote:
> Add support for X403 format.
>
> Signed-off-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/xlnx/zynqmp_disp.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:48PM +0200, Tomi Valkeinen wrote:
> Add X403, a 3 plane non-subsampled YCbCr format.
I'd add 10-bpp somewhere in there.
> Signed-off-by: Tomi Valkeinen
> ---
> drivers/gpu/drm/drm_fourcc.c | 3 +++
> include/uapi/drm/drm_fourcc.
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:52PM +0200, Tomi Valkeinen wrote:
> Add support for Y8 and Y10_P32 formats. We also need to add new csc
> matrices for the y-only formats.
>
> Signed-off-by: Tomi Valkeinen
> ---
> drivers/gpu/drm/xlnx/zynqmp_disp.c | 26 +
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:51PM +0200, Tomi Valkeinen wrote:
> Add support for XV15 & XV20 formats.
>
> Signed-off-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/xlnx/zynqmp_disp.c | 10 ++
> 1 file changed, 10 insertion
Hi Tomi,
Thank you for the patch.
On Wed, Mar 26, 2025 at 03:22:45PM +0200, Tomi Valkeinen wrote:
> Add two new pixel formats:
>
> DRM_FORMAT_XV15 ("XV15")
> DRM_FORMAT_XV20 ("XV20")
>
> The formats are 2 plane 10 bit per component YCbCr, with the XV15 2x2
> subsampled whereas XV20 is 2x1 subsa
On Thu Mar 27, 2025 at 8:44 PM CET, Tamir Duberstein wrote:
> On Thu, Mar 27, 2025 at 10:15 AM Tamir Duberstein wrote:
>> On Wed, Mar 26, 2025 at 6:15 PM Benno Lossin wrote:
>> > On Wed Mar 26, 2025 at 11:09 PM CET, Tamir Duberstein wrote:
>> > > On Wed, Mar 26, 2025 at 5:09 PM Benno Lossin
>>
From: Rob Clark
Add support for exporting a dma_fence fd for a specific point on a
timeline. This is needed for vtest/vpipe[1][2] to implement timeline
syncobj support, as it needs a way to turn a point on a timeline back
into a dma_fence fd. It also closes an odd omission from the syncobj
UAPI
Hi,
On Wed, Mar 12, 2025 at 2:02 AM Chen Ni wrote:
>
> 'destroy_workqueue()' already drains the queue before destroying it, so
> there is no need to flush it explicitly.
>
> Remove the redundant 'flush_workqueue()' calls.
>
> This was generated with coccinelle:
>
> @@
> expression E;
> @@
> - flu
Hi,
On Wed, Mar 26, 2025 at 8:29 PM Anusha Srivatsa wrote:
>
> Move away from using deprecated API and use _multi variants
> if available. Use mipi_dsi_msleep() and mipi_dsi_usleep_range()
> instead of msleep() and usleep_range() respectively.
>
> Used Coccinelle to find the _multi variant APIs,r
From: Andy Yan
In some application scenarios, we hope to get the corresponding
connector when the bridge's detect hook is invoked.
In most cases, we can get the connector by drm_atomic_get_connector_for_encoder
if the encoder attached to the bridge is enabled, however there will
still be some sc
On Thu, Mar 27, 2025 at 10:15 AM Tamir Duberstein wrote:
>
> On Wed, Mar 26, 2025 at 6:15 PM Benno Lossin wrote:
> >
> > On Wed Mar 26, 2025 at 11:09 PM CET, Tamir Duberstein wrote:
> > > On Wed, Mar 26, 2025 at 5:09 PM Benno Lossin
> > > wrote:
> > >> On Wed Mar 26, 2025 at 8:06 PM CET, Tamir
On Thu, Mar 27, 2025 at 9:58 AM Danilo Krummrich wrote:
>
> On Fri, Mar 21, 2025 at 07:00:57PM -0400, M Henning wrote:
> > This is a pointer in the gpu's virtual address space. It must be
> > aligned according to ctxsw_align and be at least ctxsw_size bytes
> > (where those values come from the no
[Public]
> -Original Message-
> From: Charles Han
> Sent: Thursday, March 27, 2025 12:05 AM
> To: Feng, Kenneth ; Deucher, Alexander
> ; Koenig, Christian
> ; airl...@gmail.com; sim...@ffwll.ch;
> s...@itb.spb.ru; Huang, Tim ; Zhang, Jesse(Jie)
> ; li...@treblig.org; Huang, Ray
> ; rex...
On Thu, Mar 27, 2025 at 8:56 AM Danilo Krummrich wrote:
>
> On Tue, Mar 25, 2025 at 07:40:56PM -0400, M Henning wrote:
> > Okay, that sounds reasonable since I don't expect this to change very
> > quickly.
> >
> > Since I don't fully understand, is the suggestion here to:
> > 1) add the interface
Hi Dmitry,
On Thu, 27 Mar 2025 at 17:40, Dmitry Baryshkov
wrote:
>
> On 27/03/2025 19:25, Christopher Obbard wrote:
> > According to the eDP specification (e.g., VESA eDP 1.4b, section 3.3.10.2),
> > if DP_EDP_PWMGEN_BIT_COUNT is less than DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN,
> > the sink is required
On Thu, Mar 27, 2025 at 04:56:54PM +, Christopher Obbard wrote:
> Add the Samsung ATNA40YK20 eDP panel to the device tree for the
> Snapdragon T14s OLED model.
>
> Signed-off-by: Christopher Obbard
> ---
> arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts | 8
> 1 file
On Thu, Mar 27, 2025 at 04:56:53PM +, Christopher Obbard wrote:
> The eDP panel has an HPD GPIO. Describe it in the device tree
> for the generic T14s model, as the HPD GPIO property is used in
> both the OLED and LCD models which inherit this device tree.
>
> Reviewed-by: Bryan O'Donoghue
>
Hi Linus,
please pull some updates regarding fbdev for 6.15-rc1:
The fbcon packed pixel drawing routines have been refactored to bring the
implementations for system and I/O memory in sync. The other patches add some
parameter checks, static attribute groups for sysfs entries and console fixes.
On Mon, 24 Mar 2025 18:33:27 +0800, Andy Yan wrote:
> From: Andy Yan
>
> The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled
> first before normal DDC communication can be carried out.
>
> Therefore, both RK3036 and RK3128 HDMI require two identical clocks.
>
> Signed-of
On Thu, Mar 27, 2025 at 9:51 AM Danilo Krummrich wrote:
>
> On Fri, Mar 21, 2025 at 06:06:34PM -0400, M Henning wrote:
> > On Thu, Mar 20, 2025 at 2:18 PM Danilo Krummrich wrote:
> > > On Wed, Mar 12, 2025 at 05:36:14PM -0400, Mel Henning wrote:
> > > > + __u32 width_align_pixels;
> > > > +
On Thu, 27 Mar 2025, Andi Shyti wrote:
> From: Andi Shyti
>
> Some GPUs, like DG2, can host more than one CCS engine. Some
> workarounds or enablements need to happen only once for all the
> engines in the GT—for example, on the engine with the lowest
> instance.
>
> The FIRST_CCS() helper first
On 27/03/2025 19:25, Christopher Obbard wrote:
According to the eDP specification (e.g., VESA eDP 1.4b, section 3.3.10.2),
if DP_EDP_PWMGEN_BIT_COUNT is less than DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN,
the sink is required to use the MIN value as the effective bit count.
Some eDP panels report DP_EDP_
On 3/26/25 01:06, Jacek Lawrynowicz wrote:
Hi,
On 3/25/2025 9:50 PM, Lizhi Hou wrote:
On 3/25/25 04:43, Maciej Falkowski wrote:
From: Jacek Lawrynowicz
Fix deadlock in ivpu_ms_cleanup() by preventing runtime resume after
file_priv->ms_lock is acquired.
During a failure in runtime resume,
On 3/25/25 04:42, Maciej Falkowski wrote:
From: Jacek Lawrynowicz
Warn if device is suspended only when runtime PM is enabled.
Runtime PM is disabled during reset/recovery and it is not an error
to use ivpu_ipc_send_receive_internal() in such cases.
Fixes: 5eaa49741119 ("accel/ivpu: Prevent re
quency is within 25% of desired value */
fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4);
fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4);
---
base-commit: ee20c69c789b6cb2179a535cf440d72b98f4a134
change-id: 20250327-wip-obbardc-qcom-t14s-oled-panel-brightness-4020865b6580
Best regards,
--
Christopher Obbard
The eDP panel has an HPD GPIO. Describe it in the device tree
for the generic T14s model, as the HPD GPIO property is used in
both the OLED and LCD models which inherit this device tree.
Reviewed-by: Bryan O'Donoghue
Signed-off-by: Christopher Obbard
---
arch/arm64/boot/dts/qcom/x1e78100-lenovo
Add the Samsung ATNA40YK20 eDP panel to the device tree for the
Snapdragon T14s OLED model.
Signed-off-by: Christopher Obbard
---
arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-t
The Snapdragon Lenovo T14s Gen6 can be bought with a number of different
panels. This patch series adds support for the OLED model which has a
Samsung ATNA40YK20 panel.
With this patch series, the backlight of the OLED eDP panel does not
illuminate since the brightness is incorrectly read from the
Add the driver for Visionox G2647FB105 6.47" FHD Plus CMD mode AMOLED panel
support found in:
- Xiaomi Mi Note 10 / CC9 Pro (sm7150-xiaomi-tucana)
- Xiaomi Mi Note 10 Lite (sm7150-xiaomi-toco)
Signed-off-by: Alexander Baransky
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gp
Add a DT binding for the Visionox G2647FB105, a 6.47 inch 1080x2340
MIPI-DSI CMD mode AMOLED panel used in:
- Xiaomi Mi Note 10 / CC9 Pro (sm7150-xiaomi-tucana)
- Xiaomi Mi Note 10 Lite (sm7150-xiaomi-toco)
Xiaomi likes to use different panels in various revisions of the same
device. A factory pan
This patch series adds support for the Visionox G2647FB105 panel, used in:
- Xiaomi Mi Note 10 / CC9 Pro (sm7150-xiaomi-tucana)
- Xiaomi Mi Note 10 Lite (sm7150-xiaomi-toco)
Testing has been done by me on sm7150-xiaomi-tucana. According to the
downstream DTS, this driver should be fully compatible
From: Rob Clark
Add support for exporting a dma_fence fd for a specific point on a
timeline. This is needed for vtest/vpipe[1][2] to implement timeline
syncobj support, as it needs a way to turn a point on a timeline back
into a dma_fence fd. It also closes an odd omission from the syncobj
UAPI
Hi Pekka,
On Thu, 27 Mar 2025 at 16:59, Pekka Paalanen
wrote:
> On Thu, 27 Mar 2025 16:21:16 +0200
> Tomi Valkeinen wrote:
> > On 27/03/2025 11:20, Pekka Paalanen wrote:
> > > On Wed, 26 Mar 2025 15:55:18 +0200
> > > Tomi Valkeinen wrote:
> > >> On 26/03/2025 15:52, Geert Uytterhoeven wrote:
>
On Thu, Mar 27, 2025 at 11:58 AM Maxime Ripard wrote:
> On Thu, Mar 27, 2025 at 10:55:39AM -0400, Anusha Srivatsa wrote:
> > Introduce reference counted allocations for panels to avoid
> > use-after-free. The patch adds the macro devm_drm_bridge_alloc()
> > to allocate a new refcounted panel. Fol
Start moving to the new refcounted allocations using
the new API devm_drm_panel_alloc(). Deprecate any other
allocation.
v2: make the documentation changes in v1 more precise (Maxime)
Reviewed-by: Luca Ceresoli
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/drm_panel.c | 5 +++--
1 file ch
When using a toolchain with gold as the default linker in Debian, the
kernel build fails:
x86_64-linux-gnu-ld: unknown linker
scripts/Kconfig.include:56: Sorry, this linker is not supported.
So force the use of the BFD linker. This was already part of the build
script but has now been moved to a
Add jobs to run dt_binding_check and dtbs_check. If warnings are seen,
exit with a non-zero error code while configuring them as warning in
the GitLab CI pipeline.
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/ci/check-devicetrees.yml | 38 ++
drivers/gpu/drm/ci/dt-binding
Add jobs to run KUnit tests using tools/testing/kunit/kunit.py tool.
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/ci/gitlab-ci.yml | 1 +
drivers/gpu/drm/ci/kunit.sh | 34
drivers/gpu/drm/ci/kunit.yml | 19 ++
3 files changed, 54 ins
Add jobs to validate devicetrees and run KUnit tests.
Pipeline link,
https://gitlab.freedesktop.org/vigneshraman/linux/-/pipelines/1390797
Vignesh Raman (3):
drm/ci: force use of BFD linker
drm/ci: Add jobs to validate devicetrees
drm/ci: Add jobs to run KUnit tests
drivers/gpu/drm/ci/bui
Thank you, Dmitry.
I will post a v2 of this patch, hopefully which is formatted properly.
Thanks,
Aaron
From: Dmitry Osipenko
Sent: Wednesday, March 26, 2025 8:36 PM
To: Aaron Ruby ; dri-devel@lists.freedesktop.org
Cc: gurchetansi...@chromium.org
Subject: [E
On Thu, 27 Mar 2025 16:21:16 +0200
Tomi Valkeinen wrote:
> Hi,
>
> On 27/03/2025 11:20, Pekka Paalanen wrote:
> > On Wed, 26 Mar 2025 15:55:18 +0200
> > Tomi Valkeinen wrote:
> >
> >> Hi,
> >>
> >> On 26/03/2025 15:52, Geert Uytterhoeven wrote:
> >>> Hi Tomi,
> >>>
> >>> On Wed, 26 Mar 202
On Thu, 27 Mar 2025 10:55:42 -0400, Anusha Srivatsa wrote:
> Start using the new helper that does the refcounted
> allocations.
>
> v2: check error condition (Luca)
>
>
> [ ... ]
Reviewed-by: Maxime Ripard
Thanks!
Maxime
On Thu, 27 Mar 2025 10:55:41 -0400, Anusha Srivatsa wrote:
> Start moving to the new refcounted allocations using
> the new API devm_drm_panel_alloc(). Deprecate any other
> allocation.
>
> v2: make the documentation changes in v1 more precise (Maxime)
>
> [ ... ]
Reviewed-by: Maxime Ripard
Th
On Thu, 27 Mar 2025 10:55:40 -0400, Anusha Srivatsa wrote:
> Allocate panel via reference counting. Add _get() and _put() helper
> functions to ensure panel allocations are refcounted. Avoid use after
> free by ensuring panel pointer is valid and can be usable till the last
> reference is put.
>
>
On Thu, Mar 27, 2025 at 10:55:39AM -0400, Anusha Srivatsa wrote:
> Introduce reference counted allocations for panels to avoid
> use-after-free. The patch adds the macro devm_drm_bridge_alloc()
> to allocate a new refcounted panel. Followed the documentation for
> drmm_encoder_alloc() and devm_drm_
On Thu, 27 Mar 2025 10:55:39 -0400, Anusha Srivatsa wrote:
> Introduce reference counted allocations for panels to avoid
> use-after-free. The patch adds the macro devm_drm_bridge_alloc()
> to allocate a new refcounted panel. Followed the documentation for
> drmm_encoder_alloc() and devm_drm_dev_al
Hi,
On Wed, Mar 26, 2025 at 1:08 AM Krzysztof Kozlowski wrote:
>
> On Tue, Mar 25, 2025 at 07:21:26PM +, Christopher Obbard wrote:
> > The Samsung ATNA40YK20 panel is a 14" AMOLED eDP panel. It is
> > similar to the ATNA33XC20 except that it is larger and has a
> > different resolution.
> >
>
From: Rob Clark
Add support for exporting a dma_fence fd for a specific point on a
timeline. This is needed for vtest/vpipe[1][2] to implement timeline
syncobj support, as it needs a way to turn a point on a timeline back
into a dma_fence fd. It also closes an odd omission from the syncobj
UAPI
Since the context-type additions to the virtio-gpu spec, these have been
defined locally in guest user-space, and virtio-gpu backend library code.
Now, these capsets have been stabilized, and should be defined in
a common space, in both the virtio_gpu header, and alongside the virtgpu_drm
interf
On 25/03/2025 20:04, Miguel Ojeda wrote:
On Tue, Mar 25, 2025 at 10:05 AM Jocelyn Falempe wrote:
Thanks, it looks good to me.
Reviewed-by: Jocelyn Falempe
You want to take the whole series in the rust tree?
Otherwise I can push the patch 1-2 to drm-misc-next if needed.
Please take them i
Am 27.03.25 um 14:52 schrieb Maíra Canal:
Hi Stefan,
On 27/03/25 07:57, Stefan Wahren wrote:
Hi Maíra,
Am 18.03.25 um 02:01 schrieb Maíra Canal:
In addition to the standard reset controller, V3D 7.x requires
configuring
the V3D_SMS registers for proper power on/off and reset. Add the new
regi
Hi Dave and Sima,
A few fixes for the 6.15 merge window:
drm-xe-next-fixes-2025-03-27:
Driver Changes:
- Fix NULL pointer dereference on error path
- Add missing HW workaround for BMG
- Fix survivability mode not triggering
- Fix build warning when DRM_FBDEV_EMULATION is not set
thanks,
Lucas D
I’d like to provide additional context regarding the necessity of these patches.
The shift from dynamic load balancing mode to fixed mode, with CCS usage
restricted to a single unit, has led to a notable performance regression, with
workloads experiencing an approximately 10% FPS drop.
For examp
On Wed, 26 Mar 2025 18:47:36 +0100, Luca Ceresoli wrote:
> DRM bridges are currently considered as a fixed element of a DRM card, and
> thus their lifetime is assumed to extend for as long as the card
> exists. New use cases, such as hot-pluggable hardware with video bridges,
> require DRM bridges
> > https://github.com/alyssarosenzweig/linux/commits/agx-uapi-v5 contains
> > the DRM driver implementing this proposed UAPI.
> >
> > https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33984 contains
> > the Mesa patches to implement this proposed UAPI.
> >
> > That Linux and Mesa branch to
This adds the UAPI for the Asahi driver targeting the GPU in the Apple
M1 and M2 series systems on chip. The UAPI design is based on other
modern Vulkan-capable drivers, including Xe and Panthor. Memory
management is based on explicit VM management. Synchronization is
exclusively explicit sync.
Th
Start using the new helper that does the refcounted
allocations.
v2: check error condition (Luca)
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-simple.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/
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