Hi Tobias,
On 03.03.2017 14:40, Tobias Jakobi wrote:
> Convert if-statements to switch statement. Removes
> duplicated code.
>
> Signed-off-by: Tobias Jakobi
> ---
> drivers/gpu/drm/exynos/exynos_mixer.c | 30 --
> 1 file changed, 8 insertions(+), 22 deletions(-)
>
>
https://bugs.freedesktop.org/show_bug.cgi?id=100068
--- Comment #3 from Hleb Valoshka <375...@gmail.com> ---
(In reply to Wojciech Pyczak from comment #2)
> Created attachment 130081 [details]
> Unigine Heaven output
>
> Looks like it's not all, glxgears works fine though.
Looks like Marek has f
On Sat, 2017-03-04 at 14:36 +, Dan MacDonald wrote:
> Hi Phillip
>
> $ git fetch https://git.pengutronix.de/git/pza/linux.git
> tags/v4.10-ipu-dp-plane-fix
> fatal: Not a git repository (or any of the parent directories): .git
>
>
> I get the same error for:
>
> git fetch https://git.pengut
https://bugs.freedesktop.org/show_bug.cgi?id=100077
Bug ID: 100077
Summary: libdrm atomic_add_unless() may reverse return value
meaning
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: BSD (Oth
On Fri, 2017-03-03 at 19:25 +0100, Lucas Stach wrote:
[...]
> > > +int ipu_pre_get(struct ipu_pre *pre)
> > > +{
> > > + u32 val;
> > > +
> > > + if (pre->in_use)
> > > + return -EBUSY;
> >
> > This could race for in_use ...
>
> All the PRE/PRG configuration functions are thread unsafe, w
On 03.03.2017 14:40, Tobias Jakobi wrote:
> The output stage of the mixer uses YCbCr for the internal
> computations, which is the reason that some registers take
> YCbCr related data as input. In particular this applies
> to MXR_BG_COLOR{0,1,2} and MXR_CM_COEFF_{Y,CB,CR}.
>
> Document the formatti
Hi Dave,
drm-misc-fixes-2017-03-06:
Just 1 8bpc quirk from Ville, cc: stable
I somehow lost this patch for 2 weeks despite that my status script showed
me that there's something pending. Oh well, here it is :(
Cheers, Daniel
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae9
Hello Andrzej,
Andrzej Hajda wrote:
> Hi Tobias,
>
> On 03.03.2017 14:40, Tobias Jakobi wrote:
>> Convert if-statements to switch statement. Removes
>> duplicated code.
>>
>> Signed-off-by: Tobias Jakobi
>> ---
>> drivers/gpu/drm/exynos/exynos_mixer.c | 30 --
>> 1 f
Hello Andrzej,
Andrzej Hajda wrote:
> On 03.03.2017 14:40, Tobias Jakobi wrote:
>> The output stage of the mixer uses YCbCr for the internal
>> computations, which is the reason that some registers take
>> YCbCr related data as input. In particular this applies
>> to MXR_BG_COLOR{0,1,2} and MXR_C
Hi Dave,
drm-misc-next-2017-03-06:
First slice of drm-misc-next for 4.12:
Core/subsystem-wide:
- link status core patch from Manasi, for signalling link train fail
to userspace. I also had the i915 patch in here, but that had a
small buglet in our CI, so reverted.
- more debugfs_remove remova
Hi,
On 3/2/2017 4:17 PM, Laurent Pinchart wrote:
The LVDS encoder driver is a DRM bridge driver that supports the
parallel to LVDS encoders that don't require any configuration. The
driver thus doesn't interact with the device, but creates an LVDS
connector for the panel and exposes its size and
On Tue, Feb 28, 2017 at 06:13:15PM +0100, Daniel Vetter wrote:
> From: Markus Heiser
>
> This patch brings scalable figure, image handling and a concept to
> embed *render* markups:
>
> * DOT (http://www.graphviz.org)
> * SVG
>
> For image handling use the 'image' replacement::
>
> .. kern
On Fri, Mar 03, 2017 at 06:05:15PM +, Jose Abreu wrote:
> Hi Alexey,
>
>
> On 03-03-2017 13:27, Alexey Brodkin wrote:
> >
> > So if I understood you correct here what I really need is just to get rid
> > of existing check,
> > right? I.e. the following is to be in v2 respin:
> >
On Fri, Mar 03, 2017 at 10:46:03AM -0800, Laura Abbott wrote:
> On 03/03/2017 08:39 AM, Laurent Pinchart wrote:
> > Hi Daniel,
> >
> > On Friday 03 Mar 2017 10:56:54 Daniel Vetter wrote:
> >> On Thu, Mar 02, 2017 at 01:44:38PM -0800, Laura Abbott wrote:
> >>> Now that we call dma_map in the dma_bu
On Fri, Mar 03, 2017 at 10:50:20AM -0800, Laura Abbott wrote:
> On 03/03/2017 08:41 AM, Laurent Pinchart wrote:
> > Hi Laura,
> >
> > Thank you for the patch.
> >
> > On Thursday 02 Mar 2017 13:44:42 Laura Abbott wrote:
> >> When CMA was first introduced, its primary use was for DMA allocation
>
On Fri, Mar 03, 2017 at 06:45:40PM +0200, Laurent Pinchart wrote:
> - I haven't seen any proposal how a heap-based solution could be used in a
> generic distribution. This needs to be figured out before committing to any
> API/ABI.
Two replies from my side:
- Just because a patch doesn't solve
On Mon, Mar 06, 2017 at 08:42:59AM +0100, Michal Hocko wrote:
> On Fri 03-03-17 09:37:55, Laura Abbott wrote:
> > On 03/03/2017 05:29 AM, Michal Hocko wrote:
> > > On Thu 02-03-17 13:44:32, Laura Abbott wrote:
> > >> Hi,
> > >>
> > >> There's been some recent discussions[1] about Ion-like framework
On 03/03/2017 06:22 PM, Jose Abreu wrote:
> Hi Neil,
>
>
> On 03-03-2017 16:42, Neil Armstrong wrote:
>>
>> Sure, I was meaning the *input* format the controller receives from the
>> pixel encoder, I'm quite sure the format is strict.
>>
>
> Hmm, not quite following you here. As far as the contr
https://bugs.freedesktop.org/show_bug.cgi?id=100058
--- Comment #4 from Adam Wolk ---
Here is the xrandr output.
[mulander@napalm ~]$ xrandr
Screen 0: minimum 8 x 8, current 3286 x 1080, maximum 32767 x 32767
eDP1 connected 1366x768+1920+0 (normal left inverted right x axis y axis) 340mm
x 190mm
On Mon, Mar 06, 2017 at 11:40:41AM +0100, Daniel Vetter wrote:
> No one gave a thing about android in upstream, so Greg KH just dumped it
> all into staging/android/. We've discussed ION a bunch of times, recorded
> anything we'd like to fix in staging/android/TODO, and Laura's patch
> series here
On Mon, Mar 06, 2017 at 12:01:51AM +0100, Pavel Machek wrote:
> Hi!
>
> > > mplayer stopped working after a while. Dmesg says:
> > >
> > > [ 3000.266533] cdc_ether 2-1.2:1.0 usb0: register 'cdc_ether' at
>
> Now I'm pretty sure it is a regression in v4.11-rc0. Any ideas what to
> try? Bisect wil
From: Christian König
Most BIOS don't enable this because of compatibility reasons.
Manually enable a 64bit BAR of 64GB size so that we have
enough room for PCI devices.
Signed-off-by: Christian König
---
arch/x86/pci/fixup.c | 53
1 file c
From: Christian König
Just the defines and helper functions to read the possible sizes of a BAR and
update it's size.
See
https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf.
v2: provide read helper as well
Signed-off-by: Christian König
---
driver
From: Christian König
This allows device drivers to request resizing their BARs.
The function only tries to reprogram the windows of the bridge directly above
the requesting device and only the BAR of the same type (usually mem, 64bit,
prefetchable). This is done to make sure not to disturb othe
From: Christian König
The address is 64bit, not 32bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
inde
From: Christian König
Try to resize BAR0 to let CPU access all of VRAM.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 +
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 8 +---
https://bugs.freedesktop.org/show_bug.cgi?id=100063
Grazvydas Ignotas changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop
On Mon, Mar 06, 2017 at 11:15:28AM +, Chris Wilson wrote:
> On Mon, Mar 06, 2017 at 12:01:51AM +0100, Pavel Machek wrote:
> > Hi!
> >
> > > > mplayer stopped working after a while. Dmesg says:
> > > >
> > > > [ 3000.266533] cdc_ether 2-1.2:1.0 usb0: register 'cdc_ether' at
> >
> > Now I'm pr
Sorry I've hit enter to soon.
This set of patches tries to implement support for resizeable BARs
including an example of how the AMD GFX device driver can make use of it
to gain full CPU access to the VRAM on the hardware.
Patch #1 is just the second version of the basic RBAR support I've sen
On Mon, Mar 6, 2017 at 1:40 PM, Christian König wrote:
> From: Christian König
>
> The address is 64bit, not 32bit.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/
On Mon, Mar 6, 2017 at 1:40 PM, Christian König wrote:
> From: Christian König
>
> Try to resize BAR0 to let CPU access all of VRAM.
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -616,6 +616,35 @@ void amdgpu_gtt_location(struct amdgpu
Am 06.03.2017 um 13:00 schrieb Andy Shevchenko:
On Mon, Mar 6, 2017 at 1:40 PM, Christian König wrote:
From: Christian König
The address is 64bit, not 32bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
On Mon 2017-03-06 11:15:28, Chris Wilson wrote:
> On Mon, Mar 06, 2017 at 12:01:51AM +0100, Pavel Machek wrote:
> > Hi!
> >
> > > > mplayer stopped working after a while. Dmesg says:
> > > >
> > > > [ 3000.266533] cdc_ether 2-1.2:1.0 usb0: register 'cdc_ether' at
> >
> > Now I'm pretty sure it i
Am 01.12.2016 um 02:21 schrieb Andy Shevchenko:
There is no need to repeat information that printed by PCI core at boot time.
Besides that printing was potentially wrong since resource_size_t might be
bigger than 32 bits and there is a dedicated specifier for such type, i.e.
%pap. Someone can fi
On Mon, Mar 6, 2017 at 1:40 PM, Christian König wrote:
> From: Christian König
>
> Just the defines and helper functions to read the possible sizes of a BAR and
> update it's size.
>
> See
> https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf.
>
> v2: p
On Mon, Mar 06, 2017 at 01:10:48PM +0100, Pavel Machek wrote:
> On Mon 2017-03-06 11:15:28, Chris Wilson wrote:
> > On Mon, Mar 06, 2017 at 12:01:51AM +0100, Pavel Machek wrote:
> > > Hi!
> > >
> > > > > mplayer stopped working after a while. Dmesg says:
> > > > >
> > > > > [ 3000.266533] cdc_eth
Am 06.03.2017 um 13:06 schrieb Andy Shevchenko:
On Mon, Mar 6, 2017 at 1:40 PM, Christian König wrote:
From: Christian König
Try to resize BAR0 to let CPU access all of VRAM.
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -616,6 +616,35 @@
On 03/06/2017 01:17 PM, Jose Abreu wrote:
> Hi Neil,
>
>
> On 06-03-2017 10:41, Neil Armstrong wrote:
>> On 03/03/2017 06:22 PM, Jose Abreu wrote:
>>> Hi Neil,
>>>
>>>
>>> On 03-03-2017 16:42, Neil Armstrong wrote:
Sure, I was meaning the *input* format the controller receives from the
On Sun, Mar 05, 2017 at 06:00:31PM +0800, Randy Li wrote:
> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits
> per channel video format.
>
> P016 is a planar 4:2:0 YUV with interleaved UV plane, 16 bits
> per channel video format.
>
> V3: Added P012 and fixed cpp for P010
> V4: forma
Am 06.03.2017 um 11:12 schrieb Daniel Vetter :
> Just to avoid confusion: Markus&I chatted a bit in private, and he
> volunteered to take over, and fix the few issues that need to be fixed in
> his original patch:
> - drop the convertsvg python fallback, since we need convert anyway
> - relative
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
CC: Beomho Seo
Signed-off-by: Julia Lawall
Signed-off-by: Fengguang Wu
---
I also received the following warning from kbuild, without any other
information:
drivers/input/touchscreen/fts_ts.c:750:1-6: WARNING:
Hi Daniel,
On Monday 06 Mar 2017 11:32:04 Daniel Vetter wrote:
> On Fri, Mar 03, 2017 at 10:50:20AM -0800, Laura Abbott wrote:
> > On 03/03/2017 08:41 AM, Laurent Pinchart wrote:
> >> On Thursday 02 Mar 2017 13:44:42 Laura Abbott wrote:
> >>> When CMA was first introduced, its primary use was for
On Mon, 2017-03-06 at 09:55 +, Dan MacDonald wrote:
> Hi Phillipp
>
> I've just tried those commands on my work machine where we allow
> (need) git access and I get the same errors as I did at home.
>
> Thanks
>
> On Mon, Mar 6, 2017 at 8:39 AM, Philipp Zabel wrote:
> > On Sat, 2017-03-04 at
https://bugs.freedesktop.org/show_bug.cgi?id=100058
--- Comment #5 from Alex Deucher ---
Possibly a duplicate of bug 99387.
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Hello Hoegeun,
On 02/21/2017 10:09 PM, Hoegeun Kwon wrote:
> The Samsung s6e3ha2 is a 5.7" 1440x2560 AMOLED panel connected
> using MIPI-DSI interfaces.
>
> Signed-off-by: Donghwa Lee
> Signed-off-by: Hyungwon Hwang
> Signed-off-by: Hoegeun Kwon
> Reviewed-by: Andrzej Hajda
> Acked-by: Rob He
Hello Hoegeun,
On 02/21/2017 10:09 PM, Hoegeun Kwon wrote:
> From: Hyungwon Hwang
>
> This patch add the panel device tree node for S6E3HA2 display
> controller to TM2 dts.
>
> Signed-off-by: Hyungwon Hwang
> Signed-off-by: Andrzej Hajda
> Signed-off-by: Chanwoo Choi
> Signed-off-by: Hoegeun
From: Kieran Bingham
The interface to configure the LIF in the VSP1 requires adapting the
function prototype for any changes. This makes extending the interface
difficult.
Change the function prototype to pass a structure which can be easily
extended.
This changes the means of disabling the pip
Hi Daniel,
On Monday 06 Mar 2017 11:38:20 Daniel Vetter wrote:
> On Fri, Mar 03, 2017 at 06:45:40PM +0200, Laurent Pinchart wrote:
> > - I haven't seen any proposal how a heap-based solution could be used in a
> > generic distribution. This needs to be figured out before committing to
> > any API/
On Sun, Mar 05, 2017 at 03:10:32AM +0200, Laurent Pinchart wrote:
> The page flip event is armed in the atomic begin handler, creating a
> race condition with the frame end interrupt that could send the event
> before the atomic operation actually completes. To avoid that, arm the
> event in the at
On Mon, Mar 06, 2017 at 02:13:00PM +0100, Markus Heiser wrote:
>
> Am 06.03.2017 um 11:12 schrieb Daniel Vetter :
>
> > Just to avoid confusion: Markus&I chatted a bit in private, and he
> > volunteered to take over, and fix the few issues that need to be fixed in
> > his original patch:
> > - dr
Hi Daniel,
On Monday 06 Mar 2017 16:02:00 Daniel Vetter wrote:
> On Sun, Mar 05, 2017 at 03:10:32AM +0200, Laurent Pinchart wrote:
> > The page flip event is armed in the atomic begin handler, creating a
> > race condition with the frame end interrupt that could send the event
> > before the atomi
https://bugs.freedesktop.org/show_bug.cgi?id=99955
--- Comment #2 from Alex Deucher ---
https://lists.freedesktop.org/archives/mesa-dev/2017-March/146699.html
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https://bugs.freedesktop.org/show_bug.cgi?id=95306
--- Comment #65 from pog...@hotmail.it ---
Was an HP Pavilion 17-g154nl, with a CentOS 7.3 (1611) and
3.10.0-514.el7.x86_64.
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On Mon, 2017-03-06 at 14:28 +, Dan MacDonald wrote:
> Hi Phillipp
>
> I did suspect I would have to check out another repo first but I
> wasn't sure which. Is that 4th command:
>
> git checkout -b "branchname" FETCH_HEAD
>
> The exact command I should run? "branchname" sounds a bit generic.
From: Mihail Atanassov
The rate of mclk depends on the use-case. If no downscaling is required,
then mclk == pxlclk is a valid option; with downscaling however, the
rate at which mclk runs determines how much a plane can be downscaled
before composition. This is a system integration + power manag
From: Mihail Atanassov
Use rectangle 1 as a generic plane. Existing code already sets the smart
layer bounding box size + offset. The rectangles' offsets are relative
to the bounding box, so there is no need to set R1's offset (reset value
is 0), just its size which is the same as the bounding bo
A couple of fixes that I have queued in my tree waiting for the
dust to settle on the main drm pull request.
Best regards,
Liviu
Mihail Atanassov (2):
drm: mali-dp: Remove mclk rate management
drm: mali-dp: Fix smart layer not going to composition
drivers/gpu/drm/arm/malidp_crtc.c | 3 +-
On Mon, Mar 06, 2017 at 03:43:53PM +0200, Laurent Pinchart wrote:
> Hi Daniel,
>
> On Monday 06 Mar 2017 11:32:04 Daniel Vetter wrote:
> > On Fri, Mar 03, 2017 at 10:50:20AM -0800, Laura Abbott wrote:
> > > On 03/03/2017 08:41 AM, Laurent Pinchart wrote:
> > >> On Thursday 02 Mar 2017 13:44:42 Lau
https://bugs.freedesktop.org/show_bug.cgi?id=99955
Alex Deucher changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On Mon, Mar 06, 2017 at 05:02:05PM +0200, Laurent Pinchart wrote:
> Hi Daniel,
>
> On Monday 06 Mar 2017 11:38:20 Daniel Vetter wrote:
> > On Fri, Mar 03, 2017 at 06:45:40PM +0200, Laurent Pinchart wrote:
> > > - I haven't seen any proposal how a heap-based solution could be used in a
> > > generi
On Mon, Mar 06, 2017 at 11:58:05AM +0100, Mark Brown wrote:
> On Mon, Mar 06, 2017 at 11:40:41AM +0100, Daniel Vetter wrote:
>
> > No one gave a thing about android in upstream, so Greg KH just dumped it
> > all into staging/android/. We've discussed ION a bunch of times, recorded
> > anything we'
Hi Geert,
Thank you for the patch.
On Monday 06 Mar 2017 17:25:56 Geert Uytterhoeven wrote:
> Document the optional properties for describing module resets, to
> support resetting display channels and LVDS encoders on R-Car Gen2 and
> Gen3.
>
> Signed-off-by: Geert Uytterhoeven
This looks good
Hi Laurent,
On Mon, Mar 6, 2017 at 5:32 PM, Laurent Pinchart
wrote:
> On Monday 06 Mar 2017 17:25:56 Geert Uytterhoeven wrote:
>> Document the optional properties for describing module resets, to
>> support resetting display channels and LVDS encoders on R-Car Gen2 and
>> Gen3.
>>
>> Signed-off-b
Hi Geert,
On Monday 06 Mar 2017 17:36:41 Geert Uytterhoeven wrote:
> On Mon, Mar 6, 2017 at 5:32 PM, Laurent Pinchart wrote:
> > On Monday 06 Mar 2017 17:25:56 Geert Uytterhoeven wrote:
> >> Document the optional properties for describing module resets, to
> >> support resetting display channels a
On Fri, Mar 03, 2017 at 11:39:45AM +, John Keeping wrote:
> This reset is required in order to fully reset the internal state of the
> MIPI controller.
>
> Signed-off-by: John Keeping
I'm sorry I missed this in my review. Adding Rob Herring directly for his ack.
Also,
Reviewed-by: Sean Pau
On 6 March 2017 at 10:29, Daniel Vetter wrote:
> On Fri, Mar 03, 2017 at 10:46:03AM -0800, Laura Abbott wrote:
>> On 03/03/2017 08:39 AM, Laurent Pinchart wrote:
>> > Hi Daniel,
>> >
>> > On Friday 03 Mar 2017 10:56:54 Daniel Vetter wrote:
>> >> On Thu, Mar 02, 2017 at 01:44:38PM -0800, Laura Abbo
On Fri, Mar 03, 2017 at 02:39:32PM +0100, Tomeu Vizoso wrote:
> Hi,
>
> this series builds up on the API for exposing captured CRCs through
> debugfs.
>
> It adds new DP helpers for starting and stopping CRC capture and gets
> the Rockchip driver to use it.
>
> With these patches, tests in IGT s
https://bugs.freedesktop.org/show_bug.cgi?id=99841
--- Comment #10 from Elimar Riesebieter ---
There is no change in 4.11-rc1
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tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: fefda0d99ee9245f0d4032eedb3b18cc690d8194
commit: 79c1da7c3bf74be9b1dae9450ef79f32dd22def6 [613/621] drm/dp: add helpers
for capture of frame CRCs
config: x86_64-randconfig-x010-201710 (attached as .config)
compiler: gcc-6 (Debian 6.
Hi Tomeu,
Pardon for dropping in late.
On 3 March 2017 at 13:39, Tomeu Vizoso wrote:
> Implement the .set_crc_source() callback and call the DP helpers
> accordingly to start and stop CRC capture.
>
> This is only done if this CRTC is currently using the eDP connector.
>
> v3: Remove superfluous
On Tue, Mar 07, 2017 at 01:58:23AM +0800, Ayaka wrote:
>
>
> 從我的 iPad 傳送
>
> > Ville Syrjälä 於 2017年3月6日 下午9:06 寫道：
> >
> >> On Sun, Mar 05, 2017 at 06:00:31PM +0800, Randy Li wrote:
> >> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits
> >> per channel video format.
> >>
> >> P0
On 03/06/2017 07:52 AM, Daniel Vetter wrote:
> On Mon, Mar 06, 2017 at 03:43:53PM +0200, Laurent Pinchart wrote:
>> Hi Daniel,
>>
>> On Monday 06 Mar 2017 11:32:04 Daniel Vetter wrote:
>>> On Fri, Mar 03, 2017 at 10:50:20AM -0800, Laura Abbott wrote:
On 03/03/2017 08:41 AM, Laurent Pinchart wr
On 03/06/2017 09:00 AM, Emil Velikov wrote:
> On 6 March 2017 at 10:29, Daniel Vetter wrote:
>> On Fri, Mar 03, 2017 at 10:46:03AM -0800, Laura Abbott wrote:
>>> On 03/03/2017 08:39 AM, Laurent Pinchart wrote:
Hi Daniel,
On Friday 03 Mar 2017 10:56:54 Daniel Vetter wrote:
> On T
https://bugs.freedesktop.org/show_bug.cgi?id=95306
--- Comment #66 from Tamás Tóth ---
(In reply to poggif from comment #65)
> Was an HP Pavilion 17-g154nl, with a CentOS 7.3 (1611) and
> 3.10.0-514.el7.x86_64.
Aaah, idk when amdgpu appeared in the kernel, perhaps it wasn't even present
there.
https://bugzilla.kernel.org/show_bug.cgi?id=95771
Szőgyényi Gábor (szg0...@freemail.hu) changed:
What|Removed |Added
CC||szg0...@freemail.hu
https://bugzilla.kernel.org/show_bug.cgi?id=103881
Szőgyényi Gábor (szg0...@freemail.hu) changed:
What|Removed |Added
CC||szg0...@freemail.h
https://bugs.freedesktop.org/show_bug.cgi?id=95306
--- Comment #67 from Alex Deucher ---
(In reply to Tamás Tóth from comment #66)
> (In reply to poggif from comment #65)
> > Was an HP Pavilion 17-g154nl, with a CentOS 7.3 (1611) and
> > 3.10.0-514.el7.x86_64.
>
> Aaah, idk when amdgpu appeared
https://bugzilla.kernel.org/show_bug.cgi?id=105581
Szőgyényi Gábor (szg0...@freemail.hu) changed:
What|Removed |Added
CC||szg0...@freemail.h
https://bugzilla.kernel.org/show_bug.cgi?id=60674
--- Comment #17 from Szőgyényi Gábor (szg0...@freemail.hu) ---
Please try to reproduce this bug with latest kernel image.
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https://bugzilla.kernel.org/show_bug.cgi?id=62541
--- Comment #3 from Szőgyényi Gábor (szg0...@freemail.hu) ---
Please try to reproduce this bug with latest kernel image & latest systemd.
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This set fixes 3 compile/linker errors when certain CONFIG options are not
defined.
Sean Paul (3):
drm: Fix compilation error when CONFIG_DEBUG_FS is undefined
drm/rockchip: Fix link error when CONFIG_DRM_ANALOGIX_DP undefined
drm/msm: Fix compilation error when CONFIG_DEBUG_FS undefined
Fixes the following link error when CONFIG_DRM_ANALOGIX_DP is not defined:
ERROR: "analogix_dp_start_crc" [drivers/gpu/drm/rockchip/rockchipdrm.ko]
undefined!
ERROR: "analogix_dp_stop_crc" [drivers/gpu/drm/rockchip/rockchipdrm.ko]
undefined!
Fixes: 3190e58dafaf ("drm/rockchip: Implement CRC deb
This patch fixes the following compilation error when CONFIG_DEBUG_FS is not
defined.
../drivers/gpu/drm/drm_dp_helper.c: In function ‘drm_dp_aux_crc_work’:
../drivers/gpu/drm/drm_dp_helper.c:1029:13: error: ‘struct drm_crtc’ has no
member named ‘crc’
../drivers/gpu/drm/drm_dp_helper.c:1031:12:
Fixes the following compilation error when CONFIG_DEBUG_FS undefined:
CC [M] drivers/gpu/drm/msm/adreno/a5xx_gpu.o
../drivers/gpu/drm/msm/adreno/a5xx_gpu.c:863:3: error: unknown field ‘show’
specified in initializer
../drivers/gpu/drm/msm/adreno/a5xx_gpu.c:863:11: error: ‘a5xx_show’ undeclared
On Mon, Mar 06, 2017 at 03:27:15PM -0500, Sean Paul wrote:
> Fixes the following compilation error when CONFIG_DEBUG_FS undefined:
>
> CC [M] drivers/gpu/drm/msm/adreno/a5xx_gpu.o
> ../drivers/gpu/drm/msm/adreno/a5xx_gpu.c:863:3: error: unknown field ‘show’
> specified in initializer
> ../driver
On 6 March 2017 at 20:27, Sean Paul wrote:
> Fixes the following compilation error when CONFIG_DEBUG_FS undefined:
>
> CC [M] drivers/gpu/drm/msm/adreno/a5xx_gpu.o
> ../drivers/gpu/drm/msm/adreno/a5xx_gpu.c:863:3: error: unknown field ‘show’
> specified in initializer
> ../drivers/gpu/drm/msm/ad
On 6 March 2017 at 20:27, Sean Paul wrote:
> Fixes the following link error when CONFIG_DRM_ANALOGIX_DP is not defined:
>
> ERROR: "analogix_dp_start_crc" [drivers/gpu/drm/rockchip/rockchipdrm.ko]
> undefined!
> ERROR: "analogix_dp_stop_crc" [drivers/gpu/drm/rockchip/rockchipdrm.ko]
> undefined!
Hi Christopher,
On Mon, Mar 6, 2017 at 6:40 PM, wrote:
> From: Christopher Spinrath
>
> On some boards the hpd pin of a hdmi connector is wired up to a gpio
> pin. Since in the DRM world the tfp410 driver is responsible for
> handling the connector, add support for hpd gpios in this very driver
On Mon, Mar 06, 2017 at 08:58:14PM +, Emil Velikov wrote:
> On 6 March 2017 at 20:27, Sean Paul wrote:
> > Fixes the following link error when CONFIG_DRM_ANALOGIX_DP is not defined:
> >
> > ERROR: "analogix_dp_start_crc" [drivers/gpu/drm/rockchip/rockchipdrm.ko]
> > undefined!
> > ERROR: "ana
On Mon, Mar 06, 2017 at 01:35:38PM -0700, Jordan Crouse wrote:
> On Mon, Mar 06, 2017 at 03:27:15PM -0500, Sean Paul wrote:
> > Fixes the following compilation error when CONFIG_DEBUG_FS undefined:
> >
> > CC [M] drivers/gpu/drm/msm/adreno/a5xx_gpu.o
> > ../drivers/gpu/drm/msm/adreno/a5xx_gpu.c:8
On Mon, Mar 06, 2017 at 03:27:13PM -0500, Sean Paul wrote:
> This patch fixes the following compilation error when CONFIG_DEBUG_FS is not
> defined.
>
> ../drivers/gpu/drm/drm_dp_helper.c: In function ‘drm_dp_aux_crc_work’:
> ../drivers/gpu/drm/drm_dp_helper.c:1029:13: error: ‘struct drm_crtc’ ha
On Mon, Mar 06, 2017 at 06:15:12PM -0500, Sean Paul wrote:
> On Mon, Mar 06, 2017 at 08:58:14PM +, Emil Velikov wrote:
> > On 6 March 2017 at 20:27, Sean Paul wrote:
> > > Fixes the following link error when CONFIG_DRM_ANALOGIX_DP is not defined:
> > >
> > > ERROR: "analogix_dp_start_crc" [dri
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/i915/i915_debugfs.c
between commits:
418e3cd80051 ("drm/i915: Show the current i915_params in
debugfs/i915_capabilites")
317eaa95081b ("drm/i915/debugfs: Add i915_hpd_storm_ctl")
from the drm-intel
Hi all,
Today's linux-next merge of the sunxi tree got a conflict in:
drivers/gpu/drm/sun4i/sun4i_drv.c
between commit:
50480a78e282 ("drm: sun4i: use vblank hooks in struct drm_crtc_funcs")
from the drm-misc tree and commit:
1c313a69e3ea ("drm/sun4i: Move layers from sun4i_drv to sun4i
Hi all,
After merging the sunxi tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/gpu/drm/sun4i/sun4i_crtc.c: In function 'sun4i_crtc_enable_vblank':
drivers/gpu/drm/sun4i/sun4i_crtc.c:109:31: error: 'struct sun4i_crtc' has no
member named 'drv'
struct sun4i_drv
1a67375839bc:
drm/i915: Update DRIVER_DATE to 20170306 (2017-03-06 08:34:44 +0100)
4 weeks worth of stuff since I was traveling&lazy:
- lspcon improvements (Imre)
- proper atomic state for cdclk handling (Ville)
- gpu reset improvem
Hi all,
In the 4.11 drm pull request Linus raised a few things that we need to discuss:
Late driver/enabling pull requests
--
Imo this isn't as one-sided as Linus made it sound, we've had the policy of
pulling new drivers and enabling for new hw very late in the m
Worst case if the hw can't support completion signalling in a
race-free way we want the event to be too late, not too early.
Text adapted from a proposal from Laurent - the other side of how to
make hw work correctly where it's possible is imo already sufficiently
documented.
Cc: Laurent Pinchart
https://bugs.freedesktop.org/show_bug.cgi?id=100091
Bug ID: 100091
Summary: Failure to create folder for on-disk shader cache
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
On 22 January 2017 at 18:48, Emil Velikov wrote:
> All one needs is to establish if dev->fd is the flink (primary/card)
> node, rather than use DRM_IOCTL_GET_CLIENT to query the auth status.
>
> The latter is [somewhat] deprecated and incorrect. We need to know [and
> store] the primary node FD, s
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