On 2023/3/16 15:18, Christian König wrote:
Am 15.03.23 um 22:15 schrieb Sui Jingfeng:
From: suijingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even has been included
On Fri, Mar 17, 2023 at 5:46 PM Jeffrey Hugo wrote:
>
> On 3/17/2023 8:04 AM, Maxime Ripard wrote:
> > On Thu, Mar 16, 2023 at 11:04:05AM -0600, Jeffrey Hugo wrote:
> >> On 3/14/2023 3:59 AM, Jacek Lawrynowicz wrote:
> >>> Hi
> >>>
> >>> On 06.03.2023 22:34, Jeffrey Hugo wrote:
> Add
This is a note to let you know that I've just added the patch titled
drm/ttm: Fix a NULL pointer dereference
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
On 3/20/2023 1:38 AM, Andi Shyti wrote:
Hi Nirmoy,
On Thu, Mar 16, 2023 at 06:22:19PM +0100, Nirmoy Das wrote:
Implement i915_gem_fb_mmap() to enable fb_ops.fb_mmap()
callback for i915's framebuffer objects.
v2: add a comment why i915_gem_object_get() needed(Andi).
Cc: Matthew Auld
Cc:
On Sun, Mar 19, 2023 at 1:55 PM Adam Ford wrote:
>
> When dynamically switching lanes was removed, the intent of the code
> was to check to make sure that higher speed items used 4 lanes, but
> it had the unintended consequence of removing the slower speeds for
> 4-lane users.
>
> This attempts
Geert, Helge? Do you have further comments? There's not really much
for a v3 yet.
Best regards
Thomas
Am 09.03.23 um 17:00 schrieb Thomas Zimmermann:
Introduce struct option_iter and helpers to parse command-line
options with comma-separated key-value pairs. Then convert fbdev
drivers to
On 3/19/23 18:57, Jonathan Cameron wrote:
On Fri, 17 Mar 2023 16:40:16 +0200
Matti Vaittinen wrote:
Support ROHM BU27034 ALS sensor
Hi Matti,
For ease of when this is ready to apply, better to just keep
key mailing lists and individuals cc'd on all patches.
Right. Sorry about this. I
On Sun, 19 Mar 2023, Ashutosh Dixit wrote:
> This reverts commit ee892ea83d99610fa33bea612de058e0955eec3a.
>
> 0349c41b0596 ("drm/i915/hwmon: Enable PL1 power limit") was reverted in
> 05d5562e401e ("Revert "drm/i915/hwmon: Enable PL1 power limit"") but has
> appeared again as ee892ea83d99
On Mon, 20 Mar 2023, Nirmoy Das wrote:
> Add a helper function to retrieve struct intel_fbdev from
> struct drm_fb_helper.
>
> Cc: Matthew Auld
> Cc: Andi Shyti
> Cc: Ville Syrjälä
> Cc: Jani Nikula
> Cc: Imre Deak
> Signed-off-by: Nirmoy Das
Reviewed-by: Jani Nikula
> ---
>
Hi,
On 18/03/2023 23:33, Kevin Groeneveld wrote:
Previously EOT packets were only being enabled when
MIPI_DSI_CLOCK_NON_CONTINUOUS was set in the dsi_mode_flags. However this
really should be based on MIPI_DSI_MODE_NO_EOT_PACKET instead.
Some displays require EOT packets and a continuous clock
On 2/25/2023 12:08 PM, Simon Ser wrote:
> Reviewed-by: Simon Ser
Hi Simon,
so how about taking this one? I can't see it in git yet (but maybe I'm looking
at the wrong branch).
Petr T
(Sorry about this, MTA delivered a bunch of stuff very late.)
On 3 Mar 2023, Luis Chamberlain verbalised:
> Stupid question, if you're removing MODULE_LICENSE() than why keep the
> other stupid MODULE_*() crap too? If its of no use, be gone!
I wish, but when I tried it it broke stuff. At least
On 2023-03-20 11:13, Javier Martinez Canillas wrote:
Thomas Zimmermann writes:
[...]
+ /*
+ * If a driver asked to unregister a platform device registered
by
+ * sysfb, then can be assumed that this is a driver for a
display
+ * that is set up by the system firmware and has
On 07-03-23, 12:58, Uwe Kleine-König wrote:
> Hello,
>
> this patch series adapts the platform drivers below drivers/phy to use the
> .remove_new() callback. Compared to the traditional .remove() callback
> .remove_new() returns no value. This is a good thing because the driver core
> doesn't
Hi
Am 20.03.23 um 02:47 schrieb Samuel Čavoj:
Hi,
diff --git a/drivers/video/aperture.c b/drivers/video/aperture.c
index f42a0d8bc211..101e13c2cf41 100644
--- a/drivers/video/aperture.c
+++ b/drivers/video/aperture.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
From: Sui Jingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even has been included in Loongson BMC products.
This display controller is a PCI device, it has two display pipe.
From: Sui Jingfeng
This patch add myself as maintainer to fix following warning when run
./scripts/checkpatch.pl
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
Signed-off-by: Sui Jingfeng
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git
I'm a bit late, but still
Acked-by: Thomas Zimmermann
for the series. Thanks for this cleanup.
Best regards
Thomas
Am 19.03.23 um 00:53 schrieb Uwe Kleine-König:
Hello,
this series adapts the platform drivers below drivers/video/fbdev to use the
.remove_new() callback. Compared to the
If stolen memory allocation fails for fbdev, the driver will
fallback to system memory. Calculation of smem_start is wrong
for such framebuffer objs if the platform comes with no gmadr or
no aperture. Solve this by adding fb_mmap callback which will
use GTT if aperture is available otherwise will
Add a helper function to retrieve struct intel_fbdev from
struct drm_fb_helper.
Cc: Matthew Auld
Cc: Andi Shyti
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Imre Deak
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 23 ++
1 file changed, 10
Implement i915_gem_fb_mmap() to enable fb_ops.fb_mmap()
callback for i915's framebuffer objects.
v2: add a comment why i915_gem_object_get() needed(Andi).
Cc: Matthew Auld
Cc: Andi Shyti
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Imre Deak
Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
---
Thomas Zimmermann writes:
[...]
>>> + /*
>>> + * If a driver asked to unregister a platform device registered by
>>> + * sysfb, then can be assumed that this is a driver for a display
>>> + * that is set up by the system firmware and has a generic driver.
>>> + *
>>> + *
Hi,
On Sat, 18 Mar 2023 20:07:45 +0100, Uwe Kleine-König wrote:
> this series adapts the platform drivers below drivers/gpu/drm/bridge to use
> the
> .remove_new() callback. Compared to the traditional .remove() callback
> .remove_new() returns no value. This is a good thing because the driver
Pushed to drm-misc-next, thanks!
From: Robert Foss
On Fri, 17 Mar 2023 20:23:21 -0400, Tom Rix wrote:
> clang with W=1 reports
> drivers/gpu/drm/bridge/sii9234.c:870:31: error:
> unused function 'bridge_to_sii9234' [-Werror,-Wunused-function]
> static inline struct sii9234 *bridge_to_sii9234(struct drm_bridge *bridge)
>
From: Sui Jingfeng
Loongson display controller IP has been integrated in both Loongson
North Bridge chipset(ls7a1000 and ls7a2000) and Loongson SoCs(ls2k1000
and ls2k2000 etc), it even has been included in Loongson BMC products.
This display controller is a PCI device, it has two display pipe.
Hi,
On 18/03/2023 23:36, Kevin Groeneveld wrote:
In some cases the NWL_DSI_RX_PKT_PAYLOAD_DATA_RCVD interrupt flag is not
set along with NWL_DSI_RX_PKT_HDR_RCVD when the initial interrupt fires.
Since the NWL_DSI_RX_PKT_PAYLOAD_DATA_RCVD_MASK was not set then the ISR
does not fire again when
On Mon, Mar 20, 2023 at 11:09:02AM +0100, Nirmoy Das wrote:
> Add a helper function to retrieve struct intel_fbdev from
> struct drm_fb_helper.
>
> Cc: Matthew Auld
> Cc: Andi Shyti
> Cc: Ville Syrjälä
> Cc: Jani Nikula
> Cc: Imre Deak
> Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
On 17.03.2023 16:06, Neil Armstrong wrote:
> Add the Display Port controller subnode to the MDSS node.
>
> Signed-off-by: Neil Armstrong
> ---
Reviewed-by: Konrad Dybcio
Konrad
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 79
>
> 1 file changed, 79
On Fri, Mar 17, 2023 at 09:53:40PM +0100, Linus Walleij wrote:
> On Fri, Mar 17, 2023 at 7:51 PM Andy Shevchenko
> wrote:
>
> > The of_gpio.h is going to be removed. In preparation of that convert
> > the driver to the agnostic API.
> >
> > Signed-off-by: Andy Shevchenko
>
> Thanks for fixing
Hi Jeffrey,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on lwn/docs-next linus/master v6.3-rc3 next-20230320]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
On 20.03.2023 00:57, Andi Shyti wrote:
Hi Andrzej,
On Mon, Mar 06, 2023 at 05:32:02PM +0100, Andrzej Hajda wrote:
From: Chris Wilson
Extract the callstack tracking of intel_runtime_pm.c into its own
utility so that that we can reuse it for other online debugging of
scoped wakerefs.
On 20.03.2023 19:54, Rob Clark wrote:
> From: Rob Clark
>
> The next generated header update will drop the _LO/_HI suffix, now that
> the userspace tooling properly understands 64b vs 32b regs (and the _LO/
> _HI workarounds are getting cleaned up). So convert to using the 64b
> reg helpers
https://bugzilla.kernel.org/show_bug.cgi?id=214847
Erhard F. (erhar...@mailbox.org) changed:
What|Removed |Added
Status|NEW |RESOLVED
On Mon, Mar 20, 2023 at 11:26:17AM -0700, Linus Torvalds wrote:
> On Mon, Mar 20, 2023 at 11:05 AM Nathan Chancellor wrote:
> >
> > On the clang front, I am still seeing the following warning turned error
> > for arm64 allmodconfig at least:
> >
> > drivers/gpu/host1x/dev.c:520:6: error:
Hi Thomas,
On 3/20/23 11:07, Thomas Zimmermann wrote:
Geert, Helge? Do you have further comments? There's not really much for a v3
yet.
I understand the motivation and I see you invested a lot of work on it,
which is really appreciated.
But I have mixed feelings about that patch itself.
On 2023-01-25 14:53, Jonathan Kim wrote:
Unlike single process debug devices, multi-process debug devices allow
debug mode setting per-VMID (non-device-global).
Because the HWS manages PASID-VMID mapping, the new MAP_PROCESS API allows
the KFD to forward the required SPI debug register write
On Mon, Mar 20, 2023 at 9:52 AM Christian König
wrote:
>
>
>
> Am 20.03.23 um 15:43 schrieb Rob Clark:
> > From: Rob Clark
> >
> > Avoid allocating memory in job_run() by pre-allocating the hw_fence.
> >
> > Signed-off-by: Rob Clark
> > ---
> > drivers/gpu/drm/msm/msm_fence.c | 12
On Fri, Mar 17, 2023 at 12:18:01PM -0600, Gustavo A. R. Silva wrote:
> Zero-length arrays as fake flexible arrays are deprecated and we are
> moving towards adopting C99 flexible-array members instead.
>
> Address the following warning found with GCC-13 and
> -fstrict-flex-arrays=3 enabled:
>
On Mon, Mar 20, 2023 at 11:26:17AM -0700, Linus Torvalds wrote:
> On Mon, Mar 20, 2023 at 11:05 AM Nathan Chancellor wrote:
> >
> > On the clang front, I am still seeing the following warning turned error
> > for arm64 allmodconfig at least:
> >
> > drivers/gpu/host1x/dev.c:520:6: error:
Hi,
just copy pasting Matt's original cover letter:
We're periodically facing problems in CI where all registers read back
as 0x. In general this is what happens when the CPU is unable
to communicate with a PCI device, so the transaction autocompletes with
all F's as a placeholder.
From: Matt Roper
We occasionally see the PCI device in a non-accessible state at the
point the driver is loaded. When this happens, all BAR accesses will
read back as 0x. Rather than reading registers and
misinterpreting their (invalid) values, let's specifically check for
0x
Hi Rob,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on rafael-pm/linux-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.3-rc3
next-20230320]
[cannot apply to chanwoo
The WA states that we need to alert the GSC FW before doing a GSC engine
reset and then wait for 200ms. The GuC owns engine reset, so on the i915
side we only need to apply this for full GT reset.
Given that we do full GT resets in the resume paths to cleanup the HW
state and that a long wait in
Thomas Zimmermann writes:
> The size of the screen memory should be equivalent to the size of
> the screen's GEM buffer. Don't recalculate the value.
>
> Signed-off-by: Thomas Zimmermann
> ---
Reviewed-by: Javier Martinez Canillas
--
Best regards,
Javier Martinez Canillas
Core Platforms
On Mon, Mar 13, 2023 at 9:54 AM Konrad Dybcio wrote:
>
>
>
> On 24.02.2023 16:04, Jonathan Marek wrote:
> > This won't work because a2xx freedreno userspace expects to own all the
> > perfcounters.
> >
> > This will break perfcounters for userspace, and when userspace isn't using
> >
On Mon, Mar 20, 2023 at 11:05 AM Nathan Chancellor wrote:
>
> On the clang front, I am still seeing the following warning turned error
> for arm64 allmodconfig at least:
>
> drivers/gpu/host1x/dev.c:520:6: error: variable 'syncpt_irq' is
> uninitialized when used here [-Werror,-Wuninitialized]
From: Rob Clark
The next generated header update will drop the _LO/_HI suffix, now that
the userspace tooling properly understands 64b vs 32b regs (and the _LO/
_HI workarounds are getting cleaned up). So convert to using the 64b
reg helpers in prep.
Signed-off-by: Rob Clark
---
From: Matt Roper
Although we now sanitycheck MMIO access during driver load to make sure
the MMIO BAR isn't returning all 0x, there have been a few cases
where (temporarily?) unreliable MMIO access has happened after GPU
resets or power events. We'll often notice this on our next GT
On 3/10/23 12:51, Ville Syrjälä wrote:
> On Fri, Mar 10, 2023 at 07:48:04PM +0200, Ville Syrjälä wrote:
>> On Thu, Mar 09, 2023 at 04:30:27PM -0500, Hamza Mahfooz wrote:
>>> We should be checking if drm_dp_dpcd_read() returns the size that we are
>>> asking it to read instead of just checking
Thomas Zimmermann writes:
> The size of the framebuffer can either be stored in screen_info or
> smem_len. Take both into account in the deferred I/O code.
>
> Signed-off-by: Thomas Zimmermann
> ---
Reviewed-by: Javier Martinez Canillas
--
Best regards,
Javier Martinez Canillas
Core
Am 20.03.23 um 15:43 schrieb Rob Clark:
From: Rob Clark
Avoid allocating memory in job_run() by pre-allocating the hw_fence.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_fence.c | 12 +---
drivers/gpu/drm/msm/msm_fence.h | 3 ++-
On Sun, Mar 19, 2023 at 01:50:21PM -0700, Linus Torvalds wrote:
> So rc3 is fairly big, but that's not hugely usual: it's when a lot of
> the fixes tick up as it takes a while before people find and start
> reporting issues.
...
> Please test and report any issues you find,
On the clang front,
On Mon, Mar 20, 2023 at 11:56 AM Nathan Chancellor wrote:
>
> I did see a patch fly by to fix that:
>
> https://lore.kernel.org/20230316082035.567520-3-christian.koe...@amd.com/
>
> It seems like the DRM_TEGRA half of it is broken though:
>
>
On Mon, Mar 20, 2023 at 1:05 PM Guenter Roeck wrote:
>
> I have noticed that gcc doesn't always warn about uninitialized variables
> in most architectures.
Yeah, I'm getting the feeling that when the gcc people were trying to
make -Wmaybe-uninitialized work better (when moving it into "-Wall"),
Hi Neil,
On 2023-03-20 06:43, Neil Armstrong wrote:
Thanks for the patch, can you provide a Fixes tag ?
Neil
I never seem to think about a fixes tag unless it was a regression. This
limitation has existed since the first commit for this driver. If there
should be a fixes tag then I guess
Hi Neil,
On 2023-03-20 06:44, Neil Armstrong wrote:
Thanks for the patch, can you provide a Fixes tag ?
Neil
As with my other recent patch I did not think of adding a fixes tag as
this bug is not a regressions but has existed since the first commit of
the driver. If there should be a
From: Jonathan Cavitt
The gt_tlb live selftest has the same code coverage as the
igt_cs_tlb subtest of gtt, except it is better at detecting
TLB bugs. Furthermore, while igt_cs_tlb is hitting some
unforeseen issues, these issues are either false positives
due to the test being poorly formatted,
On Mon, Mar 20, 2023 at 11:53:37AM -0700, Nathan Chancellor wrote:
> On Mon, Mar 20, 2023 at 11:26:17AM -0700, Linus Torvalds wrote:
> > On Mon, Mar 20, 2023 at 11:05 AM Nathan Chancellor
> > wrote:
> > >
> > > On the clang front, I am still seeing the following warning turned error
> > > for
On 2023-01-25 14:53, Jonathan Kim wrote:
Older HW only supports debugging on a single process because the
SPI debug mode setting registers are device global.
The HWS has supplied a single pinned VMID (0xf) for MAP_PROCESS
for debug purposes. To pin the VMID, the KFD will remove the VMID from
Commit 3db9d590557d ("drm/i915/gt: Reset twice") modified the code to
always hit the GDRST register twice when doing a reset, with the
reported aim to fix invalid post-reset engine state on some platforms
(Jasperlake being the only one actually mentioned).
This is a problem on MTL, due to the
[Public]
> -Original Message-
> From: Kai-Heng Feng
> Sent: Wednesday, March 15, 2023 07:07
> To: Deucher, Alexander ; Koenig, Christian
> ; Pan, Xinhui
> Cc: Kai-Heng Feng ; David Airlie
> ; Daniel Vetter ; Zhang, Hawking
> ; Gao, Likun ; Kuehling,
> Felix ; Zhao, Victor ;
> Xiao,
On 20.03.2023 19:56, Konrad Dybcio wrote:
>
>
> On 20.03.2023 19:54, Rob Clark wrote:
>> From: Rob Clark
>>
>> The next generated header update will drop the _LO/_HI suffix, now that
>> the userspace tooling properly understands 64b vs 32b regs (and the _LO/
>> _HI workarounds are getting
* Danilo Krummrich [230313 19:46]:
> On 3/7/23 23:43, Liam R. Howlett wrote:
> > * Danilo Krummrich [230306 10:46]:
> > > On 3/2/23 03:38, Liam R. Howlett wrote:
> > > > * Danilo Krummrich [230227 08:17]:
> > > >
> > > > ...
> > > > > > > Would this variant be significantly more efficient?
> >
Before commit bc0d7fdefec6 ("drm: vkms: Supports to the case where
primary plane doesn't match the CRTC"), the composition was executed on
top of the primary plane. Therefore, the primary plane needed to be
visible and full screen. After commit bc0d7fdefec6, this is no longer
necessary, as the
On 3/10/23 13:42, Hamza Mahfooz wrote:
> We should be checking if drm_dp_dpcd_read() returns the size that we are
> asking it to read instead of just checking if it is greater than zero.
> So, compare the return value of drm_dp_dpcd_read() to the requested
> read size.
>
> Signed-off-by: Hamza
Hi Daniele,
On Mon, Mar 20, 2023 at 02:10:38PM -0700, Daniele Ceraolo Spurio wrote:
> Commit 3db9d590557d ("drm/i915/gt: Reset twice") modified the code to
> always hit the GDRST register twice when doing a reset, with the
> reported aim to fix invalid post-reset engine state on some platforms
>
On Thu, Mar 16, 2023 at 09:23:02AM -0400, Tom Rix wrote:
> clang reportes this error
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:2322:8: error:
> variable 'possible_crtcs' is used uninitialized whenever 'if'
> condition is false [-Werror,-Wsometimes-uninitialized]
>
On 20.03.2023 00:18, Andi Shyti wrote:
Hi Andrzej,
This looks also good, just few questions.
On Mon, Mar 06, 2023 at 05:31:59PM +0100, Andrzej Hajda wrote:
In case one wants to show stats via debugfs.
shall I say it? I'll say it... you can do better with the log
here. It's not a typo fix :)
On Mon, Mar 20, 2023 at 11:49:55AM -0700, Linus Torvalds wrote:
> On Mon, Mar 20, 2023 at 11:26 AM Linus Torvalds
> wrote:
> >
> > Hmm. I do my arm64 allmodconfig builds with gcc, and I'm surprised
> > that gcc doesn't warn about this.
>
> Side note: I'm also wondering why that TEGRA_HOST1X
On 3/20/2023 9:11 AM, Jeffrey Hugo wrote:
From: Pranjal Ramajor Asha Kanojiya
Some of the MHI channels for an AIC100 device need to be routed to
userspace so that userspace can communicate directly with QSM. The MHI
bus does not support this, and while the WWAN subsystem does (for the same
Quoting Matti Vaittinen (2023-03-18 23:36:20)
> >
> > I think you would have an easier time if you just copied and renamed
> > them into the kunit folder as an preparation series.
>
> Yes. That would simplify the syncing between the trees. It slightly bugs
> me to add dublicate code in
From: Jonathan Cavitt
All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
From: Jonathan Cavitt
For platforms that use Aux CCS, we must wait for aux
invalidation to complete by checking the aux
invalidation register bit is cleared.
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 17 +
Hi,
I'm just respinning these two aux invalidation patches from
Jonathan. They have been sent some times ago and need to be
reviewed.
Thanks,
Andi
Jonathan Cavitt (2):
drm/i915/gt: Ensure memory quiesced before invalidation
drm/i915/gt: Poll aux invalidation register bit on invalidation
On Mon, Mar 20, 2023 at 11:57 AM Konrad Dybcio wrote:
>
>
>
> On 20.03.2023 19:56, Konrad Dybcio wrote:
> >
> >
> > On 20.03.2023 19:54, Rob Clark wrote:
> >> From: Rob Clark
> >>
> >> The next generated header update will drop the _LO/_HI suffix, now that
> >> the userspace tooling properly
On Mon, Mar 20, 2023 at 11:26 AM Linus Torvalds
wrote:
>
> Hmm. I do my arm64 allmodconfig builds with gcc, and I'm surprised
> that gcc doesn't warn about this.
Side note: I'm also wondering why that TEGRA_HOST1X config has that
ARM dependency in
depends on ARCH_TEGRA || (ARM &&
On 2/22/23 13:06, Maíra Canal wrote:
Commit 45d9c8dde4cd ("drm/vgem: use shmem helpers") introduced shmem
helpers to vgem and with that, removed all uses of the struct
drm_vgem_gem_object. So, as the struct is no longer used, delete it.
Signed-off-by: Maíra Canal
---
Applied to
On 2023-01-25 14:53, Jonathan Kim wrote:
The HWS schedule allows a grace period for wave completion prior to
preemption for better performance by avoiding CWSR on waves that can
potentially complete quickly. The debugger, on the other hand, will
want to inspect wave status immediately after it
Hi Rob,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on rafael-pm/linux-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.3-rc3
next-20230320]
[cannot apply to chanwoo
On 2023-01-25 14:53, Jonathan Kim wrote:
Similar to the F32 HWS, the RS64 HWS for GFX11 now supports a multi-process
debug API.
The skip_process_ctx_clear ADD_QUEUE requirement is to prevent the MES
from clearing the process context when the first queue is added to the
scheduler in order to
On 21/03/2023 01:38, Rob Herring wrote:
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Reviewed-by: Chun-Kuang Hu
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Laurent Pinchart
Signed-off-by: Rob Herring
---
v2:
- Also
Hi--
On 3/20/23 01:21, Geert Uytterhoeven wrote:
> Below is the list of build error/warning regressions/improvements in
> v6.3-rc3[1] compared to v6.2[2].
>
> Summarized:
> - build errors: +9/-14
> - build warnings: +4/-1447
>
> JFYI, when comparing v6.3-rc3[1] to v6.3-rc2[3], the summaries
Virtual wide planes give high amount of flexibility, but it is not
always enough:
In parallel multirect case only the half of the usual width is supported
for tiled formats. Thus the whole width of two tiled multirect
rectangles can not be greater than max_linewidth, which is not enough
for some
As the debugfs is fully cleared on drm device removal, drop the
encoder-specific cleanup function, remove debugfs_root from dpu_encoder
struct and also remove phys_encoder late_register() ops which has been
unused since the driver being added.
Signed-off-by: Dmitry Baryshkov
---
Up to now the driver has been using encoder to allocate hardware
resources. Switch it to use CRTC id in preparation for the next step.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 16 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 10 +-
Remove historical fields intfs_swapped and topology fields from struct
dpu_encoder_virt and also remove even more historical docs.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 --
1 file changed, 10 deletions(-)
diff --git
Only several SSPP blocks support such features as YUV output or scaling,
thus different DRM planes have different features. Properly utilizing
all planes requires the attention of the compositor, who should
prefer simpler planes to YUV-supporting ones. Otherwise it is very easy
to end up in a
As we are going to add virtual planes, add the list of supported formats
to the hw catalog entry. It will be used to setup universal planes, with
later selecting a pipe depending on whether the YUV format is used for
the framebuffer.
Signed-off-by: Dmitry Baryshkov
---
In preparation to virtualized planes support, move pstate->pipe
initialization from dpu_plane_reset() to dpu_plane_atomic_check(). In
case of virtual planes the plane's pipe will not be known up to the
point of atomic_check() callback.
Signed-off-by: Dmitry Baryshkov
---
Stop poking into CRTC state from dpu_encoder.c, fill CRTC HW resources
from dpu_crtc_assign_resources().
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 27 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 ++
2 files
All resource allocation is centered around the LMs. Then other blocks
(except DSCs) are allocated basing on the LMs that was selected, and LM
powers up the CRTC rather than the encoder.
Moreover if at some point the driver supports encoder cloning,
allocating resources from the encoder will be
Take into account the plane rotation and flipping when calculating src
positions for the wide plane parts.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 27 ++-
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git
As promised in the basic wide planes support ([1]) here comes a series
supporting 2*max_linewidth for all the planes.
Note: this iteration features handling of rotation and reflection of the
wide plane. However rot90 is still not tested: it is enabled on sc7280
and it only supports UBWC (tiled)
The helper drm_atomic_helper_check_plane_state() runs several checks on
plane src and dst rectangles, including the check whether required
scaling fits into the required margins. The msm driver would benefit
from having a function that does all these checks except the scaling
one. Split them into
The struct dpu_rm_requirements was used to wrap display topology and
hw resources, which meant INTF indices. As of commit ef58e0ad3436
("drm/msm/dpu: get INTF blocks directly rather than through RM") the hw
resources struct was removed, leaving struct dpu_rm_requirements
containing a single field
We need to know if the platform supports inline rotation on any of the
SSPP blocks or not. Add this information to struct dpu_caps in a form of
the boolean field has_inline_rot.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
Morning Stephen,
On 3/20/23 21:23, Stephen Boyd wrote:
Quoting Matti Vaittinen (2023-03-18 23:36:20)
I think you would have an easier time if you just copied and renamed
them into the kunit folder as an preparation series.
Yes. That would simplify the syncing between the trees. It slightly
https://bugzilla.kernel.org/show_bug.cgi?id=214853
Erhard F. (erhar...@mailbox.org) changed:
What|Removed |Added
Status|NEW |RESOLVED
On 2023-01-25 14:53, Jonathan Kim wrote:
Add a debug operation that allows the debugger to send an exception
directly to runtime through a payload address.
For memory violations, normal vmfault signals will be applied to
notify runtime instead after passing in the saved exception data
when a
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