Hi Ezequiel,
You can get the dtsi information from patch 13, it is decoder yaml file
about component architecture:
[PATCH v4, 13/15] dt-bindings: media: mtk-vcodec: Adds decoder dt-
bindings for mt8192
Thanks
Yunfei Dong
On Tue, 2021-08-24 at 18:21 +0800, yunfei.d...@mediatek.com wrote:
> Hi
https://bugzilla.kernel.org/show_bug.cgi?id=208909
ker...@890.at changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On 8/24/2021 10:12 PM, Jason Gunthorpe wrote:
On Tue, Aug 24, 2021 at 05:25:30PM +0300, Maor Gottlieb wrote:
@@ -514,11 +531,13 @@ struct scatterlist
*sg_alloc_append_table_from_pages(struct sg_table *sgt,
offset = 0;
cur_page = j;
}
- sgt->nents
Add two more parameters to set spm_addr_dev0 & spm_addr_dev1
addresses. These two parameters configure the start SP
addresses for each device in test_hmm driver.
Consequently, this configures zone device type as public.
Signed-off-by: Alex Sierra
---
tools/testing/selftests/vm/test_hmm.sh | 20
On Tue, Aug 24, 2021 at 04:31:21PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 8/18/2021 11:16 PM, Matthew Brost wrote:
> > If the context is reset as a result of the request cancelation the
> > context reset G2H is received after schedule disable done G2H which is
> > likely the wrong order.
[Public]
> -Original Message-
> From: Lyude Paul
> Sent: Tuesday, August 24, 2021 5:18 AM
> To: Lin, Wayne ; dri-devel@lists.freedesktop.org
> Cc: Kazlauskas, Nicholas ; Wentland, Harry
> ; Zuo, Jerry
> ; Wu, Hersen ; Juston Li
> ; Imre Deak ;
> Ville Syrjälä ; Daniel Vetter
> ; Sean
Add MEMORY_DEVICE_PUBLIC case to free_zone_device_page callback.
Device public type memory case is now able to free its pages properly.
Signed-off-by: Alex Sierra
---
mm/memremap.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/mm/memremap.c b/mm/memremap.c
index
AMD is building a system architecture for the Frontier supercomputer
with a coherent interconnect between CPUs and GPUs. This hardware
architecture allows the CPUs to coherently access GPU device memory.
We have hardware in our labs and we are working with our partner HPE on
the BIOS, firmware and
new ioctl cmd added to query zone device type. This will be
used once the test_hmm adds zone device public type.
Signed-off-by: Alex Sierra
---
lib/test_hmm.c | 15 ++-
lib/test_hmm_uapi.h | 7 +++
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git
Device memory that is cache coherent from device and CPU point of view.
This is use on platform that have an advance system bus (like CAPI or
CCIX). Any page of a process can be migrated to such memory. However,
no one should be allow to pin such memory so that it can always be
evicted.
From: Ralph Campbell
ZONE_DEVICE struct pages have an extra reference count that complicates the
code for put_page() and several places in the kernel that need to check the
reference count to see that a page is not being used (gup, compaction,
migration, etc.). Clean up the code so the reference
When CPU is connected throug XGMI, it has coherent
access to VRAM resource. In this case that resource
is taken from a table in the device gmc aperture base.
This resource is used along with the device type, which could
be DEVICE_PRIVATE or DEVICE_PUBLIC to create the device
page map region.
From: Ralph Campbell
There are several places where ZONE_DEVICE struct pages assume a reference
count == 1 means the page is idle and free. Instead of open coding this,
add a helper function to hide this detail.
Signed-off-by: Ralph Campbell
Signed-off-by: Alex Sierra
Reviewed-by: Christoph
Test cases such as migrate_fault and migrate_multiple,
were modified to explicit migrate from device to sys memory
without the need of page faults, when using device public
type.
Snapshot test case updated to read memory device type
first and based on that, get the proper returned results
Add device public type case to migrate_vma_insert_page,
migrate_vma_pages and migrate_vma_check_page helpers.
Signed-off-by: Alex Sierra
---
mm/migrate.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/mm/migrate.c b/mm/migrate.c
index
In this case, this is used to migrate pages from device memory, back to
system memory. This particular device memory type should be accessible
by the CPU, through IOMEM access. Typically, zone device public type
memory falls into this category.
Signed-off-by: Alex Sierra
---
In order to configure device public in test_hmm, two module parameters
should be passed, which correspond to the SP start address of each
device (2) spm_addr_dev0 & spm_addr_dev1. If no parameters are passed,
private device type is configured.
Signed-off-by: Alex Sierra
---
v5:
Remove
Device Public type uses device memory that is coherently accesible by
the CPU. This could be shown as SP (special purpose) memory range
at the BIOS-e820 memory enumeration. If no SP memory is supported in
system, this could be faked by setting CONFIG_EFI_FAKE_MEMMAP.
Currently, test_hmm only
Ref counter from device pages is init to zero during memmap init zone.
The first time a new device page is allocated to migrate data into it,
its ref counter needs to be initialized to one.
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
1 file changed, 1
Public device type memory on VRAM to RAM migration,
has similar access as System RAM from the CPU. This flag sets
the source from the sender. Which in Public type case,
should be set as IOMEM.
Signed-off-by: Alex Sierra
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c |
[AMD Official Use Only]
Just landed.
Thanks,
Evan
> -Original Message-
> From: Grodzovsky, Andrey
> Sent: Wednesday, August 25, 2021 11:20 AM
> To: Quan, Evan ; dri-devel@lists.freedesktop.org;
> amd-...@lists.freedesktop.org
> Cc: ckoenig.leichtzumer...@gmail.com
> Subject: Re: [PATCH
Right, they will cover my use case, when are they landing ? I rebased
today and haven't seen them.
Andrey
On 2021-08-24 9:41 p.m., Quan, Evan wrote:
[AMD Official Use Only]
Hi Andrey,
I sent out a similar patch set to address S3 issue. And I believe it should be
able to address the issue
On 8/18/2021 11:16 PM, Matthew Brost wrote:
To make ownership of locking clear move fields (guc_id, guc_id_ref,
guc_id_link) to sub structure guc_id in intel_context.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/intel_context.c | 4 +-
[AMD Official Use Only]
Hi Andrey,
I sent out a similar patch set to address S3 issue. And I believe it should be
able to address the issue here too.
https://lists.freedesktop.org/archives/amd-gfx/2021-August/067972.html
https://lists.freedesktop.org/archives/amd-gfx/2021-August/067967.html
BR
On 8/24/2021 6:44 PM, Matthew Brost wrote:
On Tue, Aug 24, 2021 at 06:20:49PM -0700, Daniele Ceraolo Spurio wrote:
On 8/18/2021 11:16 PM, Matthew Brost wrote:
Before we did some clever tricks to not use the a lock when touching
guc_state.sched_state in certain cases. Don't do that, enforce
On Tue, Aug 24, 2021 at 06:20:49PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 8/18/2021 11:16 PM, Matthew Brost wrote:
> > Before we did some clever tricks to not use the a lock when touching
> > guc_state.sched_state in certain cases. Don't do that, enforce the use
> > of the lock.
> >
> >
On 8/18/2021 11:16 PM, Matthew Brost wrote:
A subsequent patch will flip the locking hierarchy from
ce->guc_state.lock -> sched_engine->lock to sched_engine->lock ->
ce->guc_state.lock. As such we need to release the submit fence for a
request from an IRQ to break a lock inversion - i.e. the
On 8/24/2021 8:44 AM, Matthew Brost wrote:
On Fri, Aug 20, 2021 at 05:25:41PM -0700, Daniele Ceraolo Spurio wrote:
On 8/18/2021 11:16 PM, Matthew Brost wrote:
It isn't safe to scrub for missing G2H or continue with the reset until
all G2H processing is complete. Flush the G2H work queue
On 8/24/2021 8:42 AM, Matthew Brost wrote:
On Fri, Aug 20, 2021 at 05:07:27PM -0700, Daniele Ceraolo Spurio wrote:
On 8/18/2021 11:16 PM, Matthew Brost wrote:
A context can get destroyed after cancelling a request so take a
reference to context when cancelling a request.
What's the exact
On 8/18/2021 11:16 PM, Matthew Brost wrote:
Before we did some clever tricks to not use the a lock when touching
guc_state.sched_state in certain cases. Don't do that, enforce the use
of the lock.
Part of this is removing a dead code path from guc_lrc_desc_pin where a
context could be
Hi,
On Tue, Aug 24, 2021 at 3:37 PM Doug Anderson wrote:
>
> Hi,
>
> On Fri, Aug 20, 2021 at 4:22 PM Philip Chen wrote:
> >
> > From: Philip Chen
> >
> > Reorg the macros as follows:
> > (1) Group the registers on the same page together.
> > (2) Group the register and its bit operation
Reorg the macros as follows:
(1) Group the registers on the same page together.
(2) Group the register and its bit operation together while indenting
the macros of the bit operation with one space.
Also fix a misnomer for the number of mipi data lanes.
Signed-off-by: Philip Chen
---
Changes in
On 8/18/2021 11:16 PM, Matthew Brost wrote:
While debugging an issue with full GT resets I went down a rabbit hole
thinking the scrubbing of lost G2H wasn't working correctly. This proved
to be incorrect as this was working just fine but this chase inspired me
to write a selftest to prove
On 8/18/2021 11:16 PM, Matthew Brost wrote:
GuC submission has exposed an existing memory corruption in
live_lrc_isolation. We believe that some writes to the watchdog offsets
in the LRC (0x178 & 0x17c) can result in trashing of portions of the
address space. With GuC submission there are
On 8/18/2021 11:16 PM, Matthew Brost wrote:
If the context is reset as a result of the request cancelation the
context reset G2H is received after schedule disable done G2H which is
likely the wrong order. The schedule disable done G2H release the
waiting request cancelation code which
On 8/18/2021 11:16 PM, Matthew Brost wrote:
Prior to this patch the blocked context counter was cleared on
init_sched_state (used during registering a context & resets) which is
incorrect. This state needs to be persistent or the counter can read the
incorrect value resulting in scheduling
i915 enables a wider set of warnings with '-Wall -Wextra' then disables
several with cc-disable-warning. If an unknown flag gets added to
KBUILD_CFLAGS when building with clang, all subsequent calls to
cc-{disable-warning,option} will fail, meaning that all of these
warnings do not get disabled
Hi,
On Wed, Aug 11, 2021 at 5:08 PM Sankeerth Billakanti
wrote:
>
> The Qualcomm SC7280 platform supports an eDP controller, add
> compatible string for it to msm/binding.
>
> Signed-off-by: Sankeerth Billakanti
> ---
> Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 3 +++
>
This warning helps catch uninitialized variables. It should have been
enabled at the same time as commit b2423184ac33 ("drm/i915: Enable
-Wuninitialized") but I did not realize they were disabled separately.
Enable it now that i915 is clean so that it stays that way.
Signed-off-by: Nathan
Clang warns:
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c:127:13: warning:
variable 'err' is used uninitialized whenever 'if' condition is false
[-Wsometimes-uninitialized]
} else if (PTR_ERR(import) != -EOPNOTSUPP) {
^~
Clang warns a couple of times:
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c:63:6: warning:
variable 'import_obj' is used uninitialized whenever 'if' condition is
true [-Wsometimes-uninitialized]
if (import != >base) {
^~~~
Commit 46e2068081e9 ("drm/i915: Disable some extra clang warnings")
disabled -Wsometimes-uninitialized as noisy but there have been a few
fixes to clang that make the false positive rate fairly low so it should
be enabled to help catch obvious mistakes. The first two patches fix
revent instances
On Tue, Aug 24, 2021 at 12:30 PM Alyssa Rosenzweig
wrote:
>
> Chris Morgan reported UBSAN errors in panfrost and tracked them down to
> the size computation in lock_region. This calculation is overcomplicated
> (cargo culted from kbase) and can be simplified with kernel helpers and
> some
Hi,
On Fri, Aug 20, 2021 at 4:22 PM Philip Chen wrote:
>
> From: Philip Chen
>
> Reorg the macros as follows:
> (1) Group the registers on the same page together.
> (2) Group the register and its bit operation together while indenting
> the macros of the bit operation with one space.
>
> Also
On Tue, Aug 24, 2021 at 12:27 PM Alyssa Rosenzweig
wrote:
>
> Use upper_32_bits/lower_32_bits helpers instead of open-coding them.
> This is easier to scan quickly compared to bitwise manipulation, and it
> is pleasingly symmetric. I noticed this when debugging lock_region,
> which had a
Hi, could someone please grant Jose (cc'd) and myself commit permissions
on libdrm? As i915 developers we'd like to be able to approve/merge
patches that synchronize libdrm's Intel PCI ID's with those we've
already added to the kernel (i.e., updates to intel/i915_pciids.h).
Thanks!
Matt
--
Handle all DMA IOMMU group related dependencies before the
group is removed and we try to access it after free.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 50 ++
To support libdrm tests.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 6400259a7c4b..c2fdf67ff551 100644
This list will be used to capture all non VRAM BOs not
on LRU so when device is hot unplugged we can iterate
the list and unmap DMA mappings before device is removed.
Signed-off-by: Andrey Grodzovsky
Suggested-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 24
Attepmts to powergate after device is removed lead to crash.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 1 -
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 5 -
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 ++
4
Bunch of fixes to enable passing hotplug tests i previosly added
here[1] with latest code.
Once accepted I will enable the tests on libdrm side.
[1] - https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/172
Andrey Grodzovsky (4):
drm/amdgpu: Move flush VCE idle_work during HW fini
> -Original Message-
> From: Alex Deucher
> Sent: Tuesday, August 24, 2021 12:44 PM
> To: Dave Airlie
> Cc: John Hubbard ; Jason Gunthorpe ;
> Christian König ; Gal Pressman
> ; Daniel Vetter ; Sumit Semwal
> ; Doug Ledford
> ; open list:DMA BUFFER SHARING FRAMEWORK
> ; dri-devel
On Tue, Aug 24, 2021 at 10:58:31AM +0800, Shawn Guo wrote:
> On Mon, Aug 09, 2021 at 01:10:08PM +0800, Shawn Guo wrote:
> > It adds a DRM panel driver for Sony Tulip Truly NT35521 5.24" 1280x720
> > DSI panel, which can be found on Sony Xperia M4 Aqua phone. The panel
> > backlight is managed
Le 24/08/2021 à 12:24, Robin Murphy a écrit :
On 2021-08-23 22:30, Christophe JAILLET wrote:
The wrappers in include/linux/pci-dma-compat.h should go away.
The patch has been generated with the coccinelle script below.
@@
expression e1, e2, e3, e4;
@@
- pci_free_consistent(e1, e2, e3, e4)
On Tue, Aug 24, 2021 at 3:16 PM Dave Airlie wrote:
>
> On Wed, 25 Aug 2021 at 03:36, John Hubbard wrote:
> >
> > On 8/24/21 10:32 AM, Jason Gunthorpe wrote:
> > ...
> > >>> And yes at least for the amdgpu driver we migrate the memory to host
> > >>> memory as soon as it is pinned and I would
On Wed, Aug 25, 2021 at 05:15:52AM +1000, Dave Airlie wrote:
> On Wed, 25 Aug 2021 at 03:36, John Hubbard wrote:
> >
> > On 8/24/21 10:32 AM, Jason Gunthorpe wrote:
> > ...
> > >>> And yes at least for the amdgpu driver we migrate the memory to host
> > >>> memory as soon as it is pinned and I
On Wed, 25 Aug 2021 at 03:36, John Hubbard wrote:
>
> On 8/24/21 10:32 AM, Jason Gunthorpe wrote:
> ...
> >>> And yes at least for the amdgpu driver we migrate the memory to host
> >>> memory as soon as it is pinned and I would expect that other GPU drivers
> >>> do something similar.
> >>
> >>
On Tue, Aug 24, 2021 at 05:25:30PM +0300, Maor Gottlieb wrote:
> @@ -514,11 +531,13 @@ struct scatterlist
> *sg_alloc_append_table_from_pages(struct sg_table *sgt,
> offset = 0;
> cur_page = j;
> }
> - sgt->nents += added_nents;
> + sgt_append->sgt.nents
Hi Chun-Kuang,
Thanks for the review.
On Sun, 2021-08-22 at 07:14 +0800, Chun-Kuang Hu wrote:
> Hi, Jason:
>
> jason-jh.lin 於 2021年8月19日 週四 上午10:23寫道：
> >
> > 1. Add mediatek,dsc.yaml to describe DSC module in details.
> > 2. Add mt8195 SoC binding to mediatek,dsc.yaml.
> >
> >
Hi Chun-Kuang,
Thanks for the review.
On Fri, 2021-08-20 at 07:14 +0800, Chun-Kuang Hu wrote:
> Hi, Jason:
>
> jason-jh.lin 於 2021年8月19日 週四 上午10:24寫道：
> >
> > Adjust to the alphabetic order for the define, function, struct
> > and array in mediatek-drm driver
> >
> > Signed-off-by:
Hi
Am 24.08.21 um 00:42 schrieb Amanoel Dawod:
Hi,
This started since 5.14-rc1. The following error appears in dmesg
(as of 5.14-rc7) when I build the kernel with CONFIG_DRM_SIMPLEDRM=m
[3.252275] [drm] Initialized simpledrm 1.0.0 20200625 for
simple-framebuffer.0 on minor 0
[
Hi Chun-Kuang,
Thanks for the review.
On Thu, 2021-08-19 at 23:12 +0800, Chun-Kuang Hu wrote:
> Hi, Jason:
>
> jason-jh.lin 於 2021年8月19日 週四 上午10:23寫道：
> >
> > Add mtk-mutex support for mt8195 vdosys0.
> >
> > Signed-off-by: jason-jh.lin
> > ---
> > drivers/soc/mediatek/mtk-mutex.c | 98
> >
On 8/24/21 10:32 AM, Jason Gunthorpe wrote:
...
And yes at least for the amdgpu driver we migrate the memory to host
memory as soon as it is pinned and I would expect that other GPU drivers
do something similar.
Well...for many topologies, migrating to host memory will result in a
dramatically
On Tue, Aug 24, 2021 at 10:27:23AM -0700, John Hubbard wrote:
> On 8/24/21 2:32 AM, Christian König wrote:
> > Am 24.08.21 um 11:06 schrieb Gal Pressman:
> > > On 23/08/2021 13:43, Christian König wrote:
> > > > Am 21.08.21 um 11:16 schrieb Gal Pressman:
> > > > > On 20/08/2021 17:32, Jason
When locking memory, the base address is rounded down to the nearest
page. The current code does not adjust the size in this case,
truncating the lock region:
Input: [size]
Round: [size]
To fix the truncation, extend the lock region by the amount rounded off.
When locking a region, we currently clamp to a PAGE_SIZE as the minimum
lock region. While this is valid for Midgard, it is invalid for Bifrost,
where the minimum locking size is 8x larger than the 4k page size. Add a
hardware definition for the minimum lock region size (corresponding to
Mali virtual addresses are 48-bit. Use a u64 instead of size_t to ensure
we can express the "lock everything" condition as ~0ULL without
overflow. This code was silently broken on any platform where a size_t
is less than 48-bits; in particular, it was broken on 32-bit armv7
platforms which remain
In lock_region, simplify the calculation of the region_width parameter.
This field is the size, but encoded as ceil(log2(size)) - 1.
ceil(log2(size)) may be computed directly as fls(size - 1). However, we
want to use the 64-bit versions as the amount to lock can exceed
32-bits.
This avoids
Chris Morgan reported UBSAN errors in panfrost and tracked them down to
the size computation in lock_region. This calculation is overcomplicated
(cargo culted from kbase) and can be simplified with kernel helpers and
some mathematical identities. The first patch in the series rewrites the
On 8/24/21 2:32 AM, Christian König wrote:
Am 24.08.21 um 11:06 schrieb Gal Pressman:
On 23/08/2021 13:43, Christian König wrote:
Am 21.08.21 um 11:16 schrieb Gal Pressman:
On 20/08/2021 17:32, Jason Gunthorpe wrote:
On Fri, Aug 20, 2021 at 03:58:33PM +0300, Gal Pressman wrote:
...
IIUC,
Use upper_32_bits/lower_32_bits helpers instead of open-coding them.
This is easier to scan quickly compared to bitwise manipulation, and it
is pleasingly symmetric. I noticed this when debugging lock_region,
which had a particularly "creative" way of writing upper_32_bits.
Signed-off-by: Alyssa
This is more hardware enablement, I'm not sure this should be going into
stable either. Ben?
On Mon, 2021-08-23 at 20:53 -0400, Sasha Levin wrote:
> From: Ben Skeggs
>
> [ Upstream commit fa25f28ef2cef19bc9ffeb827b8ecbf48af7f892 ]
>
> Still no GA106 as I don't have HW to verif.
>
>
Ben, do we even have Ampere support in 5.10?
On Mon, 2021-08-23 at 20:54 -0400, Sasha Levin wrote:
> From: Ben Skeggs
>
> [ Upstream commit e78b1b545c6cfe9f87fc577128e00026fff230ba ]
>
> Should fix some initial modeset failures on (at least) Ampere boards.
>
> Signed-off-by: Ben Skeggs
>
This isn't at all intended to be a fix to be backported, so I don't think this
should be included. I don't know about 5/7, but I'll let Benjamin comment on
that one
On Mon, 2021-08-23 at 20:55 -0400, Sasha Levin wrote:
> From: Ben Skeggs
>
> [ Upstream commit
Hi,
On 8/24/21 10:45 AM, Jani Nikula wrote:
> On Fri, 20 Aug 2021, Hans de Goede wrote:
>> Hello drm-misc and drm-intel maintainers,
>>
>> My "Add support for out-of-band hotplug notification" patchset:
>> https://patchwork.freedesktop.org/series/93763/
>>
>> Is ready for merging now, as
Hi Chun-Kuang,
Thanks for the review.
On Thu, 2021-08-19 at 23:00 +0800, Chun-Kuang Hu wrote:
> Hi, Jason:
>
> jason-jh.lin 於 2021年8月19日 週四 上午10:23寫道：
> >
> > 1. There are 2 mmsys, namely vdosys0 and vdosys1 in mt8195.
> >Each of them is bound to a display pipeline, so add their
> >
On Fri, Aug 20, 2021 at 05:25:41PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 8/18/2021 11:16 PM, Matthew Brost wrote:
> > It isn't safe to scrub for missing G2H or continue with the reset until
> > all G2H processing is complete. Flush the G2H work queue during reset to
> > ensure it is done
On Fri, Aug 20, 2021 at 05:07:27PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 8/18/2021 11:16 PM, Matthew Brost wrote:
> > A context can get destroyed after cancelling a request so take a
> > reference to context when cancelling a request.
>
> What's the exact race? AFAICS
> -Original Message-
> From: Kees Cook
> Sent: Wednesday, August 18, 2021 11:35 AM
> To: linux-ker...@vger.kernel.org
> Cc: Kees Cook ; Ariel Elior ;
> Sudarsana Reddy Kalluru ; GR-everest-linux-l2 everest-linux...@marvell.com>; David S. Miller ; Jakub
> Kicinski ;
On Fri, 20 Aug 2021 15:01:13 +0800, yangcong wrote:
> The auo,b101uan08.3 panel (already supported by this driver) has
> a 3.3V rail that needs to be turned on. For previous users of
> this panel this voltage was directly output by pmic. On a new
> user (the not-yet-upstream sc7180-trogdor-mrbland
RDMA is the only in-kernel user that uses __sg_alloc_table_from_pages to
append pages dynamically. In the next patch. That mode will be extended
and that function will get more parameters. So separate it into a unique
function to make such change more clear.
Signed-off-by: Maor Gottlieb
orig_nents should represent the number of entries with pages,
but __sg_alloc_table_from_pages sets orig_nents as the number of
total entries in the table. This is wrong when the API is used for
dynamic allocation where not all the table entries are mapped with
pages. It wasn't observed until now,
This allows using the normal sg_table APIs and makes all the code
cleaner. Remove sgt, nents and nmapd from ib_umem.
Signed-off-by: Maor Gottlieb
Signed-off-by: Leon Romanovsky
Signed-off-by: Jason Gunthorpe
---
drivers/infiniband/core/umem.c | 32 +
From: Maor Gottlieb
Changelog:
v4:
* Unify sg_free_table_entries with __sg_free_table
v3: https://lore.kernel.org/lkml/cover.1627551226.git.leo...@nvidia.com/
* Rewrote to new API suggestion
* Split for more patches
v2: https://lore.kernel.org/lkml/cover.1626605893.git.leo...@nvidia.com
*
Hi Claire,
On Thu, Jun 24, 2021 at 11:55:24PM +0800, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes.
>
> Regardless of swiotlb setting, the restricted DMA pool is preferred if
> available.
>
> The restricted DMA pools
On 2021-08-24 3:24 a.m., Liu, Monk wrote:
[AMD Official Use Only]
Hi Andrey
Sorry that it is really hard for me to get any particular or solid potential bugs from
your reply, can you be more specific, e.g.: what kind of race issue is introduced by this
"kthread_stop/start" approach.
Hey,
W dniu 23.08.2021 o 10:47, Maxime Ripard pisze:
> In order to avoid any probe ordering issue, the best practice is to move
> the secondary MIPI-DSI device registration and attachment to the
> MIPI-DSI host at probe time. Let's do this.
>
> Signed-off-by: Maxime Ripard
> ---
>
W dniu 23.08.2021 o 10:47, Maxime Ripard pisze:
> Signed-off-by: Maxime Ripard
Missing description.
With this fixed:
Reviewed-by: Andrzej Hajda
Regards
Andrzej
W dniu 23.08.2021 o 10:47, Maxime Ripard pisze:
> Devices that take their data through the MIPI-DSI bus but are controlled
> through a secondary bus like I2C have to register a secondary device on
> the MIPI-DSI bus through the mipi_dsi_device_register_full() function.
>
> At removal or when an
On 2021-08-23 22:30, Christophe JAILLET wrote:
The wrappers in include/linux/pci-dma-compat.h should go away.
The patch has been generated with the coccinelle script below.
@@
expression e1, e2, e3, e4;
@@
-pci_free_consistent(e1, e2, e3, e4)
+dma_free_coherent(>dev, e2, e3, e4)
Hi Ezequiel,
Thanks for your suggestion.
On Sun, 2021-08-22 at 11:32 -0300, Ezequiel Garcia wrote:
> On Fri, 20 Aug 2021 at 04:59, yunfei.d...@mediatek.com
> wrote:
> >
> > Hi Ezequiel,
> >
> > Thanks for your detail feedback.
> >
> > On Thu, 2021-08-19 at 11:10 -0300, Ezequiel Garcia wrote:
Hi,
FWIW this patch itself looks fine, but it does highlight some things
which could be further cleaned up if anyone's interested...
On 2021-08-22 22:06, Christophe JAILLET wrote:
[...]
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
Quoting Nathan Chancellor (2021-08-23 22:08:37)
> Ping? This is a pretty clear bug and it is not fixed in -next or
> drm-intel at this point.
Pushed to drm-intel-gt-next with my R-b.
Regards, Joonas
> On Fri, Aug 13, 2021 at 10:11:58AM -0700, Nathan Chancellor wrote:
> > Clang warns:
> >
> >
Am 24.08.21 um 11:25 schrieb Tvrtko Ursulin:
On 23/08/2021 14:32, Christian König wrote:
Am 23.08.21 um 13:28 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Proposal to standardise the fdinfo text format as optionally output
by DRM
drivers.
Idea is that a simple but, well defined, spec
Am 24.08.21 um 11:06 schrieb Gal Pressman:
On 23/08/2021 13:43, Christian König wrote:
Am 21.08.21 um 11:16 schrieb Gal Pressman:
On 20/08/2021 17:32, Jason Gunthorpe wrote:
On Fri, Aug 20, 2021 at 03:58:33PM +0300, Gal Pressman wrote:
Though it would've been nicer if we could agree on a
On 23/08/2021 14:32, Christian König wrote:
Am 23.08.21 um 13:28 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Proposal to standardise the fdinfo text format as optionally output by
DRM
drivers.
Idea is that a simple but, well defined, spec will enable generic
userspace tools to be
Kees Cook writes:
> In preparation for FORTIFY_SOURCE performing compile-time and run-time
> field bounds checking for memset(), avoid intentionally writing across
> neighboring fields.
>
> Use memset_startat() so memset() doesn't get confused about writing
> beyond the destination member that
Hi Lucas
Am Di., 24. Aug. 2021 um 09:54 Uhr schrieb Lucas Stach :
>
> Am Dienstag, dem 24.08.2021 um 09:24 +0200 schrieb Christian Gmeiner:
> > Am Fr., 20. Aug. 2021 um 22:18 Uhr schrieb Lucas Stach
> > :
> > >
> > > Move the refcount manipulation of the MMU context to the point where the
> > >
On Fri, 20 Aug 2021, Hans de Goede wrote:
> Hello drm-misc and drm-intel maintainers,
>
> My "Add support for out-of-band hotplug notification" patchset:
> https://patchwork.freedesktop.org/series/93763/
>
> Is ready for merging now, as discussed on IRC I based this series
> on top drm-tip and
Just a gentle ping. Daniel any more comments on this?
I'm not sure if the second patch will cause trouble with any unit test,
but I'm willing to try it. We can always trivial revert it.
Thanks,
Christian.
Am 18.08.21 um 12:54 schrieb Christian König:
Only the DRM GPU scheduler, radeon and
1 - 100 of 105 matches
Mail list logo
