On Fri, 11 Mar 2022 at 17:51, Thorsten Leemhuis
wrote:
>
> On 11.03.22 06:15, Dave Airlie wrote:
> >
> > As expected at this stage its pretty quiet, one sun4i mixer fix and
> > one i915 display flicker fix.
> >
> > Thanks,
> > Dave.
> >
> > drm-fixes-2022-03-11:
> > drm fixes for v5.17-rc8/final
Hi Linus,
Thorsten pointed out this had fallen down the cracks and was in -next
only, I've picked it out, fixed up it's Fixes: line.
Thanks,
Dave.
drm-fixes-2022-03-12:
drm kconfig fix for 5.17-rc8
- fix regression in Kconfig.
The following changes since commit
On Thu, Mar 10, 2022 at 12:26:12PM +, Tvrtko Ursulin wrote:
>
> On 10/03/2022 05:18, Matt Atwood wrote:
> > Newer platforms have DSS that aren't necessarily available for both
> > geometry and compute, two queries will need to exist. This introduces
> > the first, when passing a valid engine
On Fri, 11 Mar 2022 18:02:40 +0100, Christophe Branchereau wrote:
> Add binding for the leadtek ltk035c5444t, which is a 640x480
> mipi-dbi over spi / 24-bit RGB panel based on the newvision
> NV03052C chipset.
>
> It is found in the Anbernic RG350M mips handheld.
>
> Signed-off-by: Christophe
Quoting Maxime Ripard (2022-02-25 06:35:22)
> Hi,
>
> This is a follow-up of the discussion here:
> https://lore.kernel.org/linux-clk/20210319150355.xzw7ikwdaga2dwhv@gilmour/
>
> and here:
> https://lore.kernel.org/all/20210914093515.260031-1-max...@cerno.tech/
>
> While the initial proposal
On Fri, Mar 04, 2022 at 04:06:19PM +0900, Byungchul Park wrote:
> Hi Linus and folks,
>
> I've been developing a tool for detecting deadlock possibilities by
> tracking wait/event rather than lock(?) acquisition order to try to
> cover all synchonization machanisms. It's done on v5.17-rc1 tag.
>
On Fri, Mar 11, 2022 at 12:06 PM Jason Baron wrote:
>
>
>
> On 3/10/22 23:47, Jim Cromie wrote:
> > DRM defines/uses 10 enum drm_debug_category's to create exclusive
> > classes of debug messages. To support this directly in dynamic-debug,
> > add the following:
> >
> > - struct
This series:
1. Enables support of GuC to report error-state-capture
using a list of MMIO registers the driver registers
and GuC will dump, log and notify right before a GuC
triggered engine-reset event.
2. Updates the ADS blob creation to register said lists
of global,
On Fri, Mar 11, 2022 at 09:22:14AM +0800, Lee Shawn C wrote:
> drm_find_cea_extension() always look for a top level CEA block. Pass
> ext_index from caller then this function to search next available
> CEA ext block from a specific EDID block pointer.
>
> v2: save proper extension block index if
On Fri, Mar 11, 2022 at 11:01:01PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 11, 2022 at 12:52:33PM -0800, Lucas De Marchi wrote:
> > On Fri, Mar 11, 2022 at 12:43:40PM -0800, Matt Roper wrote:
> > >On Fri, Mar 11, 2022 at 12:38:17PM -0800, Matt Roper wrote:
> > >> On Fri, Mar 11, 2022 at
On 3/11/22 21:38, Jagan Teki wrote:
Hi Marek,
Small correction in the previous comment.
On Sat, Mar 12, 2022 at 2:05 AM Jagan Teki wrote:
Hi Marek,
On Sat, Mar 12, 2022 at 1:32 AM Marek Vasut wrote:
On 3/11/22 17:29, Maxime Ripard wrote:
On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek
The ICN6211 chip starts in I2C configuration mode after cold boot.
Implement support for configuring the chip via I2C in addition to
the current DSI LP command mode configuration support. The later
seems to be available only on chips which have additional MCU on
the panel/bridge board which
Rename and inline macro ICN6211_DSI() into function chipone_writeb()
to keep all function names lower-case. No functional change.
Acked-by: Maxime Ripard
Signed-off-by: Marek Vasut
Cc: Jagan Teki
Cc: Maxime Ripard
Cc: Robert Foss
Cc: Sam Ravnborg
Cc: Thomas Zimmermann
To:
Implement .atomic_get_input_bus_fmts callback, which sets up the
input (DSI-end) format, and that format can then be used in pipeline
format negotiation between the DSI-end of this bridge and the other
component closer to the scanout engine.
Acked-by: Maxime Ripard
Signed-off-by: Marek Vasut
Both example code [1], [2] as well as one provided by custom panel vendor
set register SYS_CTRL_1 to 0x88. What exactly does the value mean is unknown
due to unavailable datasheet. Align this register value with example code.
[1]
Read out the Vendor/Chip/Version ID registers from the chip before
performing any configuration, and validate that the registers have
correct values. This is mostly a simple test whether DSI register
access does work, since that tends to be broken on various bridges.
Acked-by: Maxime Ripard
The chip is capable of swapping DPI RGB channels. The driver currently
does not implement support for this functionality. Write the MIPI_PN_SWAP
register to 0 to assure the color swap is disabled.
Acked-by: Maxime Ripard
Signed-off-by: Marek Vasut
Cc: Jagan Teki
Cc: Maxime Ripard
Cc: Robert
The chip contains fractional PLL, however the driver currently hard-codes
one specific PLL setting. Implement generic PLL parameter calculation code,
so any DPI panel with arbitrary pixel clock can be attached to this bridge.
The datasheet for this bridge is not available, the PLL behavior has
The HFP_HSW_HBP_HI register must be programmed with 2 LSbits of each
Horizontal Front Porch/Sync/Back Porch. Currently the driver programs
this register to 0, which breaks displays with either value above 255.
The HFP_MIN register must be set to the same value as HFP_LI, otherwise
there is
The driver currently hard-codes HS/VS polarity to active-low and DE to
active-high, which is not correct for a lot of supported DPI panels.
Add the missing mode flag handling for HS/VS/DE polarity.
Acked-by: Maxime Ripard
Signed-off-by: Marek Vasut
Cc: Jagan Teki
Cc: Maxime Ripard
Cc: Robert
The DSI burst mode is more energy efficient than the DSI sync pulse mode,
make use of the burst mode since the chip supports it as well. Disable the
generation of EoT packet, the chip ignores it, so no point in emitting it.
Enable transmission of data in LP mode, otherwise register read via DSI
The chip register layout has nothing to do with MIPI DCS, the registers
incorrectly marked as MIPI DCS in the driver are regular chip registers
often with completely different function.
Fill in the actual register names and bits from [1] and [2] and add the
entire register layout, since the
The driver currently hard-codes DSI lane count to two, however the chip
is capable of operating in 1..4 DSI lanes mode. Parse 'data-lanes' DT
property and program the result into DSI_CTRL register.
Signed-off-by: Marek Vasut
Cc: Jagan Teki
Cc: Maxime Ripard
Cc: Robert Foss
Cc: Sam Ravnborg
It is necessary to specify the number of connected/used DSI data lanes when
using the DSI input port of this bridge. Document the 'data-lanes' property
of the DSI input port.
Acked-by: Maxime Ripard
Reviewed-by: Rob Herring
Signed-off-by: Marek Vasut
Cc: Jagan Teki
Cc: Maxime Ripard
Cc: Rob
This series fixes multiple problems with the ICN6211 driver and adds
support for configuration of the chip via I2C bus.
First, in the current state, the ICN6211 driver hard-codes DPI timing
and clock settings specific to some unknown panel. The settings provided
by panel driver are ignored. Using
On Fri, Mar 11, 2022 at 12:52:33PM -0800, Lucas De Marchi wrote:
> On Fri, Mar 11, 2022 at 12:43:40PM -0800, Matt Roper wrote:
> >On Fri, Mar 11, 2022 at 12:38:17PM -0800, Matt Roper wrote:
> >> On Fri, Mar 11, 2022 at 11:00:09AM -0800, Lucas De Marchi wrote:
> >> > On Thu, Mar 10, 2022 at
On Fri, Mar 11, 2022 at 12:43:40PM -0800, Matt Roper wrote:
On Fri, Mar 11, 2022 at 12:38:17PM -0800, Matt Roper wrote:
On Fri, Mar 11, 2022 at 11:00:09AM -0800, Lucas De Marchi wrote:
> On Thu, Mar 10, 2022 at 10:15:42PM -0800, Matt Roper wrote:
> > Xe_HP removed "slice" as a first-class unit
On Fri, Mar 11, 2022 at 12:38:17PM -0800, Matt Roper wrote:
> On Fri, Mar 11, 2022 at 11:00:09AM -0800, Lucas De Marchi wrote:
> > On Thu, Mar 10, 2022 at 10:15:42PM -0800, Matt Roper wrote:
> > > Xe_HP removed "slice" as a first-class unit in the hardware design.
> > > Instead we now have a
Hi Marek,
Small correction in the previous comment.
On Sat, Mar 12, 2022 at 2:05 AM Jagan Teki wrote:
>
> Hi Marek,
>
> On Sat, Mar 12, 2022 at 1:32 AM Marek Vasut wrote:
> >
> > On 3/11/22 17:29, Maxime Ripard wrote:
> > > On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek Vasut wrote:
> > >> On
On Fri, Mar 11, 2022 at 11:00:09AM -0800, Lucas De Marchi wrote:
> On Thu, Mar 10, 2022 at 10:15:42PM -0800, Matt Roper wrote:
> > Xe_HP removed "slice" as a first-class unit in the hardware design.
> > Instead we now have a single pool of subslices (which are now referred
> > to as "DSS") that
Hi Marek,
On Sat, Mar 12, 2022 at 1:32 AM Marek Vasut wrote:
>
> On 3/11/22 17:29, Maxime Ripard wrote:
> > On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek Vasut wrote:
> >> On 3/10/22 15:18, Maxime Ripard wrote:
> >>> On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
> On
On 3/11/22 17:29, Maxime Ripard wrote:
On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek Vasut wrote:
On 3/10/22 15:18, Maxime Ripard wrote:
On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
On 3/10/22 11:53, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut
On Thu, Mar 10, 2022 at 10:15:43PM -0800, Matt Roper wrote:
When running on Xe_HP or beyond, let's use an updated format for
describing topology in our error state dumps and debugfs to give a
more accurate view of the hardware:
- Just report DSS directly without the legacy "slice0" output
drivers/gpu/drm/i915/gt/intel_sseu.c:59:5: warning: symbol
'intel_sseu_get_geometry_subslices' was not declared. Should it be static?
Reported-by: kernel test robot
Signed-off-by: kernel test robot
---
drivers/gpu/drm/i915/gt/intel_sseu.c |2 +-
1 file changed, 1 insertion(+), 1
/20220311-141705
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-rhel-8.3-kselftests
(https://download.01.org/0day-ci/archive/20220312/202203120322.okxcdfs7-...@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
reproduce:
# apt-get install sparse
On 3/10/22 23:47, Jim Cromie wrote:
> DRM defines/uses 10 enum drm_debug_category's to create exclusive
> classes of debug messages. To support this directly in dynamic-debug,
> add the following:
>
> - struct _ddebug.class_id:4 - 4 bits is enough
> - define _DPRINTK_SITE_UNCLASSED 15 - see
On Thu, Mar 10, 2022 at 10:15:42PM -0800, Matt Roper wrote:
Xe_HP removed "slice" as a first-class unit in the hardware design.
Instead we now have a single pool of subslices (which are now referred
to as "DSS") that different hardware units have different ways of
grouping ("compute slices,"
ented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
config: x86_64-randconfig
On 3/10/22 23:47, Jim Cromie wrote:
> In
> https://urldefense.com/v3/__https://lore.kernel.org/lkml/20211209150910.ga23...@axis.com/__;!!GjvTz_vk!HGKKoni4RVdEBgv_V0zPSNSX428bpf02zkCy2WbeQkBdVtp1QJqGX-lJYlRDGg$
>
>
> Vincent's patch commented on, and worked around, a bug toggling
>
On Tue, Mar 08, 2022 at 10:17:42PM +0530, Balasubramani Vivekanandan wrote:
This patch is continuation of the effort to move all pointers in i915,
which at any point may be pointing to device memory or system memory, to
iosys_map interface.
More details about the need of this change is explained
On Tue, Mar 08, 2022 at 10:17:42PM +0530, Balasubramani Vivekanandan wrote:
This patch is continuation of the effort to move all pointers in i915,
which at any point may be pointing to device memory or system memory, to
iosys_map interface.
More details about the need of this change is explained
In (40d9b043a89e drm/connector: store tile information from displayid (v3))
this function was changed to find EDID extensions by id, but the comments
still are specific to the CEA extension.
Signed-off-by: Drew Davenport
---
drivers/gpu/drm/drm_edid.c | 4 ++--
1 file changed, 2
On Fri, 11 Mar 2022 at 20:09, Abhinav Kumar wrote:
>
> Hi Dmitry and Laurent
>
> On 3/11/2022 12:05 AM, Laurent Pinchart wrote:
> > On Fri, Mar 11, 2022 at 10:46:13AM +0300, Dmitry Baryshkov wrote:
> >> On Fri, 11 Mar 2022 at 04:50, Abhinav Kumar
> >> wrote:
> >>>
> >>> For some vendor driver
-base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
config:
Hi Laurent
On 3/10/2022 11:28 PM, Laurent Pinchart wrote:
Hi Abhinav
Thank you for the patch.
On Thu, Mar 10, 2022 at 05:49:59PM -0800, Abhinav Kumar wrote:
Make changes to rcar_du driver to start using drm_encoder pointer
for drm_writeback_connector.
Co-developed-by: Kandpal Suraj
-base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
config: he
Hi Dmitry and Laurent
On 3/11/2022 12:05 AM, Laurent Pinchart wrote:
On Fri, Mar 11, 2022 at 10:46:13AM +0300, Dmitry Baryshkov wrote:
On Fri, 11 Mar 2022 at 04:50, Abhinav Kumar wrote:
For some vendor driver implementations, display hardware can
be shared between the encoder used for
On 2022-03-11 04:16, David Hildenbrand wrote:
On 10.03.22 18:26, Alex Sierra wrote:
DEVICE_COHERENT pages introduce a subtle distinction in the way
"normal" pages can be used by various callers throughout the kernel.
They behave like normal pages for purposes of mapping in CPU page
tables, and
Wrap FIFO reset and comments into mxsfb_reset_block(), this is a clean up.
No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc: Sam Ravnborg
Cc: Stefan Agner
---
V2: No change
---
Pull mode registers programming from mxsfb_enable_controller() into
dedicated function mxsfb_set_mode(). This is a clean up. No functional
change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc: Sam Ravnborg
Cc: Stefan
Pull functionality responsible for programming framebuffer address into
the controller into dedicated function mxsfb_update_buffer(). This is a
clean up. No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc:
Move mxsfb_get_fb_paddr() out of the way, away from register IO functions.
This is a clean up. No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc: Sam Ravnborg
Cc: Stefan Agner
---
V2: No change
---
Reorder mxsfb_crtc_mode_set_nofb() such that all functions which perform
register IO are called from one single location in this function. This is
a clean up. No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
The current clock handling in the LCDIF driver is a convoluted mess.
Implement runtime PM ops which turn the clock ON and OFF and let the
pm_runtime_get_sync()/pm_runtime_put_sync() calls in .atomic_enable
and .atomic_disable callbacks turn the clock ON and OFF at the right
time.
This requires
The call to drm_crtc_vblank_off(>crtc); disables IRQ generation
from the LCDIF block already and this is called in mxsfb_load() before
request_irq(), so explicitly disabling IRQ using custom function like
mxsfb_irq_disable() is not needed, remove it. The request_irq() call
would return -ENOTCONN
Add binding for the leadtek ltk035c5444t, which is a 640x480
mipi-dbi over spi / 24-bit RGB panel based on the newvision
NV03052C chipset.
It is found in the Anbernic RG350M mips handheld.
Signed-off-by: Christophe Branchereau
---
.../display/panel/leadtek,ltk035c5444t.yaml | 59
Following the introduction of bridge_atomic_enable in the ingenic
drm driver, the crtc is enabled between .prepare and .enable, if
it exists.
Add it so the backlight is only enabled after the crtc is, to avoid
graphical issues.
Signed-off-by: Christophe Branchereau
---
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which
can be found in the Anbernic RG-350M handheld console.
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/panel/Kconfig | 9 +
This allows the CRTC to be enabled after panels have slept out,
and before their display is turned on, solving a graphical bug
on the newvision nv3502c
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 19 +--
1 file changed, 13 insertions(+),
v4: fix the bindings license
KR
Christophe
---
Hello, v3 :
Drop -spi in the compatible string, adjust bindings doc accordingly
KR
Christophe
Hello, this is the v2 for my set of patches :
- use dev_err_probe() instead of dev_err() in the
Hi Rob,
Sorry something I can't explain happened with git rebase
v4 on its way
On Fri, Mar 11, 2022 at 3:59 PM Rob Herring wrote:
>
> On Fri, Mar 11, 2022 at 01:04:53PM +0100, Christophe Branchereau wrote:
> > Add binding for the leadtek ltk035c5444t, which is a 640x480
> > mipi-dbi over spi /
https://bugzilla.kernel.org/show_bug.cgi?id=215648
Philipp Riederer (pr_ker...@tum.fail) changed:
What|Removed |Added
Status|NEW |RESOLVED
On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek Vasut wrote:
> On 3/10/22 15:18, Maxime Ripard wrote:
> > On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
> > > On 3/10/22 11:53, Maxime Ripard wrote:
> > > > On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut wrote:
> > > > > On
-base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
config: x
-base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
config: micro
Hi,
On Thu, Mar 10, 2022 at 9:47 PM Kieran Bingham
wrote:
>
> > > +static void ti_sn_bridge_hpd_disable(struct drm_bridge *bridge)
> > > +{
> > > + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> > > +
> > > + regmap_write(pdata->regmap, SN_IRQ_HPD_REG, 0);
> > > +
On Fri, Mar 11, 2022 at 7:05 AM Paul Cercueil wrote:
>
> Hi Rob,
>
> Le jeu., mars 10 2022 at 16:30:26 -0600, Rob Herring
> a écrit :
> > On Tue, Mar 08, 2022 at 02:06:43PM +0100, Christophe Branchereau
> > wrote:
> >> Add binding for the leadtek ltk035c5444t, which is a 640x480
> >> mipi-dbi
On Fri, Mar 11, 2022 at 01:04:53PM +0100, Christophe Branchereau wrote:
> Add binding for the leadtek ltk035c5444t, which is a 640x480
> mipi-dbi over spi / 24-bit RGB panel based on the newvision
> NV03052C chipset.
>
> It is found in the Anbernic RG350M mips handheld.
>
> Signed-off-by:
On Fri, 11 Mar 2022 09:33:09 +0100, Sascha Hauer wrote:
> The rk3568 HDMI has an additional clock that needs to be enabled for the
> HDMI controller to work. It is not needed for the HDMI controller
> itself, but to make the SoC internal busses work.
>
> Signed-off-by: Sascha Hauer
> ---
>
>
is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Matt-Roper/drm-i915-sseu-Don-t-overallocate-subslice-storage/20220311-141705
base
/20220311-141705
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-debian-10.3
(https://download.01.org/0day-ci/archive/20220311/202203112245.edvnthye-...@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
reproduce (this is a W=1 build):
#
https
Hi Dmitry,
On Thu, Mar 10, 2022 at 03:33:07AM +0300, Dmitry Osipenko wrote:
> I was playing/testing SuperTuxKart using VirtIO-GPU driver and spotted a
> UAF bug in drm_atomic_helper_wait_for_vblanks().
>
> SuperTuxKart can use DRM directly, i.e. you can run game in VT without
> Xorg or Wayland,
Hi Rob,
Le jeu., mars 10 2022 at 16:30:26 -0600, Rob Herring
a écrit :
On Tue, Mar 08, 2022 at 02:06:43PM +0100, Christophe Branchereau
wrote:
Add binding for the leadtek ltk035c5444t, which is a 640x480
mipi-dbi over spi / 24-bit RGB panel based on the newvision
NV03052C chipset.
It is
The !irqs_disabled() check triggers on PREEMPT_RT even with
i915_sched_engine::lock acquired. The reason is the lock is transformed
into a sleeping lock on PREEMPT_RT and does not disable interrupts.
There is no need to check for disabled interrupts. The lockdep
annotation below already check if
Disabling interrupts and invoking the irq_work function directly breaks
on PREEMPT_RT.
PREEMPT_RT does not invoke all irq_work from hardirq context because
some of the user have spinlock_t locking in the callback function.
These locks are then turned into a sleeping locks which can not be
acquired
Hi,
these two patches are from the RT queue. They avoid IRQ-off checks and
IRQ-off regions which are not valid/ possible on PREEMPT_RT and are not
needed on !PREEMPT_RT.
Sebastian
Hi All,
On 3/9/22 18:53, Rajat Jain wrote:
> On Wed, Mar 9, 2022 at 7:06 AM Sean Paul wrote:
>>
>> From: Sean Paul
>>
>> This patch adds the necessary hooks to make amdgpu aware of privacy
>> screens. On devices with privacy screen drivers (such as thinkpad-acpi),
>> the amdgpu driver will
Add binding for the leadtek ltk035c5444t, which is a 640x480
mipi-dbi over spi / 24-bit RGB panel based on the newvision
NV03052C chipset.
It is found in the Anbernic RG350M mips handheld.
Signed-off-by: Christophe Branchereau
---
.../display/panel/leadtek,ltk035c5444t.yaml | 59
Following the introduction of bridge_atomic_enable in the ingenic
drm driver, the crtc is enabled between .prepare and .enable, if
it exists.
Add it so the backlight is only enabled after the crtc is, to avoid
graphical issues.
Signed-off-by: Christophe Branchereau
---
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which
can be found in the Anbernic RG-350M handheld console.
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/panel/Kconfig | 9 +
This allows the CRTC to be enabled after panels have slept out,
and before their display is turned on, solving a graphical bug
on the newvision nv3502c
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 19 +--
1 file changed, 13 insertions(+),
Hello, v3 :
Drop -spi in the compatible string, adjust bindings doc accordingly
KR
Christophe
Hello, this is the v2 for my set of patches :
- use dev_err_probe() instead of dev_err() in the newvision panel
driver probe function
- add bindings documentation for the
On Tue, 2022-03-01 at 09:45 -0800, Rob Clark wrote:
> On Mon, Feb 28, 2022 at 10:49 PM David Laight wrote:
> >
> > From: Abhinav Kumar
> > > Sent: 28 February 2022 21:38
> > ...
> > > We also did some profiling around how much increasing the block size
> > > helps and here is the data:
> > >
>
Hi Xin.
On Fri, Mar 11, 2022 at 06:35:25PM +0800, Xin Ji wrote:
> The property length which returns from "of_get_property", it means array
> bytes count if the property has prefix as "/bits/ 8". The driver should
> call function "of_property_read_u8_array" to get correct array value.
>
> Fixes:
On Thu, 10 Mar 2022 at 12:28, Matthew Auld wrote:
>
> From: CQ Tang
>
> When system does not have mappable aperture, ggtt->mappable_end=0. In
> this case if we pass PIN_MAPPABLE when pinning vma, the pinning code
> will return -ENOSPC. So conditionally set PIN_MAPPABLE if HAS_GMCH().
>
>
The dma_fence_chain containers can show up in sync_files as well resulting in
warnings that those can't be added to dma_fence_array containers when merging
multiple sync_files together.
Solve this by using the dma_fence_unwrap iterator to deep dive into the
contained fences and then add those
Add a general purpose helper to deep dive into dma_fence_chain/dma_fence_array
structures and iterate over all the fences in them.
This is useful when we need to flatten out all fences in those structures.
Signed-off-by: Christian König
---
Documentation/driver-api/dma-buf.rst | 6 +
The series is Acked-by: Nirmoy Das
On 10/03/2022 13:27, Matthew Auld wrote:
The leftover bits around dealing with stolen-local memory + small BAR, plus
some related fixes.
v2: some tweaks based on feedback from Ville
On 11/03/2022 10:07, Tvrtko Ursulin wrote:
On 10/03/2022 20:24, John Harrison wrote:
On 3/10/2022 01:27, Tvrtko Ursulin wrote:
On 09/03/2022 21:16, John Harrison wrote:
On 3/8/2022 01:41, Tvrtko Ursulin wrote:
On 03/03/2022 22:37, john.c.harri...@intel.com wrote:
From: John Harrison
A
On 3/10/22 15:18, Maxime Ripard wrote:
On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
On 3/10/22 11:53, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut wrote:
On 3/8/22 17:21, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 03:47:22PM +0100, Marek Vasut
The property length which returns from "of_get_property", it means array
bytes count if the property has prefix as "/bits/ 8". The driver should
call function "of_property_read_u8_array" to get correct array value.
Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
On 10/03/2022 20:24, John Harrison wrote:
On 3/10/2022 01:27, Tvrtko Ursulin wrote:
On 09/03/2022 21:16, John Harrison wrote:
On 3/8/2022 01:41, Tvrtko Ursulin wrote:
On 03/03/2022 22:37, john.c.harri...@intel.com wrote:
From: John Harrison
A workaround was added to the driver to allow
Il 11/03/22 02:54, Nancy.Lin ha scritto:
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Hello maintainers,
I have tested this series (and its dependencies - where
On Mon, 7 Mar 2022 at 21:38, Vivek Kasireddy wrote:
>
> On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or
> more framebuffers/scanout buffers results in only one that is mappable/
> fenceable. Therefore, pageflipping between these 2 FBs where only one
> is mappable/fenceable
Depending on the bridge code, certain userspace events during a driver
teardown (such as a DRM ioctl call) might cause a race condition where
the drm_bridge_chain_pre_enable() and drm_bridge_chain_post_enable()
functions could be called for a bridge that has just been detached and
removed from the
When unbinding a DRM master driver there's a race condition that
sometimes results in an invalid vm access when userspace (gnome-shell)
issues a DRM_IOCTL_MODE_GETCONNECTOR ioctl right after a bridge has been
removed from an encoder's bridge chain.
This means that once a bridge has been disabled
Hi all,
I'm sending these patches to try to improve the current situation for a
particular corner case (DRM driver unbinding).
I could reproduce a specific race condition during the unbinding of the
mediatek-drm driver that caused an invalid memory address. The race
condition is triggered by a
Il 11/03/22 02:54, Nancy.Lin ha scritto:
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
.../arm/mediatek/mediatek,mdp-rdma.yaml | 86 +++
1 file changed, 86 insertions(+)
create mode 100644
Il 11/03/22 00:46, Rob Clark ha scritto:
From: Rob Clark
Hey Rob,
looks like you've somehow lost the commit description on this one!
Cheers,
Angelo
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
On Fri, 11 Mar 2022 at 11:06, Vinod Polimera wrote:
>
>
>
> > -Original Message-
> > From: Stephen Boyd
> > Sent: Wednesday, March 9, 2022 1:36 AM
> > To: quic_vpolimer ;
> > devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> > freedr...@lists.freedesktop.org;
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