On Sat, 23 May 2020 at 01:58, Matthias Brugger wrote:
>
>
>
> On 20/05/2020 07:46, Dave Airlie wrote:
> > On Wed, 20 May 2020 at 15:44, Dave Airlie wrote:
> >>
> >> On Mon, 18 May 2020 at 10:06, Chun-Kuang Hu
> >> wrote:
> >>>
> >>> Hi, Dave & Daniel:
> >>>
> >>> This include dpi pin mode
For creating new source property, is it good to follow
"drm_mode_create_hdmi_colorspace_property()" as an example ? It seems that
currently there is no standard DRM property which allows DRM client to set
a specific output encoding (like YUV420, YUV422 etc). Also, there is no
standard property
https://bugzilla.kernel.org/show_bug.cgi?id=207763
--- Comment #3 from Mohammad Naeim (xunilar...@gmail.com) ---
(In reply to Alex Deucher from comment #1)
> Does reverting:
>
> commit 33b3ad3788aba846fc8b9a065fe2685a0b64f713
> Author: Christoph Hellwig
> Date: Thu Aug 15 09:27:00 2019 +0200
The Energy Model framework supports also other devices than CPUs. Update
related information and add description for the new usage.
Acked-by: Daniel Lezcano
Acked-by: Quentin Perret
Signed-off-by: Lukasz Luba
---
Documentation/power/energy-model.rst | 135 +++
1 file
The HDMI controllers found in the BCM2711 has a pretty different clock and
registers areas than found in the older BCM283x SoCs.
Let's create a variant structure to store the various adjustments we'll
need later on, and a function to get the resources needed for one
particular version.
We will need to share the vc4_hdmi and related structures with multiple
files, so let's create a header for it.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 76 +---
drivers/gpu/drm/vc4/vc4_hdmi.h | 86 +++-
2
The current code has some logic, disabled by default, to dump the register
setup in the HDMI controller.
However, since we're going to split those functions in multiple, shorter,
functions that only make sense where they are called in sequence, keeping
the register dump makes little sense.
From: Dave Stevenson
ALSA's iec958 plugin by default sets the block start preamble
to 8, whilst this driver was programming the hardware to expect
0xF.
Amend the hardware config to match ALSA.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 3
The TXP so far has been leveraging the PixelValve infrastructure in the
driver, that was really two things: the interaction with DRM's CRTC
concept, the setup of the underlying pixelvalve and the setup of the shared
HVS, the pixelvalve part being irrelevant to the TXP since it accesses the
HVS
The HDMI PHY in the BCM2711 HDMI controller is significantly more
complicated to setup than in the older BCM283x SoCs.
Let's add hooks to enable and disable the PHY.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/Makefile | 1 +
drivers/gpu/drm/vc4/vc4_hdmi.c | 14
Hi Daniel,
On Wed, May 27, 2020 at 11:49:36AM +0800, Daniel Drake wrote:
> Hi Maxime,
>
> On Tue, May 26, 2020 at 6:20 PM Maxime Ripard wrote:
> > I gave it a try with U-Boot with my latest work and couldn't reproduce it,
> > so it
> > seems that I fixed it along the way
>
> Is your latest
Hi all,
Background of this version:
This is the v8 of the patch set and is has smaller scope. I had to split
the series into two: EM changes and thermal changes due to devfreq
dependencies. The patches from v7 9-14 which change devfreq cooling are
going to be sent in separate patch series, just
We'll need to reuse the part that disables the HVS and PixelValve during
boot too, so let's create a separate function.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 34 ++
1 file changed, 22 insertions(+), 12 deletions(-)
diff --git
The VID_CTL setup is done in several places in the driver even though it's
not really required. Let's simplify it a bit to do the configuration in one
go.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git
Let's now create more planes that can be affected to all the CRTCs.
vc4 has 3 CRTCs, 1 primary and 1 cursor each, and was having 24 (8
planes per CRTC) overlays.
However, vc5 has 5 CRTCs, so keeping the same logic would put us at 50
planes which is well above the 32 planes limit imposed by DRM.
The BCM2711 has a reworked display pipeline, and the load tracker needs
some adjustement to operate properly. Let's add a compatible for BCM2711
and disable the load tracker until properly supported.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.c | 1 +-
The vc4_hdmi_connector was only used to switch between drm_connector to
drm_encoder. However, we can now use vc4_hdmi to do the switch, so that
structure is redundant.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 19 ---
drivers/gpu/drm/vc4/vc4_hdmi.h | 23
The vc4_crtc_handle_page_flip already has a local variable holding the
value of vc4_crtc->channel, so let's use it instead.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c
Let's continue the implementation of hooks for the parts that change in the
BCM2711 SoC with the PHY RNG setup.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 15 +--
drivers/gpu/drm/vc4/vc4_hdmi.h | 8
drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 15
From: Dave Stevenson
The register range used for audio setup in the previous generations of
SoC were always the second range in the device tree. However, now that
the BCM2711 has way more register ranges, it makes sense to retrieve it
by names for it, while preserving the id-based lookup as a
The HSM clock needs to be setup at around 101% of the pixel rate. This
was done previously by setting the clock rate to 163.7MHz at probe time and
only check in mode_valid whether the mode pixel clock was under the pixel
clock +1% or not.
However, with 4k we need to change that frequency to a
While the device tree and the driver expected a clock-names property, it
wasn't explicitly documented in the previous binding. Make sure it is now.
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
From: Dave Stevenson
If the encoder is disabled and re-enabled (eg mode change) all infoframes
are reset, whilst the audio subsystem know nothing about this change.
The driver therefore needs to reinstate the audio infoframe for
itself.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime
Remove old function em_register_perf_domain which is no longer needed.
There is em_dev_register_perf_domain that covers old use cases and new as
well.
Acked-by: Daniel Lezcano
Acked-by: Quentin Perret
Signed-off-by: Lukasz Luba
---
include/linux/energy_model.h | 7 ---
Even though it's not really clear why we need to flush the PV FIFO during
the configuration even though we started by flushing it, experience shows
that without it we get a stale pixel stuck in the FIFO between the HVS and
the PV.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c
The driver calls the helper to add the color management properties twice,
which is redundant. Remove the first one.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
During the transition from the firmware to the KMS driver, we need to pay
particular attention to how we deal with the pixelvalves that have already
been enabled, otherwise either timeouts or stuck pixels can occur. We'll
thus need to call the function to stop an HVS channel at boot.
The BCM283x SoCs have a display pipeline composed of several controllers
with device tree bindings that are supported by Linux.
Now that we have the DT validation in place, let's split into separate
files and convert the device tree bindings for those controllers to
schemas.
This is just a 1:1
Since we're going to introduce pixelvalve data structures for other SoCs
than the BCM2835, let's rename the structures defined in the code to
make it obvious which SoC we're targeting.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 12 ++--
1 file changed, 6
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 29 ++---
1 file changed, 14 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 93161b98e22a..0a67b27cec9b 100644
---
The upcoming patches to turn the TXP into a full-blown CRTC will have the
same CRTC initialisation code, so let's move it into a separate, public,
function so that we can reuse it later on.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 89 ---
Since most of the HVS channel is setup in the init function, let's move the
gamma setup there too.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hvs.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c
the vc4_hdmi driver has some custom structures to hold the data it needs to
associate with the drm_encoder and drm_connector structures.
However, it allocates them separately from the vc4_hdmi structure which
makes it more complicated than it needs to be.
Move those structures to be contained by
of_device_get_match_data allow to simplify a bit the retrieval of the data
associated to the pixelvalve compatible. Let's use it.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
The HACT_ACT field only needs to be written to when using a DSI display.
Let's move that setup to our DSI branch to clear a bit the common path.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
In order to clear our intermediate FIFOs that might end up with a stale
pixel, let's make sure our FIFO channel is reset everytime our channel is
setup.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hvs.c | 4
1 file changed, 4 insertions(+)
diff --git
The BCM2711 comes with other pixelvalves that have different requirements
and capabilities. Let's document their compatible.
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml | 5
The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.
Let's expose that through a clock driver implementing a clock and reset
provider.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Rob Herring
Cc: linux-...@vger.kernel.org
Cc:
The BCM2711 and BCM283x HDMI controllers use a slightly different reset
sequence, so let's add a callback to reset the controller.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 31 ++-
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files changed, 21
The CRTC hooks are called both for the TXP and the pixelvalve, yet some
will read / write the registers as if the device was a pixelvalve, which
won't really work.
Let's make sure we only access those registers if we are running on a
PixelValve.
Signed-off-by: Maxime Ripard
---
From: Dave Stevenson
LBM allocations were always taking the worst case sizing of
max(src_width, dst_width) * 16. This is significantly over
the required sizing, and stops us rendering multiple 4k images
to the screen.
Add some of the additional constraints to more accurately
describe the LBM
In vc5, the HVS has 6 outputs and 3 FIFOs (or channels), with
pixelvalves each being assigned to a given output, but each output can
then be muxed to feed from multiple FIFOs.
Since vc4 had that entirely static, both were probably equivalent, but
since that changes, let's rename hvs_channel to
The longer FIFOs in vc5 pixelvalves means that the FIFO full level
doesn't fit in the original register field and that we also have a
secondary field. In order to prepare for this, let's move the registers
fill part to a helper function.
Signed-off-by: Maxime Ripard
---
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 272 +---
drivers/gpu/drm/vc4/vc4_drv.h | 5 +-
drivers/gpu/drm/vc4/vc4_hvs.c | 298 ++-
3 files changed, 309 insertions(+), 266 deletions(-)
diff --git
In order to prevent some pixels getting stuck in an unflushable FIFO on
bcm2711, we need to enable the HVS, the pixelvalve (the CRTC) and the HDMI
controller (the encoder) in an intertwined way, and with tight delays.
However, the atomic callbacks don't really provide a way to work with
either
From: dillon min
This patch adds the pin configuration for ltdc and spi5 controller
on stm32f429-disco board.
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
1 file changed, 67 insertions(+)
diff --git
Now that we have a driver for the DVP, let's add its DT node.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index a91cf68e3c4c..00bcaed1be32
We're calling vc4_debugfs_add_file with our struct vc4_hdmi pointer set
in the private field, but we don't use that field and go through the
main struct vc4_dev to get it.
Let's use the private field directly, that will save us some trouble
later on.
Signed-off-by: Maxime Ripard
---
So far the plane creation was done when each CRTC was bound, and those
planes were only tied to the CRTC that was registering them.
This causes two main issues:
- The planes in the vc4 hardware are actually not tied to any CRTC, but
can be used with every combination
- More importantly,
The COB allocation depends on the HVS channel used for a given
pixelvalve.
While the channel allocation was entirely static in vc4, vc5 changes
that and at bind time, a pixelvalve can be assigned to multiple
HVS channels.
Let's prepare that rework by allocating the COB when it's actually
needed.
Add support for other devices than CPUs. The registration function
does not require a valid cpumask pointer and is ready to handle new
devices. Some of the internal structures has been reorganized in order to
keep consistent view (like removing per_cpu pd pointers).
Signed-off-by: Lukasz Luba
The HVS found in the BCM2711 is slightly different from the previous
generations, let's add a compatible for it.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml | 18 ++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git
Hi Daniel,
On 2020-05-28 07:46, Daniel Vetter wrote:
> On Wed, May 27, 2020 at 11:47:56AM +0200, Daniel Vetter wrote:
>> mxsfb has vblank support, is atomic, but doesn't call
>> drm_crtc_vblank_on/off as it should. Not good.
>>
>> With my next patch to add the drm_crtc_vblank_reset to helpers
On Tue, May 26, 2020 at 07:58:08PM +0900, David Stevens wrote:
> This patchset implements the current proposal for virtio cross-device
> resource sharing [1]. It will be used to import virtio resources into
> the virtio-video driver currently under discussion [2]. The patch
> under consideration
On Tue 26-05-20 11:10:54, Pavel Machek wrote:
[...]
> [38617.276517] oom_reaper: reaped process 31769 (chromium), now anon-rss:0kB,
> file-rss:0kB, shmem-rss:7968kB
> [38617.277232] Xorg invoked oom-killer: gfp_mask=0x0(), order=0,
> oom_score_adj=0
> [38617.277247] CPU: 0 PID: 2978 Comm: Xorg
Hi Liu,
pls check [1], I already send patches for it. Those stuck because we
need to verify Philipp's proposal.
[1] https://www.spinics.net/lists/arm-kernel/msg789309.html
Regards,
Marco
On 20-05-28 10:55, Liu Ying wrote:
> Gentle ping...
>
> On Tue, 2020-05-12 at 15:21 +0800, Liu Ying
> -Original Message-
> From: Greg KH
> Sent: Wednesday, May 27, 2020 9:02 PM
> To: Ashwin H
> Cc: x...@kernel.org; dri-devel@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org; linux-ker...@vger.kernel.org; sta...@kernel.org;
> Srivatsa Bhat ; sriva...@csail.mit.edu;
>
In order to make further refactoring easier, let's move the HVS channel
setup / teardown to their own function.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hvs.c | 106 +++
1 file changed, 59 insertions(+), 47 deletions(-)
diff --git
The vc4 CRTC will use the encoder type to control its output clock
muxing. However, this will be different from HDMI0 to HDMI1, so let's
store our type in the variant structure so that we can support multiple
controllers later on.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c
In order to avoid pixels getting stuck in the (unflushable) FIFO between
the HVS and the PV, we need to add some delay after disabling the PV output
and before disabling the HDMI controller. 20ms seems to be good enough so
let's use that.
Signed-off-by: Maxime Ripard
---
The function vc4_hdmi_connector_detect access its vc4_hdmi struct by
dereferencing the pointer in the structure vc4_dev. This will cause some
issues when we will have multiple HDMI controllers, so let's just use the
local variable for now instead of dereferencing that pointer all the time,
and
The BCM2711 comes with a new VideoCore. Add a compatible for it.
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
On 2020-05-28 10:06, Daniel Vetter wrote:
> On Thu, May 28, 2020 at 9:56 AM Stefan Agner wrote:
>>
>> Hi Daniel,
>>
>> On 2020-05-28 07:46, Daniel Vetter wrote:
>> > On Wed, May 27, 2020 at 11:47:56AM +0200, Daniel Vetter wrote:
>> >> mxsfb has vblank support, is atomic, but doesn't call
>> >>
On Thu, May 28, 2020 at 7:37 AM Dave Airlie wrote:
>
> On Thu, 28 May 2020 at 00:36, Arnd Bergmann wrote:
> >
> > On Wed, May 27, 2020 at 4:05 PM Ilia Mirkin wrote:
> > >
> > > Isn't this already fixed by
> > >
> > >
https://bugzilla.kernel.org/show_bug.cgi?id=207763
--- Comment #2 from Mohammad Naeim (xunilar...@gmail.com) ---
I did this:
https://www.reddit.com/r/linuxquestions/comments/gqrk3m/noisy_screen_in_linux_with_kernel_5/
--
You are receiving this mail because:
You are watching the assignee of the
The previous generations were only supporting a single HDMI controller, but
that's about to change, so put an index as well to differentiate between
the two controllers.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
drivers/gpu/drm/vc4/vc4_drv.h | 2 +-
The driver resets the pixelvalve FIFO in a number of occurences without
always using the same sequence.
Since this will be critical for BCM2711, let's move that sequence to a
function so that we are consistent.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 20
We'll need to access the crtc_state from outside of vc4_crtc.c, so let's
move it to vc4_drv.h
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 21 -
drivers/gpu/drm/vc4/vc4_drv.h | 21 +
2 files changed, 21 insertions(+), 21 deletions(-)
Instead of creating planes for each CRTC, we eventually want to create all
the planes for each CRTCs.
In order to make that more convenient, let's iterate on the CRTCs in the
plane creation function instead of its caller.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.c | 9
From: dillon min
since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.
so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode
Signed-off-by: dillon min
---
drivers/spi/spi.c |
From: dillon min
Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board.
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f429-disco.dts | 48 +++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts
From: Dave Stevenson
The HVS found in the BCM2711 is slightly different from the previous
generations.
Most notably, the display list layout changes a bit, the LBM doesn't have
the same size and the formats ordering for some formats is swapped.
Signed-off-by: Dave Stevenson
Signed-off-by:
We'll need the CRTC state related functions to be exported so that we can
reuse them for the TXP.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 21 ++---
drivers/gpu/drm/vc4/vc4_drv.h | 10 ++
2 files changed, 20 insertions(+), 11 deletions(-)
diff
The current driver only supports a single HDMI controller, and part of
the issue is that the main vc4_dev structure holds a pointer to its
(only) HDMI controller, and the HDMI registers accessors will use it to
retrieve the mapped addresses.
Let's modify those accessors to use directly the
Hi Neil,
Le lun. 25 mai 2020 à 16:58, Neil Armstrong
a écrit :
Hi,
On 24/05/2020 21:50, Paul Cercueil wrote:
Hi Daniel,
Le dim. 24 mai 2020 à 20:35, Daniel Vetter a
écrit :
On Sun, May 24, 2020 at 7:46 PM Noralf Trønnes
wrote:
Den 24.05.2020 18.13, skrev Paul Cercueil:
> Hi
Hi Geert,
On Wed, May 27, 2020 at 09:34:30AM +0200, Geert Uytterhoeven wrote:
> On Wed, May 27, 2020 at 9:16 AM Eugeniu Rosca wrote:
> > On Tue, Oct 15, 2019 at 12:46:13PM +0200, Jacopo Mondi wrote:
> > > CMM functionalities are retained between suspend/resume cycles (tested
> > > with
> > >
From: Xuebing Chen
On Mon, May 25, 2020 at 04:34:28PM +0200, Daniel Vetter wrote:
> On Sat, May 23, 2020 at 11:49:07AM +0800, chenxb_99...@126.com wrote:
> > From: Xuebing Chen
> >
> > The provides drm_for_each_plane_mask macro and
> > plane_mask is defined as bitmask of plane indices, such
Hi everyone,
Here's a (pretty long) series to introduce support in the VC4 DRM driver
for the display pipeline found in the BCM2711 (and thus the RaspberryPi 4).
The main differences are that there's two HDMI controllers and that there's
more pixelvalve now. Those pixelvalve come with a mux in
The hvs_latency_pix variable doesn't need to be a variable and can just be
defined.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index
The TXP driver is the only place where we need to set the txp_armed flag,
so let's move the function in the TXP driver.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 7 ---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
drivers/gpu/drm/vc4/vc4_txp.c | 9 -
3 files
Now that we have everything in place, we can now register all the overlay
planes that can be assigned to all the CRTCs.
This has two side effects:
- The number of overlay planes is reduced from 24 to 8. This is temporary
and will be increased again in the next patch.
- The ID of the
From: dillon min
Enable spi5's dma configuration. for graphics data output to
ilitek ili9341 panel via mipi dbi interface
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f429.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi
From: dillon min
This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with
serial mode or parallel rgb interface mode by register
configuration.
Signed-off-by: dillon min
---
Hi Linus, Noralf, Andy,
Changes since V5:
fix
The BCM2711 has 5 pixelvalves, so now that our driver is ready, let's add
support for them.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 84 ++-
drivers/gpu/drm/vc4/vc4_regs.h | 6 +++-
2 files changed, 88 insertions(+), 2 deletions(-)
diff
From: dillon min
stm32's clk driver register two ltdc gate clk to clk core by
clk_hw_register_gate() and clk_hw_register_composite()
first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use.
second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver
both of them
The HDMI controllers found in the BCM2711 have most of the registers
reorganized in multiple registers areas and at different offsets than
previously found.
The logic however remains pretty much the same, so it doesn't really make
sense to create a whole new driver and we should share the code as
From: dillon min
V6:
1 separate '[PATCH v5 5/8]' patchs to two, each one has a Fixes tags according
to Stephen Boyd's suggestion
2 fix panel-ilitek-ili9341 compile warning 'warning: Function parameter or
member xxx not described in xxx' with W=1
V5's update based on Mark Brown's suggestion,
The reset-simple code can be useful for drivers outside of drivers/reset
that have a few reset controls as part of their features. Let's move it to
include/linux/reset.
Cc: Philipp Zabel
Reviewed-by: Philipp Zabel
Signed-off-by: Maxime Ripard
---
drivers/reset/reset-simple.c| 3 +--
The Energy Model framework is going to support devices other that CPUs. In
order to make this happen change the callback function and add pointer to
a device as an argument.
Update the related users to use new function and new callback from the
Energy Model.
Acked-by: Quentin Perret
At boot time, if we detect that a pixelvalve has been enabled, we need to
be able to retrieve the HVS channel it has been assigned to so that we can
disable that channel too. Let's create that function that returns the FIFO
or an error from a given output.
Signed-off-by: Maxime Ripard
---
The Energy Model uses concept of performance domain and capacity states in
order to calculate power used by CPUs. Change naming convention from
capacity to performance state would enable wider usage in future, e.g.
upcoming support for other devices other than CPUs.
Acked-by: Daniel Lezcano
Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 46 +++-
arch/arm/boot/dts/bcm2711.dtsi| 115 ++-
2 files changed, 160
The HVS5 uses different color matrices. Disable color management support
for now.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c
Our CEC code also retrieves the associated vc4_hdmi by setting the
vc4_dev pointer as its private data, and then dereferences its vc4_hdmi
pointer.
In order to eventually get rid of that pointer, we can simply pass the
vc4_hdmi pointer directly.
Signed-off-by: Maxime Ripard
---
Some pixelvalves in vc5 use the same interrupt line so let's register our
interrupt handler as a shared one.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c
Now that we don't have any users anymore, we can kill that pointer.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
drivers/gpu/drm/vc4/vc4_hdmi.c | 14 ++
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h
The BCM2711 sports a second HDMI controller, so let's add that second HDMI
encoder type.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index
On Wed, May 27, 2020 at 5:51 PM Mark Brown wrote:
>
> On Wed, May 27, 2020 at 03:27:32PM +0800, dillon.min...@gmail.com wrote:
> > From: dillon min
> >
> > in l3gd20 driver startup, there is a setup failed error return from
> > stm32 spi driver
>
> Please do not submit new versions of already
Some of the HDMI pixelvalves in vc5 output two pixels per clock cycle.
Let's put the number of pixel output per clock cycle in the CRTC data and
update the various calculations to reflect that.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 17 ++---
The vc4_crtc_data structure is currently storing data related to both the
general CRTC information needed by the rest of the vc4 driver (like HVS
output and available FIFOs) and some related to the pixelvalve attached to
that CRTC. Let's split this into two structures so that we can reuse the
CRTC
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