Hi Daniel,
> > > > >>> The solution:
> > > > >>> - To ensure full framerate, the Guest compositor has to start it's
> > > > >>> repaint cycle
> > > (including
> > > > >>> the 9 ms wait) when the Host compositor sends the frame callback
> > > > >>> event to its
> > > clients.
> > > > >>> In
Hi Linus,
Regular weekly fixes pull, live from a Brisbane lockdown with kids at home.
A big bunch of scattered amdgpu fixes, but they are all pretty small,
minor i915 fixes, kmb, and one vmwgfx regression fixes, all pretty
quiet for this time.
Dave.
drm-fixes-2021-08-06:
drm fixes for 5.14-rc5
Hi Matt,
Always use the dim tooling when applying patches, it will do the right
thing with regards to adding the S-o-b.
Regards, Joonas
Quoting Stephen Rothwell (2021-07-15 07:18:54)
> Hi all,
>
> Commit
>
> db47fe727e1f ("drm/i915/step: s/_revid_tbl/_revids")
>
> is missing a
'of_find_device_by_node()' takes a reference that must be released when
not needed anymore.
This is expected to be done in 'dsi_destroy()'.
However, there are 2 issues in 'dsi_get_phy()'.
First, if 'of_find_device_by_node()' succeeds but 'platform_get_drvdata()'
returns NULL, 'msm_dsi->phy_dev'
IVO panel require less input video clock variation than video clock
variation in DP CTS spec.
This patch decreases the K value of ANX7625 which will shrink eDP Tx
video clock variation to meet IVO panel's requirement.
Acked-by: Sam Ravnborg
Signed-off-by: Xin Ji
---
Hi Michale,
On Fri, Aug 06, 2021 at 12:37:07PM +0200, Michal Simek wrote:
> st 24. 3. 2021 v 4:15 odesílatel Laurent Pinchart napsal:
> > On Tue, Mar 23, 2021 at 10:55:01AM +0800, quanyang.w...@windriver.com wrote:
> > > From: Quanyang Wang
> > >
> > > When insmod zynqmp-dpsub.ko after rmmod it,
On 05/08/2021 17:32, Matthew Brost wrote:
On Thu, Aug 05, 2021 at 01:05:09PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
When a non-persistent context exits we currently mark it as banned in
order to trigger fast termination of any outstanding GPU jobs it may have
left running.
In
IVO panel require less input video clock variation than video clock
variation in DP CTS spec.
This patch decreases the K value of ANX7625 which will shrink eDP Tx
video clock variation to meet IVO panel's requirement.
Acked-by: Sam Ravnborg
Signed-off-by: Xin Ji
---
On Thu, 5 Aug 2021 at 22:37, Jernej Škrabec wrote:
>
> Hi!
>
> Dne četrtek, 05. avgust 2021 ob 20:50:39 CEST je Robert Foss napisal(a):
> > The return value of drm_bridge_attach() is ignored during
> > the it66121_bridge_attach() call, which is incorrect.
> >
> > Fixes: 988156dc2fc9 ("drm:
On Thu, Aug 05, 2021 at 09:05:29PM +0200, Robert Foss wrote:
> Hey Xin,
>
> Thanks for submitting this.
>
> On Thu, 5 Aug 2021 at 09:31, Xin Ji wrote:
> >
> > IVO panel require less input video clock variation than video clock
> > variation in DP CTS spec.
> >
> > This patch decreases the K
Hey Xin,
Thanks for implementing the suggestion so quickly.
Can you send this version of the patch out as v2? Versioning is
important and both tools and processes break if different versions
aren't submitted in different emails.
On Fri, 6 Aug 2021 at 11:35, Xin Ji wrote:
>
> IVO panel require
On Thu, Aug 05, 2021 at 10:05:27PM +0200, Paul Cercueil wrote:
> Hi Greg,
>
> Le jeu., août 5 2021 at 21:35:34 +0200, Greg Kroah-Hartman
> a écrit :
> > On Thu, Aug 05, 2021 at 09:21:09PM +0200, Paul Cercueil wrote:
> > > When the drivers of remote devices (e.g. HDMI chip) are disabled in
> > >
Applied to drm-misc-next
https://bugzilla.kernel.org/show_bug.cgi?id=213983
Bug ID: 213983
Summary: WARNING: CPU: 3 PID: 520 at
drivers/gpu/drm/ttm/ttm_bo.c:409
ttm_bo_release+0x7a/0x803 [ttm]
Product: Drivers
Version: 2.5
Kernel
https://bugzilla.kernel.org/show_bug.cgi?id=213983
--- Comment #1 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 298223
--> https://bugzilla.kernel.org/attachment.cgi?id=298223=edit
kernel .config (5.14-rc4, AMD A10-7860K)
--
You may reply to this email to add a comment.
You
Am 05.08.21 um 21:58 schrieb Zi Yan:
On 5 Aug 2021, at 15:16, Christian König wrote:
Am 05.08.21 um 21:02 schrieb Zi Yan:
From: Zi Yan
This prepares for the upcoming changes to make MAX_ORDER a boot time
parameter instead of compilation time constant. All static arrays with
MAX_ORDER size
Quoting Joonas Lahtinen (2021-08-06 13:06:17)
> Hi Dave & Daniel,
>
> Sorry for the big PR in advance. Had the summer vacations and did not
> notice until tool late how many patches were in already before leaving.
>
> As requested, there is a lot of refactoring to increase the use of TTM
>
Hi Greg,
Le ven., août 6 2021 at 12:17:55 +0200, Greg Kroah-Hartman
a écrit :
On Thu, Aug 05, 2021 at 10:05:27PM +0200, Paul Cercueil wrote:
Hi Greg,
Le jeu., août 5 2021 at 21:35:34 +0200, Greg Kroah-Hartman
a écrit :
> On Thu, Aug 05, 2021 at 09:21:09PM +0200, Paul Cercueil wrote:
>
IVO panel require less input video clock variation than video clock
variation in DP CTS spec.
This patch decreases the K value of ANX7625 which will shrink eDP Tx
video clock variation to meet IVO panel's requirement.
Acked-by: Sam Ravnborg
Signed-off-by: Xin Ji
---
Hi Dave & Daniel,
Sorry for the big PR in advance. Had the summer vacations and did not
notice until tool late how many patches were in already before leaving.
As requested, there is a lot of refactoring to increase the use of TTM
allocator and prep for DRM scheduler. Note that at times the
On Thu, Aug 05, 2021 at 09:33:20PM +0200, Sam Ravnborg wrote:
> On Thu, Aug 05, 2021 at 03:30:55PM +0800, Xin Ji wrote:
> > IVO panel require less input video clock variation than video clock
> > variation in DP CTS spec.
> >
> > This patch decreases the K value of ANX7625 which will shrink eDP
On Fri, Aug 06, 2021 at 11:42:26AM +0200, Robert Foss wrote:
> Hey Xin,
>
> Thanks for implementing the suggestion so quickly.
>
> Can you send this version of the patch out as v2? Versioning is
> important and both tools and processes break if different versions
> aren't submitted in different
Hi,
st 24. 3. 2021 v 4:15 odesílatel Laurent Pinchart
napsal:
>
> Hi Quanyang,
>
> Thank you for the patch.
>
> On Tue, Mar 23, 2021 at 10:55:01AM +0800, quanyang.w...@windriver.com wrote:
> > From: Quanyang Wang
> >
> > When insmod zynqmp-dpsub.ko after rmmod it, system will hang with the
> >
Am 06.08.21 um 17:05 schrieb Dan Carpenter:
Check whether the kcalloc() fails and return -ENOMEM if it does.
Fixes: eeba0b9046fc ("drm/amdgpu: create amdgpu_vkms (v4)")
Signed-off-by: Dan Carpenter
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 2 ++
1 file
Check whether the kcalloc() fails and return -ENOMEM if it does.
Fixes: eeba0b9046fc ("drm/amdgpu: create amdgpu_vkms (v4)")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
On 22/07/2021 11:45, Nancy.Lin wrote:
> Add mmsys config API.
This patch is doing a lot of things, it adds a "config" and it adds cmdq
support. Please explain better in the commit message what the config is for.
Please add comments to the different values of struct mtk_mmsys_config.
I
On 8/6/21 1:34 PM, Thomas Hellström (Intel) wrote:
Hi,
On 8/3/21 7:26 PM, Matthew Brost wrote:
On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote:
On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost
wrote:
Minimum set of patches to enable GuC submission on DG1 and enable
it by
From: Colin Ian King
The variable eng_id is being initialized with a value that is never
read, it is being re-assigned on the next statment. The assignment
is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
On 6 Aug 2021, at 5:37, Christian König wrote:
> Am 05.08.21 um 21:58 schrieb Zi Yan:
>> On 5 Aug 2021, at 15:16, Christian König wrote:
>>
>>> Am 05.08.21 um 21:02 schrieb Zi Yan:
From: Zi Yan
This prepares for the upcoming changes to make MAX_ORDER a boot time
parameter
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
between commit:
e00f543d3596 ("drm/amdgpu: add DID for beige goby")
from the drm-fixes tree and commit:
a8f706966b92 ("drm/amdgpu: add pci device id for cyan_skillfish")
from
Hi Jason,
On 05/08/2021 22:52, jason-jh.lin wrote:
> Add mt8195 vdosys0 clock driver name and routing table to
> the driver data of mtk-mmsys.
>
I'd like to see the implementation of vdosys1 as well, to better understand why
we need two compatibles.
> Signed-off-by: jason-jh.lin
> ---
> This
Hi,
On 8/3/21 7:26 PM, Matthew Brost wrote:
On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote:
On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost wrote:
Minimum set of patches to enable GuC submission on DG1 and enable it by
default.
A little difficult to test as IGTs do not work with
On 8/6/21 1:34 PM, Thomas Hellström (Intel) wrote:
Hi,
On 8/3/21 7:26 PM, Matthew Brost wrote:
On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote:
On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost
wrote:
Minimum set of patches to enable GuC submission on DG1 and enable
it by
On 28/07/2021 07:34, Nancy.Lin wrote:
> Hi Enric,
>
> Thanks for your review.
>
> On Fri, 2021-07-23 at 13:05 +0200, Enric Balletbo Serra wrote:
>> Hi Nancy,
>>
>> Thank you for your patch.
>>
>> Missatge de Nancy.Lin del dia dj., 22 de
>> jul.
>> 2021 a les 11:45:
>>>
>>> Add mt8195 vdosys1
On Mon, Aug 02, 2021 at 09:07:10AM +0800, Jitao Shi wrote:
> The force_dsi_end_without_null requires the dsi host ent at
> the same time in line.
>
> Signed-off-by: Jitao Shi
> ---
> .../bindings/display/bridge/analogix,anx7625.yaml | 6 ++
> 1 file changed, 6 insertions(+)
>
>
On Mon, 02 Aug 2021 14:35:35 +0800, Icenowy Zheng wrote:
> Shenzhen Zhishengxin Technology Co., Ltd. is a LCD module supplier.
>
> Add vendor prefix for it.
>
> Signed-off-by: Icenowy Zheng
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
On Mon, Aug 02, 2021 at 02:35:36PM +0800, Icenowy Zheng wrote:
> As we're going to introduce a driver for MIPI DBI panels that need only
> standard MIPI-DCS commands to initialize (usually because the controller
> has some configuration pre-programmed), add a DT binding file for it,
> which now
On 14/07/2021 12:11, Enric Balletbo i Serra wrote:
> Reset dsi0 HW to default when power on. This prevents to have different
> settingbetween the bootloader and the kernel.
settings between the...
>
> As not all Mediatek boards have the reset consumer configured in their
> board description,
On 7/30/2021 12:53, Matthew Brost wrote:
A small race exists between intel_gt_retire_requests_timeout and
intel_timeline_exit which could result in the syncmap not getting
free'd. Rather than work to hard to seal this race, simply cleanup the
free'd -> freed
syncmap on fini.
unreferenced
The pull request you sent on Fri, 6 Aug 2021 16:03:00 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-08-06
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/1254f05ce097c9bf2872a8407725346faba59844
Thank you!
--
Deet-doot-dot, I am a bot.
Hi all,
here is a v2 of the NVDEC support series. Changes have been done
to accommodate review comments on v1, and the NVDEC1 instance on
Tegra194 is now supported. The series has been tested on Tegra186
on top of my/Thierry's TegraDRM v8 series (though should work on
top of v7 as well).
NVDEC
Add support for booting and using NVDEC on Tegra210, Tegra186
and Tegra194 to the Host1x and TegraDRM drivers. Booting in
secure mode is not currently supported.
Signed-off-by: Mikko Perttunen
---
v2:
* Use devm_platform_get_and_ioremap_resource
* Remove reset handling, done by power domain code
Convert the original Host1x bindings to YAML and add new bindings for
NVDEC, now in a more appropriate location. The old text bindings
for Host1x and engines are still kept at display/tegra/ since they
encompass a lot more engines that haven't been converted over yet.
Signed-off-by: Mikko
Add a device tree node for NVDEC on Tegra186, and
device tree nodes for NVDEC and NVDEC1 on Tegra194.
Signed-off-by: Mikko Perttunen
---
v2:
* Add NVDECSRD1 memory client
* Add also to T194 (both NVDEC0/1)
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 16 +++
Hi, Jason:
jason-jh.lin 於 2021年8月6日 週五 上午4:52寫道：
>
> DSC is designed for real-time systems with real-time compression,
> transmission, decompression and display.
> The DSC standard is a specification of the algorithms used for
> compressing and decompressing image display streams, including
>
Hi, Jason:
jason-jh.lin 於 2021年8月6日 週五 上午4:52寫道：
>
> Add MERGE engine file:
> MERGE module is used to merge two slice-per-line inputs
> into one side-by-side output.
>
> Signed-off-by: jason-jh.lin
> ---
> This patch is base on [1]
>
> [1] dt-bindings: mediatek: display: add mt8195 SoC binding
On Fri, Aug 6, 2021 at 9:42 AM Daniel Vetter wrote:
>
> On Fri, Aug 6, 2021 at 12:58 AM Rob Clark wrote:
> >
> > On Thu, Aug 5, 2021 at 3:47 AM Daniel Vetter wrote:
> > >
> > > Originally drm_sched_job_init was the point of no return, after which
> > > drivers must submit a job. I've split that
On 8/2/2021 02:40, Tvrtko Ursulin wrote:
On 30/07/2021 19:13, John Harrison wrote:
On 7/30/2021 02:49, Tvrtko Ursulin wrote:
On 30/07/2021 01:13, John Harrison wrote:
On 7/28/2021 17:34, Matthew Brost wrote:
If an engine associated with a context does not have a heartbeat,
ban it
On 8/2/2021 22:11, Matthew Brost wrote:
From: Daniele Ceraolo Spurio
The firmware binary has to be loaded from lmem and the recommendation is
to put all other objects in there as well. Note that we don't fall back
to system memory if the allocation in lmem fails because all objects are
On 8/2/2021 22:11, Matthew Brost wrote:
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index da57d18d9f6b..fc2fc8d111d8
On Fri, Aug 6, 2021 at 8:25 PM John Harrison wrote:
> On 7/28/2021 12:21, Matthew Brost wrote:
> > Disable bonding on gen12+ platforms aside from ones already supported by
> > the i915 - TGL, RKL, and ADL-S.
> >
> > Signed-off-by: Matthew Brost
> > ---
> >
On Fri, Aug 6, 2021 at 12:58 AM Rob Clark wrote:
>
> On Thu, Aug 5, 2021 at 3:47 AM Daniel Vetter wrote:
> >
> > Originally drm_sched_job_init was the point of no return, after which
> > drivers must submit a job. I've split that up, which allows us to fix
> > this issue pretty easily.
> >
> >
Hey everybody,
so, here is a proposal of what we could change in order to allow
patches to land faster, more reliably and to increase the overall bus
factor in terms of nouveau kernel maintenance.
But let's start with the current situation:
At the moment contributors have to send patches to the
Hi, Jason:
jason-jh.lin 於 2021年8月6日 週五 上午4:52寫道：
>
> Add driver data of mt8195 vdosys0 to mediatek-drm and the sub driver.
>
Reviewed-by: Chun-Kuang Hu
> Signed-off-by: jason-jh.lin
> ---
> This patch is base on [1]
>
> [1] dt-bindings: mediatek: display: add mt8195 SoC binding
>
On 7/28/2021 12:21, Matthew Brost wrote:
Disable bonding on gen12+ platforms aside from ones already supported by
the i915 - TGL, RKL, and ADL-S.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
On Fri, Aug 06, 2021 at 11:23:06AM -0700, John Harrison wrote:
> On 7/30/2021 12:53, Matthew Brost wrote:
> > A small race exists between intel_gt_retire_requests_timeout and
> > intel_timeline_exit which could result in the syncmap not getting
> > free'd. Rather than work to hard to seal this
On Fri, Aug 6, 2021 at 7:15 PM Rob Clark wrote:
>
> On Fri, Aug 6, 2021 at 9:42 AM Daniel Vetter wrote:
> >
> > On Fri, Aug 6, 2021 at 12:58 AM Rob Clark wrote:
> > >
> > > On Thu, Aug 5, 2021 at 3:47 AM Daniel Vetter
> > > wrote:
> > > >
> > > > Originally drm_sched_job_init was the point of
On 8/2/2021 22:11, Matthew Brost wrote:
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index f8cb00ffb506..a685d563df72 100644
On Fri, Aug 6, 2021 at 11:41 AM Daniel Vetter wrote:
>
> On Fri, Aug 6, 2021 at 7:15 PM Rob Clark wrote:
> >
> > On Fri, Aug 6, 2021 at 9:42 AM Daniel Vetter wrote:
> > >
> > > On Fri, Aug 6, 2021 at 12:58 AM Rob Clark wrote:
> > > >
> > > > On Thu, Aug 5, 2021 at 3:47 AM Daniel Vetter
> > >
Seen this fly by and figured I dropped a few thoughts in here. At the
likely cost of looking a bit out of whack :-)
On Fri, Aug 6, 2021 at 8:01 PM John Harrison wrote:
> On 8/2/2021 02:40, Tvrtko Ursulin wrote:
> > On 30/07/2021 19:13, John Harrison wrote:
> >> On 7/30/2021 02:49, Tvrtko Ursulin
Applied. Thanks!
Alex
On Fri, Aug 6, 2021 at 11:09 AM Christian König
wrote:
>
> Am 06.08.21 um 17:05 schrieb Dan Carpenter:
> > Check whether the kcalloc() fails and return -ENOMEM if it does.
> >
> > Fixes: eeba0b9046fc ("drm/amdgpu: create amdgpu_vkms (v4)")
> > Signed-off-by: Dan Carpenter
On Fri, Aug 6, 2021 at 12:11 PM Daniel Vetter wrote:
>
> On Fri, Aug 6, 2021 at 8:57 PM Rob Clark wrote:
> >
> > On Fri, Aug 6, 2021 at 11:41 AM Daniel Vetter
> > wrote:
> > >
> > > On Fri, Aug 6, 2021 at 7:15 PM Rob Clark wrote:
> > > >
> > > > On Fri, Aug 6, 2021 at 9:42 AM Daniel Vetter
On Thu, Aug 5, 2021 at 8:14 PM Linus Torvalds
wrote:
>
> This might possibly have been fixed already by the previous drm pull,
> but I wanted to report it anyway, just in case.
>
> It happened after an uptime of over a week, so it might not be trivial
> to reproduce.
>
> It's a NULL pointer
On Fri, Aug 6, 2021 at 8:57 PM Rob Clark wrote:
>
> On Fri, Aug 6, 2021 at 11:41 AM Daniel Vetter wrote:
> >
> > On Fri, Aug 6, 2021 at 7:15 PM Rob Clark wrote:
> > >
> > > On Fri, Aug 6, 2021 at 9:42 AM Daniel Vetter
> > > wrote:
> > > >
> > > > On Fri, Aug 6, 2021 at 12:58 AM Rob Clark
Applied. Thanks!
Alex
On Fri, Aug 6, 2021 at 7:16 AM Colin King wrote:
>
> From: Colin Ian King
>
> The variable eng_id is being initialized with a value that is never
> read, it is being re-assigned on the next statment. The assignment
> is redundant and can be removed.
>
>
On 8/6/2021 11:29, Matthew Brost wrote:
On Fri, Aug 06, 2021 at 11:23:06AM -0700, John Harrison wrote:
On 7/30/2021 12:53, Matthew Brost wrote:
A small race exists between intel_gt_retire_requests_timeout and
intel_timeline_exit which could result in the syncmap not getting
free'd. Rather than
gem context refcounting is another exercise in least locking design it
seems, where most things get destroyed upon context closure (which can
race with anything really). Only the actual memory allocation and the
locks survive while holding a reference.
This tripped up Jason when reimplementing
Hi Dave, Daniel,
More updates for 5.15.
The following changes since commit 04d505de7f82c8f2daa6139b460b05dc01e354e0:
Merge tag 'amd-drm-next-5.15-2021-07-29' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2021-07-30 16:48:35
+1000)
are available in the Git repository at:
On Fri, Aug 06, 2021 at 08:54:59PM +0200, Daniel Vetter wrote:
> On Fri, Aug 6, 2021 at 8:25 PM John Harrison
> wrote:
> > On 7/28/2021 12:21, Matthew Brost wrote:
> > > Disable bonding on gen12+ platforms aside from ones already supported by
> > > the i915 - TGL, RKL, and ADL-S.
> > >
> > >
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