ber 26, 2015 4:59 PM
To: edk2-de...@ml01.01.org
Cc: Kinney, Michael D; Yao, Jiewen; Fan, Jeff
Subject: [edk2] [patch] UefiCpuPkg/PiSmmCpu: Move IDT to page aligned memory.
The IDT in ASM is removed. We rely on C code to allocate IDT.
We also move InitializeIDTSmmStackGuard() from ASM to C file.
Contr
The IDT in ASM is removed. We rely on C code to allocate IDT.
We also move InitializeIDTSmmStackGuard() from ASM to C file.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen"
Cc: "Fan, Jeff"
Cc: "Kinney, Michael D"
Jiewen,
Why does IDT need to be 4KB aligned?
The IDT Base provided in the SmiException.asm and SmiException.S for IA32 and
X64 are declared to be in .data sections.
As long as the PiSmmCpuDxeSmm driver is built with code/data sections separated
and on 4KB boundaries, this should guarantee IDT
Jiewen,
The assembly file supports declaring read/write data and read-only data
sections. Would that resolve the issue to put IDT in read-only section?
Your patch summary also does not mention the read-only requirements for the
IDT. Please add that to the summary.
Mike
> -Original
Yes, I will add more detail in comment section, on why it is copied.
You are right that PE/COFF support .RDATA section.
Unfortunately, current EDKII link options may merge .RDATA to .DATA section. So
we are not able to use that.
One possible optimization I could think is to remove IDT in ASM
Jiewen,
It is easier to maintain in C, so if it is possible to move assembly code to C
and address this issue then that is definitely the best solution.
If we think there is value in specific types of modules using 4K alignment and
not merging sections together, then we should be able to
Hi Mike
You are right that IDT is in data section.
I did this purposely, because there was requirement to set IDT table to be
ReadOnly. MCE handler might run and MCE handler address is there.
In order to separate it from other data section, I move it to new place.
Or other normal data will also
The previous IDT is not in page aligned memory.
We allocate and copy it in page aligned memory, so that
other program may use page level protection on that.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen"
Cc: "Fan, Jeff"
Reviewed-by: Jeff Fan
-Original Message-
From: Yao, Jiewen
Sent: Wednesday, November 25, 2015 12:51 PM
To: edk2-de...@ml01.01.org
Cc: Yao, Jiewen; Fan, Jeff; Kinney, Michael D
Subject: [patch] UefiCpuPkg/PiSmmCpu: Move IDT to page aligned memory.
The previous IDT is
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