Re: [edk2] [PATCH 1/5] MdeModulePkg: Remove unused PCDs

[Zeng, Star]

Hi Shenglei,

BaseLib is not belong to MdeModulePkg, please spit it into separated patch.

Thanks,
Star
-Original Message-
From: Zhang, Shenglei 
Sent: Thursday, August 16, 2018 1:32 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Dong, Eric 
Subject: [PATCH 1/5] MdeModulePkg: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleMax
gEfiMdeModulePkgTokenSpaceGuid.PcdSystemRebootAfterCapsuleProcessFlag
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeSubClassCapsule
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesBegin
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesEnd
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdatingFirmware
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareSuccess
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareFailed
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeResettingSystem
gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask

Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei 
---
 .../Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf | 11 ---
 .../FirmwarePerformanceDxe.inf|  1 -
 MdePkg/Library/BaseLib/BaseLib.inf|  1 -
 3 files changed, 13 deletions(-)

diff --git a/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf 
b/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
index 342df9e99c..d5e87cb97b 100644
--- a/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
+++ b/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
@@ -56,17 +56,6 @@
   HobLib
   BmpSupportLib
 
-[Pcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleMax   
## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdSystemRebootAfterCapsuleProcessFlag  
## CONSUMES
-
-  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeSubClassCapsule
## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesBegin
## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesEnd  
## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdatingFirmware
## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareSuccess   
## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareFailed
## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeResettingSystem 
## CONSUMES
 
 [Protocols]
   gEsrtManagementProtocolGuid   ## CONSUMES
diff --git 
a/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
 
b/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
index 983ce41b48..023ab00c7c 100644
--- 
a/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
+++ 
b/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
@@ -73,7 +73,6 @@
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeOsLoaderLoad## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeOsLoaderStart   ## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId   ## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision  ## CONSUMES
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index a1b5ec4b75..4ae8a0b05a 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -643,7 +643,6 @@
   gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength  ## 
SOMETIMES_CONSUMES
   gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength ## 
SOMETIMES_CONSUMES
   gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength   ## 
SOMETIMES_CONSUMES
-  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask## 
SOMETIMES_CONSUMES
 
 [FeaturePcd]
   gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList  ## CONSUMES
-- 
2.18.0.windows.1

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[edk2] [PATCH] ShellPkg/edit: Fix heap access out-of-bounds

[Ruiyu Ni]

The issue was found when heap guard is turned on.
PrintLib somehow receives a non-null terminated string in var-arg.
When the PrintLib implementation reads the string it keeps
reading because no null-terminator is met, which triggers the page
fault set by the heap guard.

The issue is caused by a bug in FileBufferPrintLine().
When "edit" opens a binary file, in FileBufferPrintLine(),
the Line->Buffer may start with \x00 \x00, but the Line->Size is
larger than MainEditor.ScreenSize.Column, it causes the PrintLine is
set to an empty string by below call:
StrnCpyS (
  PrintLine, BufLen/sizeof(CHAR16), Buffer,
  MIN(Limit, MainEditor.ScreenSize.Column)
  );
But since Limit (equals to Line->Size) is larger than
MainEditor.ScreenSize.Column, below for-loop doesn't successfully
set the whole PrintLine to all-empty-space.
for (; Limit < MainEditor.ScreenSize.Column; Limit++) {
  PrintLine[Limit] = L' ';
}
So after the for-loop, PrintLine is still an empty string.
Later in below call, the PrintLine2 is created based on PrintLine.
ShellCopySearchAndReplace (
  PrintLine, PrintLine2,
  BufLen * 2, L"%", L"^%", FALSE, FALSE
  );
But due to the implementation of ShellCopySearchAndReplace(),
PrintLine2 is untouched and INVALID_PARAMETER is returned.
Finally an uninitialized string is passed to ShellPrintEx()
which causes the #PF exception.

The fix is to reset Limit to StrLen(PrintLine) before for-loop.
So that PrintLine can be converted from an empty string to a
string containing all spaces.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni 
Cc: Jaben Carsey 
Cc: Jian Wang 
---
 ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
index 56ccd399b0..39a5afb53f 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
@@ -500,7 +500,7 @@ FileBufferPrintLine (
   PrintLine = AllocatePool (BufLen);
   if (PrintLine != NULL) {
 StrnCpyS (PrintLine, BufLen/sizeof(CHAR16), Buffer, MIN(Limit, 
MainEditor.ScreenSize.Column));
-for (; Limit < MainEditor.ScreenSize.Column; Limit++) {
+for (Limit = StrLen (PrintLine); Limit < MainEditor.ScreenSize.Column; 
Limit++) {
   PrintLine[Limit] = L' ';
 }
 
-- 
2.16.1.windows.1

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Re: [edk2] [PATCH 2/5] IntelFsp2Pkg: Remove unused PCDs

[Chiu, Chasel]

Reviewed-by: Chasel Chiu 

-Original Message-
From: Zhang, Shenglei 
Sent: Thursday, August 16, 2018 1:32 PM
To: edk2-devel@lists.01.org
Cc: Yao, Jiewen ; Chiu, Chasel 
Subject: [PATCH 2/5] IntelFsp2Pkg: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao 
Cc: Chasel Chiu 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei 
---
 IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf   |  6 --
 IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf   | 11 ---
 IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf   |  5 -
 .../Library/BaseFspCommonLib/BaseFspCommonLib.inf |  5 -
 .../Library/BaseFspPlatformLib/BaseFspPlatformLib.inf |  9 -
 .../BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf   |  4 
 .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf   |  1 -
 .../BaseFspWrapperPlatformLibSample.inf   |  3 ---
 8 files changed, 44 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf 
b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
index 0500a197f8..c657862deb 100644
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
@@ -58,17 +58,11 @@
   FspSecPlatformLib
 
 [Pcd]
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress   ## UNDEFINED
-  gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress  ## CONSUMES
   gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase  ## CONSUMES
   gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize  ## CONSUMES
   gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize   ## CONSUMES
   gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage ## CONSUMES
 
-[FixedPcd]
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry  ## CONSUMES
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry   ## CONSUMES
-
 [Ppis]
   gEfiTemporaryRamSupportPpiGuid  ## PRODUCES
 
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf 
b/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf
index a3563dd8cf..dd3f8e56a0 100644
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf
@@ -52,17 +52,6 @@
   FspCommonLib
   FspSecPlatformLib
 
-[Pcd]
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress   ## UNDEFINED
-  gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress  ## CONSUMES
-  gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase  ## CONSUMES
-  gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize  ## CONSUMES
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize   ## CONSUMES
-
-[FixedPcd]
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry  ## CONSUMES
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry   ## CONSUMES
-
 [Ppis]
   gEfiTemporaryRamSupportPpiGuid  ## PRODUCES
 
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf 
b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
index cf6a1918a3..aff4b23f88 100644
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
@@ -53,14 +53,9 @@
   FspSecPlatformLib
 
 [Pcd]
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress   ## UNDEFINED
   gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase  ## CONSUMES
   gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize  ## CONSUMES
   gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize ## CONSUMES
 
-[FixedPcd]
-  gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry  ## CONSUMES
-  

Re: [edk2] Question regarding CMOS regions.

[Ni, Ruiyu]

Younas,
Why are you still working on CMOS in now UEFI world?
Detailed answer is in below.

Thanks/Ray

> -Original Message-
> From: edk2-devel  On Behalf Of
> mohammadyounaskha...@dell.com
> Sent: Thursday, August 16, 2018 12:44 PM
> To: edk2-devel@lists.01.org
> Subject: Re: [edk2] Question regarding CMOS regions.
> 
> Hi Guys,
> 
> Please help to reply to my below queries.
> 
> Thank you,
> Younas.
> 
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Pathan, MohammadYounasKhan
> Sent: Tuesday, August 14, 2018 9:17 AM
> To: edk2-devel@lists.01.org
> Subject: [edk2] FW: Question regarding CMOS regions.
> 
> Hi All,
> 
> As we know CMOS data can be 128 or 256 bytes. CMOS lower 128 bytes are
> stored in IO ports 0x70-0x71 whereas CMOS upper 128 bytes are stored using IO
> ports 0x72-0x73.
> 
>   1.  How to know that the system has 128bytes of CMOS or 256 bytes of CMOS
> region?
You could read the data to know whether high 128 bytes are valid or not.

>   2.  Is there any CMOS location which represents CMOS upper region is exists 
> or
> valid or any other mechanism for it?
Refer to #1.
>   3.  Are we replicating lower 128 bytes to upper 128 bytes in CMOS location
> 0x70-0x71 (or 0x72-0x73)? If yes, Why are we doing that?
It depends on BIOS implementation. I don't see any bios is duplicating the 
contents.
> 
> Thank you,
> Younas.
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Re: [edk2] Question regarding CMOS regions.

[MohammadYounasKhan.P]

Thanks Ruiyu.

I have some inconsistencies with CMOS regions. Even EDKII uses some CMOS 
regions.

I have attached the CMOS dump took using RW tool below:
Type:ISA   Port 0070,0071
Width:01
00=56 01=17 02=45 03=17 04=11 05=15 06=04 07=16 
08=08 09=18 0A=26 0B=02 0C=50 0D=80 0E=00 0F=00 
10=00 11=00 12=00 13=00 14=00 15=7B 16=02 17=FF 
18=FF 19=00 1A=00 1B=00 1C=00 1D=00 1E=00 1F=00 
20=00 21=00 22=00 23=00 24=00 25=00 26=00 27=00 
28=00 29=00 2A=00 2B=00 2C=00 2D=00 2E=02 2F=7B 
30=FF 31=FF 32=20 33=00 34=00 35=9D 36=0B 37=00 
38=00 39=00 3A=00 3B=00 3C=00 3D=00 3E=00 3F=00 
40=00 41=00 42=CA 43=B8 44=6C 45=58 46=00 47=00 
48=00 49=00 4A=00 4B=00 4C=00 4D=00 4E=00 4F=00 
50=00 51=00 52=00 53=00 54=03 55=00 56=00 57=00 
58=00 59=00 5A=00 5B=00 5C=00 5D=00 5E=00 5F=00 
60=00 61=00 62=00 63=00 64=00 65=00 66=00 67=00 
68=00 69=00 6A=00 6B=00 6C=01 6D=00 6E=00 6F=A5 
70=00 71=00 72=00 73=00 74=00 75=00 76=00 77=00 
78=00 79=5F 7A=00 7B=00 7C=00 7D=00 7E=00 7F=00 
80=56 81=17 82=45 83=17 84=11 85=15 86=04 87=16 
88=08 89=18 8A=26 8B=02 8C=40 8D=80 8E=00 8F=00 
90=00 91=00 92=00 93=00 94=00 95=7B 96=02 97=FF 
98=FF 99=00 9A=00 9B=00 9C=00 9D=00 9E=00 9F=00 
A0=00 A1=00 A2=00 A3=00 A4=00 A5=00 A6=00 A7=00 
A8=00 A9=00 AA=00 AB=00 AC=00 AD=00 AE=02 AF=7B 
B0=FF B1=FF B2=20 B3=00 B4=00 B5=9D B6=0B B7=00 
B8=00 B9=00 BA=00 BB=00 BC=00 BD=00 BE=00 BF=00 
C0=00 C1=00 C2=CA C3=B8 C4=6C C5=58 C6=00 C7=00 
C8=00 C9=00 CA=00 CB=00 CC=00 CD=00 CE=00 CF=00 
D0=00 D1=00 D2=00 D3=00 D4=03 D5=00 D6=00 D7=00 
D8=00 D9=00 DA=00 DB=00 DC=00 DD=00 DE=00 DF=00 
E0=00 E1=00 E2=00 E3=00 E4=00 E5=00 E6=00 E7=00 
E8=00 E9=00 EA=00 EB=00 EC=01 ED=00 EE=00 EF=A5 
F0=00 F1=00 F2=00 F3=00 F4=00 F5=00 F6=00 F7=00 
F8=00 F9=5F FA=00 FB=00 FC=00 FD=00 FE=00 FF=00

I have update my queries below.

Thank you,
Younas.
-Original Message-
From: Ni, Ruiyu [mailto:ruiyu...@intel.com] 
Sent: Thursday, August 16, 2018 11:38 AM
To: Pathan, MohammadYounasKhan; edk2-devel@lists.01.org
Subject: RE: Question regarding CMOS regions.

Younas,
Why are you still working on CMOS in now UEFI world?
Detailed answer is in below.

Thanks/Ray

> -Original Message-
> From: edk2-devel  On Behalf Of 
> mohammadyounaskha...@dell.com
> Sent: Thursday, August 16, 2018 12:44 PM
> To: edk2-devel@lists.01.org
> Subject: Re: [edk2] Question regarding CMOS regions.
> 
> Hi Guys,
> 
> Please help to reply to my below queries.
> 
> Thank you,
> Younas.
> 
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of 
> Pathan, MohammadYounasKhan
> Sent: Tuesday, August 14, 2018 9:17 AM
> To: edk2-devel@lists.01.org
> Subject: [edk2] FW: Question regarding CMOS regions.
> 
> Hi All,
> 
> As we know CMOS data can be 128 or 256 bytes. CMOS lower 128 bytes are 
> stored in IO ports 0x70-0x71 whereas CMOS upper 128 bytes are stored 
> using IO ports 0x72-0x73.
> 
>   1.  How to know that the system has 128bytes of CMOS or 256 bytes of 
> CMOS region?
You could read the data to know whether high 128 bytes are valid or not.
[Younas]: How to check the validity of data?

>   2.  Is there any CMOS location which represents CMOS upper region is 
> exists or valid or any other mechanism for it?
Refer to #1.
[Younas]: CMOS upper region means port 0x72-0x73. Each IO port can store 256 
bytes of data (0x00-0xFF). Default lower CMOS region has date and time and is 
valid always. But for upper CMOS region, I am not sure how to check whether it 
is valid or not?
>   3.  Are we replicating lower 128 bytes to upper 128 bytes in CMOS 
> location
> 0x70-0x71 (or 0x72-0x73)? If yes, Why are we doing that?
It depends on BIOS implementation. I don't see any bios is duplicating the 
contents.
[Younas]: You can refer to my CMOS dump copied above which shows upper 128bytes 
have same information as lower 128bytes (of port 0x70-0x71). I would like to 
know why we are doing this?
> 
> Thank you,
> Younas.
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Re: [edk2] [PATCH 4/5] ShellPkg: Remove unused PCDs

[Ni, Ruiyu]

Reviewed-by: Ruiyu Ni 

Thanks/Ray

> -Original Message-
> From: Zhang, Shenglei
> Sent: Thursday, August 16, 2018 1:32 PM
> To: edk2-devel@lists.01.org
> Cc: Carsey, Jaben ; Ni, Ruiyu 
> Subject: [PATCH 4/5] ShellPkg: Remove unused PCDs
> 
> The PCDs below are unused, so they have been removed from inf.
> gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize
> gEfiShellPkgTokenSpaceGuid.PcdShellMapNameLength
> gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize
> gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize
> gEfiShellPkgTokenSpaceGuid.PcdShellPrintBufferSize
> gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize
> gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength
> 
> Cc: Jaben Carsey 
> Cc: Ruiyu Ni 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: shenglei 
> ---
>  ShellPkg/Application/Shell/Shell.inf   | 2 --
>  ShellPkg/DynamicCommand/DpDynamicCommand/DpApp.inf | 2 --
>  ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf  |
> 3 ---
>  ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf | 1 -
>  .../UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf  | 2 --
>  5 files changed, 10 deletions(-)
> 
> diff --git a/ShellPkg/Application/Shell/Shell.inf
> b/ShellPkg/Application/Shell/Shell.inf
> index d89f85bb76..83049844d6 100644
> --- a/ShellPkg/Application/Shell/Shell.inf
> +++ b/ShellPkg/Application/Shell/Shell.inf
> @@ -102,10 +102,8 @@
>gEfiShellPkgTokenSpaceGuid.PcdShellRequireHiiPlatform ## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellSupportFrameworkHii## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellPageBreakDefault   ## CONSUMES
> -  gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize  ## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellInsertModeDefault  ## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellScreenLogCount ## CONSUMES
> -  gEfiShellPkgTokenSpaceGuid.PcdShellMapNameLength  ## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellPrintBufferSize## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellForceConsole   ## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellSupplier   ## CONSUMES
> diff --git a/ShellPkg/DynamicCommand/DpDynamicCommand/DpApp.inf
> b/ShellPkg/DynamicCommand/DpDynamicCommand/DpApp.inf
> index cedb333b28..c35a3087cf 100644
> --- a/ShellPkg/DynamicCommand/DpDynamicCommand/DpApp.inf
> +++ b/ShellPkg/DynamicCommand/DpDynamicCommand/DpApp.inf
> @@ -69,5 +69,3 @@
>gEfiLoadedImageDevicePathProtocolGuid   ##
> SOMETIMES_CONSUMES
>gEfiHiiPackageListProtocolGuid  ## CONSUMES
> 
> -[Pcd]
> -  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize   ## CONSUMES
> diff --git
> a/ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
> b/ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
> index 8fd3bbd5df..2d07b32266 100644
> ---
> a/ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
> +++
> b/ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
> @@ -71,8 +71,5 @@
>gEfiHiiPackageListProtocolGuid  ## CONSUMES
>gEfiShellDynamicCommandProtocolGuid ## PRODUCES
> 
> -[Pcd]
> -  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize   ## CONSUMES
> -
>  [DEPEX]
>TRUE
> diff --git a/ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
> b/ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
> index e5e007bef3..a795fb92de 100644
> --- a/ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
> +++ b/ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
> @@ -353,5 +353,4 @@
>gEfiAdapterInfoUndiIpv6SupportGuid  ## 
> SOMETIMES_CONSUMES
> ## GUID
> 
>  [Pcd.common]
> -  gEfiShellPkgTokenSpaceGuid.PcdShellPrintBufferSize  ## CONSUMES
>gEfiShellPkgTokenSpaceGuid.PcdShellIncludeNtGuids   ## CONSUMES
> diff --git
> a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLi
> b.inf
> b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLi
> b.inf
> index 3ea51ec082..ec1f87ae19 100644
> ---
> a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLi
> b.inf
> +++
> b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLi
> b.inf
> @@ -119,8 +119,6 @@
> 
>  [Pcd]
>gEfiShellPkgTokenSpaceGuid.PcdShellProfileMask  ## CONSUMES
> -  gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize## CONSUMES
> -  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength  ##
> CONSUMES
> 
>  [Protocols]
>gEfiPciRootBridgeIoProtocolGuid ## SOMETIMES_CONSUMES
> --
> 2.18.0.windows.1

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Re: [edk2] [PATCH 5/5] UefiCpuPkg: Remove an unused PCD

[Dong, Eric]

Reviewed-by: Eric Dong 

> -Original Message-
> From: Zhang, Shenglei
> Sent: Thursday, August 16, 2018 1:32 PM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric 
> Subject: [PATCH 5/5] UefiCpuPkg: Remove an unused PCD
> 
> The PCD below is unused, so it has been removed from inf.
> gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport
> 
> Cc: Eric Dong 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: shenglei 
> ---
>  UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1
> -
>  1 file changed, 1 deletion(-)
> 
> diff --git
> a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
> index 8bc8979de0..cb7f227f6c 100644
> ---
> a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
> +++
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
> @@ -64,7 +64,6 @@
>LocalApicLib
> 
>  [Pcd]
> -  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport## CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle   ##
> SOMETIMES_CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset##
> SOMETIMES_CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme  ##
> SOMETIMES_CONSUMES
> --
> 2.18.0.windows.1

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Re: [edk2] Question regarding CMOS regions.

[Ramesh R .]

1) To check the Extended RAM validity.



* Read the Offset 0 from Extended RTC Ram.

* If no 0 value, extended RTC Ram is present.

* If it's 0xFF, write some value to Offset 0

* Read it back. If you get the value that you wrote, extended RTC RAM 
is present and preserve the old value again.

* If you still get 0xFF, Extended RTC RAM is not present.



2) Extended RTC RAM is NOT duplicate of standard RTC RAM. It's up to BIOS 
vendor how they use it. May be BIOS uses the extended RTC RAM as duplicate copy 
of the standard RTC RAM.



Check the "Real Time Clock Registers" Section in the SB Spec.



Thanks,

Ramesh



-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of 
mohammadyounaskha...@dell.com
Sent: 16 August 2018 11:59
To: ruiyu...@intel.com; edk2-devel@lists.01.org
Subject: Re: [edk2] Question regarding CMOS regions.



Thanks Ruiyu.



I have some inconsistencies with CMOS regions. Even EDKII uses some CMOS 
regions.



I have attached the CMOS dump took using RW tool below:

Type:ISA   Port 0070,0071

Width:01

00=56 01=17 02=45 03=17 04=11 05=15 06=04 07=16

08=08 09=18 0A=26 0B=02 0C=50 0D=80 0E=00 0F=00

10=00 11=00 12=00 13=00 14=00 15=7B 16=02 17=FF 18=FF 19=00 1A=00 1B=00 1C=00 
1D=00 1E=00 1F=00

20=00 21=00 22=00 23=00 24=00 25=00 26=00 27=00

28=00 29=00 2A=00 2B=00 2C=00 2D=00 2E=02 2F=7B 30=FF 31=FF 32=20 33=00 34=00 
35=9D 36=0B 37=00

38=00 39=00 3A=00 3B=00 3C=00 3D=00 3E=00 3F=00

40=00 41=00 42=CA 43=B8 44=6C 45=58 46=00 47=00

48=00 49=00 4A=00 4B=00 4C=00 4D=00 4E=00 4F=00

50=00 51=00 52=00 53=00 54=03 55=00 56=00 57=00

58=00 59=00 5A=00 5B=00 5C=00 5D=00 5E=00 5F=00

60=00 61=00 62=00 63=00 64=00 65=00 66=00 67=00

68=00 69=00 6A=00 6B=00 6C=01 6D=00 6E=00 6F=A5

70=00 71=00 72=00 73=00 74=00 75=00 76=00 77=00

78=00 79=5F 7A=00 7B=00 7C=00 7D=00 7E=00 7F=00

80=56 81=17 82=45 83=17 84=11 85=15 86=04 87=16

88=08 89=18 8A=26 8B=02 8C=40 8D=80 8E=00 8F=00

90=00 91=00 92=00 93=00 94=00 95=7B 96=02 97=FF 98=FF 99=00 9A=00 9B=00 9C=00 
9D=00 9E=00 9F=00

A0=00 A1=00 A2=00 A3=00 A4=00 A5=00 A6=00 A7=00

A8=00 A9=00 AA=00 AB=00 AC=00 AD=00 AE=02 AF=7B B0=FF B1=FF B2=20 B3=00 B4=00 
B5=9D B6=0B B7=00

B8=00 B9=00 BA=00 BB=00 BC=00 BD=00 BE=00 BF=00

C0=00 C1=00 C2=CA C3=B8 C4=6C C5=58 C6=00 C7=00

C8=00 C9=00 CA=00 CB=00 CC=00 CD=00 CE=00 CF=00

D0=00 D1=00 D2=00 D3=00 D4=03 D5=00 D6=00 D7=00

D8=00 D9=00 DA=00 DB=00 DC=00 DD=00 DE=00 DF=00

E0=00 E1=00 E2=00 E3=00 E4=00 E5=00 E6=00 E7=00

E8=00 E9=00 EA=00 EB=00 EC=01 ED=00 EE=00 EF=A5

F0=00 F1=00 F2=00 F3=00 F4=00 F5=00 F6=00 F7=00

F8=00 F9=5F FA=00 FB=00 FC=00 FD=00 FE=00 FF=00



I have update my queries below.



Thank you,

Younas.

-Original Message-

From: Ni, Ruiyu [mailto:ruiyu...@intel.com]

Sent: Thursday, August 16, 2018 11:38 AM

To: Pathan, MohammadYounasKhan; 
edk2-devel@lists.01.org

Subject: RE: Question regarding CMOS regions.



Younas,

Why are you still working on CMOS in now UEFI world?

Detailed answer is in below.



Thanks/Ray



> -Original Message-

> From: edk2-devel 
> mailto:edk2-devel-boun...@lists.01.org>> On 
> Behalf Of

> mohammadyounaskha...@dell.com

> Sent: Thursday, August 16, 2018 12:44 PM

> To: edk2-devel@lists.01.org

> Subject: Re: [edk2] Question regarding CMOS regions.

>

> Hi Guys,

>

> Please help to reply to my below queries.

>

> Thank you,

> Younas.

>

> -Original Message-

> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of

> Pathan, MohammadYounasKhan

> Sent: Tuesday, August 14, 2018 9:17 AM

> To: edk2-devel@lists.01.org

> Subject: [edk2] FW: Question regarding CMOS regions.

>

> Hi All,

>

> As we know CMOS data can be 128 or 256 bytes. CMOS lower 128 bytes are

> stored in IO ports 0x70-0x71 whereas CMOS upper 128 bytes are stored

> using IO ports 0x72-0x73.

>

>   1.  How to know that the system has 128bytes of CMOS or 256 bytes of

> CMOS region?

You could read the data to know whether high 128 bytes are valid or not.

[Younas]: How to check the validity of data?



>   2.  Is there any CMOS location which represents CMOS upper region is

> exists or valid or any other mechanism for it?

Refer to #1.

[Younas]: CMOS upper region means port 0x72-0x73. Each IO port can store 256 
bytes of data (0x00-0xFF). Default lower CMOS region has date and time and is 
valid always. But for upper CMOS region, I am not sure how to check whether it 
is valid or not?

>   3.  Are we replicating lower 128 bytes to upper 128 bytes in CMOS

> location

> 0x70-0x71 (or 0x72-0x73)? If yes, Why are we doing that?

It depends on BIOS implementation. I don't see any bios is duplicating the 
contents.

[Younas]: You can refer to my CMOS dump copied above which shows upper 128bytes 
have same information as lower 128bytes (of 

Re: [edk2] [PATCH] ShellPkg/edit: Fix heap access out-of-bounds

[Wang, Jian J]

Reviewed-by: Jian J Wang 

> -Original Message-
> From: Ni, Ruiyu
> Sent: Thursday, August 16, 2018 2:33 PM
> To: edk2-devel@lists.01.org
> Cc: Carsey, Jaben ; Wang, Jian J
> 
> Subject: [PATCH] ShellPkg/edit: Fix heap access out-of-bounds
> 
> The issue was found when heap guard is turned on.
> PrintLib somehow receives a non-null terminated string in var-arg.
> When the PrintLib implementation reads the string it keeps
> reading because no null-terminator is met, which triggers the page
> fault set by the heap guard.
> 
> The issue is caused by a bug in FileBufferPrintLine().
> When "edit" opens a binary file, in FileBufferPrintLine(),
> the Line->Buffer may start with \x00 \x00, but the Line->Size is
> larger than MainEditor.ScreenSize.Column, it causes the PrintLine is
> set to an empty string by below call:
> StrnCpyS (
>   PrintLine, BufLen/sizeof(CHAR16), Buffer,
>   MIN(Limit, MainEditor.ScreenSize.Column)
>   );
> But since Limit (equals to Line->Size) is larger than
> MainEditor.ScreenSize.Column, below for-loop doesn't successfully
> set the whole PrintLine to all-empty-space.
> for (; Limit < MainEditor.ScreenSize.Column; Limit++) {
>   PrintLine[Limit] = L' ';
> }
> So after the for-loop, PrintLine is still an empty string.
> Later in below call, the PrintLine2 is created based on PrintLine.
> ShellCopySearchAndReplace (
>   PrintLine, PrintLine2,
>   BufLen * 2, L"%", L"^%", FALSE, FALSE
>   );
> But due to the implementation of ShellCopySearchAndReplace(),
> PrintLine2 is untouched and INVALID_PARAMETER is returned.
> Finally an uninitialized string is passed to ShellPrintEx()
> which causes the #PF exception.
> 
> The fix is to reset Limit to StrLen(PrintLine) before for-loop.
> So that PrintLine can be converted from an empty string to a
> string containing all spaces.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ruiyu Ni 
> Cc: Jaben Carsey 
> Cc: Jian Wang 
> ---
>  ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> b/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> index 56ccd399b0..39a5afb53f 100644
> --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> @@ -500,7 +500,7 @@ FileBufferPrintLine (
>PrintLine = AllocatePool (BufLen);
>if (PrintLine != NULL) {
>  StrnCpyS (PrintLine, BufLen/sizeof(CHAR16), Buffer, MIN(Limit,
> MainEditor.ScreenSize.Column));
> -for (; Limit < MainEditor.ScreenSize.Column; Limit++) {
> +for (Limit = StrLen (PrintLine); Limit < MainEditor.ScreenSize.Column; 
> Limit++)
> {
>PrintLine[Limit] = L' ';
>  }
> 
> --
> 2.16.1.windows.1

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Re: [edk2] [PATCH edk2-non-osi v2 3/4] Hisilicon/D06: Add binary modules

[Leif Lindholm]

On Thu, Aug 16, 2018 at 10:14:14AM +0800, Ming wrote:
> 在 8/15/2018 11:27 PM, Leif Lindholm 写道:
> > Thanks, this commit message is a lot better.
> > 
> > My only concern with this patch is that the binaries are built with a
> > truly ancient toolchain. Is there some particular reason for this?
> 
> In internally, we share build server with product project, so we follow
> product project rhythm for upgrade toolchain.

Fully understandable.

However, I would strongly recommend upgrading _that_ toolchain.
4.8 was the first version of GCC that supported AArch64 upstream.
There have been very many improvements made, both in performance and
code correctness, since then.

Also, anything < GCC5 will miss out on link-time optimisation.
But this is a conversation we can have off-line Linaro<->Hisilicon.

Anyway, for this patch:
Reviewed-by: Leif Lindholm 
(I will push it with the corresponding edk2-platforms patch when
ready.)

/
Leif

> > 
> > /
> > Leif
> > 
> > On Tue, Aug 14, 2018 at 04:04:50PM +0800, Ming Huang wrote:
> >> Description per Module:
> >> GetInfoFromBmc:
> >>   Get board infomation from BMC and install a protocal.
> >> IoInitDxe:
> >>   Serdes initialization and PCIe port initialization and SMMU workaround.
> >> IpmiInterfacePei:
> >>   Install PEI ipmi interface PPI.
> >> IpmiInterfaceDxe:
> >>   Install DXE ipmi interface protocal.
> >> IpmiMiscOpDxe:
> >>   Send some OEM info to BMC via ipmi protocal.
> >> IpmiWatchdogDxe:
> >>   Manage the out of band watchdog timer in BMC.
> >> SnpDxe:
> >>   Snp driver for D06 debug on board net card.
> >> PcieRasInitDxe:
> >>   Initialize PCIe RAS function for all PCIe root port and end point.
> >> RasInitDxe:
> >>   Configure and enable RAS.
> >> SfcDxeDriver:
> >>   SPI flash driver.
> >> SasDxeDriver:
> >>   SAS driver for on board SAS controller.
> >> UefiSmi:
> >>   VGA driver for on board VGA device(SM750).
> >> TransSmbiosInfo:
> >>   Send SMBIOS infomation to BMC via ipmi.
> >> OemAddressMapD06:
> >>   Provide function for configuration components of chips.
> >> MemoryInitPeim:
> >>   Peim for memory initialization.
> >> Hi1620SerdesLib:
> >>   Library for initialization Hi1620 serdes.
> >> LpcLib:
> >>   Include LpcInit, LpcByteWrite and LpcByteRead functions.
> >> PlatformSysCtrlLibHi1620:
> >>   Provide Misc function needed by other modules.
> >> FVMAIN_SEC.Fv:
> >>   A Fv for SEC binary.
> >> bl1.bin/fip.bin:
> >>   Trusted Firmware module.
> >>
> >> Build commit infomation:
> >> edk2:   871c57754c1d
> >> edk2-platforms: 820af7623c42
> >> HwPkg:  a7947372749e
> >> TrustedFirmware: cccdae6ff768
> >> Tools:  6b286b119422
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Ming Huang 
> >> ---
> >>  Platform/Hisilicon/D06/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf  
> >>  |  26 
> >>  Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf
> >>  |  27 
> >>  Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf 
> >>  |  28 +
> >>  Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf 
> >>  |  27 
> >>  Platform/Hisilicon/D06/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf
> >>  |  27 
> >>  Platform/Hisilicon/D06/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf
> >>  |  27 
> >>  Platform/Hisilicon/D06/Drivers/Net/SnpHi1620NewDxe/SnpDxe.inf 
> >>  |  27 
> >>  Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.inf  
> >>  |  26 
> >>  Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.inf  
> >>  |  25 
> >>  Platform/Hisilicon/D06/Drivers/SFC/SfcDxeDriver.inf   
> >>  |  27 
> >>  Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf   
> >>  |  27 
> >>  Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf   
> >>  |  32 +++
> >>  Platform/Hisilicon/D06/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf 
> >>  |  26 
> >>  Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.inf  
> >>  |  40 ++
> >>  Platform/Hisilicon/D06/MemoryInitPei/MemoryInitPeim.inf   
> >>  |  28 +
> >>  Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf 
> >>  |  43 
> >>  Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf  
> >>  |  39 ++
> >>  
> >> Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.inf
> >>  |  43 
> >>  

Re: [edk2] [PATCH v2 edk-platforms 1/3] Silicon/Hi3660: fix LDO9_VSET register definition

[Leif Lindholm]

On Thu, Aug 16, 2018 at 09:49:24AM +0800, Haojian Zhuang wrote:
> Fix the LDO9_VSET register definition in PMIC. LDO9 is used
> by Designware SD controller. Without this fix, SD controller
> fails to operate SD card since lack of right voltage setting.
> 
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang 

Reviewed-by: Leif Lindholm 
Pushed as d11581e5fd.

> ---
>  Silicon/Hisilicon/Hi3660/Include/Hi3660.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h 
> b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h
> index 5fbf32267657..6e0587f7783a 100644
> --- a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h
> +++ b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h
> @@ -58,7 +58,7 @@
>  #define USB3OTG_PHY_CR_CAP_ADDR (1 << 0)
>  
>  #define PMU_REG_BASE0xFFF34000
> -#define PMIC_LDO9_VSET_REG  (PMU_REG_BASE + (0x068 << 2))
> +#define PMIC_LDO9_VSET_REG  (PMU_REG_BASE + (0x06b << 2))
>  #define LDO9_VSET_MASK  (7 << 0)
>  
>  #define PMIC_LDO16_ONOFF_ECO_REG(PMU_REG_BASE + (0x078 << 2))
> -- 
> 2.7.4
> 
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[edk2] [edk2-wiki PATCH 0/2] document the Soft and Hard Feature Freezes

[Laszlo Ersek]

The recently added "EDK II Release Planning" wiki page refers to the
Soft and Hard Feature Freezes, but the definitions are missing. This
series provides them, and updates the planning page to link them.

The pages can be read "live" in my wiki clone, by starting from

  https://github.com/lersek/edk2/wiki/EDK-II-Release-Planning

and by following the links. (At commit 3a54508927ce, pointed-to by both
the "soft_hard_freeze" and "master" branches.)

Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Michael D Kinney 

Thanks,
Laszlo

Laszlo Ersek (2):
  release planning: describe the hard and soft feature freezes
  release planning: link soft and hard feature freeze definitions

 EDK-II-Release-Planning.md | 12 +++---
 HardFeatureFreeze.md   |  6 +++
 SoftFeatureFreeze.md   | 42 
 3 files changed, 54 insertions(+), 6 deletions(-)
 create mode 100644 HardFeatureFreeze.md
 create mode 100644 SoftFeatureFreeze.md

-- 
2.14.1.3.gb7cf6e02401b

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[edk2] [edk2-wiki PATCH 1/2] release planning: describe the hard and soft feature freezes

[Laszlo Ersek]

Adopt QEMU's definitions for the soft and hard feature freezes, and update
them for the edk2 process.

(In particular, while we don't forbid such pull requests that are
submitted to the mailing list, we usually apply patches from emails with
git-am, rather than merge remote branches.)

Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek 
---
 HardFeatureFreeze.md |  6 +++
 SoftFeatureFreeze.md | 42 
 2 files changed, 48 insertions(+)

diff --git a/HardFeatureFreeze.md b/HardFeatureFreeze.md
new file mode 100644
index ..01288dd03f71
--- /dev/null
+++ b/HardFeatureFreeze.md
@@ -0,0 +1,6 @@
+After the hard feature freeze, the master branch in git is no longer open for
+general development. Only bug fixes will be accepted until the next [stable
+tag](EDK-II#stable-tags).
+
+(This definition is modeled after QEMU's [hard feature
+freeze](https://wiki.qemu.org/Planning/HardFeatureFreeze)).
diff --git a/SoftFeatureFreeze.md b/SoftFeatureFreeze.md
new file mode 100644
index ..9dc7d9c19369
--- /dev/null
+++ b/SoftFeatureFreeze.md
@@ -0,0 +1,42 @@
+# What is the soft feature freeze?
+
+The soft feature freeze is the beginning of the stabilization phase of edk2's
+development process. By the date of the soft feature freeze,  developers must
+have sent their patches to the mailing list **and** received positive
+maintainer reviews (`Reviewed-by` or `Acked-by` tags). This means that
+features, and in particular non-trivial ones, must have been accepted by
+maintainers before the soft freeze date.
+
+Between the soft feature freeze and the [hard feature
+freeze](HardFeatureFreeze), previously reviewed and unit-tested features may be
+applied (or merged) to the master branch, for integration testing. Feature
+addition or enablement patches posted **or** reviewed after the soft feature
+freeze will be delayed until after the upcoming [stable
+tag](EDK-II#stable-tags).
+
+# What should I do by the soft feature freeze?
+
+As a maintainer, for any feature that you're targeting to the next [stable
+tag](EDK-II#stable-tags), you should make sure that you've reviewed and
+accepted the patches related to the feature.
+
+As a developer, you probably should target a date that is at least 1-2 weeks
+earlier than the soft freeze date. This will give the maintainer enough time to
+review and test your patches. For major features you should probably
+communicate with the maintainer about their intentions. It also helps if you:
+
+- Enter a Bugzilla ticket for the [TianoCore Feature
+  
Requests](https://bugzilla.tianocore.org/enter_bug.cgi?product=Tianocore%20Feature%20Requests)
+  product.
+
+- Optionally, write a Feature page in the [edk2 wiki](Home) describing the
+  feature and the motivation.
+
+- On the [release planning wiki page](EDK-II-Release-Planning), link to your
+  Bugzilla entry and/or the feature wiki page.
+
+- Do all this early enough that you can work with the maintainer to get the
+  review process underway.
+
+(This definition is modeled after QEMU's [soft feature
+freeze](https://wiki.qemu.org/Planning/SoftFeatureFreeze).)
-- 
2.14.1.3.gb7cf6e02401b


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[edk2] [edk2-wiki PATCH 2/2] release planning: link soft and hard feature freeze definitions

[Laszlo Ersek]

The "description" column refers to Soft Freeze and Hard Freeze, without
explaining them. Link the definitions added in the previous patch.

Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek 
---
 EDK-II-Release-Planning.md | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/EDK-II-Release-Planning.md b/EDK-II-Release-Planning.md
index aee22d6bb548..744770521cca 100644
--- a/EDK-II-Release-Planning.md
+++ b/EDK-II-Release-Planning.md
@@ -2,12 +2,12 @@
 
 ## Proposed Schedule
 
-| Date   | Description  |
-| -- |  |
-| 2018-08-15 | Beginning of development |
-| 2018-11-01 | Soft Freeze  |
-| 2018-11-08 | Hard Freeze  |
-| 2018-11-15 | Release  |
+| Date   | Description  |
+| -- |  |
+| 2018-08-15 | Beginning of development |
+| 2018-11-01 | [Soft Feature Freeze](SoftFeatureFreeze) |
+| 2018-11-08 | [Hard Feature Freeze](HardFeatureFreeze) |
+| 2018-11-15 | Release  |
 
 ## Proposed Features
 
-- 
2.14.1.3.gb7cf6e02401b

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Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change Memory Type and address limitation.

[Laszlo Ersek]

On 08/16/18 02:56, Dong, Eric wrote:
> Hi Marvin & Laszlo,
> 
> I'm not very clear about the risk to use this function name. I think it is 
> just used in a driver as an internal function, other drivers or libraries 
> can't use it. I think we don't need to add internal prefix to all internal 
> functions in drivers, maybe need for the libraries, right?  Here we need to 
> add internal prefix just because it has similar name with other common API?

If I understood correctly, there were two points to Marvin's argument:

- AllocateZeroPages() is the most likely function name that
"MemoryAllocationLib.h" would add, *if* it ever introduced a function
for "allocating boot service data pages, plus zeroing them". In that
case, it would cause a conflict.

- Second, because the function is defined in the same translation unit
where it is called from (and there are no other callers), we can make
the function STATIC.

Regarding the first concern, I don't think it's a very practical one.
I'm neutral on the question. My point is only that, if we really want to
change the name, I think we should do it separately / incrementally.

Regarding the second idea, STATIC is a generally good practice, and we
should do that everywhere we can. But, because I don't want to re-test /
re-review this series after all this effort, I suggest we do the STATIC
thing incrementally as well.

Thanks
Laszlo


> 
> Thanks,
> Eric
> 
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>> Laszlo Ersek
>> Sent: Wednesday, August 15, 2018 11:30 PM
>> To: Marvin Häuser ; edk2-devel@lists.01.org;
>> Dong, Eric 
>> Cc: Ni, Ruiyu 
>> Subject: Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change
>> Memory Type and address limitation.
>>
>> On 08/15/18 15:12, Marvin Häuser wrote:
>>> Hey Eric and anyone CC'd,
>>>
>>> Are you sure you want to name the function "AllocateZeroPages"? It's
>>> analogous to "AllocateZeroPool", so I could see it becoming an API
>>> function at some point, which will conflict with this definition and
>>> might silently break UefiCpuPkg compilation if not tested before
>>> upstreaming. I usually make any module's private functions static and
>>> prefix "Internal" if possible, or, if static cannot be used,
>>> non-static plus prefix something derived from the module's name to
>>> achieve uniqueness. If I am not mistaken, this could be made static,
>>> couldn't it?
>>
>> I agree that the function's name is not optimal, primarily because the
>> Allocate*Pages() functions tend to take a page count, not a byte count.
>> However, I didn't want to ask for another version just because of this; a 
>> lot of
>> review (and now testing) has gone into this set, and this is just a wart.
>>
>> I suggest that -- after the stable tag -- we push v4 as-is; however, Marvin,
>> please go ahead and file a TianoCore BZ that depends on 959 (i.e. on the BZ
>> currently referenced in patch #5), about fixing up the function name (and
>> about making it static).
>>
>> Note that an "AllocateZeroPages" function exists in
>> "IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c" as well. I guess
>> both functions should be renamed (and likely not to the same new name,
>> because they have different parameter lists). And, only the UefiCpuPkg one
>> can be made static however. Either way, both packages could be covered by
>> the same BZ.
> 
> 
>>
>> Thanks
>> Laszlo
>> ___
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel

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Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change Memory Type and address limitation.

[Marvin Häuser]

Comments inline.

Thanks and best regards,
Marvin.

> -Original Message-
> From: Laszlo Ersek 
> Sent: Thursday, August 16, 2018 2:31 PM
> To: Dong, Eric ; Marvin Häuser
> ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu 
> Subject: Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change
> Memory Type and address limitation.
> 
> On 08/16/18 02:56, Dong, Eric wrote:
> > Hi Marvin & Laszlo,
> >
> > I'm not very clear about the risk to use this function name. I think it is 
> > just
> used in a driver as an internal function, other drivers or libraries can't 
> use it. I
> think we don't need to add internal prefix to all internal functions in 
> drivers,
> maybe need for the libraries, right?  Here we need to add internal prefix just
> because it has similar name with other common API?
> 
> If I understood correctly, there were two points to Marvin's argument:
> 
> - AllocateZeroPages() is the most likely function name that
> "MemoryAllocationLib.h" would add, *if* it ever introduced a function for
> "allocating boot service data pages, plus zeroing them". In that case, it 
> would
> cause a conflict.

Correct

> 
> - Second, because the function is defined in the same translation unit where
> it is called from (and there are no other callers), we can make the function
> STATIC.

Pretty much, but it was tied to the first point. There are many functions that 
could be static but aren't in edk2, so this isn't significant itself. I 
mentioned it due to my personal naming convention to ensure uniqueness.

> 
> Regarding the first concern, I don't think it's a very practical one.
> I'm neutral on the question. My point is only that, if we really want to 
> change
> the name, I think we should do it separately / incrementally.

If it's supposed to be done separately, I don't see a point in fixing it 
either, it can still be fixed if such an API is ever introduced. It was meant 
as a "preventive" suggestion to be included in this series. "Just in case"

> 
> Regarding the second idea, STATIC is a generally good practice, and we
> should do that everywhere we can. But, because I don't want to re-test / re-
> review this series after all this effort, I suggest we do the STATIC thing
> incrementally as well.

+1, but that's not worth an own patch to be honest. I should see whether there 
is some static analyzer that has checks for "can be static" some day.

> 
> Thanks
> Laszlo
> 
> 
> >
> > Thanks,
> > Eric
> >
> >> -Original Message-
> >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
> >> Of Laszlo Ersek
> >> Sent: Wednesday, August 15, 2018 11:30 PM
> >> To: Marvin Häuser ;
> >> edk2-devel@lists.01.org; Dong, Eric 
> >> Cc: Ni, Ruiyu 
> >> Subject: Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change
> >> Memory Type and address limitation.
> >>
> >> On 08/15/18 15:12, Marvin Häuser wrote:
> >>> Hey Eric and anyone CC'd,
> >>>
> >>> Are you sure you want to name the function "AllocateZeroPages"? It's
> >>> analogous to "AllocateZeroPool", so I could see it becoming an API
> >>> function at some point, which will conflict with this definition and
> >>> might silently break UefiCpuPkg compilation if not tested before
> >>> upstreaming. I usually make any module's private functions static
> >>> and prefix "Internal" if possible, or, if static cannot be used,
> >>> non-static plus prefix something derived from the module's name to
> >>> achieve uniqueness. If I am not mistaken, this could be made static,
> >>> couldn't it?
> >>
> >> I agree that the function's name is not optimal, primarily because
> >> the
> >> Allocate*Pages() functions tend to take a page count, not a byte count.
> >> However, I didn't want to ask for another version just because of
> >> this; a lot of review (and now testing) has gone into this set, and this is
> just a wart.
> >>
> >> I suggest that -- after the stable tag -- we push v4 as-is; however,
> >> Marvin, please go ahead and file a TianoCore BZ that depends on 959
> >> (i.e. on the BZ currently referenced in patch #5), about fixing up
> >> the function name (and about making it static).
> >>
> >> Note that an "AllocateZeroPages" function exists in
> >> "IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c" as well.
> >> I guess both functions should be renamed (and likely not to the same
> >> new name, because they have different parameter lists). And, only the
> >> UefiCpuPkg one can be made static however. Either way, both packages
> >> could be covered by the same BZ.
> >
> >
> >>
> >> Thanks
> >> Laszlo
> >> ___
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> >> edk2-devel@lists.01.org
> >> https://lists.01.org/mailman/listinfo/edk2-devel

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[edk2] [PATCH edk2-platforms v3 27/36] Hisilicon/D06: add apei driver

[Ming Huang]

From: Luqi Jiang 

This driver provide a means for the platform to
convey error information to OSPM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Luqi Jiang 
---
 Platform/Hisilicon/D06/D06.dsc   |   1 +
 Platform/Hisilicon/D06/D06.fdf   |   1 +
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf   |  59 +++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h |  41 +++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h|  43 +++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h| 146 
 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 110 ++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h| 146 
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h|  59 +++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h|  43 +++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 108 ++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c|  92 +
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c| 349 
++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 330 
+
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c| 374 

 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c| 119 +++
 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c| 337 
++
 17 files changed, 2358 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index c6de9f04ad..9550e0d497 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -340,6 +340,7 @@
   Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
   Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
 
+  Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf
   Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf
   #
   # Usb Support
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index bd3ea47226..90379b8558 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -251,6 +251,7 @@ READ_LOCK_STATUS   = TRUE
 
   INF RuleOverride=ACPITABLE 
Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
   INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
+  INF Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf
 
   INF Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf
 
diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf 
b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf
new file mode 100644
index 00..92b61db9e1
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf
@@ -0,0 +1,59 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+[defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = AcpiApei
+  FILE_GUID  = E9570C39-EF68-4fc6-B921-C1954A87CCD2
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= ApeiEntryPoint
+
+[sources.common]
+  Apei.c
+  Bert/bert.c
+  Einj/einj.c
+  Erst/erst.c
+  Hest/hest.c
+  ErrorSource/Ghes.c
+  OemApeiHi1620.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  ArmSmcLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  TimerLib
+  UefiDriverEntryPoint
+  UefiRuntimeServicesTableLib
+
+[Guids]
+  gOemConfigGuid
+
+[Protocols]
+  gEfiAcpiSdtProtocolGuid
+  gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+
+[Pcd]
+  gHisiTokenSpaceGuid.PcdCpldBaseAddress
+  gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable
+
+[Depex]
+  gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h 
b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h
new file mode 100644
index 00..ed8ec417cb
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h
@@ -0,0 +1,41 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR 

[edk2] [PATCH edk2-platforms v3 25/36] Platform/Hisilicon/D06: Add EarlyConfigPeim peim

[Ming Huang]

This peim configuare SMMU,BSP,MN(Miscellaneous Node).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc|   1 +
 Platform/Hisilicon/D06/D06.fdf|   1 +
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf |  50 +
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h  |   2 +
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c   | 107 

 5 files changed, 161 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 5571028f42..3de09ea870 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -263,6 +263,7 @@
   MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
   MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
 
+  Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
   Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
 
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index 184d5d4dcf..bd3ea47226 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -359,6 +359,7 @@ READ_LOCK_STATUS   = TRUE
   INF ArmPkg/Drivers/CpuPei/CpuPei.inf
   INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
   INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
+  INF Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
 
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 
diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf 
b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
new file mode 100644
index 00..8296ee02de
--- /dev/null
+++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
@@ -0,0 +1,50 @@
+#/** @file
+#
+#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+#This program and the accompanying materials
+#are licensed and made available under the terms and conditions of the BSD 
License
+#which accompanies this distribution. The full text of the license may be 
found at
+#http://opensource.org/licenses/bsd-license.php
+#
+#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#**/
+
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = EarlyConfigPeimD06
+  FILE_GUID  = FB8C65EB-0199-40C3-A82B-029921A9E9B3
+  MODULE_TYPE= PEIM
+  VERSION_STRING = 1.0
+  ENTRY_POINT= EarlyConfigEntry
+
+[Sources.common]
+  EarlyConfigPeimD06.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  ArmLib
+  CacheMaintenanceLib
+  DebugLib
+  IoLib
+  PcdLib
+  PeimEntryPoint
+  PlatformSysCtrlLib
+
+[Pcd]
+  gHisiTokenSpaceGuid.PcdMailBoxAddress
+  gHisiTokenSpaceGuid.PcdPeriSubctrlAddress
+  gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable
+
+[Depex]
+## As we will clean mailbox in this module, need to wait memory init complete
+  gEfiPeiMemoryDiscoveredPpiGuid
diff --git a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h 
b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
index 332a79343f..b330be09ba 100644
--- a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
+++ b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
@@ -16,6 +16,8 @@
 #ifndef _OEM_ADDRESS_MAP_LIB_H_
 #define _OEM_ADDRESS_MAP_LIB_H_
 
+#include "PlatformArch.h"
+
 typedef struct _DDRC_BASE_ID{
 UINTN  Base;
 UINTN  Id;
diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c 
b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
new file mode 100644
index 00..0790f7941a
--- /dev/null
+++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
@@ -0,0 +1,107 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PERI_SUBCTRL_BASE   (0x4000)
+#define MDIO_SUBCTRL_BASE   (0x6000)
+#define PCIE2_SUBCTRL_BASE  

[edk2] [PATCH edk2-platforms v3 26/36] Platform/Hisilicon/D06: Add PciHostBridgeLib

[Ming Huang]

PciHostBridgeLib which is need by PciHostBridgeDxe, provide
root bridges and deal with resource conflict.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc   |   2 +-
 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf |  36 ++
 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c   | 635 

 3 files changed, 672 insertions(+), 1 deletion(-)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 3de09ea870..c6de9f04ad 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -418,7 +418,7 @@
 
   
PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
-  
PciHostBridgeLib|MdeModulePkg/Library/PciHostBridgeLibNull/PciHostBridgeLibNull.inf
+  
PciHostBridgeLib|Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf
   }
 
   MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
diff --git 
a/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf 
b/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf
new file mode 100644
index 00..8a998681a3
--- /dev/null
+++ b/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf
@@ -0,0 +1,36 @@
+## @file
+#
+#  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#  Copyright (c) 2018, Linaro Limited. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD 
License
+#  which accompanies this distribution. The full text of the license may be 
found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = PciHostBridgeLib
+  FILE_GUID  = 61b7276a-fc67-11e5-82fd-47ea9896dd5d
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PciHostBridgeLib|DXE_DRIVER
+
+[Sources]
+  PciHostBridgeLib.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  DevicePathLib
+  MemoryAllocationLib
+  UefiBootServicesTableLib
diff --git a/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c 
b/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c
new file mode 100644
index 00..d1a436d9bc
--- /dev/null
+++ b/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -0,0 +1,635 @@
+/** @file
+
+  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+  Copyright (c) 2018, Linaro Limited. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ENUM_HB_NUM 8
+
+#define EFI_PCI_SUPPORT   (EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | \
+   EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO | \
+   EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | \
+   EFI_PCI_ATTRIBUTE_ISA_IO_16  | \
+   EFI_PCI_ATTRIBUTE_VGA_MEMORY | \
+   EFI_PCI_ATTRIBUTE_VGA_IO_16  | \
+   EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16)
+
+#define EFI_PCI_ATTRIBUTE  EFI_PCI_SUPPORT
+
+#pragma pack(1)
+typedef struct {
+  ACPI_HID_DEVICE_PATH AcpiDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
+#pragma pack ()
+
+STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath 
[ENUM_HB_NUM] = {
+//Host Bridge 0
+  {
+{
+  {
+ACPI_DEVICE_PATH,
+ACPI_DP,
+{
+  (UINT8)sizeof (ACPI_HID_DEVICE_PATH),
+  (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
+}
+  },
+  EISA_PNP_ID(0x0A03), // PCI
+  0
+},
+{
+  END_DEVICE_PATH_TYPE,
+  END_ENTIRE_DEVICE_PATH_SUBTYPE,
+  {
+END_DEVICE_PATH_LENGTH,
+0
+  }
+}
+  },
+
+//Host Bridge 2
+  {
+{
+  {
+ACPI_DEVICE_PATH,
+ACPI_DP,
+{
+  (UINT8)sizeof (ACPI_HID_DEVICE_PATH),
+  (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
+}
+  },
+  EISA_PNP_ID(0x0A04), // PCI
+  0
+},
+{

[edk2] [PATCH edk2-platforms v3 30/36] Silicon/Hisilicon/D06: Modify for close slave core clock.

[Ming Huang]

From: ZhenYao 

When BIOS booting, the power consumption is too high, so need close
some clusters clock that don't work to reduce power consumption.

The implementation of functions is in edk2-non-osi.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: ZhenYao 
---
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
index ec2b9a36e7..3ccfc6bee3 100644
--- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
+++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
@@ -102,5 +102,8 @@ VOID PlatformEventBroadcastConfig(VOID);
 UINTN GetDjtagRegBase(UINT32 NodeId);
 VOID LlcCleanInvalidateAsm(VOID);
 VOID PlatformMdioInit(VOID);
+VOID DisableClusterClock(UINTN CpuClusterBase);
+VOID EnableClusterClock(UINTN CpuClusterBase);
+VOID DisableSocketClock (UINT8 Skt);
 
 #endif
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 33/36] Silicon/Hisilicon/setup: Support SMMU switch

[Ming Huang]

Select without SMMU iort while SMMU item is disable,
Select with SMMU iort while SMMU item is enable.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 88 

 1 file changed, 88 insertions(+)

diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c 
b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
index 32878ca4f9..e0c29e0f57 100644
--- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
+++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
@@ -24,6 +24,90 @@
 
 #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET)
 
+#define FIELD_IORT_NODE_OFFSET 40
+
+typedef enum {
+  NodeTypeIts = 0,
+  NodeTypeNameComponent,
+  NodeTypePciRC,
+  NodeTypeSmmuV1,
+  NodeTypeSmmuV3,
+  NodeTypePMCG
+} IORT_NODE_TYPE;
+
+#pragma pack(1)
+typedef struct {
+  UINT8   Type;
+  UINT16  Length;
+  UINT8   Revision;
+  UINT32  Reserved;
+  UINT32  IdMapNumber;
+  UINT32  IdArrayOffset;
+} IORT_NODE_HEAD;
+#pragma pack()
+
+BOOLEAN
+IsIortWithSmmu (
+  IN EFI_ACPI_DESCRIPTION_HEADER  *TableHeader
+  )
+{
+  UINT32   *NodeOffset;
+  UINT32   NextOffset;
+  IORT_NODE_HEAD   *Node;
+
+  NodeOffset = (UINT32 *)((UINT8 *)TableHeader + FIELD_IORT_NODE_OFFSET);
+  NextOffset = *NodeOffset;
+
+  while (NextOffset < TableHeader->Length) {
+Node = (IORT_NODE_HEAD *)((UINT8 *)TableHeader + NextOffset);
+NextOffset += Node->Length;
+
+if ((Node->Type == NodeTypeSmmuV1) || (Node->Type == NodeTypeSmmuV3)) {
+  return TRUE;
+}
+  }
+
+  return FALSE;
+}
+
+EFI_STATUS
+SelectIort (
+  IN EFI_ACPI_DESCRIPTION_HEADER  *TableHeader
+  )
+{
+  EFI_STATUS  Status;
+  UINTN   Size;
+  OEM_CONFIG_DATA Configuration;
+
+  Configuration.EnableSmmu = 0;
+  Size = sizeof (OEM_CONFIG_DATA);
+  Status = gRT->GetVariable (
+  OEM_CONFIG_NAME,
+  ,
+  NULL,
+  ,
+  
+  );
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "Get OemConfig variable (%r).\n", Status));
+  }
+
+  Status =  EFI_SUCCESS;
+  if (IsIortWithSmmu (TableHeader)) {
+if (!Configuration.EnableSmmu) {
+  Status = EFI_ABORTED;
+}
+  } else {
+if (Configuration.EnableSmmu) {
+  Status = EFI_ABORTED;
+}
+  }
+  DEBUG ((DEBUG_INFO, "SmmuEnable=%x, return %r for Iort table.\n",
+  Configuration.EnableSmmu, Status));
+
+  return Status;
+}
+
 STATIC
 VOID
 RemoveUnusedMemoryNode (
@@ -151,6 +235,10 @@ UpdateAcpiTable (
   case EFI_ACPI_6_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE:
 Status = UpdateSlit (TableHeader);
 break;
+
+  case EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE:
+Status = SelectIort (TableHeader);
+break;
   case EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE:
 Status = IsNeedSpcr (TableHeader);
 break;
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 29/36] Platform/Hisilicon/D06: Add capsule upgrade support

[Ming Huang]

This module support updating the boot CPU firmware only.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc 
  | 14 
 Platform/Hisilicon/D06/D06.fdf 
  | 72 -
 
Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 | 50 
 
Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
| 70 +
 
Platform/Hisilicon/D06/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
 | 46 +++
 
Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
| 81 
 6 files changed, 332 insertions(+), 1 deletion(-)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 9550e0d497..fad6fcc747 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -121,6 +121,11 @@
   gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
   gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE
   gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
+[PcdsDynamicExDefault.common.DEFAULT]
+  
gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 
0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 
0x04, 0x89}
+  gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 
0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 
0x7b, 0x55}
+
 
 [PcdsFixedAtBuild.common]
   gArmPlatformTokenSpaceGuid.PcdCoreCount|48
@@ -266,6 +271,7 @@
   Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
   Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
 
+  
Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
 
   
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
@@ -386,6 +392,8 @@
   MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
   MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
   MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+  SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
+  MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
   #
   # FAT filesystem + GPT/MBR partitioning
   #
@@ -434,6 +442,12 @@
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+  SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
+
+  
FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
+  }
+
+  MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
 
   #
   # UEFI application (Shell Embedded Boot Loader)
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index 90379b8558..8c3f4f9932 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -308,7 +308,9 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
 
   INF 
Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
-  INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
+  INF 
SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
+  INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
+
   #
   # Build Shell from latest source code instead of prebuilt binary
   #
@@ -364,11 +366,79 @@ READ_LOCK_STATUS   = TRUE
 
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 
+  INF RuleOverride = FMP_IMAGE_DESC 
Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
   FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = 
TRUE {
   SECTION FV_IMAGE = FVMAIN
 }
   }
+[FV.CapsuleDispatchFv]
+FvAlignment= 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED  = TRUE
+STICKY_WRITE   = TRUE
+LOCK_CAP   = TRUE
+LOCK_STATUS= TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS   = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS= TRUE
+READ_LOCK_CAP  = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF 
SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
+
+[FV.SystemFirmwareUpdateCargo]
+FvAlignment= 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED  = TRUE
+STICKY_WRITE   = TRUE
+LOCK_CAP   = TRUE
+LOCK_STATUS= TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS   = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE

[edk2] [PATCH edk2-platforms v3 15/36] Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06

[Ming Huang]

I2C may enable failed in D06, so retry I2C enable while
enable failed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c 
b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
index 9174e50dd4..d67ddc7f9b 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
@@ -86,6 +86,7 @@ I2C_Enable (
 {
   I2C0_ENABLE_U   I2cEnableReg;
   I2C0_ENABLE_STATUS_UI2cEnableStatusReg;
+  UINT32  TimeCnt = I2C_READ_TIMEOUT;
 
   UINTN Base = GetI2cBase (Socket, Port);
 
@@ -93,13 +94,18 @@ I2C_Enable (
   I2cEnableReg.bits.enable = 1;
   I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
 
+  do {
+// This is a empirical value for I2C delay. MemoryFance is no need here.
+I2C_Delay (1);
 
-  I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
-  if (I2cEnableStatusReg.bits.ic_en == 1) {
-return EFI_SUCCESS;
-  } else {
-return EFI_DEVICE_ERROR;
-  }
+TimeCnt--;
+I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
+if (TimeCnt == 0) {
+  return EFI_DEVICE_ERROR;
+}
+  } while (I2cEnableStatusReg.bits.ic_en == 0);
+
+  return EFI_SUCCESS;
 }
 
 VOID
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 14/36] Silicon/Hisilicon/I2C: Refactor I2C library

[Ming Huang]

The hunk of waiting TX/TX finish is used by ten times,
so move there hunks to a function CheckI2CTimeOut().

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Library/I2CLib/I2CHw.h  |   4 +
 Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 161 
 2 files changed, 66 insertions(+), 99 deletions(-)

diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h 
b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
index aa561e929c..fa954c7937 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
@@ -265,5 +265,9 @@
  UINT32  Val32;
  } I2C0_ENABLE_STATUS_U;
 
+typedef enum {
+  I2CTx,
+  I2CRx
+} I2CTransfer;
 
 #endif
diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c 
b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
index f03d55d6b2..9174e50dd4 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
@@ -238,6 +238,45 @@ I2C_GetRxStatus (
   return Fifo.bits.rxflr;
 }
 
+EFI_STATUS
+EFIAPI
+CheckI2CTimeOut (
+  UINT32  Socket,
+  UINT8   Port,
+  I2CTransfer Transfer
+  )
+{
+  UINT32 Times = 0;
+  UINT32 Fifo;
+
+  if (Transfer == I2CTx) {
+Fifo = I2C_GetTxStatus (Socket, Port);
+while (Fifo != 0) {
+  // This is a empirical value for I2C delay. MemoryFance is no need here.
+  I2C_Delay (2);
+  if (++Times > I2C_READ_TIMEOUT) {
+(VOID)I2C_Disable (Socket, Port);
+return EFI_TIMEOUT;
+  }
+  Fifo = I2C_GetTxStatus (Socket, Port);
+}
+  } else {
+Fifo = I2C_GetRxStatus (Socket, Port);
+while (Fifo == 0) {
+  // This is a empirical value for I2C delay. MemoryFance is no need here.
+  I2C_Delay (2);
+  if (++Times > I2C_READ_TIMEOUT) {
+(VOID)I2C_Disable (Socket, Port);
+return EFI_TIMEOUT;
+  }
+  Fifo = I2C_GetRxStatus (Socket, Port);
+}
+  }
+
+  return EFI_SUCCESS;
+}
+
+
 EFI_STATUS
 EFIAPI
 WriteBeforeRead (
@@ -254,15 +293,11 @@ WriteBeforeRead (
 
   I2C_SetTarget (I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddress);
 
-  Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
-  while (Fifo != 0) {
-I2C_Delay (2);
-if (++Times > I2C_READ_TIMEOUT) {
-  return EFI_TIMEOUT;
-}
-Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
+  if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
+return EFI_TIMEOUT;
   }
 
+  Fifo = 0;
   for (Count = 0; Count < Length; Count++) {
 Times = 0;
 while (Fifo > I2C_TXRX_THRESHOLD) {
@@ -277,15 +312,8 @@ WriteBeforeRead (
 Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
   }
 
-  Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
-  Times = 0;
-  while (Fifo != 0) {
-I2C_Delay (2);
-
-if (++Times > I2C_READ_TIMEOUT) {
-  return EFI_TIMEOUT;
-}
-Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
+  if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
+return EFI_TIMEOUT;
   }
 
   return EFI_SUCCESS;
@@ -316,14 +344,8 @@ I2CWrite(
 
   I2C_SetTarget(I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddress);
 
-  Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
-  while (Fifo != 0) {
-I2C_Delay (2);
-if (++Times > I2C_READ_TIMEOUT) {
-  (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
-  return EFI_TIMEOUT;
-}
-Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
+  if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
+return EFI_TIMEOUT;
   }
 
   if (I2cInfo->DeviceType) {
@@ -333,15 +355,8 @@ I2CWrite(
 I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff);
   }
 
-  Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
-  Times = 0;
-  while (Fifo != 0) {
-I2C_Delay (2);
-if (++Times > I2C_READ_TIMEOUT) {
-  (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
-  return EFI_TIMEOUT;
-}
-Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
+  if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
+return EFI_TIMEOUT;
   }
 
   for (Idx = 0; Idx < Length; Idx++) {
@@ -364,17 +379,8 @@ I2CWrite(
 }
   }
 
-  Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
-  Times = 0;
-  while (Fifo != 0) {
-I2C_Delay (2);
-
-if (++Times > I2C_READ_TIMEOUT) {
-  DEBUG ((DEBUG_ERROR, "I2C Write try to finished,time out!\n"));
-  (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
-  return EFI_TIMEOUT;
-}
-Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
+  if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
+return EFI_TIMEOUT;
   }
   (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
 
@@ -390,8 +396,6 @@ I2CRead(
   UINT8 *pBuf
   )
 {
-  UINT32  Fifo;
-  UINT32  Times = 0;
   UINT8   I2CWAddr[2];
   EFI_STATUS  Status;
   UINT32  Idx = 0;
@@ -422,15 +426,8 

[edk2] [PATCH edk2-platforms v3 16/36] Silicon/Hisilicon/D06: Add I2C delay for HNS auto config

[Ming Huang]

Because I2C Port5 salve device connect under I2C extender
(9545 device), it will cost more time to access I2C slave
device, so add delay time for HNS auto config.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Library/I2CLib/I2CHw.h  |  3 +++
 Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 21 +++-
 2 files changed, 19 insertions(+), 5 deletions(-)

diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h 
b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
index fa954c7937..d77aea509e 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
@@ -19,6 +19,9 @@
 #include 
 #include 
 
+// The HNS I2C port 5 is under I2C extender
+#define I2C_EXTENDER_PORT_HNS5
+
 #define I2C_READ_TIMEOUT 500
 #define I2C_DRV_ONCE_WRITE_BYTES_NUM 8
 #define I2C_DRV_ONCE_READ_BYTES_NUM  8
diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c 
b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
index d67ddc7f9b..59633106ce 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
@@ -258,8 +258,13 @@ CheckI2CTimeOut (
   if (Transfer == I2CTx) {
 Fifo = I2C_GetTxStatus (Socket, Port);
 while (Fifo != 0) {
-  // This is a empirical value for I2C delay. MemoryFance is no need here.
-  I2C_Delay (2);
+  if (Port == I2C_EXTENDER_PORT_HNS) {
+// This is a empirical value for I2C delay. MemoryFance is no need 
here.
+I2C_Delay (1000);
+  } else {
+// This is a empirical value for I2C delay. MemoryFance is no need 
here.
+I2C_Delay (2);
+  }
   if (++Times > I2C_READ_TIMEOUT) {
 (VOID)I2C_Disable (Socket, Port);
 return EFI_TIMEOUT;
@@ -269,8 +274,13 @@ CheckI2CTimeOut (
   } else {
 Fifo = I2C_GetRxStatus (Socket, Port);
 while (Fifo == 0) {
-  // This is a empirical value for I2C delay. MemoryFance is no need here.
-  I2C_Delay (2);
+  if (Port == I2C_EXTENDER_PORT_HNS) {
+// This is a empirical value for I2C delay. MemoryFance is no need 
here.
+I2C_Delay (1000);
+  } else {
+// This is a empirical value for I2C delay. MemoryFance is no need 
here.
+I2C_Delay (2);
+  }
   if (++Times > I2C_READ_TIMEOUT) {
 (VOID)I2C_Disable (Socket, Port);
 return EFI_TIMEOUT;
@@ -369,7 +379,8 @@ I2CWrite(
 Times = 0;
 Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
 while (Fifo > I2C_TXRX_THRESHOLD) {
-  I2C_Delay (2);
+  // This is a empirical value for I2C delay. MemoryFance is no need here.
+  I2C_Delay (1000);
   if (++Times > I2C_READ_TIMEOUT) {
 (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
 return EFI_TIMEOUT;
-- 
2.17.0

___
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edk2-devel@lists.01.org
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[edk2] [PATCH edk2-platforms v3 20/36] Hisilicon/Hi1620: Add ACPI PPTT table

[Ming Huang]

From: Heyi Guo 

This driver fetches information from MADT,  so it is adaptable for
partial good and 1P/2P, since MADT is updated for different
configurations by certain mechanism.

Since L2 cache is also private resource of core, so we need to set the
next level of cache for L1I and L1D, which is important for OS to
parse cache hierarchy.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
---
 Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf |  48 ++
 Silicon/Hisilicon/Hi1620/Pptt/Pptt.h   |  68 +++
 Silicon/Hisilicon/Hi1620/Pptt/Pptt.c   | 543 
 3 files changed, 659 insertions(+)

diff --git a/Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf 
b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf
new file mode 100644
index 00..f8a5ed33a4
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf
@@ -0,0 +1,48 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+*  Based on the files under Platform/ARM/JunoPkg/AcpiTables/
+*
+**/
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = AcpiPptt
+  FILE_GUID  = 65766562-49e7-11e8-817f-286ed489ee9b
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= PpttEntryPoint
+
+[Sources.common]
+  Pptt.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  ArmLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  UefiDriverEntryPoint
+  UefiRuntimeServicesTableLib
+
+[Protocols]
+  gEfiAcpiSdtProtocolGuid   ## PROTOCOL ALWAYS_CONSUMED
+  gEfiAcpiTableProtocolGuid ## PROTOCOL ALWAYS_CONSUMED
+
+[Depex]
+  gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
+
diff --git a/Silicon/Hisilicon/Hi1620/Pptt/Pptt.h 
b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.h
new file mode 100644
index 00..5f2ec67cb9
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.h
@@ -0,0 +1,68 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+*  Based on the files under Platform/ARM/JunoPkg/AcpiTables/
+*
+**/
+
+#ifndef _PPTT_H_
+#define _PPTT_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PPTT_VENDOR_ID SIGNATURE_32('H', 'I', 'S', 'I')
+
+#define EFI_ACPI_MAX_NUM_TABLES20
+
+#define MAX_SCL_PER_SOCKET MAX_DIE
+#define MAX_SCL(MAX_SOCKET * MAX_SCL_PER_SOCKET)
+#define MAX_CLUSTER_PER_SCL8
+
+#define PPTT_TABLE_MAX_LEN 0x6000
+#define PPTT_SOCKET_COMPONENT_NO   0x1
+#define PPTT_CACHE_NO  0x4
+
+typedef union {
+  struct {
+UINT32InD   :1;
+UINT32Level :3;
+UINT32Reserved  :28;
+  } Bits;
+  UINT32 Data;
+} CSSELR_DATA;
+
+typedef union {
+  struct {
+UINT32LineSize   :3;
+UINT32Associativity  :10;
+UINT32NumSets:15;
+UINT32Wa :1;
+UINT32Ra :1;
+UINT32Wb :1;
+UINT32Wt :1;
+  } Bits;
+  UINT32 Data;
+} CCSIDR_DATA;
+
+#endif// _PPTT_H_
+
diff --git a/Silicon/Hisilicon/Hi1620/Pptt/Pptt.c 
b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.c
new file mode 100644
index 00..944b4b9507
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.c
@@ -0,0 +1,543 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR 

[edk2] [PATCH edk2-platforms v3 23/36] Platform/Hisilicon/D06: Add OemNicConfig2P Driver

[Ming Huang]

This Driver provide Get/Set Mac function.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc |  2 +-
 Platform/Hisilicon/D06/D06.fdf |  2 +-
 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf | 43 

 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h | 25 
+++
 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c   | 71 

 5 files changed, 141 insertions(+), 2 deletions(-)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index e18badf3b3..5571028f42 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -285,7 +285,7 @@
   #
   ArmPkg/Drivers/CpuDxe/CpuDxe.inf
   MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-
+  Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
 
 !if $(SECURE_BOOT_ENABLE) == TRUE
   MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index 5bb779d2e4..184d5d4dcf 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -174,7 +174,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
   INF Platform/Hisilicon/D06/Drivers/SFC/SfcDxeDriver.inf
 
-
+  INF Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
   INF Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
   INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
   INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
diff --git 
a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf 
b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
new file mode 100644
index 00..a91f2b6005
--- /dev/null
+++ b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
@@ -0,0 +1,43 @@
+#/** @file
+#
+#Copyright (c) 2016-2018, Hisilicon Limited. All rights reserved.
+#Copyright (c) 2016-2018, Linaro Limited. All rights reserved.
+#
+#This program and the accompanying materials
+#are licensed and made available under the terms and conditions of the BSD 
License
+#which accompanies this distribution. The full text of the license may be 
found at
+#http://opensource.org/licenses/bsd-license.php
+#
+#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = OemNicConfigPangea
+  FILE_GUID  = edc95319-ebe9-4c38-96af-1d203fb85231
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= OemNicConfigEntry
+
+[Sources.common]
+  OemNicConfig2P.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[Protocols]
+  gHisiBoardNicProtocolGuid   ##Produce
+
+[LibraryClasses]
+  DebugLib
+  IoLib
+  OemNicLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+
+[Depex]
+  TRUE
diff --git a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h 
b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h
new file mode 100644
index 00..35228fdf1d
--- /dev/null
+++ b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h
@@ -0,0 +1,25 @@
+/** @file
+*
+*  Copyright (c) 2016-2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2016-2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#ifndef __OEM_NIC_CONFIG_H__
+#define __OEM_NIC_CONFIG_H__
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#endif
diff --git 
a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c 
b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c
new file mode 100644
index 00..c01c49150a
--- /dev/null
+++ b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c
@@ -0,0 +1,71 @@
+/** @file
+*
+*  Copyright (c) 2016-2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2016-2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this 

[edk2] [PATCH edk2-platforms v3 22/36] Platform/Hisilicon/D06: Add OemNicLib

[Ming Huang]

OemNicLib provide nic related api like GetMac,SetMac.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc |   1 +
 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf |  35 ++
 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c   | 570 

 3 files changed, 606 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 06249d8a5b..e18badf3b3 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -90,6 +90,7 @@
 
   LpcLib|Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf
   
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+  OemNicLib|Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
 !if $(SECURE_BOOT_ENABLE) == TRUE
   FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
 !endif
diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf 
b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
new file mode 100644
index 00..3b0bd2d60c
--- /dev/null
+++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
@@ -0,0 +1,35 @@
+#/** @file
+#
+#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+#This program and the accompanying materials
+#are licensed and made available under the terms and conditions of the BSD 
License
+#which accompanies this distribution. The full text of the license may be 
found at
+#http://opensource.org/licenses/bsd-license.php
+#
+#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = OemNicLib
+  FILE_GUID  = 520F872C-FFCF-4EF3-AC01-85BDB0816DCE
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = OemNicLib
+
+[Sources.common]
+  OemNicLib.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  CpldIoLib
+  I2CLib
diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c 
b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
new file mode 100644
index 00..aa75617092
--- /dev/null
+++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
@@ -0,0 +1,570 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CPU2_SFP2_100G_CARD_OFFSET   0x25
+#define CPU1_SFP1_LOCATE_OFFSET  0x16
+#define CPU1_SFP0_LOCATE_OFFSET  0x12
+#define CPU2_SFP1_LOCATE_OFFSET  0x21
+#define CPU2_SFP0_LOCATE_OFFSET  0x19
+#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25
+
+#define SFP_10G_SPEED   10
+#define SFP_25G_SPEED   25
+#define SFP_100G_SPEED  100
+#define SFP_GE_SPEED1
+
+#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C
+#define SFP_GE_SPEED_VAL0x0D
+#define SFP_10G_SPEED_VAL   0x67
+#define SFP_25G_SPEED_VAL   0xFF
+
+#define CARD_PRESENT_100G   (BIT7)
+#define CARD_PRESENT_10G(BIT0)
+#define SELECT_SFP_BY_INDEX(index)  (1 << (index - 1))
+#define SPF_SPEED_OFFSET12
+
+#define SFP_DEVICE_ADDRESS 0x50
+#define CPU1_9545_I2C_ADDR 0x70
+#define CPU2_9545_I2C_ADDR 0x71
+
+#define FIBER_PRESENT 0
+#define CARD_PRESENT  1
+#define I2C_PORT_SFP  4
+#define CPU2_I2C_PORT_SFP 5
+
+#define SOCKET_0 0
+#define SOCKET_1 1
+#define EEPROM_I2C_PORT  4
+#define EEPROM_PAGE_SIZE 0x40
+#define MAC_ADDR_LEN 6
+#define I2C_OFFSET_EEPROM_ETH0   (0xc00)
+#define I2C_SLAVEADDR_EEPROM (0x52)
+
+#pragma pack(1)
+typedef struct {
+  UINT16 Crc16;
+  UINT16 MacLen;
+  UINT8  Mac[MAC_ADDR_LEN];
+} NIC_MAC_ADDRESS;
+#pragma pack()
+
+ETH_PRODUCT_DESC gEthPdtDesc[ETH_MAX_PORT] =
+{
+{TRUE,   ETH_SPEED_10KM,  ETH_FULL_DUPLEX, ETH_INVALID, ETH_INVALID},
+{TRUE,   ETH_SPEED_10KM,  ETH_FULL_DUPLEX, ETH_INVALID, ETH_INVALID},
+{FALSE,  ETH_INVALID, ETH_INVALID, ETH_INVALID, ETH_INVALID},
+{FALSE,  ETH_INVALID, ETH_INVALID, ETH_INVALID, ETH_INVALID},
+{TRUE,   ETH_SPEED_1000M, 

[edk2] [PATCH edk2-platforms v3 19/36] Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP"

[Ming Huang]

From: Yang XinYi 

Add Setup Item "EnableGOP" for D06, This Item only takes
effect on VGA device SM750.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yang XinYi 
---
 Silicon/Hisilicon/Include/Library/OemConfigData.h| 1 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c| 1 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr | 7 +++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni | 4 ++--
 4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h 
b/Silicon/Hisilicon/Include/Library/OemConfigData.h
index 478821ae2c..e4d5917046 100644
--- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
+++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
@@ -61,6 +61,7 @@ typedef struct {
   UINT8 EnableSmmu;
   UINT8 EnableFdtTable;
   UINT8 EnableSpcr;
+  UINT8 EnableGOP;
   /*RAS Config*/
   UINT8 EnRasSupport;
   UINT8 EnPoison;
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
index 1e3635307c..3ecae3759a 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
@@ -295,6 +295,7 @@ OemConfigUiLibConstructor (
   Configuration.EnableSmmu = 1;
   Configuration.EnableFdtTable = 0;
   Configuration.EnableSpcr = 0;
+  Configuration.EnableGOP = 0;
   //
   //Set the default value of the Ras option
   //
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr
index 9e3ac73116..c0b6e294a6 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr
@@ -38,4 +38,11 @@ form formid = MISC_CONFIG_FORM_ID,
   option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = 0;
 endoneof;
 
+oneof varid   = OEM_CONFIG_DATA.EnableGOP,
+  prompt  = STRING_TOKEN(STR_ENABLE_GOP_FRAME_BUFFER),
+  help= STRING_TOKEN(STR_ENABLE_GOP_FRAME_BUFFER_HELP),
+  option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT;
+  option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = 0;
+endoneof;
+
 endform;
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni
index 53eb1622c4..2fd92fedff 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni
@@ -23,5 +23,5 @@
 #string STR_FDT_CONFIG_HELP#language en-US  "Enable or Disable Fdt 
Table."
 #string STR_ENABLE_SPCR_TABLE  #language en-US  "Support SPCR"
 #string STR_ENABLE_SPCR_HELP   #language en-US  "Enable or Disable 
SPCR Table."
-#string STR_ENABLE_GOP_FRAME_BUFFER#language en-US  "Support GOP FB"
-#string STR_ENABLE_GOP_FRAME_BUFFER_HELP #language en-US  "Enable or 
Disable GOP frame buffer."
+#string STR_ENABLE_GOP_FRAME_BUFFER#language en-US  "Support GOP FB for 
SM750"
+#string STR_ENABLE_GOP_FRAME_BUFFER_HELP #language en-US  "Enable or 
Disable GOP frame buffer for SM750."
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 24/36] Hisilicon/D0x: Update SMBIOS type9 info

[Ming Huang]

From: Sun Yuanchen 

Move board level code to OemMiscLibD0x for unifying D0x.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sun Yuanchen 
---
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf |  1 +
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf |  1 +
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf |  4 +
 Platform/Hisilicon/D06/Include/Library/CpldD06.h   |  2 +
 Silicon/Hisilicon/Include/Library/OemMiscLib.h |  1 +
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c   | 24 ++
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c   | 27 +-
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c   | 90 

 Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.c   | 14 +--
 9 files changed, 151 insertions(+), 13 deletions(-)

diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
index 310bbaea84..0fa7fdf80f 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
@@ -34,6 +34,7 @@
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
+  BaseMemoryLib
   PcdLib
   TimerLib
 
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf 
b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
index bf44ff7440..022c3e940a 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
@@ -33,6 +33,7 @@
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
+  BaseMemoryLib
   PcdLib
   TimerLib
 
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf 
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
index 8f68f7cec5..bd984a6fe3 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
@@ -30,9 +30,13 @@
   ArmPkg/ArmPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
+  Platform/Hisilicon/D06/D06.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
+  BaseMemoryLib
+  CpldIoLib
+  IoLib
   PcdLib
   SerdesLib
   TimerLib
diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h 
b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
index be3548c8d1..ec9b49f4e7 100644
--- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
+++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
@@ -29,6 +29,8 @@
 #define CPLD_LOGIC_COMPILE_DAY   (0x3)
 
 #define CPLD_RISER_PRSNT_FLAG 0x40
+#define CPU1_RISER_PRESENTBIT6
+#define CPU0_RISER_PRESENTBIT7
 #define CPLD_RISER2_BOARD_ID  0x44
 
 #define CPLD_X8_X8_X8_BOARD_ID0x92
diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h 
b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
index efecb9aa77..86ea6a1b3d 100644
--- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
+++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
@@ -34,6 +34,7 @@ typedef struct _REPORT_PCIEDIDVID2BMC{
 UINTN   Slot;
 }REPORT_PCIEDIDVID2BMC;
 extern REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX];
+extern VOID GetPciDidVid (REPORT_PCIEDIDVID2BMC *Report);
 
 BOOLEAN OemIsSocketPresent (UINTN Socket);
 VOID CoreSelectBoot(VOID);
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c 
b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
index fa1039bda1..c80500276f 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
@@ -15,6 +15,7 @@
 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -31,6 +32,29 @@ REPORT_PCIEDIDVID2BMC  
PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = {
   {0x,0x,0x,0x}
 };
 
+REPORT_PCIEDIDVID2BMC PcieDeviceToReport_2P[PCIEDEVICE_REPORT_MAX] = {
+  {0x79,0,0,0},
+  {0xFF,0xFF,0xFF,1},
+  {0xC1,0,0,2},
+  {0xF9,0,0,3},
+  {0xFF,0xFF,0xFF,4},
+  {0x11,0,0,5},
+  {0x31,0,0,6},
+  {0x21,0,0,7}
+};
+
+VOID
+GetPciDidVid (
+  REPORT_PCIEDIDVID2BMC *Report
+  )
+{
+  if (OemIsMpBoot ()) {
+(VOID)CopyMem ((VOID *)Report, (VOID *)PcieDeviceToReport_2P, sizeof 
(PcieDeviceToReport_2P));
+  } else {
+(VOID)CopyMem ((VOID *)Report, (VOID *)PcieDeviceToReport, sizeof 
(PcieDeviceToReport));
+  }
+}
+
 // Right now we only support 1P
 BOOLEAN OemIsSocketPresent (UINTN Socket)
 {
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c 
b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
index b17eeada16..4c4c944dbe 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
@@ -1,7 +1,7 @@
 /** @file
 *
-*  Copyright 

[edk2] [PATCH edk2-platforms v3 28/36] Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h

[Ming Huang]

Add some Lpc macro to LpcLib.h for D06.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/LpcLib.h | 51 +++-
 1 file changed, 49 insertions(+), 2 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/LpcLib.h 
b/Silicon/Hisilicon/Include/Library/LpcLib.h
index 236a52ba45..5cf08ccde1 100755
--- a/Silicon/Hisilicon/Include/Library/LpcLib.h
+++ b/Silicon/Hisilicon/Include/Library/LpcLib.h
@@ -1,7 +1,7 @@
 /** @file
 *
-*  Copyright (c) 2016, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2016, Linaro Limited. All rights reserved.
+*  Copyright (c) 2016-2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2016-2018, Linaro Limited. All rights reserved.
 *
 *  This program and the accompanying materials
 *  are licensed and made available under the terms and conditions of the BSD 
License
@@ -18,6 +18,53 @@
 
 #include 
 
+#define PCIE_SUBSYS_IOMUX   0x20110
+#define PCIE_SUBSYS_IOMG019 (PCIE_SUBSYS_IOMUX + 0x48)
+#define PCIE_SUBSYS_IOMG020 (PCIE_SUBSYS_IOMUX + 0x4C)
+#define PCIE_SUBSYS_IOMG021 (PCIE_SUBSYS_IOMUX + 0x50)
+#define PCIE_SUBSYS_IOMG022 (PCIE_SUBSYS_IOMUX + 0x54)
+#define PCIE_SUBSYS_IOMG023 (PCIE_SUBSYS_IOMUX + 0x58)
+#define PCIE_SUBSYS_IOMG024 (PCIE_SUBSYS_IOMUX + 0x5C)
+#define PCIE_SUBSYS_IOMG025 (PCIE_SUBSYS_IOMUX + 0x60)
+#define PCIE_SUBSYS_IOMG028 (PCIE_SUBSYS_IOMUX + 0x6C)
+
+#define IO_MGMT_SUBCTRL_BASE0x20107
+#define SC_LPC_RESET_REQ_REG(IO_MGMT_SUBCTRL_BASE + 0x0a58)
+#define SC_LPC_RESET_DREQ_REG   (IO_MGMT_SUBCTRL_BASE + 0x0a5c)
+#define SC_LPC_SEL  (IO_MGMT_SUBCTRL_BASE + 0x2400)
+
+
+#define LPCD06_BASE 0x20119
+#define LPC_FIRM_SPACE0_CFG (LPCD06_BASE + 0x100)
+#define LPC_FIRM_SPACE1_CFG (LPCD06_BASE + 0x104)
+#define LPC_FIRM_SPACE2_CFG (LPCD06_BASE + 0x108)
+#define LPC_FIRM_SPACE3_CFG (LPCD06_BASE + 0x10C)
+#define LPC_FIRM_SPACE4_CFG (LPCD06_BASE + 0x110)
+#define LPC_FIRM_SPACE5_CFG (LPCD06_BASE + 0x114)
+#define LPC_FIRM_SPACE6_CFG (LPCD06_BASE + 0x118)
+#define LPC_FIRM_SPACE7_CFG (LPCD06_BASE + 0x11C)
+#define LPC_MEM_SPACE0_CFG  (LPCD06_BASE + 0x120)
+#define LPC_MEM_SPACE1_CFG  (LPCD06_BASE + 0x124)
+#define LPC_MEM_SPACE2_CFG  (LPCD06_BASE + 0x128)
+#define LPC_MEM_SPACE3_CFG  (LPCD06_BASE + 0x12C)
+#define LPC_MEM_SPACE4_CFG  (LPCD06_BASE + 0x130)
+#define LPC_MEM_SPACE5_CFG  (LPCD06_BASE + 0x134)
+#define LPC_MEM_SPACE6_CFG  (LPCD06_BASE + 0x138)
+
+#define LPCD06_START_REG(LPCD06_BASE + 0x00)
+#define LPCD06_OP_STATUS_REG(LPCD06_BASE + 0x04)
+#define LPCD06_IRQ_ST_REG   (LPCD06_BASE + 0x08)
+#define LPCD06_OP_LEN_REG   (LPCD06_BASE + 0x10)
+#define LPCD06_CMD_REG  (LPCD06_BASE + 0x14)
+#define LPCD06_ADDR_REG (LPCD06_BASE + 0x20)
+#define LPCD06_WDATA_REG(LPCD06_BASE + 0x24)
+#define LPCD06_RDATA_REG(LPCD06_BASE + 0x28)
+
+#define LPC_SIRQ_CTR0   (LPCD06_BASE + 0x80)
+#define LPC_SIRQ_CTR1   (LPCD06_BASE + 0x84)
+#define LPC_SIRQ_INT_MASK   (LPCD06_BASE + 0x94)
+
+
 #define PCIE_SUBSYS_IO_MUX  0xA017
 #define PCIE_SUBSYS_IOMG033 (PCIE_SUBSYS_IO_MUX + 0x84)
 #define PCIE_SUBSYS_IOMG035 (PCIE_SUBSYS_IO_MUX + 0x8C)
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 21/36] Platform/Hisilicon/D06: Enable ACPI PPTT

[Ming Huang]

From: Heyi Guo 

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D06/D06.dsc | 1 +
 Platform/Hisilicon/D06/D06.fdf | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index bec422670d..06249d8a5b 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -338,6 +338,7 @@
   Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
   Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
 
+  Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf
   #
   # Usb Support
   #
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index 06203dc079..5bb779d2e4 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -252,6 +252,8 @@ READ_LOCK_STATUS   = TRUE
   INF RuleOverride=ACPITABLE 
Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
   INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
 
+  INF Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf
+
   #
   #Network
   #
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 13/36] Hisilicon/I2C: Modify I2CLib.c for coding style

[Ming Huang]

Correct coding style for I2CLib.c before adding other I2CLib patches.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 1034 ++--
 1 file changed, 499 insertions(+), 535 deletions(-)

diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c 
b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
index b5b388d756..f03d55d6b2 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
@@ -16,640 +16,604 @@
 
 
 #include 
-#include 
-#include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 
 #include 
 
 #include "I2CLibInternal.h"
 #include "I2CHw.h"
 
-VOID I2C_Delay(UINT32 ulCount)
+VOID
+I2C_Delay (
+  UINT32 Count
+  )
 {
-MicroSecondDelay(ulCount);
-return;
+  MicroSecondDelay (Count);
+  return;
 }
 
 
 EFI_STATUS
 EFIAPI
-I2C_Disable(UINT32 Socket,UINT8 Port)
+I2C_Disable (
+  UINT32 Socket,
+  UINT8  Port
+  )
 {
-UINT32  ulTimeCnt = I2C_READ_TIMEOUT;
-I2C0_STATUS_U   I2cStatusReg;
-I2C0_ENABLE_U   I2cEnableReg;
-I2C0_ENABLE_STATUS_UI2cEnableStatusReg;
+  UINT32  TimeCnt = I2C_READ_TIMEOUT;
+  I2C0_STATUS_U   I2cStatusReg;
+  I2C0_ENABLE_U   I2cEnableReg;
+  I2C0_ENABLE_STATUS_UI2cEnableStatusReg;
 
-UINTN Base = GetI2cBase(Socket, Port);
+  UINTN Base = GetI2cBase (Socket, Port);
 
-I2C_REG_READ((Base + I2C_STATUS_OFFSET), I2cStatusReg.Val32);
+  I2C_REG_READ ((Base + I2C_STATUS_OFFSET), I2cStatusReg.Val32);
 
-while (I2cStatusReg.bits.activity)
-{
-I2C_Delay(1);
+  while (I2cStatusReg.bits.activity) {
+I2C_Delay (1);
 
-ulTimeCnt--;
-I2C_REG_READ(Base + I2C_STATUS_OFFSET, I2cStatusReg.Val32);
-if (0 == ulTimeCnt)
-{
-return EFI_DEVICE_ERROR;
-}
+TimeCnt--;
+I2C_REG_READ (Base + I2C_STATUS_OFFSET, I2cStatusReg.Val32);
+if (TimeCnt == 0) {
+  return EFI_DEVICE_ERROR;
 }
+  }
 
+  I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
+  I2cEnableReg.bits.enable = 0;
+  I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
 
-I2C_REG_READ(Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
-I2cEnableReg.bits.enable = 0;
-I2C_REG_WRITE(Base + I2C_ENABLE_OFFSET,I2cEnableReg.Val32);
-
-I2C_REG_READ(Base + I2C_ENABLE_OFFSET,I2cEnableStatusReg.Val32);
-if (0 == I2cEnableStatusReg.bits.ic_en)
-{
-return EFI_SUCCESS;
-}
-else
-{
-return EFI_DEVICE_ERROR;
-}
+  I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableStatusReg.Val32);
+  if (I2cEnableStatusReg.bits.ic_en == 0) {
+return EFI_SUCCESS;
+  } else {
+return EFI_DEVICE_ERROR;
+  }
 }
 
 
 EFI_STATUS
 EFIAPI
-I2C_Enable(UINT32 Socket,UINT8 Port)
+I2C_Enable (
+  UINT32 Socket,
+  UINT8  Port
+  )
 {
-I2C0_ENABLE_U   I2cEnableReg;
-I2C0_ENABLE_STATUS_UI2cEnableStatusReg;
+  I2C0_ENABLE_U   I2cEnableReg;
+  I2C0_ENABLE_STATUS_UI2cEnableStatusReg;
 
-UINTN Base = GetI2cBase(Socket, Port);
+  UINTN Base = GetI2cBase (Socket, Port);
 
+  I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
+  I2cEnableReg.bits.enable = 1;
+  I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
 
-I2C_REG_READ(Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
-I2cEnableReg.bits.enable = 1;
-I2C_REG_WRITE(Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
 
-
-I2C_REG_READ(Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
-if (1 == I2cEnableStatusReg.bits.ic_en)
-{
-return EFI_SUCCESS;
-}
-else
-{
-return EFI_DEVICE_ERROR;
-}
+  I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
+  if (I2cEnableStatusReg.bits.ic_en == 1) {
+return EFI_SUCCESS;
+  } else {
+return EFI_DEVICE_ERROR;
+  }
 }
 
-void I2C_SetTarget(UINT32 Socket,UINT8 Port,UINT32 I2cDeviceAddr)
+VOID
+I2C_SetTarget (
+  UINT32 Socket,
+  UINT8  Port,
+  UINT32 I2cDeviceAddr
+  )
 {
-I2C0_TAR_UI2cTargetReg;
-UINTN Base = GetI2cBase(Socket, Port);
+  I2C0_TAR_UI2cTargetReg;
 
+  UINTN Base = GetI2cBase (Socket, Port);
 
-I2C_REG_READ(Base + I2C_TAR_OFFSET, I2cTargetReg.Val32);
-I2cTargetReg.bits.ic_tar = I2cDeviceAddr;
-I2C_REG_WRITE(Base + I2C_TAR_OFFSET, I2cTargetReg.Val32);
+  I2C_REG_READ (Base + I2C_TAR_OFFSET, I2cTargetReg.Val32);
+  I2cTargetReg.bits.ic_tar = I2cDeviceAddr;
+  I2C_REG_WRITE (Base + I2C_TAR_OFFSET, I2cTargetReg.Val32);
 
-return;
+  return;
 }
 
 
 EFI_STATUS
 EFIAPI
-I2CInit(UINT32 Socket, UINT32 Port, SPEED_MODE SpeedMode)
+I2CInit (
+  UINT32 Socket,
+  UINT32 Port,
+  SPEED_MODE SpeedMode
+  )
 {
-I2C0_CON_U  I2cControlReg;
-I2C0_SS_SCL_HCNT_U  I2cStandardSpeedSclHighCount;
-I2C0_SS_SCL_LCNT_U  I2cStandardSpeedSclLowCount;
-I2C0_RX_TL_UI2cRxFifoReg;

[edk2] [PATCH edk2-platforms v3 31/36] Silicon/Hisilicon/D06: Add I2C Bus Exception handle function

[Ming Huang]

During the period of I2c accessing, if the board is reset
unexpectedly, and because the I2c client can not reset,
the SDA will be always pull down, then it cause I2C bus
Exception.

Follow the Hi1620 I2C FS chapter 1.8.2 design, add I2C
Bus Exception handle function. It will Config SCL and SDA
to GPIO, and set the reversal frequency of SCL to 10KHz.

The implementation of functions is in edk2-non-osi.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
index 3ccfc6bee3..a232e52ed7 100644
--- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
+++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
@@ -106,4 +106,7 @@ VOID DisableClusterClock(UINTN CpuClusterBase);
 VOID EnableClusterClock(UINTN CpuClusterBase);
 VOID DisableSocketClock (UINT8 Skt);
 
+EFI_STATUS EFIAPI HandleI2CException (UINT32 Socket, UINT32 Port);
+EFI_STATUS EFIAPI HandleI2CExceptionBySocket (UINT32 Socket);
+
 #endif
-- 
2.17.0

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Re: [edk2] EDK II Stable Tag release edk2-stable201808 completed

[Laszlo Ersek]

On 08/16/18 00:28, Kinney, Michael D wrote:
> Hello,
> 
> The tag edk2-stable201808 has been created.
> 
> https://github.com/tianocore/edk2/releases/tag/edk2-stable201808
> 
> git clone -b edk2-stable201808 https://github.com/tianocore/edk2.git
> 
> The main EDK II Wiki page has been updated with a section
> for edk2 stable tags.
> 
> https://github.com/tianocore/tianocore.github.io/wiki/EDK-II
> 
> The quiet period has now ended. Thank you for your cooperation
> and patience.  Normal commits can now be resumed.
> 
> Based on feedback from Laszlo I have also added an EDK II Release
> Planning Wiki page with a proposed schedule for the next stable
> tag and a placeholder for the list of Bugzilla entries for the
> features that will be added and validated in this next stable tag.
> 
> 
> https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Release-Planning
> 
> If you have ideas for features in the next stable tag, please enter
> a Bugzilla for evaluation.  Please let us know if there are 
> existing open Bugzilla entries that should be targeted at this next
> stable tag.

Thank you, Mike!
Laszlo
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Re: [edk2] [PATCH 0/2] UefiCpuPkg: Add RSB stuffing before rsm instruction

[Laszlo Ersek]

On 08/16/18 05:07, Wu, Hao A wrote:
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Laszlo
>> Ersek
>> Sent: Friday, August 10, 2018 11:06 PM

>> (2) If I understand correctly, the same pattern is used everywhere -- a
>> loop body is executed 32 times, and in the loop body, we jump (via
>> subroutine calls) twice, and each call is followed by a "trap" for
>> speculative execution. At the end of the loop, we forcefully unwind the
>> stack, and then we proceed to RSM.
>>
>> I think this should be implemented with a lot less code duplication.
>> NASM supports macros with labels that are local to macro *invocation*
>> (not macro *definition*); please see the %%skip example here:
>>
>>   https://www.nasm.us/doc/nasmdoc4.html
>>   4.3.2 Macro-Local Labels
>>
>> In addition, it should be possible to pass parameters to macros, such as:
>> - the register to use as counter (eax vs. rax),
>> - the stack pointer to restore (esp vs. rsp),
>> - the size of a stack frame (4 vs. 8)
>>
>> Using all those tools, it should be possible to define the macro only
>> once, in a UefiCpuPkg-level ".inc" file (for example,
>> "UefiCpuPkg/Include/StuffRsb.inc"), and then only invoke the macro near
>> all 10 RSM instructions:
> 
> Yes. Extracting the common logic to a INC file is a good idea.
> 
> However, I found that when compiling .NASM files, the current build rule
> does not support including files other than the .NASM file directory.
> So including a package-level INC file is not supported at this moment.
> 
> I have filed a Bugzilla for adding $(INC)-like support when compiling
> .NASM files:
> 
> https://bugzilla.tianocore.org/show_bug.cgi?id=1085
> 
> After some discussion with the BaseTools owners, some investigation is
> needed for the above support. Hence, I plan to perform a 2-stage change
> when extracting the common RSB stuffing logics to INC file:
> 
> 1. Duplicate the INC file and place them together with the NASM files that
> uses the RSB stuffing logics.
> 
> 2. After NASM compiling support the $(INC)-like feature, propose another
> patch to remove those duplicated INC files and create one under
> UefiCpuPkg/Include/.
> 
> Please help to share your thought on this. Thanks in advance.

Sounds good to me. This approach still eliminates as much code
duplication as it is possible at the current level of BaseTools support.
Also we'll have a reminder (a BZ) for completing the unification.

Thanks!
Laszlo
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Re: [edk2] [PATCH 1/5] MdeModulePkg: Remove unused PCDs

[Laszlo Ersek]

On 08/16/18 08:30, Zeng, Star wrote:
> Hi Shenglei,
> 
> BaseLib is not belong to MdeModulePkg, please spit it into separated patch.

I'd also like to review v2 of this series, please consider CC'ing me on it.

Thanks,
Laszlo

> 
> Thanks,
> Star
> -Original Message-
> From: Zhang, Shenglei 
> Sent: Thursday, August 16, 2018 1:32 PM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Dong, Eric 
> Subject: [PATCH 1/5] MdeModulePkg: Remove unused PCDs
> 
> The PCDs below are unused, so they have been removed from inf.
> gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleMax
> gEfiMdeModulePkgTokenSpaceGuid.PcdSystemRebootAfterCapsuleProcessFlag
> gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeSubClassCapsule
> gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesBegin
> gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesEnd
> gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdatingFirmware
> gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareSuccess
> gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareFailed
> gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeResettingSystem
> gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize
> gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask
> 
> Cc: Star Zeng 
> Cc: Eric Dong 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: shenglei 
> ---
>  .../Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf | 11 ---
>  .../FirmwarePerformanceDxe.inf|  1 -
>  MdePkg/Library/BaseLib/BaseLib.inf|  1 -
>  3 files changed, 13 deletions(-)
> 
> diff --git a/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf 
> b/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
> index 342df9e99c..d5e87cb97b 100644
> --- a/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
> +++ b/MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
> @@ -56,17 +56,6 @@
>HobLib
>BmpSupportLib
>  
> -[Pcd]
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleMax   
> ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdSystemRebootAfterCapsuleProcessFlag  
> ## CONSUMES
> -
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeSubClassCapsule
> ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesBegin
> ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesEnd  
> ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdatingFirmware
> ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareSuccess   
> ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareFailed
> ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeResettingSystem 
> ## CONSUMES
>  
>  [Protocols]
>gEsrtManagementProtocolGuid   ## CONSUMES
> diff --git 
> a/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
>  
> b/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
> index 983ce41b48..023ab00c7c 100644
> --- 
> a/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
> +++ 
> b/MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
> @@ -73,7 +73,6 @@
>  [Pcd]
>gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeOsLoaderLoad## CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeOsLoaderStart   ## CONSUMES
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize## CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId## CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId   ## CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision  ## CONSUMES
> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
> b/MdePkg/Library/BaseLib/BaseLib.inf
> index a1b5ec4b75..4ae8a0b05a 100644
> --- a/MdePkg/Library/BaseLib/BaseLib.inf
> +++ b/MdePkg/Library/BaseLib/BaseLib.inf
> @@ -643,7 +643,6 @@
>gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength  ## 
> SOMETIMES_CONSUMES
>gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength ## 
> SOMETIMES_CONSUMES
>gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength   ## 
> SOMETIMES_CONSUMES
> -  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask## 
> SOMETIMES_CONSUMES
>  
>  [FeaturePcd]
>gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList  ## CONSUMES
> 

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Re: [edk2] [PATCH 0/2] UefiCpuPkg: Add RSB stuffing before rsm instruction

[Laszlo Ersek]

On 08/16/18 05:07, Wu, Hao A wrote:

> I have filed a Bugzilla for adding $(INC)-like support when compiling
> .NASM files:
> 
> https://bugzilla.tianocore.org/show_bug.cgi?id=1085
> 
> After some discussion with the BaseTools owners, some investigation is
> needed for the above support. Hence, I plan to perform a 2-stage change
> when extracting the common RSB stuffing logics to INC file: [...]

I've also filed 
now (and assigned it to you, if that's OK with you). BZ#1085 should
track the BaseTools update, and then BZ#1091 should take advantage of it
in UefiCpuPkg, for unifying the .inc files.

I've also set up the dependency between the BZs accordingly.

Thanks!
Laszlo
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[edk2] [PATCH edk2-platforms v3 35/36] Hisilicon/D06: Add edk2-non-osi Shell components

[Ming Huang]

Add Hisilicon Oem Shell libraries for some commands,such as
biosupdate, getmac, setmac, provision, acpistartos, brdinfo,
sfpinfo.

biosupdate example:
ifconfig -s eth2 static 192.168.2.68 255.255.255.0 192.168.2.1
biosupdate serverIp -u user -p password -f D06.fd -m master

acpistartos example:
ifconfig -s eth2 static 192.168.2.69 255.255.255.0 192.168.2.1
provision serverIp -u user -p password -f os\Image -a 0x8
2
provision serverIp -u user -p password -f os\minifs.cpio.gz -a 0x0700
2
acpistartos

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/HisiPkg.dec  | 4 
 Platform/Hisilicon/D06/D06.dsc | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
index 6d95381719..77264f916b 100644
--- a/Silicon/Hisilicon/HisiPkg.dec
+++ b/Silicon/Hisilicon/HisiPkg.dec
@@ -40,6 +40,7 @@
   gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 
0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
   gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97, 
0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
   gPlatformSasNotifyProtocolGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff, 0x5c, 
0xc5, 0x80, 0x32, 0x7d, 0x9b, 0x29}}
+  gOemNicProtocolGuid = {0xb5903955, 0x31e9, 0x4aaf, {0xb2, 0x83, 0x7, 0x9f, 
0x3c, 0xc4, 0x71, 0x66}}
 
 [Guids]
   gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 
0x7c, 0xfd, 0x52, 0x1d}}
@@ -49,6 +50,8 @@
   gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 
0xe1, 0x42, 0x12, 0xbf}}
   gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, 0xd4, 0xa4, 
0x2f, 0x45, 0x06, 0xf8}}
   gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, 0x53, 
0xe4, 0x31, 0x19, 0x38, 0x35}}
+  HisiShellSampleHiiGuid  = { 0x43859314, 0x82c1, 0x4592, { 0x8f, 0xf7, 0xc1, 
0xbd, 0xf3, 0xb2, 0x0e, 0xd5 }}
+  HisiPlatformShellSampleHiiGuid = { 0x7924a5de, 0xc600, 0x40d5, { 0x91, 0x10, 
0xf9, 0xc3, 0xe7, 0x25, 0x4d, 0x33 }}
 
 [LibraryClasses]
   PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h
@@ -101,6 +104,7 @@
   gHisiTokenSpaceGuid.PcdSlotPerChannelNum|0x0|UINT32|0x4004
 
   gHisiTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 
0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }|VOID*|0x30006554
+  gHisiTokenSpaceGuid.PcdStartOsParameter|L""|VOID*|0x500
 
   #FDT File Address
   gHisiTokenSpaceGuid.FdtFileAddress|0x0|UINT64|0x4005
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 053ea894d5..544039e450 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -473,6 +473,8 @@
 !if $(INCLUDE_DP) == TRUE
   NULL|ShellPkg/Library/UefiDpLib/UefiDpLib.inf
 !endif #$(INCLUDE_DP)
+  NULL|Silicon/Hisilicon/Library/HisiShellCmdLib/HisiShellCmdLib.inf
+  
NULL|Silicon/Hisilicon/Hi1620/Library/HisiD06ShellCmdLib/HisiD06ShellCmdLib.inf
 
 
   gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 32/36] Silicon/Hisilicon/Setup: Support SPCR table switch

[Ming Huang]

If install SPCR table, KVM will not output while install or boot
some OS, like ubuntu, so add SPCR switch setup item and set it
disable by default.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf |  1 +
 Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c   | 24 

 2 files changed, 25 insertions(+)

diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf 
b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
index 281a4f2ebd..3d133aff85 100644
--- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
+++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
@@ -51,6 +51,7 @@
 
 [Guids]
   gHisiEfiMemoryMapGuid
+  gOemConfigGuid
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile## CONSUMES
diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c 
b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
index 54f49977c3..32878ca4f9 100644
--- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
+++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c
@@ -16,8 +16,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
 
 #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET)
@@ -114,6 +116,25 @@ UpdateSlit (
   return  EFI_SUCCESS;
 }
 
+STATIC
+EFI_STATUS
+IsNeedSpcr (
+  IN OUT EFI_ACPI_DESCRIPTION_HEADER  *Table
+  )
+{
+  EFI_STATUS Status;
+  OEM_CONFIG_DATASetupData;
+  UINTN  DataSize = sizeof (OEM_CONFIG_DATA);
+
+  Status = gRT->GetVariable (OEM_CONFIG_NAME, , NULL, 
, );
+  if (!EFI_ERROR (Status) && (SetupData.EnableSpcr == FALSE)) {
+return EFI_ABORTED;
+  }
+
+  return EFI_SUCCESS;
+}
+
+
 EFI_STATUS
 UpdateAcpiTable (
   IN OUT EFI_ACPI_DESCRIPTION_HEADER  *TableHeader
@@ -130,6 +151,9 @@ UpdateAcpiTable (
   case EFI_ACPI_6_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE:
 Status = UpdateSlit (TableHeader);
 break;
+  case EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE:
+Status = IsNeedSpcr (TableHeader);
+break;
   }
   return Status;
 }
-- 
2.17.0

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[edk2] [PATCH edk2-non-osi v3 1/2] Hisilicon/D06: Add binary modules

[Ming Huang]

Description per Module:
GetInfoFromBmc:
  Get board infomation from BMC and install a protocal.
IoInitDxe:
  Serdes initialization and PCIe port initialization and SMMU workaround.
IpmiInterfacePei:
  Install PEI ipmi interface PPI.
IpmiInterfaceDxe:
  Install DXE ipmi interface protocal.
IpmiMiscOpDxe:
  Send some OEM info to BMC via ipmi protocal.
IpmiWatchdogDxe:
  Manage the out of band watchdog timer in BMC.
SnpDxe:
  Snp driver for D06 debug on board net card.
PcieRasInitDxe:
  Initialize PCIe RAS function for all PCIe root port and end point.
RasInitDxe:
  Configure and enable RAS.
SfcDxeDriver:
  SPI flash driver.
SasDxeDriver:
  SAS driver for on board SAS controller.
UefiSmi:
  VGA driver for on board VGA device(SM750).
TransSmbiosInfo:
  Send SMBIOS infomation to BMC via ipmi.
OemAddressMapD06:
  Provide function for configuration components of chips.
MemoryInitPeim:
  Peim for memory initialization.
Hi1620SerdesLib:
  Library for initialization Hi1620 serdes.
LpcLib:
  Include LpcInit, LpcByteWrite and LpcByteRead functions.
PlatformSysCtrlLibHi1620:
  Provide Misc function needed by other modules.
FVMAIN_SEC.Fv:
  A Fv for SEC binary.
bl1.bin/fip.bin:
  Trusted Firmware module.

Build commit infomation:
edk2:   871c57754c1d
edk2-platforms: 820af7623c42
HwPkg:  a7947372749e
TrustedFirmware: cccdae6ff768
Tools:  6b286b119422

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf   
|  26 
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf 
|  27 
 Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf  
|  28 +
 Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf  
|  27 
 Platform/Hisilicon/D06/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf 
|  27 
 Platform/Hisilicon/D06/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf 
|  27 
 Platform/Hisilicon/D06/Drivers/Net/SnpHi1620NewDxe/SnpDxe.inf  
|  27 
 Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.inf   
|  26 
 Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.inf   
|  25 
 Platform/Hisilicon/D06/Drivers/SFC/SfcDxeDriver.inf
|  27 
 Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
|  27 
 Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf
|  32 +++
 Platform/Hisilicon/D06/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf  
|  26 
 Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.inf   
|  40 ++
 Platform/Hisilicon/D06/MemoryInitPei/MemoryInitPeim.inf
|  28 +
 Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf  
|  43 
 Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf   
|  39 ++
 
Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.inf
 |  43 
 Platform/Hisilicon/D06/Drivers/GetInfoFromBmc/GetInfoFromBmc.depex 
| Bin 0 -> 18 bytes
 Platform/Hisilicon/D06/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi   
| Bin 0 -> 20480 bytes
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.depex   
| Bin 0 -> 18 bytes
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi 
| Bin 0 -> 229216 bytes
 Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.depex
| Bin 0 -> 18 bytes
 Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi  
| Bin 0 -> 29440 bytes
 Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.depex
| Bin 0 -> 18 bytes
 Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi  
| Bin 0 -> 21664 bytes
 Platform/Hisilicon/D06/Drivers/IpmiMiscOpDxe/IpmiMiscOp.depex  
| Bin 0 -> 36 bytes
 Platform/Hisilicon/D06/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi
| Bin 0 -> 24736 bytes
 Platform/Hisilicon/D06/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.depex   
| Bin 0 -> 36 bytes
 Platform/Hisilicon/D06/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi 
| Bin 0 -> 20768 bytes
 Platform/Hisilicon/D06/Drivers/Net/SnpHi1620NewDxe/SnpPV600Dxe.efi 
| Bin 0 -> 75040 bytes
 Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.depex 
| Bin 0 -> 36 bytes
 

[edk2] [PATCH edk2-platforms v3 34/36] Hisilicon/D06: Add PciPlatformLib

[Ming Huang]

Add a Null PciPlatformLib for build D06. The switch generic
PciHostBridge patch set add two api for PciPlatform driver,
so need to implement the two api for D06.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc 
|  1 +
 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf 
| 30 +
 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c   
| 67 
 3 files changed, 98 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index fad6fcc747..053ea894d5 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -95,6 +95,7 @@
   FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
 !endif
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+  
PciPlatformLib|Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
 
 [LibraryClasses.common.SEC]
   
ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf
diff --git 
a/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
 
b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
new file mode 100644
index 00..7648322522
--- /dev/null
+++ 
b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
@@ -0,0 +1,30 @@
+## @file
+# PCI Segment Library for Hisilicon Hi1610/Hi1616 SoC with multiple RCs
+#
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.
+# Copyright (c) 2018, Hisilicon Ltd. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD 
License
+#  which accompanies this distribution. The full text of the license may be 
found at
+#  http://opensource.org/licenses/bsd-license.php.
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = Hi1620PciPlatformLib
+  FILE_GUID  = 29ba30da-68bc-46a5-888f-c65dabb67fd8
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PciPlatformLib
+
+[Sources]
+  Hi1620PciPlatformLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
diff --git 
a/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c 
b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c
new file mode 100644
index 00..ff77974c0f
--- /dev/null
+++ 
b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c
@@ -0,0 +1,67 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#include 
+#include 
+
+
+/*++
+
+Routine Description:
+
+  Perform Platform initialization first in PciPlatform.
+
+Arguments:
+
+Returns:
+
+ VOID.
+
+--*/
+VOID
+EFIAPI
+PciInitPlatform (
+  VOID
+  )
+{
+  return;
+}
+
+/*++
+
+Routine Description:
+
+  Perform Platform initialization by the phase indicated.
+
+Arguments:
+
+  HostBridge-  The associated PCI host bridge handle.
+  Phase -  The phase of the PCI controller enumeration.
+  ChipsetPhase  -  Defines the execution phase of the PCI chipset driver.
+
+Returns:
+
+--*/
+VOID
+EFIAPI
+PhaseNotifyPlatform (
+  IN  EFI_HANDLE HostBridge,
+  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,
+  IN  EFI_PCI_CHIPSET_EXECUTION_PHASEChipsetPhase
+  )
+{
+  return;
+}
+
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 36/36] Platform/Hisilicon/D0x: Update version string to 18.08

[Ming Huang]

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D03/D03.dsc | 2 +-
 Platform/Hisilicon/D05/D05.dsc | 2 +-
 Platform/Hisilicon/D06/D06.dsc | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index c12790ba59..add15b7f93 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -174,7 +174,7 @@
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.02 for Hisilicon D03"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D03"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 94d386582e..76c0bd421e 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -192,7 +192,7 @@
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.02 for Hisilicon D05"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D05"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 544039e450..09197922ad 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -165,12 +165,12 @@
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D06 
UEFI RC0 - B308 (V0.38)"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D06"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.38"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.42"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D06"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"VER.A"
-- 
2.17.0

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[edk2] [PATCH edk2-non-osi v3 0/2] Upload D06 binary modules

[Ming Huang]

This patch set include:
1 Add D06 binary modules;
2 Add oem shell libraries.

Code can also be found in github: 
https://github.com/hisilicon/OpenPlatformPkg.git
branch: d06-non-osi-v3


Ming Huang (2):
  Hisilicon/D06: Add binary modules
  Silicon/Hisilicon/D06: Add Oem Shell libraries

 .../Drivers/GetInfoFromBmc/GetInfoFromBmc.inf |  26 
 .../D06/Drivers/IoInitDxe/IoInitDxe.inf   |  27 
 .../IpmiInterfaceDxe/IpmiInterfaceDxe.inf |  28 +
 .../IpmiInterfacePei/IpmiInterfacePei.inf |  27 
 .../Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf   |  27 
 .../IpmiWatchdogDxe/IpmiWatchdogDxe.inf   |  27 
 .../Drivers/Net/SnpHi1620NewDxe/SnpDxe.inf|  27 
 .../Drivers/PcieRasInitDxe/PcieRasInitDxe.inf |  26 
 .../D06/Drivers/RasInitDxe/RasInitDxe.inf |  25 
 .../D06/Drivers/SFC/SfcDxeDriver.inf  |  27 
 .../D06/Drivers/Sas/SasDxeDriver.inf  |  27 
 .../D06/Drivers/Sm750Dxe/UefiSmi.inf  |  32 ++
 .../TransferSmbiosInfo/TransSmbiosInfo.inf|  26 
 .../OemAddressMapD06/OemAddressMapD06.inf |  40 
 .../D06/MemoryInitPei/MemoryInitPeim.inf  |  28 +
 .../Library/Hi1620Serdes/Hi1620SerdesLib.inf  |  43 +
 .../HisiD06ShellCmdLib/HisiD06ShellCmdLib.inf |  41 
 .../Hi1620/Library/LpcLibHi1620/LpcLib.inf|  39 
 .../PlatformSysCtrlLibHi1620.inf  |  43 +
 .../HisiShellCmdLib/HisiShellCmdLib.inf   |  59 ++
 .../GetInfoFromBmc/GetInfoFromBmc.depex   | Bin 0 -> 18 bytes
 .../Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 0 -> 20480 bytes
 .../D06/Drivers/IoInitDxe/IoInitDxe.depex | Bin 0 -> 18 bytes
 .../D06/Drivers/IoInitDxe/IoInitDxe.efi   | Bin 0 -> 229216 bytes
 .../IpmiInterfaceDxe/IpmiInterfaceDxe.depex   | Bin 0 -> 18 bytes
 .../IpmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 0 -> 29440 bytes
 .../IpmiInterfacePei/IpmiInterfacePei.depex   | Bin 0 -> 18 bytes
 .../IpmiInterfacePei/IpmiInterfacePei.efi | Bin 0 -> 21664 bytes
 .../Drivers/IpmiMiscOpDxe/IpmiMiscOp.depex| Bin 0 -> 36 bytes
 .../D06/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi  | Bin 0 -> 24736 bytes
 .../IpmiWatchdogDxe/IpmiWatchdogDxe.depex | Bin 0 -> 36 bytes
 .../IpmiWatchdogDxe/IpmiWatchdogDxe.efi   | Bin 0 -> 20768 bytes
 .../Net/SnpHi1620NewDxe/SnpPV600Dxe.efi   | Bin 0 -> 75040 bytes
 .../PcieRasInitDxe/PcieRasInitDxe.depex   | Bin 0 -> 36 bytes
 .../Drivers/PcieRasInitDxe/PcieRasInitDxe.efi | Bin 0 -> 21248 bytes
 .../D06/Drivers/RasInitDxe/RasInitDxe.efi | Bin 0 -> 17984 bytes
 .../Hisilicon/D06/Drivers/SFC/SFCDriver.depex | Bin 0 -> 36 bytes
 .../Hisilicon/D06/Drivers/SFC/SFCDriver.efi   | Bin 0 -> 262144 bytes
 .../D06/Drivers/Sas/SasDriverDxe.depex| Bin 0 -> 216 bytes
 .../D06/Drivers/Sas/SasDriverDxe.efi  | Bin 0 -> 221312 bytes
 .../Drivers/Sm750Dxe/SmiGraphicsOutput.efi| Bin 0 -> 38208 bytes
 .../TransferSmbiosInfo/TransSmbiosInfo.depex  | Bin 0 -> 36 bytes
 .../TransferSmbiosInfo/TransSmbiosInfo.efi| Bin 0 -> 20288 bytes
 .../OemAddressMapD06/OemAddressMapD06.lib | Bin 0 -> 61892 bytes
 .../D06/MemoryInitPei/MemoryInit.depex| Bin 0 -> 18 bytes
 .../D06/MemoryInitPei/MemoryInit.efi  | Bin 0 -> 297696 bytes
 Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv  | Bin 0 -> 1048576 bytes
 Platform/Hisilicon/D06/bl1.bin| Bin 0 -> 12432 bytes
 Platform/Hisilicon/D06/fip.bin| Bin 0 -> 113578 bytes
 .../Library/Hi1620Serdes/Hi1620SerdesLib.lib  | Bin 0 -> 1319320 bytes
 .../HisiD06ShellCmdLib/HisiD06ShellCmdLib.lib | Bin 0 -> 144880 bytes
 .../Hi1620/Library/LpcLibHi1620/LpcLib.lib| Bin 0 -> 15406 bytes
 .../PlatformSysCtrlLibHi1620.lib  | Bin 0 -> 356032 bytes
 .../HisiShellCmdLib/HisiShellCmdLib.lib   | Bin 0 -> 1109382 bytes
 54 files changed, 645 insertions(+)
 create mode 100644 
Platform/Hisilicon/D06/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf
 create mode 100644 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf
 create mode 100644 
Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
 create mode 100644 
Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf
 create mode 100644 
Platform/Hisilicon/D06/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf
 create mode 100644 
Platform/Hisilicon/D06/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf
 create mode 100644 
Platform/Hisilicon/D06/Drivers/Net/SnpHi1620NewDxe/SnpDxe.inf
 create mode 100644 
Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.inf
 create mode 100644 Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.inf
 create mode 100644 Platform/Hisilicon/D06/Drivers/SFC/SfcDxeDriver.inf
 create mode 100644 Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
 create mode 100644 Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf
 create mode 100644 

[edk2] [PATCH edk2-non-osi v3 2/2] Silicon/Hisilicon/D06: Add Oem Shell libraries

[Ming Huang]

Add Hisilicon Oem Shell libraries for some commands,such as
biosupdate, getmac, setmac, provision, acpistartos, brdinfo,
sfpinfo.

biosupdate example:
ifconfig -s eth2 static 192.168.2.68 255.255.255.0 192.168.2.1
biosupdate serverIp -u user -p password -f D06.fd -m master

acpistartos example:
ifconfig -s eth2 static 192.168.2.69 255.255.255.0 192.168.2.1
provision serverIp -u user -p password -f os\Image -a 0x8
2
provision serverIp -u user -p password -f os\minifs.cpio.gz -a
0x0700
2
acpistartos

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Library/HisiD06ShellCmdLib/HisiD06ShellCmdLib.inf |  
41 ++
 Silicon/Hisilicon/Library/HisiShellCmdLib/HisiShellCmdLib.inf  |  
59 
 Silicon/Hisilicon/Hi1620/Library/HisiD06ShellCmdLib/HisiD06ShellCmdLib.lib | 
Bin 0 -> 144880 bytes
 Silicon/Hisilicon/Library/HisiShellCmdLib/HisiShellCmdLib.lib  | 
Bin 0 -> 1109382 bytes
 4 files changed, 100 insertions(+)

diff --git 
a/Silicon/Hisilicon/Hi1620/Library/HisiD06ShellCmdLib/HisiD06ShellCmdLib.inf 
b/Silicon/Hisilicon/Hi1620/Library/HisiD06ShellCmdLib/HisiD06ShellCmdLib.inf
new file mode 100644
index 000..3dea3fb
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1620/Library/HisiD06ShellCmdLib/HisiD06ShellCmdLib.inf
@@ -0,0 +1,41 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = HisiD06ShellCmdLib
+  FILE_GUID  = 41878264-1668-460f-b0bf-26bdc89d464c
+  MODULE_TYPE= UEFI_APPLICATION
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = NULL|UEFI_APPLICATION UEFI_DRIVER
+  CONSTRUCTOR= HisiD06ShellCmdLibConstructor
+  DESTRUCTOR = HisiD06ShellCmdLibDestructor
+
+
+[Binaries.AARCH64]
+  LIB|HisiD06ShellCmdLib.lib|*
+
+[Packages]
+  ShellPkg/ShellPkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  I2CLib
+  ShellLib
+
+[Guids]
+  HisiPlatformShellSampleHiiGuid ## CONSUMES ## HII
diff --git a/Silicon/Hisilicon/Library/HisiShellCmdLib/HisiShellCmdLib.inf 
b/Silicon/Hisilicon/Library/HisiShellCmdLib/HisiShellCmdLib.inf
new file mode 100644
index 000..a81af92
--- /dev/null
+++ b/Silicon/Hisilicon/Library/HisiShellCmdLib/HisiShellCmdLib.inf
@@ -0,0 +1,59 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = HisiShellCmdLib
+  FILE_GUID  = 88324505-C49D-4eac-8253-75D324457B88
+  MODULE_TYPE= UEFI_APPLICATION
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = NULL|UEFI_APPLICATION UEFI_DRIVER
+  CONSTRUCTOR= HisiShellCmdLibConstructor
+  DESTRUCTOR = HisiShellCmdLibDestructor
+
+[Binaries.AARCH64]
+  LIB|HisiShellCmdLib.lib|*
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ShellPkg/ShellPkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  ArmSmcLib
+  IpmiCmdLib
+  PcdLib
+  ShellCommandLib
+  ShellLib
+
+[Pcd]
+  gEfiShellPkgTokenSpaceGuid.PcdShellProfileMask ## CONSUMES
+  gHisiTokenSpaceGuid.PcdMdioSubctrlAddress  ## CONSUMES
+  gHisiTokenSpaceGuid.PcdStartOsParameter## CONSUMES
+
+[FixedPcd.common]
+  gArmTokenSpaceGuid.PcdFdSize## CONSUMES
+  gHisiTokenSpaceGuid.PcdBaseBoardProductName ## CONSUMES
+  gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable## CONSUMES
+
+[Protocols]
+  gHisiSpiFlashProtocolGuid   ## CONSUMES
+  gOemNicProtocolGuid ## CONSUMES
+  gUniNorFlashProtocolGuid## CONSUMES
+
+[Guids]
+  gVersionInfoHobGuid ## CONSUMES
+  HisiShellSampleHiiGuid  ## 

Re: [edk2] [PATCH] ShellPkg/edit: Fix heap access out-of-bounds

[Carsey, Jaben]

Reviewed-by: Jaben Carsey 

> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, August 15, 2018 11:33 PM
> To: edk2-devel@lists.01.org
> Cc: Carsey, Jaben ; Wang, Jian J
> 
> Subject: [PATCH] ShellPkg/edit: Fix heap access out-of-bounds
> Importance: High
> 
> The issue was found when heap guard is turned on.
> PrintLib somehow receives a non-null terminated string in var-arg.
> When the PrintLib implementation reads the string it keeps
> reading because no null-terminator is met, which triggers the page
> fault set by the heap guard.
> 
> The issue is caused by a bug in FileBufferPrintLine().
> When "edit" opens a binary file, in FileBufferPrintLine(),
> the Line->Buffer may start with \x00 \x00, but the Line->Size is
> larger than MainEditor.ScreenSize.Column, it causes the PrintLine is
> set to an empty string by below call:
> StrnCpyS (
>   PrintLine, BufLen/sizeof(CHAR16), Buffer,
>   MIN(Limit, MainEditor.ScreenSize.Column)
>   );
> But since Limit (equals to Line->Size) is larger than
> MainEditor.ScreenSize.Column, below for-loop doesn't successfully
> set the whole PrintLine to all-empty-space.
> for (; Limit < MainEditor.ScreenSize.Column; Limit++) {
>   PrintLine[Limit] = L' ';
> }
> So after the for-loop, PrintLine is still an empty string.
> Later in below call, the PrintLine2 is created based on PrintLine.
> ShellCopySearchAndReplace (
>   PrintLine, PrintLine2,
>   BufLen * 2, L"%", L"^%", FALSE, FALSE
>   );
> But due to the implementation of ShellCopySearchAndReplace(),
> PrintLine2 is untouched and INVALID_PARAMETER is returned.
> Finally an uninitialized string is passed to ShellPrintEx()
> which causes the #PF exception.
> 
> The fix is to reset Limit to StrLen(PrintLine) before for-loop.
> So that PrintLine can be converted from an empty string to a
> string containing all spaces.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ruiyu Ni 
> Cc: Jaben Carsey 
> Cc: Jian Wang 
> ---
>  ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> b/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> index 56ccd399b0..39a5afb53f 100644
> --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/FileBuffer.c
> @@ -500,7 +500,7 @@ FileBufferPrintLine (
>PrintLine = AllocatePool (BufLen);
>if (PrintLine != NULL) {
>  StrnCpyS (PrintLine, BufLen/sizeof(CHAR16), Buffer, MIN(Limit,
> MainEditor.ScreenSize.Column));
> -for (; Limit < MainEditor.ScreenSize.Column; Limit++) {
> +for (Limit = StrLen (PrintLine); Limit < MainEditor.ScreenSize.Column;
> Limit++) {
>PrintLine[Limit] = L' ';
>  }
> 
> --
> 2.16.1.windows.1

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Re: [edk2] [PATCH v2 0/7] UefiLib: centralize OpenFileByDevicePath() and fix its bugs

[Laszlo Ersek]

On 08/15/18 19:42, Gao, Liming wrote:
> Laszlo:
>   Sorry to miss the patch. Thank you to update IntelFrameworkPkg UefiLib. The 
> change in MdePkg and IntelFrameworkPkg is good to me. Reviewed-by: Liming Gao 
> 

Thank you.

Series pushed as commit range 52047be02430..9becf2f0759e.

Laszlo

> 
>> -Original Message-
>> From: Laszlo Ersek [mailto:ler...@redhat.com]
>> Sent: Wednesday, August 15, 2018 10:21 AM
>> To: Gao, Liming ; Kinney, Michael D 
>> 
>> Cc: Ni, Ruiyu ; Dong, Eric ; 
>> edk2-devel-01 ; Wu, Jiaxin
>> ; Yao, Jiewen ; Zhang, Chao B 
>> ; Carsey, Jaben
>> ; Fu, Siyuan ; Zeng, Star 
>> 
>> Subject: Re: [edk2] [PATCH v2 0/7] UefiLib: centralize 
>> OpenFileByDevicePath() and fix its bugs
>>
>> On 08/09/18 15:30, Laszlo Ersek wrote:
>>> On 08/03/18 14:15, Laszlo Ersek wrote:
 Repo:   https://github.com/lersek/edk2.git
 Branch: open_file_by_devpath_tiano_1008_v2

 This is version 2 of the patch set that was originally posted at:

   https://lists.01.org/pipermail/edk2-devel/2018-July/027253.html

 for .

 Changes are noted on every patch.
>>>
>>> Liming, Mike, can you please check patches #1 and #2?
>>>
>>> (Obviously I'll only push the series after the quiet period ends.)
>>
>> pinging this set again
>>
>> Thanks
>> Laszlo
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Re: [edk2] [PATCH 1/1] OvmfPkg: link Sha384 and Sha512 support into Tcg2Pei and Tcg2Dxe

[Laszlo Ersek]

On 08/15/18 14:31, Laszlo Ersek wrote:
> On 08/15/18 05:10, Gary Lin wrote:
>> Sha384 and Sha512 were added to HashInstanceLib recently. To make them
>> available in Tcg2Pei and Tcg2Dxe, we have to link both libraries.
>>
>> Cc: Ard Biesheuvel 
>> Cc: Jordan Justen 
>> Cc: Laszlo Ersek 
>> Cc: Marc-André Lureau 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Gary Lin 
>> ---
>>  OvmfPkg/OvmfPkgIa32.dsc| 4 
>>  OvmfPkg/OvmfPkgIa32X64.dsc | 4 
>>  OvmfPkg/OvmfPkgX64.dsc | 4 
>>  3 files changed, 12 insertions(+)
>>

> Reviewed-by: Laszlo Ersek 
> Build-tested-by: Laszlo Ersek 
> 
> I will push this after the stable tag.

Commit b9130c866dc0.

Thanks!
Laszlo
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Re: [edk2] [PATCH 5/5] NetworkPkg: UefiPxeBcDxe: Remove the redundant code.

[Laszlo Ersek]

On 08/16/18 03:37, Songpeng Li wrote:
> The function PxeBcFreeBootFileOption that is never called
> have been removed.
> 
> Cc: Jiaxin Wu 
> Cc: Siyuan Fu 
> Cc: Laszlo Ersek 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1064
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Songpeng Li 
> ---
>  NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.c | 23 ---
>  NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.h | 10 --
>  2 files changed, 33 deletions(-)

Reviewed-by: Laszlo Ersek 

Thanks
Laszlo
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Re: [edk2] [PATCH v2 0/2] UefiCpuPkg: Add RSB stuffing before RSM instruction

[Laszlo Ersek]

Hello Hao,

On 08/16/18 05:14, Hao Wu wrote:
> V2 changes:
> A. Refine commit log message to clarify the purpose of the series
> 
> B. Extract the RSB stuffing logic to INC files to avoid code duplication:
> When compiling .NASM source files, the current build rule does not support
> including files other than the .NASM file directory, this series will
> duplicate the StuffRsb.inc file together with the .NASM files at this
> moment.
> 
> Please consider this approach as the first stage, I have filed a Bugzilla
> for adding $(INC)-like support when compiling .NASM files:
> https://bugzilla.tianocore.org/show_bug.cgi?id=1085
> 
> After the above support is added, the next step will be taken to remove
> those duplicated StuffRsb.inc files and put it under a common include
> directory like:
> UefiCpuPkg/Include/
> 
> Cc: Jiewen Yao 
> Cc: Eric Dong 
> Cc: Laszlo Ersek 
> Cc: Michael D Kinney 
> 
> Hao Wu (2):
>   UefiCpuPkg/PiSmmCpuDxeSmm: Add RSB stuffing before RSM instruction
>   UefiCpuPkg/SmmCpuFeaturesLib: Add RSB stuffing before RSM instruction

this looks better, much appreciated.

I've checked the reference from Jiewen, namely
.
Related to that, I have a number of questions / requests.

The Intel publication linked above names two CVEs, CVE-2017-5753 and
CVE-2017-5715.

The patches are clearly relevant for CVE-2017-5715 (RSB stuffing before
RSM).

However, I'm unsure if the patches are also relevant for CVE-2017-5753
("LFENCE after validation of untrusted data but before use"). The
patches contain LFENCE instructions, but they don't seem to separate
data validation from data use -- they are in the middle of the SpecTrap
loops. What is their purpose? Are they meant to prevent speculation past
the JMP instructions?

(1) So, my first request is, please add the *exact* CVE number(s) to the
subject lines of the patches. (Even if this makes the subjects a bit too
long.) It is important to see the CVE numbers in a shortlog, such as
"git log --oneline".

(2) The URL of the Intel publication linked above is wrapped in both
commit messages. Please make sure they aren't wrapped. It's OK if they
end up being so long that we would normally not accept them in commit
messages. They are URLs and should be easy to click, or copy

(3) If we have (hidden) TianoCore BZs for these CVEs, they should be
opened up to the public, and they should be referenced in the commit
messages (in parallel to (1) -- that is, let's state which CVEs are
addressed by the patches, and then name the matching TianoCore BZs as well).

Other than that, the commit messages do a good job at explaining that
these firmware patches protect the retpolines in the *OS*. The article
says the same, but including those sentences in the commit messages is best.

I'll proceed to reviewing and testing the patches.

Thanks
Laszlo
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Re: [edk2] [PATCH v2 2/2] UefiCpuPkg/SmmCpuFeaturesLib: Add RSB stuffing before RSM instruction

[Laszlo Ersek]

On 08/16/18 05:14, Hao Wu wrote:
> Return Stack Buffer (RSB) is used to predict the target of RET
> instructions. When the RSB underflows, some processors may fall back to
> using branch predictors. This might impact software using the retpoline
> mitigation strategy on those processors.
> 
> This commit will add RSB stuffing logic before returning from SMM (the RSM
> instruction) to avoid interfering with non-SMM usage of the retpoline
> technique.
> 
> After the stuffing, RSB entries will contain a trap like:
> 
> @SpecTrap:
> pause
> lfence
> jmp @SpecTrap
> 
> A more detailed explanation of the purpose of commit is under the
> 'Branch target injection mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-firmwa
> re-speculative-execution-side-channel-mitigation
> 
> Cc: Jiewen Yao 
> Cc: Eric Dong 
> Cc: Laszlo Ersek 
> Cc: Michael D Kinney 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu 
> ---
>  UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm |  3 ++
>  UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.nasm | 10 ++--
>  UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/StuffRsb.inc  | 55 
> 
>  UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm  |  3 ++
>  UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm  |  8 ++-
>  UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/StuffRsb.inc   | 55 
> 
>  6 files changed, 129 insertions(+), 5 deletions(-)

I'm going to skip patch #2 (and I defer to the other reviewers on CC)
because this patch seems to affect the "SmmCpuFeaturesLibStm" instance.

And, OVMF uses none of the UefiCpuPkg/Library/SmmCpuFeaturesLib
instances. It uses "OvmfPkg/Library/SmmCpuFeaturesLib", which originates
from the UefiCpuPkg instance that does not support STM.

Thanks!
Laszlo
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Re: [edk2] [PATCH 3/5] NetworkPkg: TcpDxe: Remove the redundant code.

[Laszlo Ersek]

On 08/16/18 03:37, Songpeng Li wrote:
> The function TcpPawsOK that is never called have been removed.
> 
> Cc: Jiaxin Wu 
> Cc: Siyuan Fu 
> Cc: Laszlo Ersek 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1064
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Songpeng Li 
> ---
>  NetworkPkg/TcpDxe/TcpOption.c | 32 +---
>  NetworkPkg/TcpDxe/TcpOption.h | 18 +-
>  2 files changed, 2 insertions(+), 48 deletions(-)

Reviewed-by: Laszlo Ersek 

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Re: [edk2] [PATCH 4/5] NetworkPkg: TlsDxe: Remove the redundant definition.

[Laszlo Ersek]

On 08/16/18 03:37, Songpeng Li wrote:
> The definition NetLib has been removed.

(1) I suggest calling this "lib class dependency", not "definition".

(I could have made the same for a GUID removed in a previous patch, but
there "definition" seemed acceptable. "GUID dependency" would be an
improvement there as well.)

The subject line could also say, "remove superfluous dependencies".

> 
> Cc: Jiaxin Wu 
> Cc: Siyuan Fu 
> Cc: Laszlo Ersek 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1064
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Songpeng Li 
> ---
>  NetworkPkg/TlsDxe/TlsDxe.inf | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/NetworkPkg/TlsDxe/TlsDxe.inf b/NetworkPkg/TlsDxe/TlsDxe.inf
> index 907feb735b..aaea0fc2ff 100644
> --- a/NetworkPkg/TlsDxe/TlsDxe.inf
> +++ b/NetworkPkg/TlsDxe/TlsDxe.inf
> @@ -5,7 +5,7 @@
>  #  This module produces EFI TLS (Transport Layer Security) Protocol and EFI 
> TLS
>  #  Service Binding Protocol, to provide TLS services.
>  #
> -#  Copyright (c) 2016, Intel Corporation. All rights reserved.
> +#  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
>  #
>  #  This program and the accompanying materials
>  #  are licensed and made available under the terms and conditions of the BSD 
> License
> @@ -52,7 +52,6 @@
>BaseLib
>UefiLib
>DebugLib
> -  NetLib
>BaseCryptLib
>TlsLib
>  
> 

(2) This patch is incomplete; the file "NetworkPkg/TlsDxe/TlsImpl.h"
contains:

#include 

That header file is huge, so I won't try to audit, on a source code
level, whether TlsDxe makes any NetLib API calls.

(Note that even if it does, then the current patch need not necessarily
cause a linking failure. Because, a NetLib dependency could be inherited
through one of the library instances with which a given platform
resolves the *other* lib class dependencies for TlsDxe.)

So, please remove the #include too, and if TlsDxe still compiles, please
resubmit the patch. (Otherwise, drop the patch, of course.)

Thanks!
Laszlo
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Re: [edk2] [PATCH v2 0/5] BaseTools/Source/C: take EXTRA_OPTFLAGS and EXTRA_LDFLAGS from the caller

[Laszlo Ersek]

On 08/15/18 19:37, Gao, Liming wrote:
> Laszlo:
>   The patch is good. Reviewed-by: Liming Gao 

Thanks!

Pushed as commit range 9becf2f0759e..81502cee20ac.

Laszlo

> 
>> -Original Message-
>> From: Laszlo Ersek [mailto:ler...@redhat.com]
>> Sent: Wednesday, August 15, 2018 10:19 AM
>> To: Gao, Liming 
>> Cc: edk2-devel-01 
>> Subject: Re: [edk2] [PATCH v2 0/5] BaseTools/Source/C: take EXTRA_OPTFLAGS 
>> and EXTRA_LDFLAGS from the caller
>>
>> Hi Liming,
>>
>> On 08/09/18 15:22, Laszlo Ersek wrote:
>>> Repo:   https://github.com/lersek/edk2.git
>>> Branch: extra_flags_rhbz1540244_v2
>>>
>>> Version 1 of this set was posted at
>>>
>>>   20180726004415.13381-1-lersek@redhat.com">http://mid.mail-archive.com/20180726004415.13381-1-lersek@redhat.com
>>>   https://lists.01.org/pipermail/edk2-devel/2018-July/027606.html
>>>
>>> In version 2 (i.e., this version), the PCCTS tools (the "dlg" lexer
>>> generator and the "antlr" parser generator) are not modified. Relative
>>> to v1:
>>>
>>> - "[PATCH 4/6] BaseTools/Pccts: clean up antlr and dlg makefiles" has
>>>   been dropped,
>>>
>>> - the "BaseTools/Source/C/VfrCompile/Pccts" hunks have been removed from
>>>   "[PATCH 5/6] BaseTools/Source/C: take EXTRA_OPTFLAGS from the caller"
>>>   and "[PATCH 6/6] BaseTools/Source/C: take EXTRA_LDFLAGS from the
>>>   caller".
>>>
>>> In other words, v2 is a proper subset of v1, so that PCCTS is left
>>> alone.
>>>
>>> Cc: Liming Gao 
>>> Cc: Yonghong Zhu 
>>
>> do you have any comments on patches #4 and #5?
>>
>> Thanks,
>> Laszlo
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Re: [edk2] [PATCH 1/5] NetworkPkg: IScsiDxe: Remove the redundant code and definition.

[Laszlo Ersek]

On 08/16/18 03:37, Songpeng Li wrote:
> The function IScsiFindTcbByITT that is never called have been removed.
> The definition gEfiAcpi20TableGuid has been removed.
> 
> Cc: Jiaxin Wu 
> Cc: Siyuan Fu 
> Cc: Laszlo Ersek 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1064
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Songpeng Li 
> ---
>  NetworkPkg/IScsiDxe/IScsiDxe.inf |  1 -
>  NetworkPkg/IScsiDxe/IScsiProto.c | 33 
>  2 files changed, 34 deletions(-)

Reviewed-by: Laszlo Ersek 

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Re: [edk2] [PATCH v2 0/2] UefiCpuPkg: Add RSB stuffing before RSM instruction

[Laszlo Ersek]

On 08/16/18 22:04, Laszlo Ersek wrote:

> (1) [...]
> (2) [...]
> (3) [...]

(4) Please reference
 in the commit
messages as well; which is about the unification of the INC files.

Thanks!
Laszlo
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Re: [edk2] [PATCH v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Add RSB stuffing before RSM instruction

[Wu, Hao A]

> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Friday, August 17, 2018 7:02 AM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Yao, Jiewen; Dong, Eric; Kinney, Michael D
> Subject: Re: [PATCH v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Add RSB stuffing
> before RSM instruction
> 
> Beyond comments (1) through (4) which I made under the blurb (v2 0/2):
> 
> On 08/16/18 05:14, Hao Wu wrote:
> > Return Stack Buffer (RSB) is used to predict the target of RET
> > instructions. When the RSB underflows, some processors may fall back to
> > using branch predictors. This might impact software using the retpoline
> > mitigation strategy on those processors.
> >
> > This commit will add RSB stuffing logic before returning from SMM (the RSM
> > instruction) to avoid interfering with non-SMM usage of the retpoline
> > technique.
> >
> > After the stuffing, RSB entries will contain a trap like:
> >
> > @SpecTrap:
> > pause
> > lfence
> > jmp @SpecTrap
> >
> > A more detailed explanation of the purpose of commit is under the
> > 'Branch target injection mitigation' section of the below link:
> > https://software.intel.com/security-software-guidance/insights/host-firmwa
> > re-speculative-execution-side-channel-mitigation
> >
> > Cc: Jiewen Yao 
> > Cc: Eric Dong 
> > Cc: Laszlo Ersek 
> > Cc: Michael D Kinney 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Hao Wu 
> > ---
> >  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm |  3 ++
> >  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm  |  3 ++
> >  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc  | 55
> 
> >  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm  |  3 ++
> >  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm   |  3 ++
> >  UefiCpuPkg/PiSmmCpuDxeSmm/X64/StuffRsb.inc   | 55
> 
> >  6 files changed, 122 insertions(+)
> 
> (5) I've had an idea here, but I'm mentioning it only for completeness.
> It will not matter after we fix
> , but until then,
> you could find it useful. Up to you:
> 
> We could move "StuffRsb.inc" to
> "UefiCpuPkg/PiSmmCpuDxeSmm/StuffRsb.inc", thereby eliminating the
> duplication between the Ia32 and X64 subdirectories. And then:
> 
> >
> > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
> > index 509e7a0a66..6bbc339c53 100644
> > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
> > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
> > @@ -18,6 +18,8 @@
> >  ;
> >  
> > ;---
> >
> > +%include "StuffRsb.inc"
> 
> these %include directives could say "../StuffRsb.inc".
> 
> I didn't try this in practice, but I figured it's worth mentioning. Feel
> free to ignore it though; I hope BZ#1091 will be fixed soon.

I did a quick search for pattern ../ within the edk2 repository within
file types .c, .h and .nasm. I found that there are 100+ occurrences, but
most of them appear in 3rd party codes like openssl, BrotliCompress and
etc.

So I am leaning toward to avoid using relative paths for include files,
but anyway, thanks for raising this idea here.

> 
> > +
> >  %define MSR_IA32_MISC_ENABLE 0x1A0
> >  %define MSR_EFER  0xc080
> >  %define MSR_EFER_XD   0x800
> > @@ -204,6 +206,7 @@ ASM_PFX(SmiHandler):
> >  wrmsr
> >
> >  .7:
> > +StuffRsb32
> >  rsm
> >
> >  ASM_PFX(gcSmiHandlerSize): DW $ - _SmiEntryPoint
> > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
> > index 5ff3cd2e73..322b1ab556 100644
> > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
> > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
> > @@ -18,6 +18,8 @@
> >  ;
> >  
> > ;---
> >
> > +%include "StuffRsb.inc"
> > +
> >  extern ASM_PFX(SmmInitHandler)
> >  extern ASM_PFX(mRebasedFlag)
> >  extern ASM_PFX(mSmmRelocationOriginalAddress)
> > @@ -75,6 +77,7 @@ BITS 32
> >  mov esp, strict dword 0 ; source operand will be patched
> >  ASM_PFX(gPatchSmmInitStack):
> >  callASM_PFX(SmmInitHandler)
> > +StuffRsb32
> >  rsm
> >
> >  BITS 16
> > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
> > new file mode 100644
> > index 00..3fd481a8d3
> > --- /dev/null
> > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
> > @@ -0,0 +1,55 @@
> > +;--
> > +;
> > +; Copyright (c) 2018, Intel Corporation. All rights reserved.
> > +; This program and the accompanying materials
> > +; are licensed and made available under the terms and conditions of the BSD
> License
> > +; which accompanies this distribution.  The full text of the license may be
> found at
> > +; 

Re: [edk2] [PATCH v2 0/2] UefiCpuPkg: Add RSB stuffing before RSM instruction

[Wu, Hao A]

> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Friday, August 17, 2018 4:05 AM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Kinney, Michael D; Yao, Jiewen; Dong, Eric
> Subject: Re: [edk2] [PATCH v2 0/2] UefiCpuPkg: Add RSB stuffing before RSM
> instruction
> 
> Hello Hao,
> 
> On 08/16/18 05:14, Hao Wu wrote:
> > V2 changes:
> > A. Refine commit log message to clarify the purpose of the series
> >
> > B. Extract the RSB stuffing logic to INC files to avoid code duplication:
> > When compiling .NASM source files, the current build rule does not support
> > including files other than the .NASM file directory, this series will
> > duplicate the StuffRsb.inc file together with the .NASM files at this
> > moment.
> >
> > Please consider this approach as the first stage, I have filed a Bugzilla
> > for adding $(INC)-like support when compiling .NASM files:
> > https://bugzilla.tianocore.org/show_bug.cgi?id=1085
> >
> > After the above support is added, the next step will be taken to remove
> > those duplicated StuffRsb.inc files and put it under a common include
> > directory like:
> > UefiCpuPkg/Include/
> >
> > Cc: Jiewen Yao 
> > Cc: Eric Dong 
> > Cc: Laszlo Ersek 
> > Cc: Michael D Kinney 
> >
> > Hao Wu (2):
> >   UefiCpuPkg/PiSmmCpuDxeSmm: Add RSB stuffing before RSM instruction
> >   UefiCpuPkg/SmmCpuFeaturesLib: Add RSB stuffing before RSM instruction
> 
> this looks better, much appreciated.
> 
> I've checked the reference from Jiewen, namely
>  firmware-speculative-execution-side-channel-mitigation>.
> Related to that, I have a number of questions / requests.
> 
> The Intel publication linked above names two CVEs, CVE-2017-5753 and
> CVE-2017-5715.
> 
> The patches are clearly relevant for CVE-2017-5715 (RSB stuffing before
> RSM).
> 
> However, I'm unsure if the patches are also relevant for CVE-2017-5753
> ("LFENCE after validation of untrusted data but before use"). The
> patches contain LFENCE instructions, but they don't seem to separate
> data validation from data use -- they are in the middle of the SpecTrap
> loops. What is their purpose? Are they meant to prevent speculation past
> the JMP instructions?

There is a public document for retpoline at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/Retpoline-A-Branch-Target-Injection-Mitigation.pdf

Within section '4.4 Speculation Barriers', I find that:

"
The architectural specification for LFENCE defines that it does not
execute until all prior instructions have completed, and no later
instructions begin execution until LFENCE completes. This specification
limits the speculative execution that a processor implementation can
perform around the LFENCE, ...
"

I think, just as you mentioned, the lfence within the 'trap' is to limit
the speculative execution beyond JMP.

> 
> (1) So, my first request is, please add the *exact* CVE number(s) to the
> subject lines of the patches. (Even if this makes the subjects a bit too
> long.) It is important to see the CVE numbers in a shortlog, such as
> "git log --oneline".

Yes. I will refine the subject of each commits to contain the CVE number.

> 
> (2) The URL of the Intel publication linked above is wrapped in both
> commit messages. Please make sure they aren't wrapped. It's OK if they
> end up being so long that we would normally not accept them in commit
> messages. They are URLs and should be easy to click, or copy

Yes. I will modify the log message and keep the URL in one line.

> 
> (3) If we have (hidden) TianoCore BZs for these CVEs, they should be
> opened up to the public, and they should be referenced in the commit
> messages (in parallel to (1) -- that is, let's state which CVEs are
> addressed by the patches, and then name the matching TianoCore BZs as well).

It seems I cannot find a BZ for this, I will submit one and update the log
message to reference the BZ.

Best Regards,
Hao Wu

> 
> Other than that, the commit messages do a good job at explaining that
> these firmware patches protect the retpolines in the *OS*. The article
> says the same, but including those sentences in the commit messages is best.
> 
> I'll proceed to reviewing and testing the patches.
> 
> Thanks
> Laszlo
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Re: [edk2] [PATCH v2 0/2] UefiCpuPkg: Add RSB stuffing before RSM instruction

[Wu, Hao A]

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Laszlo
> Ersek
> Sent: Friday, August 17, 2018 5:09 AM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Kinney, Michael D; Yao, Jiewen; Dong, Eric
> Subject: Re: [edk2] [PATCH v2 0/2] UefiCpuPkg: Add RSB stuffing before RSM
> instruction
> 
> On 08/16/18 22:04, Laszlo Ersek wrote:
> 
> > (1) [...]
> > (2) [...]
> > (3) [...]
> 
> (4) Please reference
>  in the commit
> messages as well; which is about the unification of the INC files.

Yes, I will mention this BZ dependency in the log message.

Best Regards,
Hao Wu

> 
> Thanks!
> Laszlo
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[edk2] [PATCH] BaseTools/VfrCompile: honor EXTRA_LDFLAGS

[Laszlo Ersek]

In commit 81502cee20ac ("BaseTools/Source/C: take EXTRA_LDFLAGS from the
caller", 2018-08-16), I missed that "VfrCompile/GNUmakefile" does not use
BUILD_LFLAGS in the APPLICATION linking rule, unlike "app.makefile" does.
Instead, "VfrCompile/GNUmakefile" uses the (undefined) LFLAGS macro.
Therefore commit 81502cee20ac did not cover the linking step of
VfrCompile.

Thankfully, the structure of the linking rules is the same, between
"app.makefile" and "VfrCompile/GNUmakefile". Rename the undefined LFLAGS
macro in "VfrCompile/GNUmakefile" to VFR_LFLAGS (for consistency with
VFR_CXXFLAGS), and set it to EXTRA_LDFLAGS.

As a result, we have:

 | compilation| linking
  ---++--
  VfrCompile | VFR_CXXFLAGS = | VFR_LFLAGS =
 | BUILD_OPTFLAGS =   | EXTRA_LDFLAGS
 | '-O2' + EXTRA_OPTFLAGS |
  ---++--
  other apps | BUILD_CFLAGS/BUILD_CXXFLAGS =  | BUILD_LFLAGS =
 | [...] + BUILD_OPTFLAGS =   | [...] + EXTRA_LDFLAGS
 | [...] + '-O2' + EXTRA_OPTFLAGS |

This table shows
- that the VfrCompile compilation and linking flags are always a subset of
  the corresponding flags used by the other apps,
- and that the EXTRA flags are always at the end.

Cc: Liming Gao 
Cc: Yonghong Zhu 
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1540244
Fixes: 81502cee20ac4046f08bb4aec754c7091c8808dc
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek 
---

Notes:
Repo:   https://github.com/lersek/edk2.git
Branch: extra_flags_rhbz1540244_round2

 BaseTools/Source/C/VfrCompile/GNUmakefile | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Source/C/VfrCompile/GNUmakefile 
b/BaseTools/Source/C/VfrCompile/GNUmakefile
index bbe562cbc54f..9273589ff805 100644
--- a/BaseTools/Source/C/VfrCompile/GNUmakefile
+++ b/BaseTools/Source/C/VfrCompile/GNUmakefile
@@ -28,6 +28,9 @@ VFR_CPPFLAGS = -DPCCTS_USE_NAMESPACE_STD $(BUILD_CPPFLAGS)
 # keep BUILD_OPTFLAGS last
 VFR_CXXFLAGS = $(BUILD_OPTFLAGS)
 
+# keep EXTRA_LDFLAGS last
+VFR_LFLAGS = $(EXTRA_LDFLAGS)
+
 LINKER = $(BUILD_CXX)
 
 EXTRA_CLEAN_OBJECTS = EfiVfrParser.cpp EfiVfrParser.h VfrParser.dlg 
VfrTokens.h VfrLexer.cpp VfrLexer.h VfrSyntax.cpp tokens.h
@@ -42,7 +45,7 @@ APPLICATION = $(MAKEROOT)/bin/$(APPNAME)
 all: $(MAKEROOT)/bin $(APPLICATION) 
 
 $(APPLICATION): $(OBJECTS) 
-   $(LINKER) -o $(APPLICATION) $(LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs 
$(LIBS)
+   $(LINKER) -o $(APPLICATION) $(VFR_LFLAGS) $(OBJECTS) -L$(MAKEROOT)/libs 
$(LIBS)
 
 VfrCompiler.o: ../Include/Common/BuildVersion.h
 
-- 
2.14.1.3.gb7cf6e02401b

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Re: [edk2] [PATCH v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Add RSB stuffing before RSM instruction

[Laszlo Ersek]

Beyond comments (1) through (4) which I made under the blurb (v2 0/2):

On 08/16/18 05:14, Hao Wu wrote:
> Return Stack Buffer (RSB) is used to predict the target of RET
> instructions. When the RSB underflows, some processors may fall back to
> using branch predictors. This might impact software using the retpoline
> mitigation strategy on those processors.
>
> This commit will add RSB stuffing logic before returning from SMM (the RSM
> instruction) to avoid interfering with non-SMM usage of the retpoline
> technique.
>
> After the stuffing, RSB entries will contain a trap like:
>
> @SpecTrap:
> pause
> lfence
> jmp @SpecTrap
>
> A more detailed explanation of the purpose of commit is under the
> 'Branch target injection mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-firmwa
> re-speculative-execution-side-channel-mitigation
>
> Cc: Jiewen Yao 
> Cc: Eric Dong 
> Cc: Laszlo Ersek 
> Cc: Michael D Kinney 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu 
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm |  3 ++
>  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm  |  3 ++
>  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc  | 55 
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm  |  3 ++
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm   |  3 ++
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/StuffRsb.inc   | 55 
>  6 files changed, 122 insertions(+)

(5) I've had an idea here, but I'm mentioning it only for completeness.
It will not matter after we fix
, but until then,
you could find it useful. Up to you:

We could move "StuffRsb.inc" to
"UefiCpuPkg/PiSmmCpuDxeSmm/StuffRsb.inc", thereby eliminating the
duplication between the Ia32 and X64 subdirectories. And then:

>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm 
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
> index 509e7a0a66..6bbc339c53 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
> @@ -18,6 +18,8 @@
>  ;
>  
> ;---
>
> +%include "StuffRsb.inc"

these %include directives could say "../StuffRsb.inc".

I didn't try this in practice, but I figured it's worth mentioning. Feel
free to ignore it though; I hope BZ#1091 will be fixed soon.

> +
>  %define MSR_IA32_MISC_ENABLE 0x1A0
>  %define MSR_EFER  0xc080
>  %define MSR_EFER_XD   0x800
> @@ -204,6 +206,7 @@ ASM_PFX(SmiHandler):
>  wrmsr
>
>  .7:
> +StuffRsb32
>  rsm
>
>  ASM_PFX(gcSmiHandlerSize): DW $ - _SmiEntryPoint
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm 
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
> index 5ff3cd2e73..322b1ab556 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
> @@ -18,6 +18,8 @@
>  ;
>  
> ;---
>
> +%include "StuffRsb.inc"
> +
>  extern ASM_PFX(SmmInitHandler)
>  extern ASM_PFX(mRebasedFlag)
>  extern ASM_PFX(mSmmRelocationOriginalAddress)
> @@ -75,6 +77,7 @@ BITS 32
>  mov esp, strict dword 0 ; source operand will be patched
>  ASM_PFX(gPatchSmmInitStack):
>  callASM_PFX(SmmInitHandler)
> +StuffRsb32
>  rsm
>
>  BITS 16
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc 
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
> new file mode 100644
> index 00..3fd481a8d3
> --- /dev/null
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
> @@ -0,0 +1,55 @@
> +;--
> +;
> +; Copyright (c) 2018, Intel Corporation. All rights reserved.
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD 
> License
> +; which accompanies this distribution.  The full text of the license may be 
> found at
> +; http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
> IMPLIED.
> +;
> +; Abstract:
> +;
> +;   This is the equates file for Stuffing the Return Stack Buffer (RSB)

(6) I think we shouldn't call this an EQU file in the comment above; we
are providing a macro definition. Maybe say "This file provides macro
definitions for Stuffing the Return Stack Buffer (RSB)".


Otherwise, the patch looks good to me. This is to say that what it does
does not look broken to me (i.e. it appears "sound"); however I can't
tell whether it actually suffices for the stated purpose (i.e. if it is
"complete"). For that reason, I prefer to give an A-b rather than an
R-b:

Acked-by: Laszlo Ersek 

(The stack footprint is 32*4=128 bytes in the IA32 case and 32*8=256
bytes in the X64 

[edk2] [PATCH v1 1/1] BaseTools: remove unused code

[Jaben Carsey]

the if statment just has pass statement.
invert if condition and just use do the else work.

Cc: Yonghong Zhu 
Cc: Liming Gao 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey 
---
 BaseTools/Source/Python/Workspace/InfBuildData.py | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/BaseTools/Source/Python/Workspace/InfBuildData.py 
b/BaseTools/Source/Python/Workspace/InfBuildData.py
index 29e68aeb3bf3..44eaebf62e50 100644
--- a/BaseTools/Source/Python/Workspace/InfBuildData.py
+++ b/BaseTools/Source/Python/Workspace/InfBuildData.py
@@ -370,11 +370,7 @@ class InfBuildData(ModuleBuildClassObject):
 self._Sources.append(File)
 else:
 ToolList = self._NMAKE_FLAG_PATTERN_.findall(Name)
-if len(ToolList) == 0 or len(ToolList) != 1:
-pass
-#EdkLogger.warn("build", "Don't know how to do with 
macro [%s]" % Name,
-#   File=self.MetaFile, Line=LineNo)
-else:
+if len(ToolList) == 1:
 if self._BuildOptions is None:
 self._BuildOptions = OrderedDict()
 
-- 
2.16.2.windows.1

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Re: [edk2] [PATCH 3/5] SecurityPkg: Remove unused PCDs

[Zhang, Chao B]

Reviewed-by: Chao Zhang 

-Original Message-
From: Zhang, Shenglei 
Sent: Thursday, August 16, 2018 1:32 PM
To: edk2-devel@lists.01.org
Cc: Yao, Jiewen ; Zhang, Chao B 
Subject: [PATCH 3/5] SecurityPkg: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision

Cc: Jiewen Yao 
Cc: Chao Zhang 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei 
---
 SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf | 1 -
 SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf  | 6 --
 2 files changed, 7 deletions(-)

diff --git a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf 
b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
index a0136bc0c5..581669a277 100644
--- a/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
+++ b/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
@@ -67,7 +67,6 @@
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid ## PRODUCES
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy ## PRODUCES
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmAutoDetection## CONSUMES
-  gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress  ## 
SOMETIMES_CONSUMES
 
 [Depex]
   gEfiPeiMasterBootModePpiGuid AND
diff --git a/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf 
b/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
index b875ab7e01..2b89869ef1 100644
--- a/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
+++ b/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
@@ -101,12 +101,6 @@
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmPlatformClass ## 
SOMETIMES_CONSUMES
   gEfiSecurityPkgTokenSpaceGuid.PcdFirmwareDebuggerInitialized  ## 
SOMETIMES_CONSUMES
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid  ## 
CONSUMES
-  gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress   ## 
SOMETIMES_CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId## 
SOMETIMES_CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId   ## 
SOMETIMES_CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision  ## 
SOMETIMES_CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId## 
SOMETIMES_CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision  ## 
SOMETIMES_CONSUMES
   gEfiSecurityPkgTokenSpaceGuid.PcdStatusCodeSubClassTpmDevice  ## 
SOMETIMES_CONSUMES
   gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap  ## 
CONSUMES
   gEfiSecurityPkgTokenSpaceGuid.PcdTcg2NumberOfPCRBanks ## 
CONSUMES
-- 
2.18.0.windows.1

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Re: [edk2] [PATCH 4/5] NetworkPkg: TlsDxe: Remove the redundant definition.

[Li, Songpeng]

The file "NetworkPkg/TlsDxe/TlsProtocol.c" which contains 
"NetworkPkg/TlsDxe/TlsImpl.h"
is using the definition HTONS which defined in 
TlsProtocol.c:
Line 264  *((UINT16 *) Data) = HTONS (TlsGetVersion (Instance->TlsConn));
NetLib.h:
Line 230  #define HTONS(x)   NTOHS(x)

It cannot be removed. Please drop this patch.


Thanks & Best Regards,
Songpeng


> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Friday, August 17, 2018 3:27 AM
> To: Li, Songpeng ; edk2-devel@lists.01.org
> Cc: Fu, Siyuan ; Wu, Jiaxin 
> Subject: Re: [edk2] [PATCH 4/5] NetworkPkg: TlsDxe: Remove the redundant
> definition.
> 
> On 08/16/18 03:37, Songpeng Li wrote:
> > The definition NetLib has been removed.
> 
> (1) I suggest calling this "lib class dependency", not "definition".
> 
> (I could have made the same for a GUID removed in a previous patch, but
> there "definition" seemed acceptable. "GUID dependency" would be an
> improvement there as well.)
> 
> The subject line could also say, "remove superfluous dependencies".
> 
> >
> > Cc: Jiaxin Wu 
> > Cc: Siyuan Fu 
> > Cc: Laszlo Ersek 
> > Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1064
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Songpeng Li 
> > ---
> >  NetworkPkg/TlsDxe/TlsDxe.inf | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/NetworkPkg/TlsDxe/TlsDxe.inf b/NetworkPkg/TlsDxe/TlsDxe.inf
> > index 907feb735b..aaea0fc2ff 100644
> > --- a/NetworkPkg/TlsDxe/TlsDxe.inf
> > +++ b/NetworkPkg/TlsDxe/TlsDxe.inf
> > @@ -5,7 +5,7 @@
> >  #  This module produces EFI TLS (Transport Layer Security) Protocol and EFI
> TLS
> >  #  Service Binding Protocol, to provide TLS services.
> >  #
> > -#  Copyright (c) 2016, Intel Corporation. All rights reserved.
> > +#  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
> >  #
> >  #  This program and the accompanying materials
> >  #  are licensed and made available under the terms and conditions of the
> BSD License
> > @@ -52,7 +52,6 @@
> >BaseLib
> >UefiLib
> >DebugLib
> > -  NetLib
> >BaseCryptLib
> >TlsLib
> >
> >
> 
> (2) This patch is incomplete; the file "NetworkPkg/TlsDxe/TlsImpl.h"
> contains:
> 
> #include 
> 
> That header file is huge, so I won't try to audit, on a source code
> level, whether TlsDxe makes any NetLib API calls.
> 
> (Note that even if it does, then the current patch need not necessarily
> cause a linking failure. Because, a NetLib dependency could be inherited
> through one of the library instances with which a given platform
> resolves the *other* lib class dependencies for TlsDxe.)
> 
> So, please remove the #include too, and if TlsDxe still compiles, please
> resubmit the patch. (Otherwise, drop the patch, of course.)
> 
> Thanks!
> Laszlo
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Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change Memory Type and address limitation.

[Dong, Eric]

Hi,

Got your points now. I think we can update the code when new library API added.

Thanks,
Eric
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Marvin Häuser
> Sent: Thursday, August 16, 2018 9:00 PM
> To: edk2-devel@lists.01.org; Laszlo Ersek ; Dong, Eric
> 
> Cc: Ni, Ruiyu 
> Subject: Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change
> Memory Type and address limitation.
> 
> Comments inline.
> 
> Thanks and best regards,
> Marvin.
> 
> > -Original Message-
> > From: Laszlo Ersek 
> > Sent: Thursday, August 16, 2018 2:31 PM
> > To: Dong, Eric ; Marvin Häuser
> > ; edk2-devel@lists.01.org
> > Cc: Ni, Ruiyu 
> > Subject: Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change
> > Memory Type and address limitation.
> >
> > On 08/16/18 02:56, Dong, Eric wrote:
> > > Hi Marvin & Laszlo,
> > >
> > > I'm not very clear about the risk to use this function name. I think
> > > it is just
> > used in a driver as an internal function, other drivers or libraries
> > can't use it. I think we don't need to add internal prefix to all
> > internal functions in drivers, maybe need for the libraries, right?
> > Here we need to add internal prefix just because it has similar name with
> other common API?
> >
> > If I understood correctly, there were two points to Marvin's argument:
> >
> > - AllocateZeroPages() is the most likely function name that
> > "MemoryAllocationLib.h" would add, *if* it ever introduced a function
> > for "allocating boot service data pages, plus zeroing them". In that
> > case, it would cause a conflict.
> 
> Correct
> 
> >
> > - Second, because the function is defined in the same translation unit
> > where it is called from (and there are no other callers), we can make
> > the function STATIC.
> 
> Pretty much, but it was tied to the first point. There are many functions that
> could be static but aren't in edk2, so this isn't significant itself. I 
> mentioned it
> due to my personal naming convention to ensure uniqueness.
> 
> >
> > Regarding the first concern, I don't think it's a very practical one.
> > I'm neutral on the question. My point is only that, if we really want
> > to change the name, I think we should do it separately / incrementally.
> 
> If it's supposed to be done separately, I don't see a point in fixing it 
> either, it
> can still be fixed if such an API is ever introduced. It was meant as a
> "preventive" suggestion to be included in this series. "Just in case"
> 
> >
> > Regarding the second idea, STATIC is a generally good practice, and we
> > should do that everywhere we can. But, because I don't want to re-test
> > / re- review this series after all this effort, I suggest we do the
> > STATIC thing incrementally as well.
> 
> +1, but that's not worth an own patch to be honest. I should see whether there
> is some static analyzer that has checks for "can be static" some day.
> 
> >
> > Thanks
> > Laszlo
> >
> >
> > >
> > > Thanks,
> > > Eric
> > >
> > >> -Original Message-
> > >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
> > >> Of Laszlo Ersek
> > >> Sent: Wednesday, August 15, 2018 11:30 PM
> > >> To: Marvin Häuser ;
> > >> edk2-devel@lists.01.org; Dong, Eric 
> > >> Cc: Ni, Ruiyu 
> > >> Subject: Re: [edk2] [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change
> > >> Memory Type and address limitation.
> > >>
> > >> On 08/15/18 15:12, Marvin Häuser wrote:
> > >>> Hey Eric and anyone CC'd,
> > >>>
> > >>> Are you sure you want to name the function "AllocateZeroPages"?
> > >>> It's analogous to "AllocateZeroPool", so I could see it becoming
> > >>> an API function at some point, which will conflict with this
> > >>> definition and might silently break UefiCpuPkg compilation if not
> > >>> tested before upstreaming. I usually make any module's private
> > >>> functions static and prefix "Internal" if possible, or, if static
> > >>> cannot be used, non-static plus prefix something derived from the
> > >>> module's name to achieve uniqueness. If I am not mistaken, this
> > >>> could be made static, couldn't it?
> > >>
> > >> I agree that the function's name is not optimal, primarily because
> > >> the
> > >> Allocate*Pages() functions tend to take a page count, not a byte count.
> > >> However, I didn't want to ask for another version just because of
> > >> this; a lot of review (and now testing) has gone into this set, and
> > >> this is
> > just a wart.
> > >>
> > >> I suggest that -- after the stable tag -- we push v4 as-is;
> > >> however, Marvin, please go ahead and file a TianoCore BZ that
> > >> depends on 959 (i.e. on the BZ currently referenced in patch #5),
> > >> about fixing up the function name (and about making it static).
> > >>
> > >> Note that an "AllocateZeroPages" function exists in
> > >> "IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c" as well.
> > >> I guess both functions should be renamed (and likely not to the
> > >> same new name, 

[edk2] [PATCH v3 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5715] Stuff RSB before RSM

[Hao Wu]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1093

Return Stack Buffer (RSB) is used to predict the target of RET
instructions. When the RSB underflows, some processors may fall back to
using branch predictors. This might impact software using the retpoline
mitigation strategy on those processors.

This commit will add RSB stuffing logic before returning from SMM (the RSM
instruction) to avoid interfering with non-SMM usage of the retpoline
technique.

After the stuffing, RSB entries will contain a trap like:

@SpecTrap:
pause
lfence
jmp @SpecTrap

A more detailed explanation of the purpose of commit is under the
'Branch target injection mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

Please note that this commit requires further actions (BZ 1091) to remove
the duplicated 'StuffRsb.inc' files and merge them into one under a
UefiCpuPkg package-level directory (such as UefiCpuPkg/Include/).

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1091

Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu 
Acked-by: Laszlo Ersek 
Regression-tested-by: Laszlo Ersek 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm |  3 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm  |  3 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc  | 55 
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm  |  3 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm   |  3 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/StuffRsb.inc   | 55 
 6 files changed, 122 insertions(+)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
index 509e7a0a66..6bbc339c53 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
@@ -18,6 +18,8 @@
 ;
 
;---
 
+%include "StuffRsb.inc"
+
 %define MSR_IA32_MISC_ENABLE 0x1A0
 %define MSR_EFER  0xc080
 %define MSR_EFER_XD   0x800
@@ -204,6 +206,7 @@ ASM_PFX(SmiHandler):
 wrmsr
 
 .7:
+StuffRsb32
 rsm
 
 ASM_PFX(gcSmiHandlerSize): DW $ - _SmiEntryPoint
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
index 5ff3cd2e73..322b1ab556 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
@@ -18,6 +18,8 @@
 ;
 
;---
 
+%include "StuffRsb.inc"
+
 extern ASM_PFX(SmmInitHandler)
 extern ASM_PFX(mRebasedFlag)
 extern ASM_PFX(mSmmRelocationOriginalAddress)
@@ -75,6 +77,7 @@ BITS 32
 mov esp, strict dword 0 ; source operand will be patched
 ASM_PFX(gPatchSmmInitStack):
 callASM_PFX(SmmInitHandler)
+StuffRsb32
 rsm
 
 BITS 16
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
new file mode 100644
index 00..14267c3fde
--- /dev/null
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
@@ -0,0 +1,55 @@
+;--
+;
+; Copyright (c) 2018, Intel Corporation. All rights reserved.
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD 
License
+; which accompanies this distribution.  The full text of the license may be 
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Abstract:
+;
+;   This file provides macro definitions for stuffing the Return Stack Buffer 
(RSB).
+;
+;--
+
+%define RSB_STUFF_ENTRIES 0x20
+
+;
+; parameters:
+; @param 1: register to use as counter (e.g. IA32:eax, X64:rax)
+; @param 2: stack pointer to restore   (IA32:esp, X64:rsp)
+; @param 3: the size of a stack frame  (IA32:4, X64:8)
+;
+%macro StuffRsb 3
+  mov %1, RSB_STUFF_ENTRIES / 2
+  %%Unroll1:
+  call%%Unroll2
+  %%SpecTrap1:
+  pause
+  lfence
+  jmp %%SpecTrap1
+  %%Unroll2:
+  call%%StuffLoop
+  %%SpecTrap2:
+  pause
+  lfence
+  jmp %%SpecTrap2
+  %%StuffLoop:
+  dec %1
+  jnz %%Unroll1
+  add %2, RSB_STUFF_ENTRIES * %3 ; Restore the stack pointer
+%endmacro
+
+;
+; RSB stuffing macros for IA32 and X64
+;
+%macro StuffRsb32 0
+  StuffRsb eax, esp, 4
+%endmacro
+
+%macro StuffRsb64 0
+  StuffRsb rax, rsp, 8
+%endmacro
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
index 97c7b01d0d..315d0f8670 100644
--- 

[edk2] [PATCH edk2-platforms v3 07/36] Silicon/Hisilicon/D06: Wait for all disk ready

[Ming Huang]

This patch is relative to D06 SasDxe driver. The SasDxe set a
variable to notice this libray. Here Wait for all disk ready
for 15S at most.

D06:
For using straight-through hard disk backboard, some disk need
15 seconds to ready. Actually, wait less 15 seconds here(minus
the time from end of SAS driver to here).
For using expander backboard, wait less 6 seconds here(minus
the time from end of SAS driver to here).

D03/D05:
As Sas driver don't install PLATFORM_SAS_NOTIFY Protocol, D03/D05
will skip waiting here.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/HisiPkg.dec   |  
1 +
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf |  
3 ++
 Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h  | 
27 ++
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c   | 
37 
 4 files changed, 68 insertions(+)

diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
index 35bea970ec..0595790df8 100644
--- a/Silicon/Hisilicon/HisiPkg.dec
+++ b/Silicon/Hisilicon/HisiPkg.dec
@@ -39,6 +39,7 @@
   gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 
0x7d, 0x13, 0x50, 0x96, 0x5d}}
   gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 
0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
   gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97, 
0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
+  gPlatformSasNotifyProtocolGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff, 0x5c, 
0xc5, 0x80, 0x32, 0x7d, 0x9b, 0x29}}
 
 [Guids]
   gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 
0x7c, 0xfd, 0x52, 0x1d}}
diff --git 
a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf 
b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index 7a53befc44..96a46da8c5 100644
--- 
a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++ 
b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -49,6 +49,7 @@
   MemoryAllocationLib
   PcdLib
   PrintLib
+  TimerLib
   UefiBootManagerLib
   UefiBootServicesTableLib
   UefiLib
@@ -67,8 +68,10 @@
 [Guids]
   gEfiEndOfDxeEventGroupGuid
   gEfiTtyTermGuid
+  gOemConfigGuid
 
 [Protocols]
   gEfiGenericMemTestProtocolGuid
   gEfiLoadedImageProtocolGuid
   gEsrtManagementProtocolGuid
+  gPlatformSasNotifyProtocolGuid
diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h 
b/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
new file mode 100644
index 00..54fd30fc68
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h
@@ -0,0 +1,27 @@
+/** @file
+*
+*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2018, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#ifndef _PLATFORM_SAS_NOTIFY_H_
+#define _PLATFORM_SAS_NOTIFY_H_
+
+typedef struct _PLATFORM_SAS_NOTIFY PLATFORM_SAS_NOTIFY;
+
+struct _PLATFORM_SAS_NOTIFY {
+  EFI_EVENT   WaitDiskEvent;
+};
+
+extern EFI_GUID gPlatformSasNotifyProtocolGuid;
+
+#endif
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c 
b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
index 7dd5ba615c..eaa6ce78d0 100644
--- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -29,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -554,6 +556,40 @@ PlatformBootManagerBeforeConsole (
   PlatformRegisterOptionsAndKeys ();
 }
 
+STATIC
+VOID
+WaitForDiskReady (
+  VOID
+  )
+{
+  EFI_STATUSStatus;
+  UINT32Index;
+  PLATFORM_SAS_NOTIFY   *SasNotify;
+
+  Status = gBS->LocateProtocol (
+  ,
+  NULL,
+  (VOID **));
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_INFO, "Locate SasPlatformNotify:%r\n", Status));
+return;
+  }
+
+  // Wait for 30 seconds at most.
+  for (Index = 0; Index < 30; Index++) {
+Status = gBS->CheckEvent (SasNotify->WaitDiskEvent);
+if (!EFI_ERROR (Status)) {
+  DEBUG ((DEBUG_INFO, "WaitDiskEvent is signaled.\n"));
+  EfiBootManagerConnectAll ();
+  break;
+}
+DEBUG ((DEBUG_ERROR, "%a", Index == 0 ? "Wait for disk." : "."));
+

[edk2] [PATCH edk2-platforms v3 05/36] Platform/Hisilicon/D06: Add edk2-non-osi components for D06

[Ming Huang]

Add PcdCoreCount to fix build issue while add binary components.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc 
|  7 +++
 Platform/Hisilicon/D06/D06.fdf 
| 17 +
 Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf 
|  2 ++
 3 files changed, 26 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 27358f8c78..94454569f6 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -41,6 +41,8 @@
 
   I2CLib|Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+  IpmiCmdLib|Silicon/Hisilicon/Library/IpmiCmdLib/IpmiCmdLib.inf
+
   NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
   DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
   HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
@@ -64,8 +66,12 @@
 
   CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
 
+  SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf
+
   TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
   
RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
+  
OemAddressMapLib|Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.inf
+  
PlatformSysCtrlLib|Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
@@ -81,6 +87,7 @@
   # USB Requirements
   UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
 
+  LpcLib|Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf
   
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
 !if $(SECURE_BOOT_ENABLE) == TRUE
   FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index 9567ede0ad..07fe096f61 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -56,6 +56,7 @@ NumBlocks = 0x40
 
 0x|0x0010
 gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
+FILE = Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv
 
 0x0010|0x0028
 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
@@ -163,6 +164,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Core/Dxe/DxeMain.inf
   INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 
+  INF Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf
   #
   # PI DXE Drivers producing Architectural Protocols (EFI Services)
   #
@@ -170,6 +172,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 
   INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF Platform/Hisilicon/D06/Drivers/SFC/SfcDxeDriver.inf
 
 
   INF Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
@@ -225,10 +228,15 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
   INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
 
+  INF Platform/Hisilicon/D06/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
+  INF Platform/Hisilicon/D06/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf
   INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
   INF Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
   INF Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
+  INF Platform/Hisilicon/D06/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf
+  INF Platform/Hisilicon/D06/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf
 
+  INF Platform/Hisilicon/D06/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf
 
 
   INF Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
@@ -246,6 +254,7 @@ READ_LOCK_STATUS   = TRUE
   #
   #Network
   #
+  INF Platform/Hisilicon/D06/Drivers/Net/SnpHi1620NewDxe/SnpDxe.inf
 
   INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
   INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
@@ -282,8 +291,14 @@ READ_LOCK_STATUS   = TRUE
   INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
   INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
   INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+  INF Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.inf
+  INF Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.inf
 
+  # VGA Driver
+  #
+  INF Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf
   INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+  INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
   INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
   INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
   INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
@@ -335,6 +350,8 @@ READ_LOCK_STATUS   = TRUE
 
   INF 

[edk2] [PATCH edk2-platforms v3 04/36] Platform/Hisilicon/D06: Add M41T83RealTimeClockLib

[Ming Huang]

Add M41T83RealTimeClockLib for RTC.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc  |  
 1 +
 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf |  
46 ++
 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h  | 
158 ++
 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c   | 
564 
 4 files changed, 769 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index d14fce1159..27358f8c78 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -65,6 +65,7 @@
   CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
 
   TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
+  
RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
diff --git 
a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf 
b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
new file mode 100644
index 00..e0bf6b3f24
--- /dev/null
+++ 
b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
@@ -0,0 +1,46 @@
+#/** @file
+#
+#  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#  Copyright (c) 2018, Linaro Limited. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD 
License
+#  which accompanies this distribution.  The full text of the license may be 
found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = M41T83RealTimeClockLib
+  FILE_GUID  = 470DFB96-E205-4515-A75E-2E60F853E79D
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = RealTimeClockLib
+
+[Sources.common]
+  M41T83RealTimeClockLib.c
+
+[Packages]
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdePkg/MdePkg.dec
+  Platform/Hisilicon/D06/D06.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  BaseMemoryLib
+  CpldIoLib
+  DebugLib
+  I2CLib
+  IoLib
+  PcdLib
+  TimeBaseLib
+  TimerLib
+  UefiLib
+  UefiRuntimeLib# Use EFiAtRuntime to check stage
+
+[Depex]
+  gEfiCpuArchProtocolGuid
diff --git 
a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h 
b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h
new file mode 100644
index 00..ed10099bf3
--- /dev/null
+++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h
@@ -0,0 +1,158 @@
+/** @file
+
+  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+  Copyright (c) 2018, Linaro Limited. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __M41T83_REAL_TIME_CLOCK_H__
+#define __M41T83_REAL_TIME_CLOCK_H__
+
+// The delay is need for cpld and I2C. This is a empirical value. MemoryFance 
is no need.
+#define RTC_DELAY_30_MS3
+// The delay is need for cpld and I2C. This is a empirical value. MemoryFance 
is no need.
+#define RTC_DELAY_1000_MACROSECOND 1000
+// The delay is need for cpld and I2C. This is a empirical value. MemoryFance 
is no need.
+#define RTC_DELAY_2_MACROSECOND2
+
+#define M41T83_REGADDR_DOTSECONDS   0x00
+#define M41T83_REGADDR_SECONDS  0x01
+#define M41T83_REGADDR_MINUTES  0x02
+#define M41T83_REGADDR_HOURS0x03
+#define M41T83_REGADDR_WEEK_DAY 0x04
+#define M41T83_REGADDR_DAY  0x05
+#define M41T83_REGADDR_MONTH0x06
+#define M41T83_REGADDR_YEAR 0x07
+#define M41T83_REGADDR_ALARM1SEC0x0E
+#define M41T83_REGADDR_ALARM1MIN0x0D
+#define M41T83_REGADDR_ALARM1HOUR   0x0C
+#define M41T83_REGADDR_ALARM1DATE   0x0B
+#define M41T83_REGADDR_ALARM1MONTH  0x0A
+
+#define M41T83_REGADDR_TIMERCONTROL 0x11
+
+#define M41T83_REGADDR_ALARM2SEC0x18
+#define M41T83_REGADDR_ALARM2MIN0x17
+#define M41T83_REGADDR_ALARM2HOUR   0x16
+#define M41T83_REGADDR_ALARM2DATE   0x15
+#define 

[edk2] [PATCH edk2-platforms v3 02/36] Hisilicon/D0X: Rename the global variable gDS3231RtcDevice

[Ming Huang]

The global variable gDS3231RtcDevice is used by several
modules included common module in HwPkg. Renaming it
with a general name is proper.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/OemMiscLib.h 
| 2 +-
 Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c 
| 8 
 Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c 
| 2 +-
 Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c 
| 2 +-
 Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c  
| 8 
 5 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h 
b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
index 6f18c0fa72..87cb498dd7 100644
--- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
+++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
@@ -34,7 +34,7 @@ extern REPORT_PCIEDIDVID2BMC 
PcieDeviceToReport[PCIEDEVICE_REPORT_MAX];
 BOOLEAN OemIsSocketPresent (UINTN Socket);
 VOID CoreSelectBoot(VOID);
 VOID OemPcieResetAndOffReset(void);
-extern I2C_DEVICE gDS3231RtcDevice;
+extern I2C_DEVICE gRtcDevice;
 
 UINTN OemGetSocketNumber(VOID);
 UINTN OemGetDdrChannel (VOID);
diff --git 
a/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c
 
b/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c
index 07fa52aa78..f6dbcf6b75 100644
--- 
a/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c
+++ 
b/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c
@@ -41,7 +41,7 @@
 #include 
 #include 
 
-extern I2C_DEVICE gDS3231RtcDevice;
+extern I2C_DEVICE gRtcDevice;
 
 STATIC BOOLEAN   mDS3231Initialized = FALSE;
 
@@ -117,7 +117,7 @@ InitializeDS3231 (
   // Prepare the hardware
   (VOID)IdentifyDS3231();
 
-  (VOID) CopyMem(, , sizeof(Dev));
+  (VOID) CopyMem (, , sizeof(Dev));
 
   Status = I2CInit(Dev.Socket,Dev.Port,Normal);
   if (EFI_ERROR (Status)) {
@@ -199,7 +199,7 @@ LibGetTime (
 }
   }
 
-  (VOID) CopyMem(, , sizeof(Dev));
+  (VOID) CopyMem (, , sizeof(Dev));
 
   Status |= I2CRead(,DS3231_REGADDR_MONTH,1,);
 
@@ -299,7 +299,7 @@ LibSetTime (
 }
   }
 
-  (VOID) CopyMem(, , sizeof(Dev));
+  (VOID) CopyMem (, , sizeof(Dev));
 
   Temp = ((Time->Second/10)<<4) | (Time->Second%10);
   MicroSecondDelay(1000);
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c 
b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
index 66d62895a6..4771cb900c 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
@@ -25,7 +25,7 @@
 #include 
 #include 
 
-I2C_DEVICE gDS3231RtcDevice = {
+I2C_DEVICE gRtcDevice = {
 .Socket = 0,
 .Port = 6,
 .DeviceType = DEVICE_TYPE_SPD,
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c 
b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
index 15a509be5d..ae4c194070 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
@@ -26,7 +26,7 @@
 #include 
 
 
-I2C_DEVICE gDS3231RtcDevice = {
+I2C_DEVICE gRtcDevice = {
   .Socket = 0,
   .Port = 4,
   .DeviceType = DEVICE_TYPE_SPD,
diff --git 
a/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c 
b/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c
index 02d6d7f14d..105eb15635 100644
--- a/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c
+++ b/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c
@@ -39,7 +39,7 @@
 #include 
 #include "DS3231RealTimeClock.h"
 
-extern I2C_DEVICE gDS3231RtcDevice;
+extern I2C_DEVICE gRtcDevice;
 
 STATIC BOOLEAN   mDS3231Initialized = FALSE;
 
@@ -67,7 +67,7 @@ InitializeDS3231 (
   // Prepare the hardware
   (VOID)IdentifyDS3231();
 
-  (VOID) CopyMem(, , sizeof(Dev));
+  (VOID) CopyMem (, , sizeof(Dev));
 
   Status = I2CInit(Dev.Socket,Dev.Port,Normal);
   if (EFI_ERROR (Status)) {
@@ -143,7 +143,7 @@ LibGetTime (
 }
   }
 
-  (VOID) CopyMem(, , sizeof(Dev));
+  (VOID) CopyMem (, , sizeof(Dev));
 
 
   Status |= I2CRead(,DS3231_REGADDR_MONTH,1,);
@@ -233,7 +233,7 @@ LibSetTime (
 }
   }
 
-  (VOID) CopyMem(, , sizeof(Dev));
+  (VOID) CopyMem (, , sizeof(Dev));
 
   Temp = ((Time->Second/10)<<4) | (Time->Second%10);
   MicroSecondDelay(1000);
-- 
2.17.0

___
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[edk2] [PATCH edk2-platforms v3 03/36] Hisilicon/D06: Add several base file for D06

[Ming Huang]

Add several base head files and add several build
files for D06.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dec   |  29 ++
 Platform/Hisilicon/D06/D06.dsc   | 455 
 Platform/Hisilicon/D06/D06.fdf   | 351 +++
 Platform/Hisilicon/D06/Include/Library/CpldD06.h |  37 ++
 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h |  85 
 Silicon/Hisilicon/Hi1620/Include/PlatformArch.h  |  61 +++
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h |   6 +
 Silicon/Hisilicon/Include/Library/OemNicLib.h|  57 +++
 8 files changed, 1081 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dec b/Platform/Hisilicon/D06/D06.dec
new file mode 100644
index 00..710f083eee
--- /dev/null
+++ b/Platform/Hisilicon/D06/D06.dec
@@ -0,0 +1,29 @@
+#/** @file
+#
+#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#Copyright (c) 2018, Linaro Limited. All rights reserved.
+#
+#This program and the accompanying materials
+#are licensed and made available under the terms and conditions of the BSD 
License
+#which accompanies this distribution. The full text of the license may be 
found at
+#http://opensource.org/licenses/bsd-license.php
+#
+#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#**/
+
+#
+# D06 Package
+#
+#
+#
+
+[Defines]
+  DEC_SPECIFICATION  = 0x0001001A
+  PACKAGE_NAME   = D06Pkg
+  PACKAGE_GUID   = B46F75D7-3864-450D-86D9-A0346A882232
+  PACKAGE_VERSION= 0.1
+
+[Includes]
+  Include
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
new file mode 100644
index 00..d14fce1159
--- /dev/null
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -0,0 +1,455 @@
+#
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#  Copyright (c) 2018, Linaro Limited. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD 
License
+#  which accompanies this distribution.  The full text of the license may be 
found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME  = D06
+  PLATFORM_GUID  = D0D445F1-B2CA-4101-9986-1B23525CBEA6
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x0001001A
+  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES= AARCH64
+  BUILD_TARGETS  = DEBUG|NOOPT|RELEASE
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = 
Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
+  DEFINE NETWORK_IP6_ENABLE  = FALSE
+  DEFINE HTTP_BOOT_ENABLE= FALSE
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+
+!include Silicon/Hisilicon/Hisilicon.dsc.inc
+
+[LibraryClasses.common]
+  ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+  
ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
+
+
+  I2CLib|Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
+  TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+  NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
+  DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+  
UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+  UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
+  IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+  
OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
+  
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+  BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+  SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+
+!if $(NETWORK_IP6_ENABLE) == TRUE
+  TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
+!endif
+
+!if $(HTTP_BOOT_ENABLE) == TRUE
+  HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf
+!endif
+
+  CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
+
+  

[edk2] [PATCH edk2-platforms v3 00/36] Upload for D06 platform

[Ming Huang]

The major features of this patchset include:
1 D06 source code;
2 Unify some D0x modules;

This patch set is base on pcihostbridage-v2.
For compiling D06, add below hunk to edk2-platforms.config
[d06]
LONGNAME=HiSilicon D06
DSC=Platform/Hisilicon/D06/D06.dsc
ARCH=AARCH64

Code can also be found in github: 
https://github.com/hisilicon/OpenPlatformPkg.git
branch: d06-platform-v3


Heyi Guo (3):
  Hisilicon/D06: Add Debug Serial Port Init Driver
  Hisilicon/Hi1620: Add ACPI PPTT table
  Platform/Hisilicon/D06: Enable ACPI PPTT

Luqi Jiang (1):
  Hisilicon/D06: add apei driver

Ming Huang (27):
  Hisilicon/D0x: Unify FlashFvbDxe driver
  Hisilicon/D0X: Rename the global variable gDS3231RtcDevice
  Hisilicon/D06: Add several base file for D06
  Platform/Hisilicon/D06: Add M41T83RealTimeClockLib
  Platform/Hisilicon/D06: Add edk2-non-osi components for D06
  Hisilicon/D06: Add OemMiscLibD06
  Silicon/Hisilicon/D06: Wait for all disk ready
  Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe
  Hisilicon/D06: Add ACPI Tables for D06
  Silicon/Hisilicon/D06: Stop watchdog
  Hisilicon/I2C: Modify I2CLib.c for coding style
  Silicon/Hisilicon/I2C: Refactor I2C library
  Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06
  Silicon/Hisilicon/D06: Add I2C delay for HNS auto config
  Hisilicon/I2C: Fix a typo issue
  Platform/Hisilicon/D06: Add OemNicLib
  Platform/Hisilicon/D06: Add OemNicConfig2P Driver
  Platform/Hisilicon/D06: Add EarlyConfigPeim peim
  Platform/Hisilicon/D06: Add PciHostBridgeLib
  Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h
  Platform/Hisilicon/D06: Add capsule upgrade support
  Silicon/Hisilicon/D06: Add I2C Bus Exception handle function
  Silicon/Hisilicon/Setup: Support SPCR table switch
  Silicon/Hisilicon/setup: Support SMMU switch
  Hisilicon/D06: Add PciPlatformLib
  Hisilicon/D06: Add edk2-non-osi Shell components
  Platform/Hisilicon/D0x: Update version string to 18.08

Sun Yuanchen (1):
  Hisilicon/D0x: Update SMBIOS type9 info

Yang XinYi (2):
  Hisilicon/D06: Add Hi1620OemConfigUiLib
  Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP"

ZhenYao (1):
  Silicon/Hisilicon/D06: Modify for close slave core clock.

shaochangliang (1):
  Silicon/Hisilicon/D06: Optimize HNS config CDR post time

 Platform/Hisilicon/D06/D06.dec|29 +
 Silicon/Hisilicon/HisiPkg.dec | 6 +
 Platform/Hisilicon/D03/D03.dsc| 2 +-
 Platform/Hisilicon/D05/D05.dsc| 2 +-
 Platform/Hisilicon/D06/D06.dsc|   490 +
 Platform/Hisilicon/D03/D03.fdf| 6 +-
 Platform/Hisilicon/D05/D05.fdf| 6 +-
 Platform/Hisilicon/D06/D06.fdf|   444 +
 .../OemMiscLib2P/OemMiscLib2PHi1610.inf   | 1 +
 .../Library/OemMiscLibD05/OemMiscLibD05.inf   | 1 +
 .../OemNicConfig2PHi1620/OemNicConfig2P.inf   |43 +
 .../SystemFirmwareDescriptor.inf  |50 +
 .../EarlyConfigPeim/EarlyConfigPeimD06.inf|50 +
 .../Library/OemMiscLibD06/OemMiscLibD06.inf   |51 +
 .../D06/Library/OemNicLib/OemNicLib.inf   |35 +
 .../PciHostBridgeLib/PciHostBridgeLib.inf |36 +
 .../Drivers/FlashFvbDxe/FlashFvbDxe.inf   | 7 +-
 .../HisiAcpiPlatformDxe/AcpiPlatformDxe.inf   | 3 +-
 .../ProcessorSubClassDxe.inf  | 2 +
 .../Hisilicon/Hi1620/Drivers/Apei/Apei.inf|59 +
 .../Pl011DebugSerialPortInitDxe.inf   |48 +
 .../Hi1620AcpiTables/AcpiTablesHi1620.inf |59 +
 .../Hi1620OemConfigUiLib/OemConfigUiLib.inf   |68 +
 .../Hi1620PciPlatformLib.inf  |30 +
 Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf|48 +
 .../M41T83RealTimeClockLib.inf|46 +
 .../PlatformBootManagerLib.inf| 4 +
 .../OemNicConfig2PHi1620/OemNicConfig.h   |25 +
 .../Hisilicon/D06/Include/Library/CpldD06.h   |39 +
 .../Hisilicon/Hi1610/Include/PlatformArch.h   | 6 +
 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h  |41 +
 .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h |43 +
 .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h |   146 +
 .../Hi1620/Drivers/Apei/ErrorSource/Ghes.h|   110 +
 .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h |   146 +
 .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h |59 +
 .../Hi1620/Drivers/Apei/OemApeiHi1620.h   |43 +
 .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h  |27 +
 .../Hi1620/Hi1620OemConfigUiLib/OemConfig.h   |   142 +
 .../Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h |64 +
 .../Hi1620/Include/Library/SerdesLib.h|85 +
 .../Hisilicon/Hi1620/Include/PlatformArch.h   |67 +
 Silicon/Hisilicon/Hi1620/Pptt/Pptt.h  |68 +
 .../Hisilicon/Include/Library/AcpiNextLib.h   |31 +-
 .../Hisilicon/Include/Library/IpmiCmdLib.h|16 +
 Silicon/Hisilicon/Include/Library/LpcLib.h|51 +-
 .../Include/Library/OemAddressMapLib.h| 8 +
 .../Hisilicon/Include/Library/OemConfigData.h 

[edk2] [PATCH edk2-platforms v3 11/36] Hisilicon/D06: Add Hi1620OemConfigUiLib

[Ming Huang]

From: Yang XinYi 

This library is added for oem setup menu item.
Setup item include:
1 DDR option item;
2 BMC option item;
3 Ras option item;
4 Misc option item;

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yang XinYi 
---
 Silicon/Hisilicon/HisiPkg.dec   |   1 +
 Platform/Hisilicon/D06/D06.dsc  |   5 
+-
 Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf   |   2 
+-
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf|  68 

 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h   | 142 

 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h |  64 

 Silicon/Hisilicon/Include/Library/OemConfigData.h   |  84 
+
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c   | 363 

 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.hfr  | 154 
+
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.uni  | 103 
++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr|  41 
+++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni|  27 
++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni|  24 
++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLibStrings.uni |  42 
+++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.Vfr  |  89 
+
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr| 219 

 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni | 111 
++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PciePortConfig.hfr| 167 
+
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr | 172 
++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.uni |  85 
+
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.hfr|  81 
+
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.uni|  34 
++
 22 files changed, 2076 insertions(+), 2 deletions(-)

diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
index 0595790df8..6d95381719 100644
--- a/Silicon/Hisilicon/HisiPkg.dec
+++ b/Silicon/Hisilicon/HisiPkg.dec
@@ -45,6 +45,7 @@
   gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 
0x7c, 0xfd, 0x52, 0x1d}}
 
   gHisiEfiMemoryMapGuid  = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd, 
0x56, 0xda, 0x91, 0xc0, 0x7f}}
+  gOemConfigGuid = {0x42927b59, 0x58fc, 0x41be, {0x8f, 0x59, 0xd1, 0x7c, 0x02, 
0x1a, 0x70, 0x13}}
   gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 
0xe1, 0x42, 0x12, 0xbf}}
   gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, 0xd4, 0xa4, 
0x2f, 0x45, 0x06, 0xf8}}
   gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, 0x53, 
0xe4, 0x31, 0x19, 0x38, 0x35}}
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 9d4a86a4f4..bec422670d 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -330,7 +330,10 @@
   #ACPI
   #
   MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
-  Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
+  Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf {
+
+NULL|Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
+  }
 
   Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf
   Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf 
b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
index e268a56bbd..281a4f2ebd 100644
--- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
+++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
@@ -56,7 +56,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile## CONSUMES
 
 [Depex]
-  gEfiAcpiTableProtocolGuid
+  gEfiAcpiTableProtocolGuid AND gEfiVariableWriteArchProtocolGuid
 
 [UserExtensions.TianoCore."ExtraFiles"]
   AcpiPlatformExtra.uni
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
new file mode 100644
index 00..fba619e9ba
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf
@@ -0,0 +1,68 @@
+## @file
+#  OEM config Library used by BDS
+#
+#  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#  Copyright (c) 2018, Linaro Limited. All rights reserved.
+#  This program and the accompanying materials are licensed and made available 
under
+#  the terms and conditions of the BSD License that accompanies this 
distribution.
+#  The full text of the license may be found at
+#  

[edk2] [PATCH edk2-platforms v3 09/36] Hisilicon/D06: Add Debug Serial Port Init Driver

[Ming Huang]

From: Heyi Guo 

Hi1620 have two physical PL011 serial ports on the board,
one for serial port console (described by ACPI SPCR) and
the other for standard debug port (described by ACPI DBG2).
This driver is to initialize the debug UART, not the serial
console.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D06/D06.dsc 
  |  1 +
 Platform/Hisilicon/D06/D06.fdf 
  |  1 +
 
Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
 | 48 +++
 
Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c
   | 64 
 4 files changed, 114 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 9ca7160dad..20d2d2a1b4 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -422,6 +422,7 @@
   # Memory test
   #
   MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
+  
Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index 07fe096f61..8cac126ccf 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -303,6 +303,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
   INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
 
+  INF 
Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
   INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
   #
   # Build Shell from latest source code instead of prebuilt binary
diff --git 
a/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
 
b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
new file mode 100644
index 00..8c91bdf0f4
--- /dev/null
+++ 
b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
@@ -0,0 +1,48 @@
+#/** @file
+#
+#Copyright (c) 2016 - 2018, Hisilicon Limited. All rights reserved.
+#Copyright (c) 2016 - 2018, Linaro Limited. All rights reserved.
+#
+#This program and the accompanying materials
+#are licensed and made available under the terms and conditions of the BSD 
License
+#which accompanies this distribution. The full text of the license may be 
found at
+#http://opensource.org/licenses/bsd-license.php
+#
+#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = Pl011DebugSerialPortInitDxe
+  FILE_GUID  = 16D53E86-7EA4-47bd-861F-511EA9B8ABE0
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= SerialPortEntry
+
+[Sources.common]
+  Pl011DebugSerialPortInitDxe.c
+
+
+[Packages]
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  UefiDriverEntryPoint
+
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PL011UartClkInHz
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
+
+[Depex]
+  TRUE
+
diff --git 
a/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c
 
b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c
new file mode 100644
index 00..8f83737327
--- /dev/null
+++ 
b/Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c
@@ -0,0 +1,64 @@
+/** @file
+
+Copyright (c) 2016 - 2018, Hisilicon Limited. All rights reserved.
+Copyright (c) 2016 - 2018, Linaro Limited. All rights reserved.
+
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution. The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+RETURN_STATUS
+EFIAPI

[edk2] [PATCH edk2-platforms v3 01/36] Hisilicon/D0x: Unify FlashFvbDxe driver

[Ming Huang]

Add PcdSFCMEM0BaseAddress and switch three 32-bit macro
PcdFlashNvStorage of D05/D03 to 64-bit for unifying FlashFvbDxe
driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D03/D03.fdf|  6 +++---
 Platform/Hisilicon/D05/D05.fdf|  6 +++---
 Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf |  7 ---
 Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c   | 22 ++--
 4 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 4591f7b5b1..b23765020d 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -69,7 +69,7 @@ FILE = Platform/Hisilicon/D03/bl1.bin
 FILE = Platform/Hisilicon/D03/fip.bin
 
 0x002D|0xE000
-gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
 DATA = {
   ## This is the EFI_FIRMWARE_VOLUME_HEADER
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -97,7 +97,7 @@ DATA = {
 }
 
 0x002DE000|0x2000
-gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
 #NV_FTW_WORKING
 DATA = {
   # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = 
gEdkiiWorkingBlockSignatureGuid  =
@@ -110,7 +110,7 @@ DATA = {
 }
 
 0x002E|0x0001
-gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 
 0x002F|0x0001
 FILE = Platform/Hisilicon/D0x-CustomData.Fv
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 6227607ffe..6fa5b5e6c8 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -69,7 +69,7 @@ FILE = Platform/Hisilicon/D05/bl1.bin
 FILE = Platform/Hisilicon/D05/fip.bin
 
 0x002D|0xE000
-gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
 DATA = {
   ## This is the EFI_FIRMWARE_VOLUME_HEADER
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -97,7 +97,7 @@ DATA = {
 }
 
 0x002DE000|0x2000
-gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
 #NV_FTW_WORKING
 DATA = {
   # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = 
gEdkiiWorkingBlockSignatureGuid  =
@@ -110,7 +110,7 @@ DATA = {
 }
 
 0x002E|0x0001
-gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 
 0x002F|0x0001
 FILE = Platform/Hisilicon/D0x-CustomData.Fv
diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf 
b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
index 09ec7ce08b..f8be4741ef 100644
--- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
+++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
@@ -54,14 +54,15 @@
   gHisiSpiFlashProtocolGuid
 
 [Pcd.common]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 
   gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked
+  gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress
 
 [Depex]
   gHisiSpiFlashProtocolGuid
diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c 
b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c
index 7c6b64c33e..e18cc9e06e 100644
--- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c
+++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c
@@ -28,8 +28,8 @@ FLASH_DESCRIPTION mFlashDevices[FLASH_DEVICE_COUNT] =
 {
 {
 // UEFI Variable Services non-volatile storage
-  

[edk2] [PATCH edk2-platforms v3 08/36] Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe

[Ming Huang]

The EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE struct is used by
UpdateAcpiTable.c and Srat aslc. The struct may be different
according to chips, so move some macro to PlatformArch.h.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1610/Include/PlatformArch.h |  6 
 Silicon/Hisilicon/Hi1620/Include/PlatformArch.h |  6 
 Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 31 
++--
 Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c |  2 --
 4 files changed, 34 insertions(+), 11 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h 
b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h
index f39ae0748c..1ebddca4e5 100644
--- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h
+++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h
@@ -30,6 +30,12 @@
 // Max NUMA node number for each node type
 #define MAX_NUM_PER_TYPE 8
 
+// for acpi
+#define NODE_IN_SOCKET  2
+#define CORE_NUM_PER_SOCKET 32
+#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT10
+#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT   8
+
 #define S1_BASE   0x400
 
 #define RASC_BASE(0x5000)
diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h 
b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h
index 9539cfdada..f3ad45f6c6 100644
--- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h
+++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h
@@ -57,5 +57,11 @@
   EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
   }
 
+// for acpi
+#define NODE_IN_SOCKET  2
+#define CORE_NUM_PER_SOCKET 48
+#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT16
+#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT   1
+
 #endif
 
diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h 
b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
index fd05a3b960..2abffb65fc 100644
--- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
+++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
@@ -19,6 +19,21 @@
 #ifndef __ACPI_NEXT_LIB_H__
 #define __ACPI_NEXT_LIB_H__
 
+#include 
+
+///
+/// ITS Affinity Structure Definition
+///
+#pragma pack(1)
+typedef struct {
+  UINT8   Type;
+  UINT8   Length;
+  UINT32  ProximityDomain;
+  UINT16  Reserved;
+  UINT32  ItsHwId;
+} EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE;
+#pragma pack()
+
 #define EFI_ACPI_6_1_GIC_ITS_INIT(GicITSHwId, GicITSBase) \
   { \
 EFI_ACPI_6_1_GIC_ITS, sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), 
EFI_ACPI_RESERVED_WORD, \
@@ -42,8 +57,8 @@
 #define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(  
 \
 ProximityDomain, ItsId)
 \
   {
 \
-4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain,  
 \
-{EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId
   \
+4, sizeof (EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE), ProximityDomain,  
 \
+EFI_ACPI_RESERVED_WORD, ItsId  
 \
   }
 
 #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT(   
   \
@@ -75,15 +90,13 @@
 // Define the number of each table type.
 // This is where the table layout is modified.
 //
-#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT  64
-#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT10
-#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT   8
+#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT  
(MAX_SOCKET*CORE_NUM_PER_SOCKET)
 
 typedef struct {
-  EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER  Header;
-  EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE  
Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT];
-  EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE
Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT];
-  EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE 
Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT];
+  EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER  Header;
+  EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE  
Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT];
+  EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE
Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT];
+  EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE 
Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT];
 } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;
 
 #pragma pack()
diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c 

[edk2] [PATCH edk2-platforms v3 18/36] Silicon/Hisilicon/D06: Optimize HNS config CDR post time

[Ming Huang]

From: shaochangliang 

Use I2C 400KB speed for config CDR.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c 
b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
index ed44ac204f..55c030a3af 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
@@ -28,6 +28,9 @@
 #include "I2CLibInternal.h"
 #include "I2CHw.h"
 
+#define I2C_100KB_SPEED 0x1
+#define I2C_400KB_SPEED 0x2
+
 VOID
 I2C_Delay (
   UINT32 Count
@@ -158,7 +161,11 @@ I2CInit (
 
   I2C_REG_READ (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
   I2cControlReg.bits.master = 1;
-  I2cControlReg.bits.Speed = 0x1;
+  if(SpeedMode == Normal) {
+I2cControlReg.bits.Speed = I2C_100KB_SPEED;
+  } else {
+I2cControlReg.bits.Speed = I2C_400KB_SPEED;
+  }
   I2cControlReg.bits.restart_en = 1;
   I2cControlReg.bits.slave_disable = 1;
   I2C_REG_WRITE (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
-- 
2.17.0

___
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[edk2] [PATCH edk2-platforms v3 12/36] Silicon/Hisilicon/D06: Stop watchdog

[Ming Huang]

according as watchdog design on D06, watchdog should be
stopped before boot a option.

This is an out of band watchdog timer in BMC; it is used
to monitor the whole BIOS boot process and reset the system
in case BIOS hangs somewhere, i.e. it is armed when system
is power on, and disabled before handling system control to
OS, while UEFI boot services watchdog is only armed before
invoking a boot option. So they are two different watchdogs.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf |  
1 +
 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h  | 
16 ++
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c   | 
22 
 3 files changed, 39 insertions(+)

diff --git 
a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf 
b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index 96a46da8c5..ecbe724dfe 100644
--- 
a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++ 
b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -46,6 +46,7 @@
   DebugLib
   DevicePathLib
   DxeServicesLib
+  IpmiCmdLib
   MemoryAllocationLib
   PcdLib
   PrintLib
diff --git a/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
index 8868b76135..b956ee6d07 100644
--- a/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
+++ b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
@@ -19,6 +19,17 @@
 #define BOOT_OPTION_BOOT_FLAG_VALID 1
 #define BOOT_OPTION_BOOT_FLAG_INVALID   0
 
+typedef enum {
+  EfiReserved,
+  EfiBiosFrb2,
+  EfiBiosPost,
+  EfiOsLoad,
+  EfiSmsOs,
+  EfiOem,
+  EfiFrbReserved1,
+  EfiFrbReserved2
+} EFI_WDT_USER_TYPE;
+
 typedef enum {
   NoOverride = 0x0,
   ForcePxe,
@@ -91,4 +102,9 @@ IpmiCmdGetSysBootOptions (
   IN IPMI_GET_BOOT_OPTION   *BootOption
   );
 
+EFI_STATUS
+IpmiCmdStopWatchdogTimer (
+  IN EFI_WDT_USER_TYPE  UserType
+  );
+
 #endif
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c 
b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
index eaa6ce78d0..56ca8d63b0 100644
--- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
@@ -19,6 +19,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -609,6 +611,8 @@ PlatformBootManagerAfterConsole (
 {
   EFI_STATUS Status;
   ESRT_MANAGEMENT_PROTOCOL   *EsrtManagement = NULL;
+  OEM_CONFIG_DATASetupData;
+  UINTN  DataSize = sizeof (OEM_CONFIG_DATA);
 
   //
   // Show the splash screen.
@@ -645,6 +649,24 @@ PlatformBootManagerAfterConsole (
 );
 
   HandleBmcBootType ();
+
+  //Disable POST Watch Dog before attempting boot
+  Status = gRT->GetVariable (
+  OEM_CONFIG_NAME,
+  ,
+  NULL,
+  ,
+  
+  );
+
+  if (!EFI_ERROR (Status)) {
+if (SetupData.BmcWdtEnable) {
+  Status = IpmiCmdStopWatchdogTimer (EfiBiosPost);
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "%a:%r\n", __FUNCTION__, Status));
+  }
+}
+  }
 }
 
 /**
-- 
2.17.0

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[edk2] [PATCH edk2-platforms v3 17/36] Hisilicon/I2C: Fix a typo issue

[Ming Huang]

Modify spedd to Speed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Library/I2CLib/I2CHw.h  | 2 +-
 Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h 
b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
index d77aea509e..6fd7b8183e 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h
@@ -81,7 +81,7 @@
  struct
  {
 UINT32  master: 1   ;
-UINT32  spedd : 2   ;
+UINT32  Speed : 2   ;
 UINT32  slave_10bit   : 1   ;
 UINT32  master_10bit  : 1   ;
 UINT32  restart_en: 1   ;
diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c 
b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
index 59633106ce..ed44ac204f 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
@@ -158,7 +158,7 @@ I2CInit (
 
   I2C_REG_READ (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
   I2cControlReg.bits.master = 1;
-  I2cControlReg.bits.spedd = 0x1;
+  I2cControlReg.bits.Speed = 0x1;
   I2cControlReg.bits.restart_en = 1;
   I2cControlReg.bits.slave_disable = 1;
   I2C_REG_WRITE (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
-- 
2.17.0

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