Use Pcd to select blue tooth device.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex
---
.../Board/MinnowBoard3/BoardInitPostMem/BoardInit.c| 7 +++
.../Board/MinnowBoard3/BoardInitPostMem/BoardInitMiscs.h | 7
Reviewed-by: zwei4
Thanks,
David Wei
Intel SSG/STO/UEFI BIOS
> -Original Message-
> From: Lu, ShifeiX A
> Sent: Friday, October 13, 2017 1:38 PM
> To: edk2-devel@lists.01.org
> Cc: Wei, David
> Subject:
Hi,
I'm sorry that I couldn't comment on this patch in time.
However, I must observe that version 1 of the patch,
1507688554-10264-3-git-send-email-eric.dong@intel.com">http://mid.mail-archive.com/1507688554-10264-3-git-send-email-eric.dong@intel.com
was sent out at 04:22 AM on 11 Oct, in my
Current code assume Communicate Ppi always existed, so it adds
ASSERT to confirm it. Ovmf platform happened not has this Ppi, so
the ASSERT been trig. This patch handle Ppi not existed case.
Cc: Ruiyu Ni
Cc: Jiewen Yao
Cc: Laszlo Ersek
The new algorithm converts the problem calculating optimal
MTRR settings (using least MTRR registers) to the problem finding
the shortest path in a graph.
The memory required in extreme but rare case can be up to 256KB,
so using local stack buffer is impossible considering current
DxeIpl only
The patch changes MtrrLibLeastAlignment() to
MtrrLibBiggestAlignment() and optimizes the implementation
to be more efficient.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni
Cc: Michael D Kinney
Cc: Eric Dong
The patch replaces some if-checks with assertions because
they are impossible to happen.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni
Cc: Michael D Kinney
Cc: Eric Dong
---
The patch optimized the MTRR access code to skip the Base MSR
access when the Mask MSR indicates the pair is invalid.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni
Cc: Michael D Kinney
---
Reviewed-by: Hao Wu
Best Regards,
Hao Wu
> -Original Message-
> From: Wang, Jian J
> Sent: Thursday, October 12, 2017 2:00 PM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric; Wu, Hao A
> Subject: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix bitwise size issue (K11)
>
>
Current code assume Communicate Ppi always existed, so it adds
ASSERT to confirm it. Ovmf platform happened not has this Ppi, so
the ASSERT been trig. This patch handle Ppi not existed case.
Cc: Ruiyu Ni
Cc: Jiewen Yao
Cc: Laszlo Ersek
Hi Laszlo,
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, October 12, 2017 5:43 PM
> To: Dong, Eric ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Yao, Jiewen
> Subject: Re: [edk2] [Patch]
Hi all,
please ignore this patch, please this is not a full fix. Will send a new one
soon.
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Eric Dong
Sent: Thursday, October 12, 2017 4:33 PM
To: edk2-devel@lists.01.org
Cc: Ni, Ruiyu
Hi Laszlo,
Sorry for this patch break OVMF. Platform without this Ppi is not what we
expected before. So we just add ASSERT here.
I will send a patch ASAP to fix this ASSERT case. Also we will provide
another patch later to handle the platform without this Ppi case.
Thanks,
Eric
ECR1707 for UEFI2.7 clarified certificate management rule for private time-based
AuthVariable.Trusted cert rule changed from whole signer's certificate stack to
top-level issuer cert tbscertificate + SignerCert CN for better management
compatibility.
Hash is used to reduce storage overhead.
Cc:
Hi Eric,
On 10/12/17 10:37, Eric Dong wrote:
> Current code assume Communicate Ppi always existed, so it adds
> ASSERT to confirm it. Ovmf platform happened not has this Ppi, so
> the ASSERT been trig. This patch handle Ppi not existed case.
>
> Cc: Ruiyu Ni
> Cc: Jiewen Yao
On Thu, Oct 12, 2017 at 06:39:46AM +0200, Marcin Wojtas wrote:
> 2017-10-11 20:15 GMT+02:00 Ard Biesheuvel :
> > On 11 October 2017 at 17:47, Leif Lindholm wrote:
> >> On Wed, Oct 11, 2017 at 05:40:42PM +0200, Marcin Wojtas wrote:
> >>> From:
2017-10-12 12:50 GMT+02:00 Leif Lindholm :
>
> On Thu, Oct 12, 2017 at 07:47:52AM +0200, Marcin Wojtas wrote:
> > 2017-10-11 19:56 GMT+02:00 Leif Lindholm :
> > > On Wed, Oct 11, 2017 at 05:40:47PM +0200, Marcin Wojtas wrote:
> > >> Instead of
On Thu, Oct 12, 2017 at 07:47:52AM +0200, Marcin Wojtas wrote:
> 2017-10-11 19:56 GMT+02:00 Leif Lindholm :
> > On Wed, Oct 11, 2017 at 05:40:47PM +0200, Marcin Wojtas wrote:
> >> Instead of using hardcoded value in PcdSystemMemorySize PCD,
> >> obtain DRAM size directly
Cc: Eric Dong
Cc: Hao A Wu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang
---
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Showing QR code and website link to screen under EFI shell for MinnowBoard.
Output website link to serial port too.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: xianhu2x
---
.../MinnowBoard3/BoardInitPostMem/BoardInit.c | 5 +
Update Minor version of BIOS ID.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex
---
Platform/BroxtonPlatformPkg/BiosId.env | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/BroxtonPlatformPkg/BiosId.env
On 10/12/17 04:00, Bi, Dandan wrote:
> Reviewed-by: Dandan Bi
>
> -Original Message-
> From: Wang, Jian J
> Sent: Thursday, October 12, 2017 9:04 AM
> To: edk2-devel@lists.01.org
> Cc: Laszlo Ersek ; Gao, Liming ; Bi,
>
Reviewed-by: zwei4
Thanks,
David Wei
Intel SSG/STO/UEFI BIOS
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> xianhu2x
> Sent: Thursday, October 12, 2017 2:53 PM
> To:
On Thu, Oct 12, 2017 at 01:30:43AM +0100, Supreeth Venkatesh wrote:
> This patch corrects the Management Mode(MM) return codes as specified in
> http://infocenter.arm.com/help/topic/com.arm.doc.den0060a/DEN0060A_ARM_MM_Interface_Specification.pdf.
>
> Contributed-under: TianoCore Contribution
On Tue, Oct 10, 2017 at 06:52:02PM +, Evan Lloyd wrote:
> > I notice you only defined ARM namespace in this patch, and implemented
> > ARM library instance.
> > Also most consumers of ConfigurationManager are from ARM platform
> > package. So if it urgent from ARM platform, you may consider to
On 12 October 2017 at 16:43, Leif Lindholm wrote:
> On Tue, Oct 10, 2017 at 06:52:02PM +, Evan Lloyd wrote:
>> > I notice you only defined ARM namespace in this patch, and implemented
>> > ARM library instance.
>> > Also most consumers of ConfigurationManager are
***
PI v1.5 Specification Volume 4 defines Management Mode Core Interface
and defines EFI_MM_COMMUNICATION_PROTOCOL. This protocol provides a
means of communicating between drivers outside of MM and MMI
handlers inside of MM.
EFI_MM_COMMUNICATION_PROTOCOL
Summary
This protocol provides a means
PI v1.5 Specification Volume 4 defines Management Mode Core Interface
and defines EFI_MM_COMMUNICATION_PROTOCOL. This protocol provides a
means of communicating between drivers outside of MM and MMI
handlers inside of MM.
This patch implements the EFI_MM_COMMUNICATION_PROTOCOL DXE runtime
driver
This patch adds the MM Communication driver (.inf) file to define entry
point for this driver and other compile related information the driver
needs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Supreeth Venkatesh
---
This patch defines PCDs to describe the base address and size of
communication buffer between normal world (uefi) and standalone MM
environment in the secure world.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Supreeth Venkatesh
---
This patch enables MmCommunicationDxe on AArch64 Fixed Virtual
Platform (FVP) by defining required PCDs and driver inf file.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Supreeth Venkatesh
---
Hi Supreeth,
On 12 October 2017 at 18:13, Supreeth Venkatesh
wrote:
> This patch defines PCDs to describe the base address and size of
> communication buffer between normal world (uefi) and standalone MM
> environment in the secure world.
>
> Contributed-under:
On Thu, 2017-10-12 at 18:18 +0100, Ard Biesheuvel wrote:
> Hi Supreeth,
>
> On 12 October 2017 at 18:13, Supreeth Venkatesh
> wrote:
> >
> > This patch defines PCDs to describe the base address and size of
> > communication buffer between normal world (uefi) and
Hi Supreeth,
On 12 October 2017 at 18:13, Supreeth Venkatesh
wrote:
> PI v1.5 Specification Volume 4 defines Management Mode Core Interface
> and defines EFI_MM_COMMUNICATION_PROTOCOL. This protocol provides a
> means of communicating between drivers outside of MM
Hi Supreeth,
Could you acknowledge me as a contributor in the relevant patches and repost?
cheers,
Achin
On Thu, Oct 12, 2017 at 06:13:49PM +0100, Supreeth Venkatesh wrote:
> ***
> PI v1.5 Specification Volume 4 defines Management Mode Core Interface
> and defines EFI_MM_COMMUNICATION_PROTOCOL.
On Thu, 2017-10-12 at 18:38 +0100, Achin Gupta wrote:
> Hi Supreeth,
>
> Could you acknowledge me as a contributor in the relevant patches and
> repost?
Can sure do as done in previous patches. However, Since I wanted you to
review as well the latest changes, I was not sure whether co-author can
On Thu, Oct 12, 2017 at 12:43:13PM -0500, Supreeth Venkatesh wrote:
> On Thu, 2017-10-12 at 18:38 +0100, Achin Gupta wrote:
> > Hi Supreeth,
> >
> > Could you acknowledge me as a contributor in the relevant patches and
> > repost?
> Can sure do as done in previous patches. However, Since I wanted
On Tue, Sep 26, 2017 at 09:15:11PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> There is no functional modification in this change
> As preparation for further work, the formatting is corrected to meet
> the EDKII coding standard.
> Of specific note, some
Given that all changes to the first file _remove_ comments, it may be
better with a subject line saying "updating comments".
On Tue, Sep 26, 2017 at 09:15:12PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> There is no functional modification in this change
>
On Tue, Sep 26, 2017 at 09:15:13PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> This change adds some STATIC and CONST qualifiers (mainly to arguments
> of functions) in PL111 and HdLcd modules.
>
> It doesn't add or modify any functionality.
If you delete
On Tue, Sep 26, 2017 at 09:15:14PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> This change adds some debug assertions e.g to catch NULL pointer errors
> missing in PL11Lcd and HdLcd modules.
>
> This change also improves related error handling code.
>
>
On Tue, Sep 26, 2017 at 09:15:15PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> This minor change removes some unecessary initializations and variables
> in PL111LcdArmVExpress.c
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by:
On Tue, Sep 26, 2017 at 09:15:17PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> PcdPL111LcdVideoModeOscId and PcdPL111LcdMaxMode are declared as fixed
> PCDs. However code uses PcdGet32 call to get these values.
> This change replaces PcdGet32 with
On Tue, Sep 26, 2017 at 09:15:19PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> PcdHdLcdVideoModeOscId is declared as a fixed PCD. However code
> uses the PcdGet32 call to get this value.
> This change replaces PcdGet32 with FixedPcdGet32.
>
>
On Tue, Sep 26, 2017 at 09:15:21PM +0100, evan.ll...@arm.com wrote:
> From: Girish Pathak
>
> LcdIdentify function does not currently check presence of HDLCD
> controller.
>
> Implement this functionality by reading HDLCD_REG_VERSION and checking
> against the PRODUCT_ID
On 26 September 2017 at 21:15, wrote:
> From: Girish Pathak
>
> This change adds some STATIC and CONST qualifiers (mainly to arguments
> of functions) in PL111 and HdLcd modules.
>
> It doesn't add or modify any functionality.
>
> Contributed-under:
On 11/10/2017 21:45, Leo Duran wrote:
> + // Override PSD offset for AMD
> + //
> + if (SmmStandardSignatureIsAuthenticAMD ()) {
> +gStmPsdOffset = AMD_SMM_PSD_OFFSET;
> + }
> +
I think the right thing to do here would be to use the SMM state save
map revision; in the case of AMD, the low
Hi Jian,
> + if (!mCpuSmmStaticPageTable || (PcdGet8 (PcdHeapGuardPropertyMask)
> &
> + BIT3 | BIT2) != 0) {
I think above code logic is not correct, the "&" will be handled before the "|"
which is not an expected order, right?
Thanks,
Eric
> -Original Message-
> From: Wang, Jian J
>
Hi Jian,
I think below code not follow EDKII coding style, EDKII requires definition and
assignment in different code.
+ UINTN LevelShift[GUARDED_HEAP_MAP_TABLE_DEPTH]
+= GUARDED_HEAP_MAP_TABLE_DEPTH_SHIFTS;
+ UINTN
HI Leo
Thank you very much. This patch looks good to me in general.
Some minor comment:
1) For AMD smm save state.
I saw Paolo gave the comment on how to detect AMD save state. I do not have
strong opinion on that. I think you and Paolo can make decision.
I recommend we move
Hi Leo
I just have another thought, when I review code again.
Do we *have to* make AMD SMM PSD offset to 0xfc00?
SMM PSD is just a *software* concept. Not hardware requirement.
What is broken, if we design AMD SMM PSD offset to be 0xfb00, (same as existing
code)?
Thank you
Yao Jiewen
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