, 2018 at 11:40 AM Jordan Crouse
> > > > wrote:
> > > >>
> > > >> On Thu, Nov 29, 2018 at 01:48:15PM -0500, Rob Clark wrote:
> > > >>> On Thu, Nov 29, 2018 at 10:54 AM Christoph Hellwig
> > > >>> wrote:
> > >
son
Signed-off-by: Rob Clark
---
This is an alternative/replacement for [1]. What it lacks in elegance
it makes up for in practicality ;-)
[1] https://patchwork.freedesktop.org/patch/264930/
drivers/of/device.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/driv
On Wed, Nov 28, 2018 at 1:29 PM Jordan Crouse wrote:
>
> Try to get the interconnect path for the GPU and vote for the maximum
> bandwidth to support all frequencies. This is needed for performance.
> Later we will want to scale the bandwidth based on the frequency to
> also optimize for power
On Fri, Oct 26, 2018 at 9:46 AM Sharat Masetty wrote:
>
> Added Rob to this thread.
>
> On 10/17/2018 8:05 PM, Jordan Crouse wrote:
> > On Wed, Oct 17, 2018 at 06:34:01PM +0530, Sharat Masetty wrote:
> >> This patch attempts to make use of the hardware counters for GPU busy %
> >> estimation when
On Mon, Nov 26, 2018 at 2:31 PM Will Deacon wrote:
>
> Hi Rob,
>
> On Tue, Nov 13, 2018 at 08:12:35AM -0500, Rob Clark wrote:
> > On Tue, Nov 13, 2018 at 1:32 AM Will Deacon wrote:
> > > On Fri, Nov 09, 2018 at 01:01:55PM -0500, Rob Clark wrote:
> > &g
On Tue, Jan 8, 2019 at 9:16 AM Ioana Ciornei wrote:
>
>
> > Subject: [PATCH 2/2] drm/msm/gpu: fix building without debugfs
> >
> > When debugfs is disabled, but coredump is turned on, the adreno driver
> > fails to
> > build:
> >
> > drivers/gpu/drm/msm/adreno/a3xx_gpu.c:460:4: error: 'struct
a MSM_SUBMIT_BO_DUMP flag so userspace can indicate
buffers that contain cmdstream (or are otherwise important to dump).
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_submit.c | 5 -
drivers/gpu/drm/msm/msm_rd.c | 13 ++---
include/uapi/drm/msm_drm.h | 5 -
3 files
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 6ebbd5010722..782cc33916d6 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm
Add UAPI to get/set GEM objects' debug name.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c | 36 ++-
include/uapi/drm/msm_drm.h| 2 ++
2 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm
):
drm/msm: Add __printf verification
Jordan Crouse (2):
drm/msm/gpu: Remove hardcoded interrupt name
drm/msm: drop interrupt-names
Kristian H. Kristensen (1):
drm/msm: Unblock writer if reader closes file
Rob Clark (1):
drm/msm: honor GPU_READONLY flag
.../devicetree
On Mon, Jan 28, 2019 at 3:32 AM Eduardo Lima Mitev wrote:
>
> On 1/26/19 12:42 AM, Rob Clark wrote:
> > On Fri, Jan 25, 2019 at 10:48 AM Eduardo Lima Mitev
> > wrote:
> >>
> >> There are a bunch of instructions emitted on ir3_compiler_nir related to
> >
Hi Khaled,
There is some basic (but not enabled by default on a5xx) tiled texture
support for a5xx (but probably still some bugs w/ various 3d/array
texture modes).. The support is better on a6xx where it is enabled by
default. But still not enabled at all for a3xx. (And a device like
On Wed, Mar 13, 2019 at 8:21 PM Helen Koike wrote:
>
> Async update callbacks are expected to set the old_fb in the new_state
> so prepare/cleanup framebuffers are balanced.
>
> Cc: # v4.14+
> Fixes: 224a4c970987 ("drm/msm: update cursors asynchronously through atomic")
> Suggested-by: Boris
On Wed, Mar 27, 2019 at 5:53 PM Trevor Woerner wrote:
>
> Hi Khaled: Does Rob's answer help?
> If you're interested in participating in this year's X.Org GSoC you'll need
> to get your submission done and in before 1400EDT on April 9th.
>
> Rob: if Khaled is interested, can you recommend a
Looks like a spot where we don't drain a workqueue on unload. In
general, I'd say unload is not well tested and there is a lot that can
go wrong. It's also not something that really happens in the real
world. Patches welcome, but I don't think it is the highest priority.
BR,
-R
On Wed, Feb
On Fri, Mar 1, 2019 at 2:39 PM Jordan Crouse wrote:
>
> Add support for per-instance pagetables for 5XX targets. Create a support
> buffer for preemption to hold the SMMU pagetable information for a
> preempted ring, enable TTBR1 to support split pagetables and add the
> necessary PM4 commands to
On Fri, Mar 1, 2019 at 2:38 PM Jordan Crouse wrote:
>
> Add support for a split pagetable (TTBR0/TTBR1) scheme for
> arm-smmu-v2. If split pagetables are enabled, create a
> pagetable for TTBR1 and set up the sign extension bit so
> that all IOVAs with that bit set are mapped and translated
>
On Tue, Mar 12, 2019 at 2:14 PM Jordan Crouse wrote:
>
> Some Adreno GPU targets require a special zap shader to bring the GPU
> out of secure mode. Define a region to allocate and store the zap
> shader.
>
> Signed-off-by: Jordan Crouse
> ---
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 11
On Thu, Feb 14, 2019 at 2:19 AM Dan Carpenter wrote:
>
> The copy_to/from_user() functions return the number of bytes remaining
> to be copied but we should return -EFAULT to the user.
>
> Fixes: f05c83e77460 ("drm/msm: add uapi to get/set debug name")
> Signed-off-by: Dan Carpenter
> ---
> If I
On Wed, Jan 23, 2019 at 6:12 AM Jayant Shekhar wrote:
>
> MDSS PM suspend is dependent on runtime suspend for disabling
> clocks and removing bandwidth votes. In case of pm_suspend
> triggered, dpm_prepare hold a refcount on power usage of device
> and hence runtime suspend is never triggered
On Sun, Feb 17, 2019 at 4:08 PM Rob Herring wrote:
>
> On Mon, Feb 4, 2019 at 10:15 AM Jordan Crouse wrote:
> >
> > The GMU should have two power domains defined: "cx" and "gx". "cx" is the
> > actual power domain for the device and "gx" will be attached at runtime
> > to manage reference
On Fri, Feb 15, 2019 at 11:01 AM Jordan Crouse wrote:
>
> On Thu, Feb 14, 2019 at 06:16:01PM -0500, Rob Clark wrote:
> > On Thu, Feb 14, 2019 at 2:19 AM Dan Carpenter
> > wrote:
> > >
> > > The copy_to/from_user() functions return the number of bytes remain
-bindings: drm/msm/a6xx: Document GMU bindings
drm/msm: Truncate the buffer object name if the copy from user failed
Kristian H. Kristensen (1):
drm/msm: Unblock writer if reader closes file
Rob Clark (2):
drm/msm: honor GPU_READONLY flag
MAINTAINERS: update entry for drm
On Fri, Jan 25, 2019 at 10:48 AM Eduardo Lima Mitev wrote:
>
> There are a bunch of instructions emitted on ir3_compiler_nir related to
> offset computations for IO opcodes (ssbo, image, etc). This small series
> explores the possibility of moving these instructions to NIR, where we
> have higher
On Tue, Apr 9, 2019 at 8:27 AM Eric Engestrom wrote:
>
> On Tuesday, 2019-04-09 12:59:13 +0100, Eric Engestrom wrote:
> > On Tuesday, 2019-04-09 11:35:14 +, Ayan Halder wrote:
> > > Generated using make headers_install from the drm-next
> > > tree - git://anongit.freedesktop.org/drm/drm
> > >
On Tue, Apr 9, 2019 at 5:37 AM Khaled Emara wrote:
>
> According to the TODO: moved get_param to generation specific code.
> ---
> .../drivers/freedreno/a2xx/fd2_screen.c | 207 ++-
> .../drivers/freedreno/a2xx/fd2_screen.h | 4 +-
>
Good catch, I've pushed this one
Thanks
BR,
-R
On Tue, Apr 9, 2019 at 4:20 AM Khaled Emara wrote:
>
> There seems to be a duplicate return statement,
> as A2XX doesn't support shader buffers.
> ---
> src/gallium/drivers/freedreno/freedreno_screen.c | 1 -
> 1 file changed, 1 deletion(-)
>
>
From: Rob Clark
For KHR_robustness, userspace wants to know two things, the count of GPU
faults globally, and the count of faults attributed to a given context.
This patch providees the former, and the next patch provides the latter.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno
of faults to see if it is responsible for any
and if so it can invalidate itself.
This is also helpful for testing by confirming to the user driver if a
particular command stream caused a fault (or not as the case may be).
Signed-off-by: Jordan Crouse
Signed-off-by: Rob Clark
---
drivers/gpu
On Fri, May 24, 2019 at 1:43 PM Stephen Boyd wrote:
>
> Quoting Sean Paul (2019-05-24 10:32:18)
> > From: Sean Paul
> >
> > Instead of reaching into dev->primary for debugfs_root, use the minor
> > passed into debugfs_init.
> >
> > This avoids creating the debug directory under
On Fri, May 10, 2019 at 7:35 AM Rob Clark wrote:
>
> On Tue, Dec 4, 2018 at 2:29 PM Rob Herring wrote:
> >
> > On Sat, Dec 1, 2018 at 10:54 AM Rob Clark wrote:
> > >
> > > This solves a problem we see with drm/msm, caused by getting
> > > iommu_dma_
On Sun, Jun 2, 2019 at 11:25 PM Tomasz Figa wrote:
>
> On Mon, Jun 3, 2019 at 4:40 AM Rob Clark wrote:
> >
> > On Fri, May 10, 2019 at 7:35 AM Rob Clark wrote:
> > >
> > > On Tue, Dec 4, 2018 at 2:29 PM Rob Herring wrote:
> > > >
> >
On Mon, Jun 3, 2019 at 12:57 AM Vivek Gautam
wrote:
>
>
>
> On 6/3/2019 11:50 AM, Tomasz Figa wrote:
> > On Mon, Jun 3, 2019 at 4:40 AM Rob Clark wrote:
> >> On Fri, May 10, 2019 at 7:35 AM Rob Clark wrote:
> >>> On Tue, Dec 4, 2018 at 2:29 PM Rob Her
On Mon, Jun 3, 2019 at 6:54 AM Thierry Reding wrote:
>
> On Mon, Jun 03, 2019 at 06:20:57AM -0700, Rob Clark wrote:
> > On Mon, Jun 3, 2019 at 4:14 AM Robin Murphy wrote:
> > >
> > > On 03/06/2019 11:47, Rob Clark wrote:
> > > > On Sun,
On Mon, Jun 3, 2019 at 4:14 AM Robin Murphy wrote:
>
> On 03/06/2019 11:47, Rob Clark wrote:
> > On Sun, Jun 2, 2019 at 11:25 PM Tomasz Figa wrote:
> >>
> >> On Mon, Jun 3, 2019 at 4:40 AM Rob Clark wrote:
> >>>
> >>> So, another ca
On Tue, Jun 4, 2019 at 11:58 PM Tomasz Figa wrote:
>
> But first of all, I remember Marek already submitted some patches long
> ago that extended struct driver with some flag that means that the
> driver doesn't want the IOMMU to be attached before probe. Why
> wouldn't that work? Sounds like a
On Tue, May 28, 2019 at 6:17 PM Brian Masney wrote:
>
> On Tue, May 28, 2019 at 03:46:14PM +0200, Linus Walleij wrote:
> > On Thu, May 9, 2019 at 4:04 AM Brian Masney wrote:
> >
> > > Here is a patch series that adds initial display support for the LG
> > > Nexus 5 (hammerhead) phone. It's not
how things work on
kernel/display side after spending most of my time in userspace/mesa),
but I don't want to hold this up..
Acked-by: Rob Clark
> >
> > ---
> > Hello,
> >
> > As mentioned in the cover letter,
> > But I couldn't test on MSM because I don't have th
:
> https://patchwork.freedesktop.org/patch/msgid/20190524173231.5040-1-s...@poorly.run
>
> Cc: Rob Clark
> Reported-by: Stephen Boyd
> Reviewed-by: Abhinav Kumar
> Signed-off-by: Sean Paul
nice!
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms
On Wed, Jun 5, 2019 at 6:18 AM Marek Szyprowski
wrote:
>
> Hi Rob,
>
> On 2019-06-05 14:57, Rob Clark wrote:
> > On Tue, Jun 4, 2019 at 11:58 PM Tomasz Figa wrote:
> >> But first of all, I remember Marek already submitted some patches long
> >> ago that e
thanks, I've pushed this one to envytools tree
BR,
-R
On Wed, May 29, 2019 at 8:20 AM Jeffrey Hugo wrote:
>
> ---
> rnndb/adreno/a5xx.xml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/rnndb/adreno/a5xx.xml b/rnndb/adreno/a5xx.xml
> index ae654eeb..16203512 100644
> ---
balanced add a minimum vote in
dpu_mdss_init() to avoid any unclocked access.
This change depends on the following patch which
introduces interconnect binding to MDSS driver:
https://patchwork.codeaurora.org/patch/708155/
Signed-off-by: Abhinav Kumar
Reviewed-by: Sean Paul
Signed-off-by: Rob Clark
definitions (Rob Herring)
Changes in v4:
- Use port macros and change port string names (Georgi Djakov)
Changes in v5-v7:
- None
Signed-off-by: Sravanthi Kollukuduru
Signed-off-by: Jayant Shekhar
Reviewed-by: Rob Herring
Signed-off-by: Rob Clark
---
Documentation/devicetree
the interconnects and request bandwidth
between DDR and the display hardware (MDP port(s) and rotator
downscaler).
v2: update the path names to be consistent with dpu, handle the NULL
path case, updated commit msg from Georgi.
Signed-off-by: Georgi Djakov
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm
for clarity to keep num_paths=0 in
this case.
Signed-off-by: Sravanthi Kollukuduru
Signed-off-by: Jayant Shekhar
Signed-off-by: Rob Clark
Acked-by: Georgi Djakov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 49 ++--
1 file changed, 45 insertions(+), 4 deletions
(Sean Paul)
Changes in v4-v7:
- None
Signed-off-by: Sravanthi Kollukuduru
Signed-off-by: Jayant Shekhar
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 174 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 +-
drivers/gpu/drm/msm/disp
no interconnect paths is not fatal.
Signed-off-by: Georgi Djakov
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 38
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
On Tue, Jun 18, 2019 at 1:44 PM Jeffrey Hugo wrote:
>
> On Tue, Jun 18, 2019 at 2:25 PM Rob Clark wrote:
> >
> > From: Georgi Djakov
> >
> > The interconnect API provides an interface for consumer drivers to
> > express their bandwidth needs
On Mon, Jun 17, 2019 at 7:02 PM Brian Masney wrote:
>
> Hi Rob Clark,
>
> On Sun, Jun 16, 2019 at 10:41:06AM -0700, Bjorn Andersson wrote:
> > > diff --git a/drivers/soc/qcom/ocmem.xml.h b/drivers/soc/qcom/ocmem.xml.h
> >
> > I would prefer that these lived at t
On Tue, Jun 25, 2019 at 1:42 PM Daniel Vetter wrote:
>
> msm has switched over to drm_fb->obj[] a while ago already, so we can
> just use the helper.
>
> v2: Make it compile ... oops.
>
> Cc: Eric Anholt
> Cc: Emil Velikov
> Signed-off-by: Daniel Vetter
> Cc:
in
dsi_phy_hw_v3_0_lane_settings
Nathan Huckleberry (1):
drm/msm/dpu: Fix Wunused-const-variable
Nicholas Mc Guire (1):
drm/msm: check for equals 0 only
Rob Clark (1):
drm/msm/a3xx: remove TPL1 regs from snapshot
Sean Paul (23):
drm/msm/a6xx: Avoid freeing gmu resources multiple times
so, for dpu_format_map_tile, I'd like to define a fourcc modifier for
tiled formats (we currently have a workaround in userspace w/ a
private modifier in the gallium driver).. I think the problem is
defining the layout of the tiled format(s) (there are at least two per
generation and I can't
On Wed, Jun 19, 2019 at 12:32 PM Sean Paul wrote:
>
> On Wed, Jun 19, 2019 at 12:17:23PM -0700, Nathan Chancellor wrote:
> > Clang warns:
> >
> > drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c:80:6: warning: logical not is
> > only applied to the left hand side of this bitwise operator
> >
On Wed, Jun 19, 2019 at 1:17 PM Rob Herring wrote:
>
> On Sun, Jun 16, 2019 at 7:29 AM Brian Masney wrote:
> >
> > Some A3xx and A4xx Adreno GPUs do not have GMEM inside the GPU core and
> > must use the On Chip MEMory (OCMEM) in order to be functional. Add the
> > optional ocmem property to the
On Thu, Jun 20, 2019 at 7:14 PM Brian Masney wrote:
>
> On Wed, Jun 19, 2019 at 01:21:20PM -0700, Rob Clark wrote:
> > On Wed, Jun 19, 2019 at 1:17 PM Rob Herring wrote:
> > >
> > > On Sun, Jun 16, 2019 at 7:29 AM Brian Masney
> > > wrote:
> >
From: Rob Clark
These regs are write-only, and the hw throws a hissy-fit (ie. reboots)
when we try to read them for GPU state snapshot, in response to a GPU
hang. It is rather impolite when GPU recovery triggers an insta-
reboot, so lets remove the TPL1 registers from the snapshot.
Fixes
On Thu, May 9, 2019 at 12:12 AM Brian Masney wrote:
>
> On Wed, May 08, 2019 at 08:00:47PM -0700, Bjorn Andersson wrote:
> > On Wed 08 May 19:25 PDT 2019, Rob Clark wrote:
> >
> > > On Wed, May 8, 2019 at 7:16 PM Brian Masney wrote:
> > > >
> > > &
(Sean Paul)
Changes in v4-v7:
- None
Signed-off-by: Sravanthi Kollukuduru
Signed-off-by: Jayant Shekhar
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 174 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 +-
drivers/gpu/drm/msm/disp
Djakov)
Changes in v6:
- Change to new icc_set API's (Doug Anderson)
Changes in v7:
- Fixed a typo
Signed-off-by: Sravanthi Kollukuduru
Signed-off-by: Jayant Shekhar
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 49 ++--
1 file changed
balanced add a minimum vote in
dpu_mdss_init() to avoid any unclocked access.
This change depends on the following patch which
introduces interconnect binding to MDSS driver:
https://patchwork.codeaurora.org/patch/708155/
Signed-off-by: Abhinav Kumar
Reviewed-by: Sean Paul
Signed-off-by: Rob Clark
From: Georgi Djakov
Signed-off-by: Georgi Djakov
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 97179bec8902
definitions (Rob Herring)
Changes in v4:
- Use port macros and change port string names (Georgi Djakov)
Changes in v5-v7:
- None
Signed-off-by: Sravanthi Kollukuduru
Signed-off-by: Jayant Shekhar
Reviewed-by: Rob Herring
Signed-off-by: Rob Clark
---
Documentation/devicetree
Hi, actually the texture tiling project was selected for a GSoC
project which is just starting up.. But there may be other projects
for other drivers or in other areas of mesa/xserver/drm/etc. Adding
evoc list.
BR,
-R
On Fri, May 10, 2019 at 5:40 AM Shubham Verma wrote:
>
> Hello Dear Sir,
>
>
On Tue, Dec 4, 2018 at 2:29 PM Rob Herring wrote:
>
> On Sat, Dec 1, 2018 at 10:54 AM Rob Clark wrote:
> >
> > This solves a problem we see with drm/msm, caused by getting
> > iommu_dma_ops while we attach our own domain and manage it directly at
n work on compressed textures
> project.
>
> On Fri, 10 May 2019 6:16 pm Rob Clark, wrote:
>>
>> Hi, actually the texture tiling project was selected for a GSoC
>> project which is just starting up.. But there may be other projects
>> for other drivers or in other
On Wed, May 8, 2019 at 7:16 PM Brian Masney wrote:
>
> On Mon, May 06, 2019 at 11:39:02PM -0700, Bjorn Andersson wrote:
> > On Sun 05 May 06:04 PDT 2019, Brian Masney wrote:
> > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
> > > b/arch/arm/boot/dts/qcom-msm8974.dtsi
> > [..]
> > > +
From: Rob Clark
Depending on platform firmware, a zap shader may not be required to take
the GPU out of secure mode on boot, in which case we can just write
RBBM_SECVID_TRUST_CNTL directly. Which we *mostly* handled, but missed
clearing 'ret' resulting that hw_init() returned an error
?
yeah, we probably want to keep !iommu support, it is at least useful
for bringup of new (or old) devices. But tends to bitrot a since it
isn't a case that gets tested much once iommu is in place. Perhaps
there is a way to have a null iommu/aspace, although I'm not quite
sure how that would work..
On Mon, Jul 8, 2019 at 11:18 AM Bjorn Andersson
wrote:
>
> On Wed 03 Jul 07:00 PDT 2019, Rob Clark wrote:
>
> > From: Rob Clark
> >
> > For platforms that require the "zap shader" to take the GPU out of
> > secure mode at boot, we also need the zap fw
On Tue, Jul 2, 2019 at 9:08 PM Bjorn Andersson
wrote:
>
> On Mon 01 Jul 10:39 PDT 2019, Jeffrey Hugo wrote:
>
> > Creating the msm gem address space requires a reference to the dev where
> > the iommu is located. The driver currently assumes this is the same as
> > the platform device, which
From: Rob Clark
For platforms that require the "zap shader" to take the GPU out of
secure mode at boot, we also need the zap fw to end up in the initrd.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 4
1 file changed, 4 insertions(+)
diff --git a/d
On Tue, Jul 2, 2019 at 8:20 AM Laurent Pinchart
wrote:
>
> Hi Rob,
>
> Thank you for the patch.
>
> On Sun, Jun 30, 2019 at 08:01:43AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > Request the enable gpio ASIS to avoid disabling bridge during probe, if
On Mon, Jul 1, 2019 at 12:07 PM Jeffrey Hugo wrote:
>
> On 7/1/2019 12:58 PM, Rob Clark wrote:
> > On Mon, Jul 1, 2019 at 11:37 AM Jeffrey Hugo wrote:
> >>
> >> On 6/30/2019 9:01 AM, Rob Clark wrote:
> >>> From: Rob Clark
> >>>
> >
On Wed, Jul 3, 2019 at 9:33 AM Leif Lindholm wrote:
>
> On Tue, Jul 02, 2019 at 03:48:48PM -0700, Rob Clark wrote:
> > > > There is one kernel, and there
> > > > are N distro's, so debugging a users "I don't get a screen at boot"
> > > > proble
From: Rob Clark
One of the challenges we need to handle to enable the aarch64 laptops
upstream is dealing with the fact that the bootloader enables the
display and takes the corresponding SMMU context-bank out of BYPASS.
Unfortunately, currently, the IOMMU framework attaches a DMA
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 1 +
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 1 +
drivers/gpu/drm/msm/msm_drv.c | 1 +
4 files changed, 4 insertions(+)
diff --git
On Tue, Jul 2, 2019 at 2:53 PM Ard Biesheuvel wrote:
>
> On Tue, 2 Jul 2019 at 23:02, Rob Clark wrote:
> >
> > On Tue, Jul 2, 2019 at 1:35 PM Ard Biesheuvel
> > wrote:
> > >
> > > On Tue, 2 Jul 2019 at 22:26, Ard Biesheuvel
> > > wrote:
>
On Tue, Jul 2, 2019 at 2:59 PM Leif Lindholm wrote:
>
> On Tue, Jul 02, 2019 at 02:01:49PM -0700, Rob Clark wrote:
> > > > So we are dealing with a platform that violates the UEFI spec, since
> > > > it does not bother to implement variable services at runtime (bec
From: Rob Clark
Recently splats like this started showing up:
WARNING: CPU: 4 PID: 251 at drivers/iommu/dma-iommu.c:451
__iommu_dma_unmap+0xb8/0xc0
Modules linked in: ath10k_snoc ath10k_core fuse msm ath mac80211 uvcvideo
cfg80211 videobuf2_vmalloc videobuf2_memops vide
CPU: 4 PID
c-gpio" isn't found, we try to find just
> "qcom,misc" as a last resort. Provide an explicit whitelist
> for those GPIOs.
>
> Cc: Rob Clark
> Cc: Sean Paul
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedreno@lists.freedesktop.org
> Signed-off-by: Linus Walleij
From: Rob Clark
Unused and the extra rpm get/put interferes with handover from
bootloader (ie. happens before we have a chance to check if
things are already enabled).
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 5 -
1 file changed, 5 deletions(-)
diff --git
From: Rob Clark
2 and 3 are some early prep-work to deal with bootloader enabled
displays, where we want to avoid runpm get/put cycles until we know
that we won't -EPROBE_DEFER. (Otherwise, it will kill the display,
and it's not terribly nice to kill efifb and leave the user with no
good way
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 0a4c77fb3d94..e323259a16d3 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers
From: Rob Clark
If we are going to -EPROBE_DEFER due to panel/bridge not probed yet, we
want to do it before we start touching hardware.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/dsi/dsi.h | 2 +-
drivers/gpu/drm/msm/dsi/dsi_host.c| 30 +--
drivers
On Sat, Jun 29, 2019 at 10:46 AM Rob Clark wrote:
>
> On Fri, Jun 28, 2019 at 9:28 AM Jeffrey Hugo wrote:
> >
> > If booting a device using EFI, efifb will likely come up and claim the
> > console. When the msm display stack finally comes up, we want the
> > cons
On Mon, Jul 1, 2019 at 7:03 AM Rob Herring wrote:
>
> On Sun, Jun 30, 2019 at 2:36 PM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > The panel-id property in chosen can be used to communicate which panel,
> > of multiple possibilities, is install
ever be disabled (since
it isn't depending on external non-SoC-specific wiring up of things..
but I guess that might still be useful for bring-up.. either way,
Reviewed-by: Rob Clark
Sean, want to pick this up in drm-misc-fixes?
BR,
-R
>
> Fixes: dc3ea265b856 ("drm/msm: Drop the gpu
rm/msm: Split submit_lookup_objects() into two loops
Luca Weiss (1):
drm/msm: Fix NULL pointer dereference
Lucas Stach (1):
drm/msm: don't allocate pages from the MOVABLE zone
Rob Clark (2):
drm/msm/gpu: add per-process pagetables param
drm/msm: add param to retrieve # of GPU faults (
On Thu, Apr 25, 2019 at 7:09 AM Nicholas Mc Guire wrote:
>
> wait_for_completion_timeout() returns 0 on timeout and aleast 1 otherwise
> so checking for < makes no sense here.
>
> Signed-off-by: Nicholas Mc Guire
> ---
>
> Problem located with an experimental coccinelle script
>
> While this
From: Rob Clark
Needed in the following patch for cache operations.
Signed-off-by: Rob Clark
---
v3: rebased on drm-tip
drivers/gpu/drm/drm_gem.c | 8
drivers/gpu/drm/drm_internal.h | 4 ++--
drivers/gpu/drm/drm_prime.c | 4
On Mon, Jul 1, 2019 at 12:07 PM Jeffrey Hugo wrote:
>
> On 7/1/2019 12:58 PM, Rob Clark wrote:
> > On Mon, Jul 1, 2019 at 11:37 AM Jeffrey Hugo wrote:
> >>
> >> On 6/30/2019 9:01 AM, Rob Clark wrote:
> >>> From: Rob Clark
> >>>
> >
On Mon, Jul 1, 2019 at 10:41 AM Jeffrey Hugo wrote:
>
> When assigning a mixer, we will iterate through the entire list looking for
> a suitable match. This results in selecting the last match. We should
> stop at the first match, since lower numbered mixers will typically have
> more
On Mon, Jul 1, 2019 at 11:37 AM Jeffrey Hugo wrote:
>
> On 6/30/2019 9:01 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > Do an extra enable/disable cycle at init, to get the clks into disabled
> > state in case bootloader left them enabled.
> >
&
since MDP5 needs so
> little effort to support 8998.
yeah, the dividing line between mdp5 and dpu is not bright.. it has
changed significantly since the first mdp5 things to the point where a
break was probably justified, but the evolution has been spread over
time. I think it's fine to go w/
On Mon, Jul 1, 2019 at 10:39 AM Jeffrey Hugo wrote:
>
> Creating the msm gem address space requires a reference to the dev where
> the iommu is located. The driver currently assumes this is the same as
> the platform device, which breaks when the iommu is outside of the
> platform device. Use
On Sun, Jun 30, 2019 at 1:36 PM Rob Clark wrote:
>
> From: Rob Clark
>
> Now that we can deal gracefully with bootloader (firmware) initialized
> display on aarch64 laptops[1], the next step is to deal with the fact
> that the same model of laptop can have one of multipl
ed framebuffers to accomplish the console transition.
>
> Suggested-by: Rob Clark
> Signed-off-by: Jeffrey Hugo
lgtm,
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/msm/msm_fbdev.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/msm_fb
of DMA API, so best to leave things as they were.
BR,
-R
On Fri, Aug 2, 2019 at 6:21 AM Sasha Levin wrote:
>
> From: Rob Clark
>
> [ Upstream commit 0036bc73ccbe7e600a3468bf8e8879b122252274 ]
>
> Recently splats like this started showing up:
>
>WARNING: CPU: 4 PID:
From: Rob Clark
This is a replacement for a previous patches[1] that was adding arm64
support for drm_clflush. I've also added a patch to solve a similar
cache issue in vgem.
The first few patches just export arch_sync_dma_for_*(). Possibly
instead the EXPORT_SYMBOL_GPL() should be somewere
From: Rob Clark
Use arch_sync_dma_for_{device,cpu}() rather than abusing the DMA API to
indirectly get at the arch_sync_dma code.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 37 +++
1 file changed, 11 insertions(+), 26 deletions(-)
diff --git
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