Re: [PATCH 1/2] RISC-V: Add tests for cpymemsi expansion

2024-05-15 Thread Patrick O'Neill
On 5/14/24 22:00, Christoph Müllner wrote: On Fri, May 10, 2024 at 6:01 AM Patrick O'Neill wrote: Hi Christoph, cpymemsi-1.c fails on a subset of newlib targets. "UNRESOLVED: gcc.target/riscv/cpymemsi-1.c -O0 compilation failed to produce executable" Full list of failing ta

Re: [PATCH v2 2/2] RISC-V: avoid LUI based const mat in prologue/epilogue expansion [PR/105733]

2024-05-14 Thread Patrick O'Neill
On 5/13/24 20:36, Jeff Law wrote: On 5/13/24 6:54 PM, Patrick O'Neill wrote: On 5/13/24 13:28, Jeff Law wrote: On 5/13/24 12:49 PM, Vineet Gupta wrote: If the constant used for stack offset can be expressed as sum of two S12 values, the constant need not be materialized (in a reg

Re: [PATCH v2 2/2] RISC-V: avoid LUI based const mat in prologue/epilogue expansion [PR/105733]

2024-05-13 Thread Patrick O'Neill
On 5/13/24 13:28, Jeff Law wrote: On 5/13/24 12:49 PM, Vineet Gupta wrote: If the constant used for stack offset can be expressed as sum of two S12 values, the constant need not be materialized (in a reg) and instead the two S12 bits can be added to instructions involved with frame pointer.

Re: [PATCH 1/2] RISC-V: Add tests for cpymemsi expansion

2024-05-09 Thread Patrick O'Neill
Hi Christoph, cpymemsi-1.c fails on a subset of newlib targets. "UNRESOLVED: gcc.target/riscv/cpymemsi-1.c   -O0  compilation failed to produce executable" Full list of failing targets here (New Failures section): https://github.com/patrick-rivos/gcc-postcommit-ci/issues/906 Thanks,

[gcc r15-116] RISC-V: Add testcase for pr114734

2024-05-02 Thread Patrick O'Neill via Gcc-cvs
https://gcc.gnu.org/g:ff4dc8b10a421cdb0c56f7f8c238609de4f9fbe2 commit r15-116-gff4dc8b10a421cdb0c56f7f8c238609de4f9fbe2 Author: Patrick O'Neill Date: Tue Apr 30 13:26:45 2024 -0700 RISC-V: Add testcase for pr114734 gcc/testsuite/ChangeLog: PR middle-end/114734

[Committed] RISC-V: Add testcase for pr114734

2024-05-02 Thread Patrick O'Neill
On 4/30/24 15:03, Jeff Law wrote: On 4/30/24 2:36 PM, Patrick O'Neill wrote: gcc/testsuite/ChangeLog: PR middle-end/114734 * gcc.target/riscv/rvv/autovec/pr114734.c: New test. OK jeff Committed. Patrick

Re: [committed] [RISC-V] Improve floor, ceil & related operations for RISC-V

2024-05-01 Thread Patrick O'Neill
Hi Jeff, It looks like this patch's gcc.target/riscv/round_64.c testcase doesn't pass when run with newlib. It also introduced: FAIL: gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-2.c execution test on rv32gcv newlib/linux. Precommit with a few targets:

[PATCH] RISC-V: Add testcase for pr114734

2024-04-30 Thread Patrick O'Neill
gcc/testsuite/ChangeLog: PR middle-end/114734 * gcc.target/riscv/rvv/autovec/pr114734.c: New test. Signed-off-by: Patrick O'Neill --- Tested on rv64gcv before and after Richard Biener's fix: 4d3a5618de5a949c61605f545f90e81bc502 --- .../gcc.target/riscv/rvv/autovec/pr114734.c

Re: [PATCH v1] RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

2024-04-23 Thread Patrick O'Neill
GDCFLAGS_FOR_TARGET="-O0 -g" make -j $(nproc) all-gcc && make install-gcc 3. ../__RISC-V_INSTALL___RV64/bin/riscv64-unknown-elf-gcc gcc/testsuite/gcc.dg/graphite/pr111878.c -O3 -fgraphite-identity -fsave-optimization-record -march=rv64gcv -mabi=lp64d -c -S -o - Pan -Origina

Re: [PATCH v1] RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

2024-04-22 Thread Patrick O'Neill
sending these as a series would allow precommit to properly test them (as always you can see the testing results on patchworks). Thanks, Patrick [1] https://github.com/patrick-rivos/gcc-postcommit-ci/issues/801 On 4/22/24 12:55, Patrick O'Neill wrote: Hi Pan, I was running the testsuite

Re: [PATCH v1] RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

2024-04-22 Thread Patrick O'Neill
Hi Pan, I was running the testsuite for this and noticed an ICE scroll by when this patch is applied to cacc55a4c0be8d0bc7417b6a28924eadbbe428e3 for rv64gcv: FAIL: gfortran.dg/graphite/pr29832.f90   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal

Re: [PATCH v1] RISC-V: Revert RVV wv instructions overlap and xfail tests

2024-04-22 Thread Patrick O'Neill
Hi Pan, I'm not sure I'm following. Did we miss something that should have been covered? Like only an overlap on the srcs but not the dest? Are there testcases that fail? If so we should definitely have one. Can you give some additional information on why these reverts are needed? +1 to the

[Committed] RISC-V: Require a extension for ztso testcases with atomic insns

2024-03-22 Thread Patrick O'Neill
On 3/22/24 07:22, Palmer Dabbelt wrote: On Thu, 21 Mar 2024 10:00:24 PDT (-0700), Patrick O'Neill wrote: Use dg_add_options riscv_a to add atomic extension when running compile tests on non-a targets. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo-table-ztso-amo-add-1.c: Add

[gcc r14-9628] RISC-V: Require a extension for ztso testcases with atomic insns

2024-03-22 Thread Patrick O'Neill via Gcc-cvs
https://gcc.gnu.org/g:65107faad79354a75844d8dba053be6509200504 commit r14-9628-g65107faad79354a75844d8dba053be6509200504 Author: Patrick O'Neill Date: Thu Mar 21 09:47:21 2024 -0700 RISC-V: Require a extension for ztso testcases with atomic insns Use dg_add_options riscv_a to add

[PATCH] RISC-V: Require a extension for ztso testcases with atomic insns

2024-03-21 Thread Patrick O'Neill
/amo-table-ztso-subword-amo-add-4.c: Ditto. * gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Ditto. Signed-off-by: Patrick O'Neill --- gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-1.c| 1 + gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-2.c| 1 + gcc

Re: [PATCH] RISC-V: Fix __atomic_compare_exchange with 32 bit value on RV64

2024-02-28 Thread Patrick O'Neill
On 2/28/24 07:02, Palmer Dabbelt wrote: On Wed, 28 Feb 2024 06:57:53 PST (-0800), jeffreya...@gmail.com wrote: On 2/28/24 05:23, Kito Cheng wrote: atomic_compare_and_swapsi will use lr.w and sc.w to do the atomic operation on RV64, however lr.w is doing sign extend to DI and compare

[RFC 2/3] RISC-V: Add Zalrsc and Zaamo testsuite support

2024-02-07 Thread Patrick O'Neill
-table-ztso-subword-amo-add-4.c: Ditto. * gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Ditto. * lib/target-supports.exp: Add testsuite infrastructure support for Zaamo and Zalrsc. Signed-off-by: Patrick O'Neill --- .../riscv/amo-table-a-6-amo-add-1.c | 2

[RFC 3/3] RISC-V: Add Zalrsc amo-op patterns

2024-02-07 Thread Patrick O'Neill
. * gcc.target/riscv/amo-zalrsc-amo-add-4.c: New test. * gcc.target/riscv/amo-zalrsc-amo-add-5.c: New test. Signed-off-by: Patrick O'Neill -- rv64imfdc_zalrsc has the same testsuite results as rv64imafdc after this patch is applied. --- AFAIK there isn't a way to subtract an extension similar

[RFC 1/3] RISC-V: Add basic Zaamo and Zalrsc support

2024-02-07 Thread Patrick O'Neill
: Adjust expected arch string. * gcc.target/riscv/attribute-16.c: Ditto. * gcc.target/riscv/attribute-17.c: Ditto. * gcc.target/riscv/attribute-18.c: Ditto. * gcc.target/riscv/pr110696.c: Ditto. Signed-off-by: Edwin Lu Co-authored-by: Patrick O'Neill --- Tested

[Committed] RISC-V: Add require-effective-target to pr113429 testcase

2024-01-29 Thread Patrick O'Neill
Committed. Thanks for catching this. Patrick On 1/28/24 19:41, juzhe.zh...@rivai.ai wrote: ok juzhe.zh...@rivai.ai *From:* Patrick O'Neill <mailto:patr...@rivosinc.com> *Date:* 2024-01-27 10:50 *To

[PATCH] RISC-V: Add require-effective-target to pr113429 testcase

2024-01-26 Thread Patrick O'Neill
The pr113429 testcase fails with newlib spike runs. Adding require-effective-target rv64 and riscv_v fixes the issue. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/pr113429.c: Add require-effective-target rv64 and riscv_v Signed-off-by: Patrick O'Neill --- Tested using

Re: [Committed] RISC-V: Add regression test for vsetvl bug pr113429

2024-01-26 Thread Patrick O'Neill
et riscv_v } */ juzhe.zh...@rivai.ai *From:* Patrick O'Neill <mailto:patr...@rivosinc.com> *Date:* 2024-01-24 09:20 *To:* juzhe.zh...@rivai.ai; gcc-patches <mailto:gcc-patches@gcc.gnu.org> *CC:* kito.cheng <mailto:k

[Committed] RISC-V: Don't make Ztso imply A

2024-01-24 Thread Patrick O'Neill
On 1/24/24 16:20, Palmer Dabbelt wrote: On Wed, 24 Jan 2024 16:19:06 PST (-0800), jeffreya...@gmail.com wrote: On 1/24/24 17:07, Patrick O'Neill wrote: On 12/16/23 10:58, Jeff Law wrote: On 12/15/23 17:14, Andrew Waterman wrote: On Fri, Dec 15, 2023 at 1:38 PM Jeff Law wrote

Re: [PATCH] RISC-V: Don't make Ztso imply A

2024-01-24 Thread Patrick O'Neill
On 12/16/23 10:58, Jeff Law wrote: On 12/15/23 17:14, Andrew Waterman wrote: On Fri, Dec 15, 2023 at 1:38 PM Jeff Law wrote: On 12/12/23 20:54, Palmer Dabbelt wrote: I can't actually find anything in the ISA manual that makes Ztso imply A.  In theory the memory ordering is just a

[Committed] RISC-V: Add regression test for vsetvl bug pr113429

2024-01-23 Thread Patrick O'Neill
/pr113429.c: New test. Signed-off-by: Patrick O'Neill --- .../gcc.target/riscv/rvv/vsetvl/pr113429.c| 70 +++ 1 file changed, 70 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c

[PATCH] RISC-V: Add regression test for vsetvl bug pr113429

2024-01-23 Thread Patrick O'Neill
: New test. Signed-off-by: Patrick O'Neill --- .../gcc.target/riscv/rvv/vsetvl/pr113429.c| 70 +++ 1 file changed, 70 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc

Re: [RFC][V2] RISC-V: Support -mcmodel=large.

2023-12-20 Thread Patrick O'Neill
On 12/20/23 10:41, Palmer Dabbelt wrote: On Wed, 20 Dec 2023 10:25:00 PST (-0800), jeffreya...@gmail.com wrote: On 12/20/23 11:21, Palmer Dabbelt wrote: Yea, the implementation relies largely on just pushing stuff into the constant pool, so we're largely independent ABI stuff with the

[PATCH] RISC-V: Add -fno-vect-cost-model to pr112773 testcase

2023-12-14 Thread Patrick O'Neill
-fno-vect-cost-model. Signed-off-by: Patrick O'Neill --- gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/pr112773.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/pr112773.c b/gcc/testsuite/gcc.target/riscv/rvv

Re: [Committed] RISC-V: Fix PR112888 ICE

2023-12-06 Thread Patrick O'Neill
Committed on behalf of Juzhe since he was having internet issues. Thanks, Patrick On 12/6/23 14:35, Juzhe-Zhong wrote: Committed as it is ovbious. gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (extract_single_source): new function. (pre_vsetvl::compute_lcm_local_properties):

Re: [Committed V2] RISC-V: Fix VSETVL PASS bug

2023-12-06 Thread Patrick O'Neill
Hi Juzhe, An assert added in this patch is firing on a testcase on rv64gcv: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112888 Thanks, Patrick On 12/6/23 06:26, Juzhe-Zhong wrote: As PR112855 mentioned, the VSETVL PASS insert vsetvli in unexpected location. Due to 2 reasons: 1. incorrect

Re: [PATCH] tree-optimization/112827 - corrupt SCEV cache during SCCP

2023-12-04 Thread Patrick O'Neill
Relevant bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112848 Thanks, Patrick On Mon, Dec 4, 2023 at 11:20 PM Li, Pan2 wrote: > Hi Richard, > > It looks like this patch result in one ICE for RISC-V backend for case > tree-ssa.exp=ssa-sink-16.c, could you please help to double check

Re: [PATCH 2/6] c: Turn int-conversion warnings into permerrors

2023-12-01 Thread Patrick O'Neill
That failure is is due to newlib files: /work/home/jzzhong/work/toolchain/riscv/build/dev-rv64gcv_zvfh_zfh-lp64d-medany-linux-spike-debug/../../*newlib*/newlib/libm/complex/ccoshl.c: In function 'ccoshl': To build gcc w/ glibc with riscv-gnu-toolchain, run make linux. A temporary fix for

Re: [PATCH 2/6] c: Turn int-conversion warnings into permerrors

2023-12-01 Thread Patrick O'Neill
Hi Juzhe, I can confirm the failure on Newlib. I'm not seeing any issues on glibc 2.37. I haven't tried to build musl. Since this patch promotes warnings to errors breakages were probably expected. The fix may require changes to newlib to remove the errors. I've hacked together a series of

Re: [PATCH v1 1/1] RISC-V: Initial RV64E and LP64E support

2023-11-29 Thread Patrick O'Neill
Hi Tsukasa, I'm seeing a new regression across all tested riscv targets: https://github.com/patrick-rivos/gcc-postcommit-ci/issues/224 Regression: |FAIL: gcc.target/riscv/predef-13.c -O0 (test for excess errors) FAIL: gcc.target/riscv/predef-13.c -O1 (test for excess errors) FAIL:

Re: [RFC PATCH] RISC-V: Remove f{r,s}flags builtins

2023-11-29 Thread Patrick O'Neill
Hi Christoph, The precommit-ci is seeing a large number of ICE segmentation faults as a result of this patch: https://github.com/ewlu/gcc-precommit-ci/issues/796#issuecomment-1831853523 The failures aren't in riscv.exp testsuite files so that's likely why you didn't run into them in your

[Committed] gfortran: Rely on dg-do-what-default to avoid running pr85853.f90, pr107254.f90 and vect-alias-check-1.F90 on non-vector targets

2023-11-21 Thread Patrick O'Neill
On 11/18/23 20:09, Jeff Law wrote: On 11/15/23 17:03, Patrick O'Neill wrote: Ping. Testsuite fixup similar to: https://inbox.sourceware.org/gcc-patches/974e9e5e-8f07-46dd-b9b9-db8aa4685...@gmail.com/T/#t https://inbox.sourceware.org/gcc-patches/7e78cd70-70c9-41b1-8a98-6977a1034

[PING] [PATCH] gfortran: Rely on dg-do-what-default to avoid running pr85853.f90, pr107254.f90 and vect-alias-check-1.F90 on non-vector targets

2023-11-15 Thread Patrick O'Neill
Ping. Testsuite fixup similar to: https://inbox.sourceware.org/gcc-patches/974e9e5e-8f07-46dd-b9b9-db8aa4685...@gmail.com/T/#t https://inbox.sourceware.org/gcc-patches/7e78cd70-70c9-41b1-8a98-6977a1034...@rivosinc.com/T/#t Patrick On Thu, Nov 2, 2023 at 12:09 PM Patrick O'Neill wrote

Re: [PATCH] RISC-V: Fix ICE in non-canonical march parsing

2023-11-15 Thread Patrick O'Neill
Does relax mean no longer enforcing the canonical order of extensions? Patrick On 11/14/23 17:52, Kito Cheng wrote: LGTM, and BTW...I am thinking we could relax the canonical order during parsing, did you have interesting and time working on that item? On Wed, Nov 15, 2023 at 9:35 AM Patrick

[Committed] RISC-V: Fix ICE in non-canonical march parsing

2023-11-15 Thread Patrick O'Neill
/testsuite/ChangeLog: * gcc.target/riscv/arch-27.c: New test. * gcc.target/riscv/arch-28.c: New test. Signed-off-by: Patrick O'Neill --- Tested using rv64gc glibc on QEMU. --- gcc/common/config/riscv/riscv-common.cc | 17 + gcc/testsuite/gcc.target/riscv/arch-27.c

[PATCH] RISC-V: Fix ICE in non-canonical march parsing

2023-11-14 Thread Patrick O'Neill
: New test. * gcc.target/riscv/arch-28.c: New test. Signed-off-by: Patrick O'Neill --- Tested using rv64gc glibc on QEMU. --- gcc/common/config/riscv/riscv-common.cc | 17 + gcc/testsuite/gcc.target/riscv/arch-24.c | 7 +++ gcc/testsuite/gcc.target/riscv/arch-25.c | 7

Re: [PATCH v2 3/3] RISC-V: Add support for XCVbi extension in CV32E40P

2023-11-13 Thread Patrick O'Neill
Hi Mary, GCC tip-of-tree with this patch series applied fails to build glibc with: --with-arch=rv32imac --with-abi=ilp32 --with-arch=rv32imafdc --with-abi=ilp32d Failing command: ./bin/riscv32-unknown-elf-gcc

Re: [PATCH v3] libiberty: Use posix_spawn in pex-unix when available.

2023-11-10 Thread Patrick O'Neill
On 11/10/23 03:00, Prathamesh Kulkarni wrote: On Thu, 5 Oct 2023 at 00:00, Brendan Shanks wrote: Hi, This patch implements pex_unix_exec_child using posix_spawn when available. This should especially benefit recent macOS (where vfork just calls fork), but should have equivalent or faster

[Committed] g++: Rely on dg-do-what-default to avoid running pr102788.cc on non-vector targets

2023-11-10 Thread Patrick O'Neill
On 11/9/23 17:20, Jeff Law wrote: On 11/2/23 17:45, Patrick O'Neill wrote: Testcases in g++.dg/vect rely on check_vect_support_and_set_flags to set dg-do-what-default and avoid running vector tests on non-vector targets. The three testcases in this patch overwrite the default with dg-do run

Re: [PATCH] g++: Add require-effective-target to multi-input file testcase pr95401.cc

2023-11-10 Thread Patrick O'Neill
On 11/9/23 17:34, Jeff Law wrote: On 11/3/23 00:18, Patrick O'Neill wrote: On non-vector targets dejagnu attempts dg-do compile for pr95401.cc. This produces a command like this: g++ pr95401.cc pr95401a.cc -S -o pr95401.s which isn't valid (gcc does not accept multiple input files when

Re: [PATCH v1] RISC-V: Support FP rint to i/l/ll diff size autovec

2023-11-07 Thread Patrick O'Neill
=0c42741ad95af3a1e3ac07350da4c3a94865ed63 It seems that precommit CI faild to locate the real root cause. juzhe.zh...@rivai.ai *From:* Patrick O'Neill <mailto:patr...@rivosinc.com> *Date:* 2023-11-08 03:21 *To:

Re: [PATCH v1] RISC-V: Support FP rint to i/l/ll diff size autovec

2023-11-07 Thread Patrick O'Neill
Ah sorry for the noise - I just saw that this was resolved with a subsequent patch: Precommit run: https://github.com/ewlu/gcc-precommit-ci/issues/608#issuecomment-1798058721 Patrick On 11/7/23 11:17, Patrick O'Neill wrote: Hi Pan, This patch (9acea4376fd98696ba51e59f417c94911a4d8248

Re: [PATCH v1] RISC-V: Support FP rint to i/l/ll diff size autovec

2023-11-07 Thread Patrick O'Neill
Hi Pan, This patch (9acea4376fd98696ba51e59f417c94911a4d8248) causes|||cond_widen_reduc-2.c to start failing on: linux/newlib: rv32/64gc ||linux/newlib: ||rv32gcv ||linux/newlib: ||rv32/64gc|_zba_zbb_zbc_zbs|||FAIL: gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-2.c scan-assembler-times

[PATCH] g++: Add require-effective-target to multi-input file testcase pr95401.cc

2023-11-03 Thread Patrick O'Neill
the case where the testcase is invoked with dg-do compile. gcc/testsuite/ChangeLog: * g++.dg/vect/pr95401.cc: Add require-effective-target vect_int. Signed-off-by: Patrick O'Neill --- Tested using rv64gc & rv64gcv to make sure the testcase runs/doesn't compile as expected. Somewhat rel

[PATCH] g++: Rely on dg-do-what-default to avoid running pr102788.cc on non-vector targets

2023-11-02 Thread Patrick O'Neill
(while still running the tests on vector targets). gcc/testsuite/ChangeLog: * g++.dg/vect/pr102788.cc: Remove dg-do run directive. Signed-off-by: Patrick O'Neill --- Tested using rv64gc & rv64gcv to make sure the testcases compile/run as expected. Similar to https://inbox.sourceware

Re: [PATCH v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator

2023-11-02 Thread Patrick O'Neill
Hi Pan, This patch is causing new failures (ICEs) on trunk: https://github.com/patrick-rivos/gcc-postcommit-ci/issues/110 Pre-commit CI run: https://github.com/ewlu/gcc-precommit-ci/issues/553#issuecomment-1790688172 New rv32gcv failures: |FAIL: gcc.dg/vect/fast-math-bb-slp-call-2.c (internal

[PATCH] gfortran: Rely on dg-do-what-default to avoid running pr85853.f90, pr107254.f90 and vect-alias-check-1.F90 on non-vector targets

2023-11-02 Thread Patrick O'Neill
: Ditto. Signed-off-by: Patrick O'Neill --- Tested using rv64gc & rv64gcv to make sure the testcases compile/run as expected. These files haven't been changed in a long time so I'm not sure why (or if) this hasn't been run into by other people before. --- gcc/testsuite/gfortran.dg/vect/pr107254

[Committed] RISC-V: Use riscv_subword_address for atomic_test_and_set

2023-11-01 Thread Patrick O'Neill
On 11/1/23 12:00, Jeff Law wrote: On 11/1/23 10:14, Patrick O'Neill wrote: Other subword atomic patterns use riscv_subword_address to calculate the aligned address, shift amount, mask and !mask. atomic_test_and_set was implemented before the common function was added. After this patch all

[Committed] RISC-V: Enable ztso tests on rv32

2023-11-01 Thread Patrick O'Neill
On 11/1/23 12:03, Jeff Law wrote: On 10/31/23 17:25, Patrick O'Neill wrote: This patch transitions the ztso testcases to use the testsuite infrastructure, enabling the tests on both rv64 and rv32 targets. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo-table-ztso-amo-add-1.c

Re: [PATCH] RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls

2023-11-01 Thread Patrick O'Neill
a Fixes: tag OK once CI finishes without regressions. Thx, -Vineet It passes precommit CI without any new failures: https://github.com/ewlu/gcc-precommit-ci/issues/526#issuecomment-1787891174 Tested-by: Patrick O'Neill Thanks, Patrick

[PATCH v2] RISC-V: Use riscv_subword_address for atomic_test_and_set

2023-11-01 Thread Patrick O'Neill
: * config/riscv/sync.md: Use riscv_subword_address function to calculate the address and shift in atomic_test_and_set. Signed-off-by: Patrick O'Neill --- Changelog: v2: Comment out the diff in the foreword so git doesn't get confused when applying the patch --- Tested using r14-5040-g5dc2ba333f8

Re: [PATCH] RISC-V: Support strided load/store

2023-10-31 Thread Patrick O'Neill
Hi Juzhe, The pre-commit CI is seeing these new failures after applying this patch [1]: |FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/mask_strided_load-1.c scan-tree-dump-times optimized " .MASK_LEN_STRIDED_LOAD" 132 FAIL:

[PATCH] RISC-V: Use riscv_subword_address for atomic_test_and_set

2023-10-31 Thread Patrick O'Neill
: * config/riscv/sync.md: Use riscv_subword_address function to calculate the address and shift in atomic_test_and_set. Signed-off-by: Patrick O'Neill --- Tested using r14-5040-g5dc2ba333f8. This patch causes this codegen to regress (adds a mv) but *only* on -O0. extern void abort(); short x

[PATCH v2] RISC-V: Enable ztso tests on rv32

2023-10-31 Thread Patrick O'Neill
the Ztso extension or add it to an existing -march. Signed-off-by: Patrick O'Neill --- Before committing v1, I ran the full testsuite as a sanity check and found failures that don't happen when running the testcases individually. v2 fixes those failures using common-sense fixes. Changelog

[Committed 2/2] RISC-V: Require a extension for testcases with atomic insns

2023-10-31 Thread Patrick O'Neill
On 10/31/23 06:07, Jeff Law wrote: On 10/30/23 18:49, Patrick O'Neill wrote: Add testsuite infrastructure for the A extension and use it to require the A extension for dg-do run and add the add extension for non-A dg-do compile. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo

[Committed 1/2] RISC-V: Let non-atomic targets use optimized amo loads/stores

2023-10-31 Thread Patrick O'Neill
On 10/31/23 06:05, Jeff Law wrote: On 10/30/23 18:49, Patrick O'Neill wrote: Non-atomic targets are currently prevented from using the optimized fencing for seq_cst load/seq_cst store. This patch removes that constraint. gcc/ChangeLog: * config/riscv/sync-rvwmo.md (atomic_load_rvwmo

[PATCH 2/2] RISC-V: Require a extension for testcases with atomic insns

2023-10-30 Thread Patrick O'Neill
/target-supports.exp: Add testing infrastructure to require the A extension or add it to an existing -march. Signed-off-by: Patrick O'Neill --- This patch relies on the previous one in the series. If applied seperately, amo-table-a-6-store-compat-3.c and amo-table-a-6-load-3.c must

[PATCH 1/2] RISC-V: Let non-atomic targets use optimized amo loads/stores

2023-10-30 Thread Patrick O'Neill
. * config/riscv/sync-ztso.md (atomic_load_ztso): Ditto. (atomic_store_ztso): Ditto. * config/riscv/sync.md (atomic_load): Ditto. (atomic_store): Ditto. Signed-off-by: Patrick O'Neill --- gcc/config/riscv/sync-rvwmo.md | 4 ++-- gcc/config/riscv/sync-ztso.md | 4

[PATCH] RISC-V: Enable ztso tests on rv32

2023-10-30 Thread Patrick O'Neill
the Ztso extension or add it to an existing -march. Signed-off-by: Patrick O'Neill --- .../riscv/amo-table-ztso-amo-add-1.c | 3 ++- .../riscv/amo-table-ztso-amo-add-2.c | 3 ++- .../riscv/amo-table-ztso-amo-add-3.c | 3 ++- .../riscv/amo-table-ztso-amo-add-4.c

[Committed] RISC-V: Make rv32i_zcmp testcase more robust

2023-10-30 Thread Patrick O'Neill
On 10/30/23 09:55, Jeff Law wrote: On 10/30/23 10:37, Patrick O'Neill wrote: GCC recently changed its register allocator which causes this testcase to fail. This patch updates the regex to be more robust to change by accepting any s register in the range of 1-9 for cm.push and cm.popret

Re: [PATCH v3] RISC-V: elide unnecessary sign extend when expanding cmp_and_jump

2023-10-30 Thread Patrick O'Neill
ment-1784446631 The patch was applied to this baseline: https://github.com/gcc-mirror/gcc/commit/c6929b085580cf00cbc52b0f5b0afe2b9caa2a22 and no new failures or resolved failures were found when running the testsuite. Tested-by: Patrick O'Neill Thanks! Patrick gcc/ChangeLog: * config

[PATCH] RISC-V: Make rv32i_zcmp testcase more robust

2023-10-30 Thread Patrick O'Neill
register in the range of 1-9 for cm.push and cm.popret insns. Signed-off-by: Patrick O'Neill --- Tested using glibc rv64gc on r14-4980-g2672c60917d. --- gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/gcc

Re: [PATCH] RISC-V: Make stack_save_restore_2 more robust

2023-10-27 Thread Patrick O'Neill
On 10/27/23 11:02, Jeff Law wrote: On 10/27/23 11:56, Patrick O'Neill wrote: GCC recently changed to emit __riscv_restore_5 which causes this testcase to fail. This patch updates the regex to be more robust to change by accepting any number after __riscv_save_ and __riscv_restore_. gcc

[PATCH] RISC-V: Make stack_save_restore_2 more robust

2023-10-27 Thread Patrick O'Neill
number after __riscv_save_ and __riscv_restore_. Signed-off-by: Patrick O'Neill --- Tested using glibc rv64gc on r14-4980-g2672c60917d. --- gcc/testsuite/gcc.target/riscv/stack_save_restore_2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target

Re: [committed] RISC-V: Make stack_save_restore tests more robust

2023-10-27 Thread Patrick O'Neill
On 8/25/23 15:36, Jeff Law wrote: Spurred by Jivan's patch and a desire for cleaner testresults, I went ahead and make the stack_save_restore tests independent of the precise stack size by using a regexp. Pushed to the trunk. Jeff Hi Jeff, A recent change that I'm still bisecting [1]

Re: [Ready to commit V3] RISC-V: Add AVL propagation PASS for RVV auto-vectorization

2023-10-26 Thread Patrick O'Neill
On 10/26/23 11:15, Robin Dapp wrote: rv32gcv: FAIL: gfortran.dg/intrinsic_pack_6.f90   -O2  execution test FAIL: gfortran.dg/intrinsic_pack_6.f90   -O3 -g  execution test FAIL: gfortran.dg/matmul_3.f90   -O2  execution test FAIL: gfortran.fortran-torture/execute/intrinsic_matmul.f90 execution, 

Re: [Ready to commit V3] RISC-V: Add AVL propagation PASS for RVV auto-vectorization

2023-10-26 Thread Patrick O'Neill
-finline-functions FAIL: gfortran.fortran-torture/execute/intrinsic_matmul.f90 execution,  -O3 -g rv64gcv: FAIL: gfortran.dg/matmul_6.f90   -O2  execution test Tested-by: Patrick O'Neill Patrick On 10/26/23 01:13, Juzhe-Zhong wrote: This patch addresses the redundant AVL/VL toggling in RVV

[Committed] RISC-V: Pass abi to g++ rvv testsuite

2023-10-26 Thread Patrick O'Neill
On 10/26/23 06:30, Jeff Law wrote: On 10/25/23 18:13, Patrick O'Neill wrote: On rv32gcv testcases like g++.target/riscv/rvv/base/bug-22.C fail with: FAIL: g++.target/riscv/rvv/base/bug-22.C (test for excess errors) Excess errors: cc1plus: error: ABI requires '-march=rv32' This patch adds

[PATCH] RISC-V: Pass abi to g++ rvv testsuite

2023-10-25 Thread Patrick O'Neill
/riscv/rvv/rvv.exp: Add -mabi argument to CFLAGS. Signed-off-by: Patrick O'Neill --- Resolved failures: FAIL: g++.target/riscv/rvv/base/bug-18.C (test for excess errors) FAIL: g++.target/riscv/rvv/base/bug-19.C (test for excess errors) FAIL: g++.target/riscv/rvv/base/bug-20.C (test for excess

Re: [PATCH] RISC-V: Add AVL propagation PASS for RVV auto-vectorization

2023-10-23 Thread Patrick O'Neill
The CI just picked it up: https://github.com/ewlu/gcc-precommit-ci/issues/449#issue-1958483272 Since it doesn't apply to the CI's baseline hash it's only performing a build. I'll re-run it in the morning once the baseline has been updated. In the meantime I started a full build+test run on my

Re: [PATCH V3 00/11] Refactor and cleanup vsetvl pass

2023-10-23 Thread Patrick O'Neill
' 'CXXFLAGS_FOR_TARGET=-Os    -mcmodel=medany' Thread model: single Supported LTO compression algorithms: zlib gcc version 14.0.0 20231023 (experimental) (g70b66ac9bcb-dirty) juzhe.zh...@rivai.ai *From:* Patrick O'Neill

Re: [PATCH V3 00/11] Refactor and cleanup vsetvl pass

2023-10-23 Thread Patrick O'Neill
' 'CXXFLAGS_FOR_TARGET=-O2    -mcmodel=medlow' On 10/23/23 15:50, 钟居哲 wrote: I didn't reproduce it. How to enable RTL checking ? juzhe.zh...@rivai.ai *From:* Patrick O'Neill <mailto:patr...@rivosinc.com> *Date:* 2023-10-24

Re: [PATCH V3 00/11] Refactor and cleanup vsetvl pass

2023-10-23 Thread Patrick O'Neill
*From:* Patrick O'Neill <mailto:patr...@rivosinc.com> *Date:* 2023-10-24 02:30 *To:* Lehua Ding <mailto:lehua.d...@rivai.ai> *CC:* kito.cheng <mailto:kito.ch...@gmail.com>; rdapp.gcc <mailto:rdapp@gmail.com>; palmer <mailto:pal...@rivosinc.com>;

Re: [PATCH V3 00/11] Refactor and cleanup vsetvl pass

2023-10-23 Thread Patrick O'Neill
FAIL: gfortran.dg/host_assoc_function_7.f90   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  execution test FAIL: gfortran.dg/host_assoc_function_7.f90   -O3 -g  execution test Thanks for the quick revision Lehua! Tested-by: Patrick O'Neill Patrick On 10/19

Re: [PATCH V3 00/11] Refactor and cleanup vsetvl pass

2023-10-19 Thread Patrick O'Neill
: gfortran.dg/host_assoc_function_7.f90   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  execution test FAIL: gfortran.dg/host_assoc_function_7.f90   -O3 -g  execution test Thanks for the quick revision Lehua! Tested-by: Patrick O'Neill Patrick On 10/19/23 01:50, 钟

Re: [PATCH V2 00/14] Refactor and cleanup vsetvl pass

2023-10-18 Thread Patrick O'Neill
: gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int_run-1.c (test for excess errors) spawn riscv64-unknown-elf-run ./cond_convert_float2int_run-1.exe bbl loader On 2023/10/18 4:25, Patrick O'Neill wrote: Hi Lehua! I ran the gcc testsuite on qemu before/after applying your patches to 305034e3

Re: [PATCH V2 00/14] Refactor and cleanup vsetvl pass

2023-10-17 Thread Patrick O'Neill
Hi Lehua! I ran the gcc testsuite on qemu before/after applying your patches to 305034e3 rv32/64gcv [1]. Baseline    = Summary of gcc testsuite =     | # of unexpected case / # of unique unexpected case     |

Re: [RFC gcc13 backport 0/3] Add Ztso atomic mappings

2023-10-10 Thread Patrick O'Neill
On 10/4/23 08:53, Jeff Law wrote: On 10/3/23 16:26, Patrick O'Neill wrote: I vaugely recall some discussion about backporting the Ztso mappings along with the RVWMO mappings. Now that the RVWMO mappings have been backported for 13.3, is there interest in also backporting the Ztso mappings

[Committed] RISC-V: Use stdint-gcc.h in rvv testsuite

2023-10-05 Thread Patrick O'Neill
Committed, thanks! Patrick On 10/5/23 17:51, Kito Cheng wrote: LGTM Patrick O'Neill 於 2023年10月6日 週五 07:46 寫道: stdint.h can be replaced with stdint-gcc.h to resolve some missing system headers in non-multilib installations. Tested using glibc rv32gcv and rv64gcv on r14-4381

[PATCH v2] RISC-V: Use stdint-gcc.h in rvv testsuite

2023-10-05 Thread Patrick O'Neill
. * gcc.target/riscv/rvv/vsetvl/pr111255.c: Ditto. * gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Ditto. Signed-off-by: Patrick O'Neill --- Changes from v1: - Avoid changing riscv_vector.h Failures looked like this: In file included from /riscv-gnu-toolchain/build/sysroot/usr/include

[Committed] RISC-V: Test memcpy inlined on riscv_v

2023-10-05 Thread Patrick O'Neill
On 10/5/23 15:14, Jeff Law wrote: On 10/4/23 16:55, Patrick O'Neill wrote: Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to perform a memcpy. We no longer expect memcpy for riscv_v targets. gcc/testsuite/ChangeLog: * gcc.dg/pr90263.c: Skip riscv_v targets

Re: [PATCH] RISC-V: xfail gcc.dg/pr90263.c for riscv_v

2023-10-05 Thread Patrick O'Neill
On 10/4/23 15:29, Jeff Law wrote: On 10/4/23 16:21, Patrick O'Neill wrote: On 10/4/23 15:14, Jeff Law wrote: On 10/4/23 15:57, Patrick O'Neill wrote: Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to perform a memcpy. We no longer expect memcpy for riscv_v targets

[PATCH v2] RISC-V: Test memcpy inlined on riscv_v

2023-10-04 Thread Patrick O'Neill
Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to perform a memcpy. We no longer expect memcpy for riscv_v targets. gcc/testsuite/ChangeLog: * gcc.dg/pr90263.c: Skip riscv_v targets. * gcc.target/riscv/rvv/base/pr90263.c: New test. Signed-off-by: Patrick

Re: [PATCH] RISC-V: xfail gcc.dg/pr90263.c for riscv_v

2023-10-04 Thread Patrick O'Neill
On 10/4/23 15:14, Jeff Law wrote: On 10/4/23 15:57, Patrick O'Neill wrote: Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to perform a memcpy. We no longer expect memcpy for riscv_v targets. gcc/testsuite/ChangeLog: * gcc.dg/pr90263.c: xfail riscv_v targets

[PATCH] RISC-V: xfail gcc.dg/pr90263.c for riscv_v

2023-10-04 Thread Patrick O'Neill
Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to perform a memcpy. We no longer expect memcpy for riscv_v targets. gcc/testsuite/ChangeLog: * gcc.dg/pr90263.c: xfail riscv_v targets. Signed-off-by: Patrick O'Neill Co-authored-by: Joern Rennecke --- gcc/testsuite

Re: [RISC-V]: Re: cpymem for RISCV with v extension

2023-10-04 Thread Patrick O'Neill
On 10/4/23 12:19, Joern Rennecke wrote: On Wed, 4 Oct 2023 at 18:38, Patrick O'Neill wrote: Hi Joern, I'm seeing new failures introduced by this patch (9464e72bcc9123b619215af8cfef491772a3ebd9). On rv64gcv: FAIL: gcc.dg/pr90263.c scan-assembler memcpy My testing didn't flag this because I

Re: [RISC-V]: Re: cpymem for RISCV with v extension

2023-10-04 Thread Patrick O'Neill
Hi Joern, I'm seeing new failures introduced by this patch (9464e72bcc9123b619215af8cfef491772a3ebd9). On rv64gcv: FAIL: gcc.dg/pr90263.c scan-assembler memcpy FAIL: gfortran.fortran-torture/execute/intrinsic_count.f90 execution,  -O2 -fomit-frame-pointer -finline-functions -funroll-loops

[RFC gcc13 backport 1/3] RISC-V: Add Ztso atomic mappings

2023-10-03 Thread Patrick O'Neill
-psabi-doc/pull/391 2023-08-08 Patrick O'Neill gcc/ChangeLog: * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as dependent on 'a' extension. * config/riscv/riscv-opts.h (MASK_ZTSO): New mask. (TARGET_ZTSO): New target. * config/riscv/riscv.cc

[RFC gcc13 backport 2/3] RISC-V: Specify -mabi for ztso testcases

2023-10-03 Thread Patrick O'Neill
On rv32 targets, this patch fixes ztso testcases errors like this: cc1: error: ABI requires '-march=rv32' 2023-08-11 Patrick O'Neill gcc/testsuite/ChangeLog: * gcc.target/riscv/amo-table-ztso-amo-add-1.c: Add -mabi=lp64d to dg-options. * gcc.target/riscv/amo-table-ztso

[RFC gcc13 backport 3/3] [RISCV][committed] Remove spurious newline in ztso sequence

2023-10-03 Thread Patrick O'Neill
easily missed it. Regardless, fixing the extraneous newline is easy :-) gcc/ * config/riscv/sync-ztso.md (atomic_load_ztso): Avoid extraenous newline. Signed-off-by: Patrick O'Neill --- gcc/config/riscv/sync-ztso.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[RFC gcc13 backport 0/3] Add Ztso atomic mappings

2023-10-03 Thread Patrick O'Neill
][committed] Remove spurious newline in ztso sequence Patrick O'Neill (2): RISC-V: Add Ztso atomic mappings RISC-V: Specify -mabi for ztso testcases gcc/common/config/riscv/riscv-common.cc | 6 + gcc/config/riscv/riscv-opts.h | 4 + gcc/config/riscv/riscv.cc

[Committed] RISC-V: Unescape chars in pr111566.f90 test

2023-10-03 Thread Patrick O'Neill
On 10/3/23 14:55, Jeff Law wrote: On 10/3/23 14:19, Patrick O'Neill wrote: Some characters are escaped which causes the testcase to fail. This patch restores the original characters. Tested for regressions using multilib rv32gcv-ilp32d, rv64gcv-lp64d. gcc/testsuite/ChangeLog

Re: [PATCH] RISC-V: Use stdint-gcc.h in rvv testsuite

2023-10-03 Thread Patrick O'Neill
On 10/2/23 06:57, Kito Cheng wrote: On Tue, Sep 26, 2023 at 10:59 AM Patrick O'Neill wrote: stdint.h can be replaced with stdint-gcc.h to resolve some missing system headers in non-multilib installations. Tested using glibc rv32gcv and rv64gcv on r14-4258-gc9837443075. gcc/ChangeLog

[PATCH] RISC-V: Unescape chars in pr111566.f90 test

2023-10-03 Thread Patrick O'Neill
. Signed-off-by: Patrick O'Neill --- gcc/testsuite/gcc.target/riscv/rvv/fortran/pr111566.f90 | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/fortran/pr111566.f90 b/gcc/testsuite/gcc.target/riscv/rvv/fortran/pr111566.f90 index 265e913b299

[Committed] RISC-V: Use safe_grow_cleared for vector info [PR111469]

2023-09-30 Thread Patrick O'Neill
Committed. Thanks Juzhe! I had to adjust the changelog's PR formatting to get the pre-commit hooks to accept it. Here's the committed patch: From f446cf5d58568e406cc81f434a63b3045942e9a9 Mon Sep 17 00:00:00 2001 From: Patrick O'Neill Date: Sat, 30 Sep 2023 15:50:11 -0700 Subject: [PATCH

[PATCH] RISC-V: Use safe_grow_cleared for vector info [PR111469]

2023-09-30 Thread Patrick O'Neill
Resolves a riscv*-*-* bootstrap failure due to a newly-turned-on assert. 2023-09-30 Jakub Jelinek PR target/111649 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager): Replace safe_grow with safe_grow_cleared. ---

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