Hi,
This patch adds a change entry for the ACLE Coprocessor Intrinsics in
the ARM section.
Is this OK?
Cheers,
Andre
? coprocessor_changes.patch
? htdocs/gcc-7/.changes.html.swp
cvs diff: Diffing .
cvs diff: Diffing bin
cvs diff: Diffing cgi-bin
cvs diff: Diffing htdocs
cvs diff: Diffing
On 05/01/17 11:11, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 09/11/16 10:12, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
>> intrinsics. See below a table mapping the intrinsics to
On 05/01/17 11:08, Kyrill Tkachov wrote:
>
> On 09/11/16 10:12, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
>> intrinsics. See below a table mapping the intrinsics to th
On 05/01/17 11:02, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 09/11/16 10:12, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch implements support for the ARM ACLE Coprocessor LDC and STC
>> intrinsics. See below a table mapping the intrinsics to
On 05/01/17 10:44, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch implements support for the ARM ACLE Coprocessor CDP
>> intrinsics. See below a table mapping the intrinsics to
On 05/01/17 10:27, Kyrill Tkachov wrote:
>
> On 05/12/16 15:05, Andre Vieira (lists) wrote:
>> On 01/12/16 17:25, Andre Vieira (lists) wrote:
>>> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>>>> Hi,
>>>>
>>>> This patch refactors th
On 09/12/16 16:31, Bernd Schmidt wrote:
> On 12/09/2016 05:16 PM, Andre Vieira (lists) wrote:
>
>> Regardless, 'reload_cse_simplify' would never perform the opposite
>> transformation. It checks whether it can replace anything within the
>> first argument INSN, with the
On 04/01/17 11:30, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 04/01/17 11:21, Andre Vieira (lists) wrote:
>> Hello,
>>
>> This patch adds the attribute "warn_unused_result" to the following
>> intrinsics:
>> __cmse_TT{,A,AT,T}_
_unused_result attribute to function declaration.
gcc/testsuite/ChangeLog:
2017-01-04 Andre Vieira <andre.simoesdiasvie...@arm.com>
* gcc.target/arm/cmse/cmse-3.c: Add warning tests for the
warn_unused_result warning.
diff --git a/gcc/config/arm/ar
On 29/11/16 09:45, Andre Vieira (lists) wrote:
> On 17/11/16 10:00, Ramana Radhakrishnan wrote:
>> On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists)
>> <andre.simoesdiasvie...@arm.com> wrote:
>>> Hello,
>>>
>>> This patch tackles the issue repor
On 12/12/16 14:20, Andre Vieira (lists) wrote:
> On 21/06/16 15:16, Andre Vieira (lists) wrote:
>> Hello,
>>
>> After some changes to GCC this test no longer tests the desired code
>> generation behavior. The generated assembly is better than it used to
>> be, b
, i.e. 'bl?' rather than 'b'.
The test is really to make sure a direct call is not turned into an
indirect call.
gcc/testsuite/ChangeLog:
2016-12-20 Andre Vieira <andre.simoesdiasvie...@arm.com>
* gcc.target/arm/pr78255-2.c: Fix to work for targets
that do not optimize for tailcall.
diff --g
will be changing the patch for trunk to reflect these findings, even
though this did not show up during trunk testing.
Tested with various arm-none-eabi configurations: -mcpu=cortex-m0/m3/m7
and -march=armv8-m.baseline.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-12-14 Andre Vieira <andre.simoesdias
Hi,
It seems I backported the wrong versions of the testcases to
embedded-6-branch. Fixed them with this patch.
Cheers,
Andre
gcc/testsuite/ChangeLog.arm:
2016-12-14 Andre Vieira <andre.simoesdiasvie...@arm.com>
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Fix tes
On 21/06/16 15:16, Andre Vieira (lists) wrote:
> Hello,
>
> After some changes to GCC this test no longer tests the desired code
> generation behavior. The generated assembly is better than it used to
> be, but it has become too smart. I add an extra parameter to make sure
>
Hi
I backported this patch to the embedded-6-branch in revision r243496.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-12-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
Backport from mainline
2016-12-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
PR rtl-
On 09/12/16 16:02, Ramana Radhakrishnan wrote:
> On Fri, Dec 9, 2016 at 3:58 PM, Bernd Schmidt <bschm...@redhat.com> wrote:
>> On 12/09/2016 04:34 PM, Andre Vieira (lists) wrote:
>>
>>> Regardless, the other testcases I add in this patch show a sub-optimal
>>
On 09/12/16 15:02, Bernd Schmidt wrote:
> On 12/09/2016 03:03 PM, Andre Vieira (lists) wrote:
>> This patch fixes the issue reported in PR78255 by making postreload
>> aware it should not be performing CSE on functions if NO_FUNCTION_CSE is
>> defined to true.
>>
>&
on arm-none-eabi.
Is this OK for trunk?
Cheers,
Andre
gcc/ChangeLog
2016-12-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
PR rtl-optimization/78255
* gcc/postreload.c (reload_cse_simplify): Do not CSE a function if
NO_FUNCTION_CSE is true.
gcc/testsuite/Cha
On 29/11/16 09:45, Andre Vieira (lists) wrote:
> On 17/11/16 10:00, Ramana Radhakrishnan wrote:
>> On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists)
>> <andre.simoesdiasvie...@arm.com> wrote:
>>> Hello,
>>>
>>> This patch tackles the issue repor
On 05/12/16 11:52, Andre Vieira (lists) wrote:
> On 09/11/16 10:12, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
>> intrinsics. See below a table mapping the intrinsics to their
On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor LDC and STC
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 09/11/16 10:11, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor CDP
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 05/12/16 15:05, Andre Vieira (lists) wrote:
> On 01/12/16 17:25, Andre Vieira (lists) wrote:
>> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> This patch refactors the implementation of the ARM ACLE CRC builtins to
>>> use the bu
On 01/12/16 17:25, Andre Vieira (lists) wrote:
> On 17/11/16 10:42, Kyrill Tkachov wrote:
>> Hi Andre,
>>
>> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> Refactor NEON builtin framework such that it can be used to implement
gt; moved from arm_expand_neon_builtin with some white-space fixes.
>> (arm_expand_neon_builtin): Move code into the standalone function
>> arm_expand_neon_builtin_1.
>>
>
Hi,
Backported this to embedded-6-branch in revision r.
gcc/ChangeLog.arm:
On 01/12/16 17:25, Andre Vieira (lists) wrote:
> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch refactors the implementation of the ARM ACLE CRC builtins to
>> use the builtin framework.
>>
>> Is this OK for trunk?
>>
>>
On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
>
> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
> intrinsics. See below a table mapping the intrinsics to their respective
&g
On 30/11/16 12:06, Andre Vieira (lists) wrote:
> Hi,
>
> I changed the testcase with this patch since the old testcase was
> casting a function pointer to another function pointer and using that
> pointer to call the function. This is undefined behavior. The new test
> reflec
On 02/12/16 13:41, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 02/12/16 13:36, Andre Vieira (lists) wrote:
>> On 23/11/16 11:53, Andre Vieira (lists) wrote:
>>> On 11/11/16 16:19, Kyrill Tkachov wrote:
>>>> And CC'ing Ramana and Richard this time...
>>>
On 30/11/16 17:22, Kyrill Tkachov wrote:
>
> On 30/11/16 12:05, Andre Vieira (lists) wrote:
>> Hi,
>>
>> I got a bug report against the old version of this patch and fixed it
>> here. This had to do with GCC optimizations sharing types with and
>> without
On 30/11/16 17:22, Kyrill Tkachov wrote:
>
> On 30/11/16 15:32, Andre Vieira (lists) wrote:
>> On 23/11/16 11:52, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> After some extra testing I realized there was an issue with the way we
>>
On 27/10/16 10:55, Andre Vieira (lists) wrote:
> On 26/10/16 11:03, Kyrill Tkachov wrote:
>> Hi Andre,
>>
>> On 25/10/16 17:28, Andre Vieira (lists) wrote:
>>> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>>>> This patch extends s
On 27/10/16 11:19, Kyrill Tkachov wrote:
>
> On 27/10/16 10:54, Andre Vieira (lists) wrote:
>> On 26/10/16 17:28, Kyrill Tkachov wrote:
>>> On 26/10/16 17:28, Andre Vieira (lists) wrote:
>>>> On 26/10/16 10:33, Kyrill Tkachov wrote:
>>>>> +static t
On 27/10/16 11:01, Kyrill Tkachov wrote:
>
> On 27/10/16 10:53, Andre Vieira (lists) wrote:
>> On 26/10/16 14:00, Kyrill Tkachov wrote:
>>> On 26/10/16 10:12, Kyrill Tkachov wrote:
>>>> Hi Andre, thanks for resending them.
>>>>
>>>> On 25/1
On 02/12/16 21:16, Jeff Law wrote:
>
> Trying to build arm-netbsdelf:
>
> g++ -fno-PIE -c -g -O2 -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE
> -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall
> -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute
>
On 23/11/16 11:53, Andre Vieira (lists) wrote:
> On 11/11/16 16:19, Kyrill Tkachov wrote:
>> And CC'ing Ramana and Richard this time...
>>
>
> Hi,
>
> After some extra testing I found that the sibcall optimization was not
> disabled for calls to function pointer
On 09/11/16 10:11, Andre Vieira (lists) wrote:
> Hi,
>
> This patch refactors the implementation of the ARM ACLE CRC builtins to
> use the builtin framework.
>
> Is this OK for trunk?
>
> Regards,
> Andre
>
> gcc/ChangeLog
> 2016-11-09 Andre Vie
On 17/11/16 10:42, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>> Hi,
>>
>> Refactor NEON builtin framework such that it can be used to implement
>> other builtins.
>>
>> Is this OK for trunk?
>>
>
On 23/11/16 11:52, Andre Vieira (lists) wrote:
> Hi,
>
> After some extra testing I realized there was an issue with the way we
> were clearing registers when returning from a cmse_nonsecure_entry
> function for ARMv8-M.Baseline. This patch fixes that and changes the
>
Hi,
I changed the testcase with this patch since the old testcase was
casting a function pointer to another function pointer and using that
pointer to call the function. This is undefined behavior. The new test
reflects a more sane use of the intrinsics.
Cheers,
Andre
diff --git
of TARGET_COMP_TYPE_ATTRIBUTES, deny compatibility
between function types with the attribute and without.
I added a test case to test the issue solved with these changes.
*** gcc/ChangeLog ***
2016-11-xx Andre Vieira<andre.simoesdiasvie...@arm.com>
Thomas Preud'homme <thoma
On 29/11/16 10:37, Kyrill Tkachov wrote:
>
> On 29/11/16 10:35, Andre Vieira (lists) wrote:
>> On 21/11/16 08:42, Christophe Lyon wrote:
>>> Hi,
>>>
>>>
>>> On 17 November 2016 at 11:45, Kyrill Tkachov
>>> <kyrylo.tkac...@foss.arm.co
On 21/11/16 08:42, Christophe Lyon wrote:
> Hi,
>
>
> On 17 November 2016 at 11:45, Kyrill Tkachov
> <kyrylo.tkac...@foss.arm.com> wrote:
>>
>> On 17/11/16 10:31, Andre Vieira (lists) wrote:
>>>
>>> Hi Kyrill,
>>>
>>> On 17/1
On 17/11/16 10:00, Ramana Radhakrishnan wrote:
> On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists)
> <andre.simoesdiasvie...@arm.com> wrote:
>> Hello,
>>
>> This patch tackles the issue reported in PR71607. This patch takes a
>> different approach for dis
nction wrapper to be
skipped. This would result in an illegal branch into secure memory and
would HardFault.
Added a test.
Is this OK?
Cheers,
Andre
*** gcc/ChangeLog ***
2016-11-xx Andre Vieira<andre.simoesdiasvie...@arm.com>
Thomas Preud'homme <thomas.pre
Hi,
After some extra testing I realized there was an issue with the way we
were clearing registers when returning from a cmse_nonsecure_entry
function for ARMv8-M.Baseline. This patch fixes that and changes the
testcase to catch the issue.
The problem was I was always using LR to clear the
Hi,
I added the description of the new ARM -mpure-code option to changes.html.
Is this OK?
Cheers,
Andre
Index: htdocs/gcc-7/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/changes.html,v
retrieving revision 1.24
diff -u
Hi Kyrill,
On 17/11/16 10:11, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 09/11/16 10:00, Andre Vieira (lists) wrote:
>>
>> Tested the series by bootstrapping arm-none-linux-gnuabihf and found no
>> regressions, also did a normal build for arm-none-eabi and ran the
>
> Why are you writing 1.0 to clear the register? I think you want
> CONST0_RTX (DFmode)
> and CONST0_RTX (SFmode).
>
> Also, in this function when you iterate from regno = 0 up to some
> number, please use
> regno = R0_REGNUM (minor nit).
>
> Thanks,
> Kyrill
>
>
Hi Kyrill,
So you got me
On 10/11/16 14:54, Andre Vieira (lists) wrote:
> Hi,
>
> As reported in PR78255 there is currently an issue with indirect sibling
> calls in ARM when the address of the sibling call is loaded into 'r3'
> and that same register is chosen to align the stack. See the repor
to be
loaded into a register, but I do not know what a sane way would be to
ensure this.
Regards,
Andre
gcc/ChangeLog
2016-11-10 Andre Vieira <andre.simoesdiasvie...@arm.com>
* config/arm/arm.md (sibcall_internal): Add 'use' to pattern.
(sibcall_value_internal): Li
On 27/10/16 11:01, Andre Vieira (lists) wrote:
> On 25/10/16 17:30, Andre Vieira (lists) wrote:
>> On 24/08/16 12:01, Andre Vieira (lists) wrote:
>>> On 25/07/16 14:26, Andre Vieira (lists) wrote:
>>>> This patch extends support for the ARMv8-M Security Extensions
>
On 09/11/16 10:26, Kyrill Tkachov wrote:
>
> @@ -1832,6 +1834,17 @@ arm_init_builtins (void)
> = add_builtin_function ("__builtin_arm_stfscr", ftype_set_fpscr,
> ARM_BUILTIN_SET_FPSCR, BUILT_IN_MD, NULL, NULL_TREE);
> }
> +
> + if (arm_arch_cmse)
> +{
> + tree
?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
* config/arm/arm.md (): New.
(): New.
* config/arm/arm.c (arm_arch5te): New.
(arm_option_override): Set arm_arch5te.
(arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
and
'unsigned int'. We do some
boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31],opc2:[0-7]. If
either of these requirements are not met a diagnostic is issued.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
* config/arm/
boundary checks for coproc:[0-15], CR*:[0-31]. If either of these
requirements are not met a diagnostic is issued.
Is this ok for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
* config/arm/arm.md (*ldcstc): New.
(): New.
* config/arm
.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog:
2016-11-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
* config/arm/arm.md (): New.
* config/arm/arm.c (neon_const_bounds): Rename this ...
(arm_const_bounds): ... this.
(arm_coproc_builtin_available): New.
* config/a
Hi,
Refactor NEON builtin framework such that it can be used to implement
other builtins.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog
2016-11-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
* config/arm/arm-builtins.c (neon_builtin_datum): Rename to ..
(arm_builtin
Hi,
This patch refactors the implementation of the ARM ACLE CRC builtins to
use the builtin framework.
Is this OK for trunk?
Regards,
Andre
gcc/ChangeLog
2016-11-09 Andre Vieira <andre.simoesdiasvie...@arm.com>
* config/arm/arm-builtins.c (arm_unsigned_binop_qualifiers
for arm-none-eabi and ran the
acle.exp tests for a Cortex-M3.
(6) Andre Vieira
Refactor NEON builtin framework to work for other builtins
Move CRC builtins to refactored framework
Implement support for ACLE Coprocessor CDP intrinsics
Implement support for ACLE Coprocessor LDC and STC intrinsics
Hi,
Backported the support for the ARM -mpure-code option, including the
follow-up fixes to the embedded-6-branch. Tested for arm-none-eabi.
Committed in revision r241970.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-11-08 Andre Vieira <andre.simoesdiasvie...@arm.com>
Backport from ma
On 21/10/16 09:55, Andre Vieira (lists) wrote:
> On 06/10/16 14:57, Andre Vieira (lists) wrote:
>> Hello,
>>
>> This patch tackles the issue reported in PR71607. This patch takes a
>> different approach for disabling the creation of literal pools. Instead
>> of
Hi,
I backported this
https://gcc.gnu.org/ml/gcc-patches/2016-05/msg02196.html to the
embedded-6-branch. Tested on arm-none-eabi.
Committed in revision r241960.
Cheers,
Andre
gcc/ChangeLog.arm:
2016-11-08 Andre Vieira <andre.simoesdiasvie...@arm.com>
Backport from ma
On 27/10/16 11:44, Kyrill Tkachov wrote:
>
> On 27/10/16 11:00, Andre Vieira (lists) wrote:
>> On 26/10/16 17:30, Kyrill Tkachov wrote:
>>> On 26/10/16 17:26, Andre Vieira (lists) wrote:
>>>> On 26/10/16 13:51, Kyrill Tkachov wrote:
>>>>> Hi An
On 25/10/16 17:30, Andre Vieira (lists) wrote:
> On 24/08/16 12:01, Andre Vieira (lists) wrote:
>> On 25/07/16 14:26, Andre Vieira (lists) wrote:
>>> This patch extends support for the ARMv8-M Security Extensions
>>> 'cmse_nonsecure_call' to
On 25/10/16 17:29, Andre Vieira (lists) wrote:
> On 24/08/16 12:01, Andre Vieira (lists) wrote:
>> On 25/07/16 14:25, Andre Vieira (lists) wrote:
>>> This patch adds support for the ARMv8-M Security Extensions
>>> 'cmse_nonsecure_call' attribute. This attribute may on
On 26/10/16 17:30, Kyrill Tkachov wrote:
>
> On 26/10/16 17:26, Andre Vieira (lists) wrote:
>> On 26/10/16 13:51, Kyrill Tkachov wrote:
>>> Hi Andre,
>>>
>>> On 25/10/16 17:29, Andre Vieira (lists) wrote:
>>>> On 24/08/16 12:01, Andre Vieira (
On 26/10/16 11:03, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 25/10/16 17:28, Andre Vieira (lists) wrote:
>> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>>> This patch extends support for the ARMv8-M Security Extensions
>>> 'cmse_nonsecure_entry' attribute in
On 26/10/16 17:28, Kyrill Tkachov wrote:
>
> On 26/10/16 17:28, Andre Vieira (lists) wrote:
>> On 26/10/16 10:33, Kyrill Tkachov wrote:
>>> +static tree
>>> +arm_handle_cmse_nonsecure_entry (tree *node, tree name,
>>> + tree /* args
On 26/10/16 14:00, Kyrill Tkachov wrote:
>
> On 26/10/16 10:12, Kyrill Tkachov wrote:
>> Hi Andre, thanks for resending them.
>>
>> On 25/10/16 17:26, Andre Vieira (lists) wrote:
>>> On 24/08/16 12:00, Andre Vieira (lists) wrote:
>>>>
On 26/10/16 10:33, Kyrill Tkachov wrote:
>
> +static tree
> +arm_handle_cmse_nonsecure_entry (tree *node, tree name,
> + tree /* args */,
> + int /* flags */,
> + bool *no_add_attrs)
> +{
> + tree fndecl;
> +
> + if (!use_cmse)
> +{
> +
On 26/10/16 13:51, Kyrill Tkachov wrote:
> Hi Andre,
>
> On 25/10/16 17:29, Andre Vieira (lists) wrote:
>> On 24/08/16 12:01, Andre Vieira (lists) wrote:
>>> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>>>> This patch extends support
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:28, Andre Vieira (lists) wrote:
>> This patch adds support ARMv8-M's Security Extension's
>> cmse_nonsecure_caller intrinsic. This intrinsic is used to check whether
>> an entry function was called from a non
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:26, Andre Vieira (lists) wrote:
>> This patch extends support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_call' to use a new library function
>> '__gnu_cmse_nonsecure_call'. This library fu
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:25, Andre Vieira (lists) wrote:
>> This patch adds support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_call' attribute. This attribute may only be used for
>> function types and when used in combina
On 24/08/16 12:01, Andre Vieira (lists) wrote:
> On 25/07/16 14:23, Andre Vieira (lists) wrote:
>> This patch extends support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_entry' attribute to safeguard against leak of
>> information through unbanked registers.
>
On 25/07/16 14:23, Andre Vieira (lists) wrote:
> This patch extends support for the ARMv8-M Security Extensions
> 'cmse_nonsecure_entry' attribute in two ways:
>
> 1) Generate two labels for the function, the regular function name and
> one with the function's name appended
On 24/08/16 12:00, Andre Vieira (lists) wrote:
> On 25/07/16 14:21, Andre Vieira (lists) wrote:
>> This patch adds support for the ARMv8-M Security Extensions
>> 'cmse_nonsecure_entry' attribute. In this patch we implement the
>> attribute handling and diagnosis around the a
On 24/08/16 12:00, Andre Vieira (lists) wrote:
> On 25/07/16 14:19, Andre Vieira (lists) wrote:
>> This patch adds the support of the '-mcmse' option to enable ARMv8-M's
>> Security Extensions and supports the following intrinsics:
>> cmse_TT
>> cmse_TT_fptr
&
On 21/10/16 16:14, Jakub Jelinek wrote:
> On Fri, Oct 21, 2016 at 03:57:34PM +0100, Yao Qi wrote:
>> Hi Jakub,
>>
>> On Thu, Oct 20, 2016 at 5:21 PM, Andre Vieira (lists)
>> <andre.simoesdiasvie...@arm.com> wrote:
>>> <2><8f5>: Abbrev Number:
Hello,
I noticed I forgot to restore the changed global values in
pure-code.exp. Failing to restore them could influence subsequent testing.
Committed this as obvious in revision r241466.
Cheers,
Andre
gcc/testsuite/ChangeLog:
2016-10-24 Andre Vieira <andre.simoesdiasvie...@arm.
On 06/10/16 14:57, Andre Vieira (lists) wrote:
> Hello,
>
> This patch tackles the issue reported in PR71607. This patch takes a
> different approach for disabling the creation of literal pools. Instead
> of disabling the patterns that would normally transform the rtl into
> ac
On 13/10/16 20:34, Jason Merrill wrote:
> On Tue, Oct 11, 2016 at 9:39 AM, Jakub Jelinek wrote:
>
>> And, as mentioned in the DWARF mailing list, I think we should emit
>> DW_AT_inline on the inline vars (both explicit and implicit - static
>> constexpr data members in C++17
On 09/09/16 15:32, Andre Vieira (lists) wrote:
> On 27/05/16 15:51, Ulrich Weigand wrote:
>> Andre Vieira (lists) wrote:
>>> On 07/04/16 10:30, Andre Vieira (lists) wrote:
>>>> On 17/03/16 16:33, Andre Vieira (lists) wrote:
>>>>> On 23/10/15 12:31, Be
'.
Is this OK for trunk?
Ran these tests for a ARMv7-A.
Cheers,
Andre
gcc/testsuite/ChangeLog:
2016-10-14 Andre Vieira <andre.simoesdiasvie...@arm.com>
* gcc.target/arm/pure-code/pure-code.exp: Adjust targets to test for.
>From a5f9063dd8e3c6405c40a7e99d0bf322dc6d58a9 Mon Sep 17
2016-10-06 Andre Vieira <andre.simoesdiasvie...@arm.com>
PR target/71607
* config/arm/arm.md (use_literal_pool): Remove.
(64-bit immediate split): No longer take cost into consideration
if 'arm_disable_literal_pool' is enabled.
(32-bit const split): Remove SImode from
On 04/10/16 14:24, mickael guene wrote:
> Hi Andre,
>
> I can't see new testsuite files in trunk :
> gcc.target/arm/pure-code/ffunction-sections.c
> gcc.target/arm/pure-code/no-literal-pool.c
> gcc.target/arm/pure-code/pure-code.exp
>
> It seems you forgot to include them in your patch.
> Can
Hi Jonathan,
On 27/09/16 16:11, Jonathan Wakely wrote:
>
> The test might not be very good, but tests some small integer values
> and some other values where accuracy is lost for one or other of the
> alternative implementations mentioned above. If this FAILs for some
> 32-bit targets we might
On 22/09/16 16:04, Andre Vieira (lists) wrote:
> On 22/09/16 14:52, Richard Earnshaw (lists) wrote:
>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>> On 07/07/16 13:30, mickael guene wrote:
>>>> Hi Andre,
>>>>
>>>> Another feedback on
On 23/09/16 09:33, Andre Vieira (lists) wrote:
> On 23/09/16 02:21, Sandra Loosemore wrote:
>> On 09/22/2016 07:52 AM, Richard Earnshaw (lists) wrote:
>>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>>> +
>>>> diff --git a/
On 23/09/16 11:04, Jakub Jelinek wrote:
> On Thu, Sep 22, 2016 at 10:37:21PM +0200, Uros Bizjak wrote:
>> diff --git a/gcc/hooks.c b/gcc/hooks.c
>> index
>> 99ec4014adb6fcbb073bf538dd00fe8695ee6cb2..1e925645c3173f8d97e104b9b2f480fca2ede438
>> 100644
>> --- a/gcc/hooks.c
>> +++ b/gcc/hooks.c
>> @@
On 23/09/16 02:21, Sandra Loosemore wrote:
> On 09/22/2016 07:52 AM, Richard Earnshaw (lists) wrote:
>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>> +
>>> diff --git a/gcc/target.def b/gcc/target.def
>>> index
>>
On 22/09/16 16:28, Richard Earnshaw (lists) wrote:
> On 22/09/16 16:04, Andre Vieira (lists) wrote:
>>
>> I reworked the patch according to the comments above.
>>
>> Is this OK?
>>
>> gcc/ChangeLog:
>> 2016-09-22 Andre Vieira <andre.simoesdias
On 22/09/16 14:52, Richard Earnshaw (lists) wrote:
> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>> On 07/07/16 13:30, mickael guene wrote:
>>> Hi Andre,
>>>
>>> Another feedback on your purecode patch.
>>> You have to disable casesi patte
On 30/08/16 09:01, Andre Vieira (lists) wrote:
> On 11/08/16 15:13, Andre Vieira (lists) wrote:
>> On 25/07/16 11:52, Andre Vieira (lists) wrote:
>>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>>> On 07/07/16 13:30, mickael guene wrote:
>>>>> Hi
On 26/08/16 18:56, Tim Shen wrote:
>>
>> Adding '#include ' to
>> 'include/c++/7.0.0/variant' "fixes" that. Not sure its the right
>> approach though.
>
> Why not?
>
I'm not saying its the wrong approach, I'm just saying thats the first
thing I tried and it "seemed" to solve it but I didnt
On 27/05/16 15:51, Ulrich Weigand wrote:
> Andre Vieira (lists) wrote:
>> On 07/04/16 10:30, Andre Vieira (lists) wrote:
>>> On 17/03/16 16:33, Andre Vieira (lists) wrote:
>>>> On 23/10/15 12:31, Bernd Schmidt wrote:
>>>>> On 10/12/2015 11:58 AM, U
On 11/08/16 15:13, Andre Vieira (lists) wrote:
> On 25/07/16 11:52, Andre Vieira (lists) wrote:
>> On 11/07/16 17:56, Andre Vieira (lists) wrote:
>>> On 07/07/16 13:30, mickael guene wrote:
>>>> Hi Andre,
>>>>
>>>> Another feedback on your pu
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