Re: [PATCH] handle local aggregate initialization in strlen (PR 83821)

On 05/23/2018 08:57 AM, Jeff Law wrote: On 05/10/2018 04:05 PM, Marc Glisse wrote: On Thu, 10 May 2018, Martin Sebor wrote: Can you please comment/respond to Jeff's question below and confirm whether my understanding of the restriction (below) is correct? I don't remember it at all, I

Re: [PATCH] PR target/85358: Add target hook to prevent default widening

On Wed, 23 May 2018, Michael Meissner wrote: > One of the problems I've faced over the years is the assumption that there is > only one type for a given size, and that isn't true for IF/KF/TFmode. I think that's a different problem. The problem here is that "wider" is only a partial ordering

Re: [PATCH] PR target/85358: Add target hook to prevent default widening

On Wed, 23 May 2018, Richard Biener wrote: > Yeah. Not sure if we need sth other than FLOAT_MODE or if avoiding the > chaining in wider mode and friends is enough. I guess one could also > change IFmode to be a non-scalar, composite mode - a different 'kind' of > complex mode maybe... I'm

Re: [PATCH 1/2] Introduce prefetch-minimum stride option

On Tue, May 22, 2018 at 11:55 AM, Luis Machado wrote: > > > On 05/16/2018 08:18 AM, Luis Machado wrote: >> >> >> >> On 05/16/2018 06:08 AM, Kyrill Tkachov wrote: >>> >>> >>> On 15/05/18 12:12, Luis Machado wrote: Hi, On 05/15/2018 06:37 AM, Kyrill

Re: C++ PATCH for c++/85847, ICE with template_id_expr in new()

On Wed, May 23, 2018 at 03:24:20PM -0400, Jason Merrill wrote: > On Wed, May 23, 2018 at 2:50 PM, Marek Polacek wrote: > > On Wed, May 23, 2018 at 12:45:11PM -0400, Jason Merrill wrote: > >> On Wed, May 23, 2018 at 9:46 AM, Marek Polacek wrote: > >> > The

Re: [PATCH] Fix PR85834

> I'm not quite sure that ao_ref with offset % 8 == 0 but size != maxsize > has any guarantee that all accesses that this covers are aligned to 8 > bits but I failed to create a testcase with a variable bit-alignment. > But I'm quite sure Ada can do that, right? There may be existing code > that

Re: [PATCH] testsuite: Introduce be/le selectors

On 22/05/18 22:21, Jeff Law wrote: > On 05/21/2018 03:46 PM, Segher Boessenkool wrote: >> This patch creates "be" and "le" selectors, which can be used by all >> architectures, similar to ilp32 and lp64. >> >> Is this okay for trunk? >> >> >> Segher >> >> >> 2017-05-21 Segher Boessenkool

Re: Fix SLP def type when computing masks (PR85853)

On Wed, May 23, 2018 at 8:41 AM Richard Sandiford < richard.sandif...@linaro.org> wrote: > In this PR, SLP failed to include a comparison node in the SLP > tree and so marked the node as external. It then went on to call > vect_is_simple_use on the comparison with its STMT_VINFO_DEF_TYPE > still

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support.

On 23/05/18 05:54, Zhangshaokun wrote: Hi Kyrill, On 2018/5/22 18:52, Kyrill Tkachov wrote: Hi Shaokun, On 22/05/18 09:40, Shaokun Zhang wrote: This patch adds HiSilicon's an mcpu: tsv110. --- gcc/ChangeLog| 9 +++ gcc/config/aarch64/aarch64-cores.def |

Re: [PATCH] PR target/85358: Add target hook to prevent default widening

On Tue, 22 May 2018, Michael Meissner wrote: > I posted this patch at the end of GCC 8 as a RFC. Now that we are in GCC 9, I > would like to repose it. Sorry to spam some of you. It is unclear whom the > reviewers for things like target hooks and basic mode handling are. > > Here is the

RE: [RFT PATCH, AVX512]: Implement scalar float->unsigned int truncations with AVX512F

> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Uros Bizjak > Sent: Monday, May 21, 2018 9:55 PM > To: gcc-patches@gcc.gnu.org > Cc: Jakub Jelinek ; Kirill Yukhin > > Subject: Re: [RFT PATCH, AVX512]:

Re: [PATCH] Fix PR85834

On Wed, 23 May 2018, Eric Botcazou wrote: > > I'm not quite sure that ao_ref with offset % 8 == 0 but size != maxsize > > has any guarantee that all accesses that this covers are aligned to 8 > > bits but I failed to create a testcase with a variable bit-alignment. > > But I'm quite sure Ada can

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support.

Hi Kyrill, On 2018/5/23 16:08, Kyrill Tkachov wrote: > > On 23/05/18 05:54, Zhangshaokun wrote: >> Hi Kyrill, >> >> On 2018/5/22 18:52, Kyrill Tkachov wrote: >>> Hi Shaokun, >>> >>> On 22/05/18 09:40, Shaokun Zhang wrote: This patch adds HiSilicon's an mcpu: tsv110. ---

Re: [Libgomp, Fortran] Fix canadian cross build

> On Jun 23, 2017, at 4:44 PM, Yvan Roux wrote: > > Hello, > > Fortran parts of libgomp (omp_lib.mod, openacc.mod, etc...) are > missing in a canadian cross build, at least when target gfortran > compiler comes from PATH and not from GFORTRAN_FOR_TARGET. > > Back in 2010,

Re: [PATCH] Fix PR85712 (SLSR cleanup of alternative interpretations)

On Tue, May 22, 2018 at 11:37 PM Bill Schmidt wrote: > Hi, > PR85712 shows where an existing test case fails in the SLSR pass because > the code is flawed that cleans up alternative interpretations (CAND_ADD > versus CAND_MULT, for example) after a replacement. This

[PATCH, AVX512]: Fix cvtusi264 insn mnemonic

Hello! With current insn mnemonic and ATT assembler dialect, there is no way for the assembler to distinguish between DImode and SImode instruction when memory input operand is used. The dump for 32bit memory reads as: 0: 62 f1 7e 08 7b 05 00vcvtusi2ss 0x0(%rip),%xmm0,%xmm0 7: 00

[PATCH] More memset VN improvements

We can handle arbitrary constants by using native_interpret_expr for byte-aligned re-interpretations. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk. For the testcase we now reflect on the GIMPLE level what we did on the RTL level before. Richard. >From

Re: Replace FMA_EXPR with one internal fn per optab

"H.J. Lu" writes: > On Thu, May 17, 2018 at 1:56 AM, Richard Sandiford > wrote: >> Richard Biener writes: @@ -2698,23 +2703,26 @@ convert_mult_to_fma_1 (tree mul_result, } >>> if

GCC 8 backports

Hi. I'm going to backport following 2 revisions. Patches can bootstrap on x86_64-linux-gnu and survive regression tests. Martin >From 3308817aa11be9d43cd564d249dae1c28bf41015 Mon Sep 17 00:00:00 2001 From: marxin Date: Fri, 11 May 2018 07:37:35 +

[PATCH] Disable strict-overflow warnings from data-ref code

This silences an unhelpful warning about strict-overflow for the samba build. The warning is emitted from tree-data-ref.c:create_intersect_range_checks and ends up in the default input_location which is just the function scope. Bootstrapped and tested on x86_64-unknown-linux-gnu, will apply to

Re: PING^2: [PATCH] Don't mark IFUNC resolver as only called directly

> On Tue, May 22, 2018 at 9:21 AM, Jan Hubicka wrote: > >> > > class ipa_opt_pass_d; > >> > > typedef ipa_opt_pass_d *ipa_opt_pass; > >> > > @@ -2894,7 +2896,8 @@ > >> > > cgraph_node::only_called_directly_or_aliased_p (void) > >> > > &&

RE: [RFT PATCH, AVX512]: Implement scalar unsigned int->float conversions with AVX512F

> From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Tuesday, May 22, 2018 8:43 PM > To: gcc-patches@gcc.gnu.org > Cc: Peryt, Sebastian ; Jakub Jelinek > > Subject: [RFT PATCH, AVX512]: Implement scalar unsigned int->float conversions > with AVX512F

Fix SLP def type when computing masks (PR85853)

In this PR, SLP failed to include a comparison node in the SLP tree and so marked the node as external. It then went on to call vect_is_simple_use on the comparison with its STMT_VINFO_DEF_TYPE still claiming that it was an internal definition. We already avoid that for vect_analyze_stmt by

Try harder to preserve operand ties in maybe_legitimize_operands

maybe_legitimize_operands normally goes through each operand in turn and legitimises it in isolation. For example, if two operands to an instruction initially have constant value C, and the instruction requires both operands to be registers, the function ends up forcing C into a register twice

Re: [PATCH 2/2] df-scan: remove ad-hoc handling of global regs in asms

On Tue, 22 May 2018, Jeff Law wrote: > So OK for the trunk. If there's fallout in gcc-9, we'll obviously have > to deal with it. IMHO what happened here is not healthy. Thank you for the green light. Alexander

[PATCH] Optimize AVX512 vpcmpeq* against 0 into vptestm* (PR target/85832)

Hi! As mentioned in the PR, vptestm* instructions with the same input operand used twice perform the same comparison as vpcmpeq* against zero vector, with the advantage that a register holding CONST0_RTX (mode) is not needed. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

[PING][PATCH] c/55976 -Werror=return-type should error on returning a value from a void function

Ping for the following C patch sent on 4/22/2018 https://gcc.gnu.org/ml/gcc-patches/2018-04/msg01034.html Thanks, --Dave == On 04/22/2018 12:17 PM, dave.pa...@oracle.com wrote: This patch fixes handling of -Werror=return-type as well as -Wno-return-type. Currently,

[PATCH] MSP430: Don't warn if naked function does not return

Implement TARGET_WARN_FUNC_RETURN for msp430-elf, to eliminate warnings when functions with the "naked" attribute do not return. The GCC testsuite completes with no regressions for msp430-elf, and this fixes pr53633. If the patch is acceptable, I would appreciate it if someone could commit it

Re: [PATCH] PR target/85358: Add target hook to prevent default widening

On Wed, May 23, 2018 at 08:38:21PM +, Joseph Myers wrote: > On Wed, 23 May 2018, Richard Biener wrote: > > > Yeah. Not sure if we need sth other than FLOAT_MODE or if avoiding the > > chaining in wider mode and friends is enough. I guess one could also > > change IFmode to be a non-scalar,

[PATCH] PR fortran/85895 -- Check for valid errmsg entity

The attach patch fixes PR fortran/85895 and also addresses a nearby issue by resolving the expressions associated with the STAT= and ERRMSG= tags in SYNC statements. OK to commit? 2018-05-23 Steven G. Kargl PR fortran/85895 * resolve.c (resolve_sync):

Re: [PATCH] PR target/85358: Add target hook to prevent default widening

On Thu, 24 May 2018, Segher Boessenkool wrote: > Which semantics doesn't it have? (Other than the lack of non-default > rounding modes, or is that what you meant?) It has problems with rounding modes, exceptions and various operations involving large or small arguments or results. Some of

[PATCH] PR fortan/85779 -- Fix NULL pointer dereference

Subject says it all. OK to commit? 2018-05-23 Steven G. Kargl PR fortran/85779 *decl.c (gfc_match_derived_decl): Fix NULL point dereference. 2018-05-23 Steven G. Kargl PR fortran/85779 * gfortran.dg/pr85779_1.f90: New

[Ada] Spurious Storage_Error on imported array

This patch moves the check which verifies that a large modular array is created from expansion to freezing in order to take interfacing pragmas in account. The check is no longer performed on imported objects because no object is created in that case. Tested on x86_64-pc-linux-gnu, committed on

[Ada] Spurious error on instantiation with type with unknown discriminants

This patch fixes a spurious error when instantiating an indefinite container with a private type with unknown discriminants, when its full view is an unconstrained array type. It also cleans up the inheritance of dynamic predicates inherited by anonymous subtypes of array types. Tested on

[Ada] Fix computation of handle/pid lists in win32_wait

An obvious mistake due to missing parentheses was not properly computing the size of the handle and pid list passed to WaitForMultipleObjects(). This resulted in a memory corruption. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Pascal Obry gcc/ada/

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support

On 23/05/2018 03:50, Zhangshaokun wrote: Hi Ramana, On 2018/5/22 18:28, Ramana Radhakrishnan wrote: On Tue, May 22, 2018 at 9:40 AM, Shaokun Zhang wrote: tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes L1 Icache which can access L1 Dcache.

Re: Add a class to represent a gimple match result

On Tue, May 22, 2018 at 9:25 AM Richard Sandiford < richard.sandif...@linaro.org> wrote: > Gimple match results are represented by a code_helper for the operation, > a tree for the type, and an array of three trees for the operands. > This patch wraps them up in a class so that they don't need to

Re: [PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

On Wed, May 23, 2018 at 12:01 PM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Wed, May 23, 2018 at 11:19 AM, Richard Biener >> wrote: >>> On Tue, May 22, 2018 at 2:11 PM Richard Sandiford < >>>

[Ada] Initialize_Scalars optimization causes spurious runtime check failure

This patch suppresses the optimization of scalar arrays when pragma Initialize_Scalars is in effect if the component type is subject to predicates. Since the scalar array is initialized with invalid values, these values may violate the predicate or a validity check within the predicate.

[Ada] Suppression of elaboration-related warnings

This patch modifies the effects of pragma Warnings (Off, ...) to suppress elaboration warnings related to an entity. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Hristian Kirtchev gcc/ada/ * einfo.adb (Is_Elaboration_Checks_OK_Id): Use predicate

[Ada] Compiler fails to reject illegal store of anonymous_access_to_subprogram

GNAT properly rejects an attempt to assign an access_to_subprogram formal to a local variable, according to accessibiiity rules. This patch forces the same behavior on the use of such a formal in an object declaration. Compiling store_anon.adb must yield: store_anon.adb:7:35: illegal attempt

Re: [PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

On Wed, May 23, 2018 at 1:02 PM Richard Sandiford < richard.sandif...@linaro.org> wrote: > "Bin.Cheng" writes: > > On Wed, May 23, 2018 at 11:19 AM, Richard Biener > > wrote: > >> On Tue, May 22, 2018 at 2:11 PM Richard Sandiford < > >>

Re: [PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

On Wed, May 23, 2018 at 12:12 PM, Richard Biener wrote: > On Wed, May 23, 2018 at 1:10 PM Bin.Cheng wrote: > >> On Wed, May 23, 2018 at 12:01 PM, Richard Sandiford >> wrote: >> > "Bin.Cheng"

Re: [PATCH][RFC] Add dynamic edge/bb flag allocation

On Tue, 22 May 2018, Richard Biener wrote: > On May 22, 2018 6:53:57 PM GMT+02:00, Joseph Myers > wrote: > >On Tue, 22 May 2018, Richard Biener wrote: > > > >> + if (*sptr & (1 << (CHAR_BIT * sizeof (T) - 1))) > >> + gcc_unreachable (); > >> + m_flag = 1 <<

Re: [PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

"Bin.Cheng" writes: > On Wed, May 23, 2018 at 11:19 AM, Richard Biener > wrote: >> On Tue, May 22, 2018 at 2:11 PM Richard Sandiford < >> richard.sandif...@linaro.org> wrote: >> >>> Richard Biener writes: >>> > On

Re: [PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

On Wed, May 23, 2018 at 1:10 PM Bin.Cheng wrote: > On Wed, May 23, 2018 at 12:01 PM, Richard Sandiford > wrote: > > "Bin.Cheng" writes: > >> On Wed, May 23, 2018 at 11:19 AM, Richard Biener > >>

Re: [PATCH PR85720/partial]Support runtime loop versioning if loop can be distributed into builtin functions

On Tue, May 22, 2018 at 6:38 PM Bin Cheng wrote: > Hi, > This patch partially improves loop distribution for PR85720. It now supports runtime > loop versioning if the loop can be distributed into builtin functions. Note for this > moment only coarse-grain runtime alias is

Re: [PATCH][AARCH64][PR target/84882] Add mno-strict-align

Hi Richard On 18/05/18 15:48, Richard Earnshaw (lists) wrote: On 27/03/18 13:58, Sudakshina Das wrote: Hi This patch adds the no variant to -mstrict-align and the corresponding function attribute. To enable the function attribute, I have modified aarch64_can_inline_p () to allow checks even

Re: [PATCH][RFC] Add dynamic edge/bb flag allocation

> Maybe you should convert the thing to a template when the need arises > instead of before? You have now added 54 lines of code for wrapping an > int! Yeah, it took me 5 minutes to understand what all this fluff is about! -- Eric Botcazou

Re: [PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

On Wed, May 23, 2018 at 11:19 AM, Richard Biener wrote: > On Tue, May 22, 2018 at 2:11 PM Richard Sandiford < > richard.sandif...@linaro.org> wrote: > >> Richard Biener writes: >> > On Mon, May 21, 2018 at 3:14 PM Bin Cheng

Re: [PATCH][AArch64] Fix aarch64_ira_change_pseudo_allocno_class

Richard Sandiford wrote: > -  if (allocno_class != ALL_REGS) > +  if (allocno_class != POINTER_AND_FP_REGS) >  return allocno_class; >  > -  if (best_class != ALL_REGS) > +  if (best_class != POINTER_AND_FP_REGS) >  return best_class; >  >    mode = PSEUDO_REGNO_MODE (regno); > I think

Re: [PATCH][AArch64] Fix aarch64_ira_change_pseudo_allocno_class

Wilco Dijkstra writes: > Richard Sandiford wrote: >> -  if (allocno_class != ALL_REGS) >> +  if (allocno_class != POINTER_AND_FP_REGS) >>  return allocno_class; >>  >> -  if (best_class != ALL_REGS) >> +  if (best_class != POINTER_AND_FP_REGS) >>  return

Re: [PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

On Tue, May 22, 2018 at 2:11 PM Richard Sandiford < richard.sandif...@linaro.org> wrote: > Richard Biener writes: > > On Mon, May 21, 2018 at 3:14 PM Bin Cheng wrote: > > > >> Hi, > >> As reported in PR85804, bump step is wrongly computed for

[Ada] Clarify meaning of local pragma Warnings Off without On

A local use of pragma Warnings Off to suppress specific messages, when not followed by a matching pragma Warnings On, extends until the end of the file. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Yannick Moy gcc/ada/ *

[Ada] Implementation of AI12-0131: legality of class-wide precondition

This patch refines the legality check on a class-wide precondition on a type extension when ancestor does not have a class-wide precondition. Previously the compiler accepted such a precondition when the ancestor had a class-wide postcondition. Compiling pck.ads must yield: pck.ads:7:04:

[Ada] gnatbind: do not list No_Implementation_Restrictions

When the gnatbind -r switch is used, do not list No_Implementation_Restrictions, because after using the new restriction list, No_Implementation_Restrictions will cause an error. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Bob Duff gcc/ada/ *

[Ada] Vectors: spurious error in -gnatwE mode

This patch fixes a bug in which if Ada.Containers.Vectors is instantiated with an Index_Type such that Index_Type'Base'Last is less than Count_Type'Last, and the -gnatwE switch is used, the compiler gives spurious error messages. The following test should compile quietly with -gnatwE: gnatmake

[Ada] Crash processing Valid_Scalars whose evaluation is always true

The compiler blows up generating code associated with occurrences of attribute Valid_Scalars whose evaluation is always true. After this patch the following test compiles fine. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Javier Miranda gcc/ada/

[Ada] Add a Is_Foreign_Exception predicate to GNAT.Exception_Actions

Useful to check if an occurrence caught by a "when others" choice originates from a foreign language, e.g. C++. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Olivier Hainque gcc/ada/ * libgnat/g-excact.ads (Is_Foreign_Exception): New predicate.

Re: [PATCH] PR libgcc/60790: Avoid IFUNC resolver access to uninitialized data

On 05/23/2018 12:48 AM, Jeff Law wrote: OK. Thanks. I will let it sit in trunk for a while and then consider backporting it to release branches. Do you have write access to the GCC repository? If not I can commit for you. I have write access. I take this as a hint to contribute more

Re: [PATCH][RFC] Add dynamic edge/bb flag allocation

Hi, On Wed, 23 May 2018, Richard Biener wrote: > > I messed up the conversion to a template. The bitnum should be > > subtracted from HOST_BITS_PER_WIDE_INT and yes, 1 in unsigned hwi > > should be shifted. Maybe you should convert the thing to a template when the need arises instead of

[PATCH, rs6000] Remove incorrect built-in function documentation

This patch removes several incorrectly documented functions from the "PowerPC AltiVec Built-in Functions" section of the "Using the GNU Compiler Collection" manual. The following two functions are removed because they are not implemented: vector float vec_copysign (vector float); vector

Re: [PATCH 1/2] Introduce prefetch-minimum stride option

On 05/23/2018 07:42 PM, H.J. Lu wrote: On Wed, May 23, 2018 at 3:41 PM, H.J. Lu wrote: On Wed, May 23, 2018 at 3:35 PM, H.J. Lu wrote: Sorry. Does the following fix it for i686? Index: gcc/tree-ssa-loop-prefetch.c

Re: [PATCH 1/2] Introduce prefetch-minimum stride option

On Wed, May 23, 2018 at 3:29 PM, Luis Machado wrote: > > > On 05/23/2018 05:01 PM, H.J. Lu wrote: >> >> On Tue, May 22, 2018 at 11:55 AM, Luis Machado >> wrote: >>> >>> >>> >>> On 05/16/2018 08:18 AM, Luis Machado wrote:

Re: [PATCH 1/2] Introduce prefetch-minimum stride option

On Wed, May 23, 2018 at 3:35 PM, H.J. Lu wrote: > On Wed, May 23, 2018 at 3:29 PM, Luis Machado wrote: >> >> >> On 05/23/2018 05:01 PM, H.J. Lu wrote: >>> >>> On Tue, May 22, 2018 at 11:55 AM, Luis Machado >>> wrote:

Re: [patch, rfc] Fortran async I/O support

On 05/21/2018 09:05 AM, Nicolas Koenig wrote: Hey everyone, Thomas and I have been working on adding asynchronous I/O to libgfortran. The patch is almost done, the only thing still missing is to link libgfortran against libpthread if it exists(which is for some reason necessary despite using

[PATCH] Refactor path construction from null terminated iterator ranges

Move duplicated code to new _S_string_from_iter function and fix constraints to accept iterators with const value type. * include/bits/fs_path.h (path::__is_encoded_char): Change from class template to alias template. (path::__value_type_is_char): Use remove_const_t.

[PATCH] consider MIN_EXPR in get_size_range() (PR 85888)

The attached patch enhances the get_size_range() function to extract more accurate ranges out of MIN_EXPR and MAX_EXPR nodes with SSA_NAME operand(s). This helps -Wstringop-overflow avoid false positives on some targets in cases like some of those reported in bug 85623 - strncmp() warns about

Re: [PATCH] PR target/85358: Add target hook to prevent default widening

Hi, On Wed, May 23, 2018 at 08:35:49PM +, Joseph Myers wrote: > On Wed, 23 May 2018, Michael Meissner wrote: > > > One of the problems I've faced over the years is the assumption that there > > is > > only one type for a given size, and that isn't true for IF/KF/TFmode. > > I think that's

[committed][PATCH] Fix m68k soft float handling of infinity

This was reported over on the older gcc@ list. Essentially the soft-float code for m68k mis-handles the sign bit for 32bit floating point addition when one or both arguments is infinity. Essentially we try to extract the sign bit from a saved copy of the input value. However we saved the input

Re: [PATCH 1/2] Introduce prefetch-minimum stride option

On 05/23/2018 05:01 PM, H.J. Lu wrote: On Tue, May 22, 2018 at 11:55 AM, Luis Machado wrote: On 05/16/2018 08:18 AM, Luis Machado wrote: On 05/16/2018 06:08 AM, Kyrill Tkachov wrote: On 15/05/18 12:12, Luis Machado wrote: Hi, On 05/15/2018 06:37 AM,

Re: [PATCH , rs6000] Add missing builtin test cases, fix arguments to match specifications.

On Wed, May 23, 2018 at 11:39:37AM -0700, Carl Love wrote: > > > --- a/gcc/testsuite/gcc.target/powerpc/builtins-1-be.c > > > +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1-be.c > > > @@ -1,4 +1,4 @@ > > > -/* { dg-do compile { target { powerpc64-*-* } } } */ > > > +/* { dg-do compile { target

Re: [PATCH] Fix trunk failing to build for msp430-elf

On 03/20/2018 04:01 PM, Jozef Lawrynowicz wrote: > Trunk doesn't build for msp430 due to an ICE whilst building libstdc++. > > The following patch proposed a while ago fixes the issue, but hasn't been > applied: https://gcc.gnu.org/ml/gcc-patches/2017-08/msg01433.html > > I don't have write

Re: [PATCH 1/2] Introduce prefetch-minimum stride option

On Wed, May 23, 2018 at 3:41 PM, H.J. Lu wrote: > On Wed, May 23, 2018 at 3:35 PM, H.J. Lu wrote: > >>> >>> Sorry. Does the following fix it for i686? >>> >> >> Index: gcc/tree-ssa-loop-prefetch.c >>

Re: [PATCH 1/2] Introduce prefetch-minimum stride option

On 05/23/2018 04:50 PM, Luis Machado wrote: > On 05/23/2018 07:42 PM, H.J. Lu wrote: >> On Wed, May 23, 2018 at 3:41 PM, H.J. Lu wrote: >>> On Wed, May 23, 2018 at 3:35 PM, H.J. Lu wrote: >>> > > Sorry. Does the following fix it for i686? >

[Ada] Crash on predicate involving qualified expression in instance

This patch inhibits the generation of freeze nodes when pre-analyzing the domain of iteration of an Ada2012 loop that appears as a quantified expression in a predicate for an array type. This prevents a back-end abort on an invisible freeze node that would otherwise appear in an unexpanded code

[Ada] Suppression of elaboration-related warnings

This patch updates the documentation section on suppressing elaboration warnings. No change in behavior, no need for a test. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Hristian Kirtchev gcc/ada/ * sem_elab.adb: Update the section on

[Ada] Suppression of elaboration-related warnings

This patch changes the behavior of elaboration-related warnings as follows: * If a scenario or a target has [elaboration] warnings suppressed, then any further elaboration-related warnings along the paths rooted at the scenario are also suppressed. * Elaboration-related warnings

[Ada] Build-in-place aggregates and Address clauses

This patch fixes a bug in which if a limited volatile variable with an Address aspect is initialized with a build-in-place aggregate containing build-in-place function calls, the compiler can crash. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Bob Duff

[Ada] Suspension and elaboration warnings/checks

This patch modifies the static elaboration model to stop the inspection of a task body when it contains a synchronous suspension call and restriction No_Entry_Calls_In_Elaboration_Code or switch -gnatd_s is in effect. -- Source -- -- suspension.ads package Suspension

[Ada] Fix of some permission rules of pointers in SPARK

This commit fixes bugs in the code that implements the rules for safe pointers in SPARK. This only affects SPARK tools, not compilation. * Global variables should be handled differently compared to parameters. The whole tree of an in global variable has the permission Read-Only. In

[Ada] Missing legality check on iterator over formal container

This patch adds a check on an iterator over a GNAT-specific formal container, when the iterator specification includes a subtype indication that must be compatible with the element type of the container. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Ed Schonberg

[Ada] Fix implementation of utility for finding enclosing declaration

This utility is used in GNATprove to find when a node is inside a named number declaration, and this case was not properly handled. Now fixed. There is no impact on compilation. Tested on x86_64-pc-linux-gnu, committed on trunk 2018-05-23 Yannick Moy gcc/ada/ *

Re: [PATCH] Fix PR85712 (SLSR cleanup of alternative interpretations)

On May 23, 2018, at 4:32 AM, Richard Biener wrote: > > On Tue, May 22, 2018 at 11:37 PM Bill Schmidt > wrote: > >> Hi, > >> PR85712 shows where an existing test case fails in the SLSR pass because >> the code is flawed that cleans up

Re: [PATCH][RFC] Add dynamic edge/bb flag allocation

Hi, On Wed, 23 May 2018, Richard Biener wrote: > > alloc_flags (>cfg->bb_flag_pool); > > alloc_flags (>cfg->edge_flag_pool); > > You'll end up with sth like > >alloc_flags flag (BB_FLAG_POOL_FOR_FN (cfun)); > > then, mixing C++ RAII and macros! (eh) First: I don't see the

[PATCH][1/n] Dissect vectorizer GROUP_* info

This patch splits GROUP_* into DR_GROUP_* and REDUC_GROUP_* as a step towards sharing dataref and dependence analysis between vectorization analysis of different vector sizes (and then comparing costs and choosing the best one). The next patch will move the DR_GROUP_* fields to the DR_AUX

Re: C++ PATCH to implement P0614R1, Range-based for statements with initializer (take 2)

On Tue, May 22, 2018 at 09:46:10PM -0400, Jason Merrill wrote: > On Tue, May 22, 2018 at 7:25 PM, Marek Polacek wrote: > > On Mon, May 21, 2018 at 09:51:44PM -0400, Jason Merrill wrote: > >> On Mon, May 21, 2018 at 7:34 PM, Marek Polacek wrote: > >> > The

[PATCH] Remove memset VN restriction

After Eric reminded me how things go with the middle-end and bit-offsets the following adjusts VN accordingly. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2018-05-23 Richard Biener * tree-ssa-sccvn.c (vn_reference_lookup_3): Remove

Re: [PATCH][RFC] Add dynamic edge/bb flag allocation

Hi, On Wed, 23 May 2018, Eric Botcazou wrote: > > Maybe you should convert the thing to a template when the need arises > > instead of before? You have now added 54 lines of code for wrapping an > > int! > > Yeah, it took me 5 minutes to understand what all this fluff is about! So, what I

C++ PATCH for c++/85847, ICE with template_id_expr in new()

The diagnostic code in build_new{,_1} was using maybe_constant_value to fold the array length, but that breaks while parsing a template, because we might then leak template codes to the constexpr machinery. Bootstrapped/regtested on x86_64-linux, ok for trunk/8? 2018-05-23 Marek Polacek

Re: PING^2: [PATCH] Don't mark IFUNC resolver as only called directly

On Wed, May 23, 2018 at 2:01 AM, Jan Hubicka wrote: >> On Tue, May 22, 2018 at 9:21 AM, Jan Hubicka wrote: >> >> > > class ipa_opt_pass_d; >> >> > > typedef ipa_opt_pass_d *ipa_opt_pass; >> >> > > @@ -2894,7 +2896,8 @@ >> >> > >

Re: [RFT PATCH, AVX512]: Implement scalar float->unsigned int truncations with AVX512F

On Wed, May 23, 2018 at 9:55 AM, Peryt, Sebastian wrote: >> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- >> ow...@gcc.gnu.org] On Behalf Of Uros Bizjak >> Sent: Monday, May 21, 2018 9:55 PM >> To: gcc-patches@gcc.gnu.org >> Cc: Jakub Jelinek

Re: Incremental LTO linking part 6: dwarf2out support

> On 05/08/2018 09:31 AM, Jan Hubicka wrote: > > Hi, > > this patch tells dwarf2out that it can have early debug not only in WPA mode > > but also when incrementally linking. This prevents ICE on almost every > > testcase > > compiled with -g. > > > > Bootstrapped/regtested x86_64-linux with

Re: Incremental LTO linking part 6: dwarf2out support

On 05/23/2018 09:54 AM, Jan Hubicka wrote: >> On 05/08/2018 09:31 AM, Jan Hubicka wrote: >>> Hi, >>> this patch tells dwarf2out that it can have early debug not only in WPA mode >>> but also when incrementally linking. This prevents ICE on almost every >>> testcase >>> compiled with -g. >>> >>>

Re: C++ PATCH to implement P0614R1, Range-based for statements with initializer (take 2)

OK. On Wed, May 23, 2018 at 10:45 AM, Marek Polacek wrote: > On Tue, May 22, 2018 at 09:46:10PM -0400, Jason Merrill wrote: >> On Tue, May 22, 2018 at 7:25 PM, Marek Polacek wrote: >> > On Mon, May 21, 2018 at 09:51:44PM -0400, Jason Merrill wrote: >> >>

[wwwdocs] Buildstat update for 8.x

Latest results for 8.x -tgc Testresults for 8.1.0: i386-pc-solaris2.10 i386-pc-solaris2.11 sparc-sun-solaris2.10 sparc-sun-solaris2.11 x86_64-apple-darwin11.4.2 x86_64-pc-linux-gnu (3) x86_64-w64-mingw32 --- /home/tgc/projects/gcc/wwwdocs/htdocs/gcc-8/buildstat.html 2018-04-25

[PATCH] Fix handling of an empty filename at end of a path

The C++17 std::filesystem::path grammar allows an empty filename as the last component (to signify a trailing slash). The existing code does not handle this consistently, sometimes an empty filename has type _Multi and sometimes it has type _Filename. This can result in a non-empty iterator range

Re: C++ PATCH for c++/85847, ICE with template_id_expr in new()

On Wed, May 23, 2018 at 9:46 AM, Marek Polacek wrote: > The diagnostic code in build_new{,_1} was using maybe_constant_value to fold > the array length, but that breaks while parsing a template, because we might > then leak template codes to the constexpr machinery. > >

Re: C++ PATCH to implement P0614R1, Range-based for statements with initializer (take 2)

On Wed, May 23, 2018 at 10:45:43AM -0400, Marek Polacek wrote: > 2018-05-23 Marek Polacek > > Implement P0614R1, Range-based for statements with initializer. > * parser.c (cp_parser_range_based_for_with_init_p): New. > (cp_parser_init_statement): Use it.

Re: [PATCH][1/n] Dissect vectorizer GROUP_* info

On May 23, 2018 5:29:46 PM GMT+02:00, Richard Sandiford wrote: >Richard Biener writes: >> This patch splits GROUP_* into DR_GROUP_* and REDUC_GROUP_* as a step >> towards sharing dataref and dependence analysis between vectorization >> analysis of

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