Could you put it into riscv-string.cc rather than riscv-v.cc? I would
like to put those builtin function expander together if possible,
riscv-string.cc might little bit confuse, but it's all included in
string.h
On Fri, Oct 27, 2023 at 3:40 PM juzhe.zh...@rivai.ai
wrote:
>
> LGTM. Thanks.
>
>
Hi Harald,
That's good for mainline.
Thanks for the patch
Paul
On Thu, 26 Oct 2023 at 21:43, Harald Anlauf wrote:
> Dear all,
>
> the attached patch improves the diagnostics of MODULE PROCEDURE declaration
> conflicts, when one of the declarations is an alternate return. We used to
> ICE
Implement the ACLE data and instruction prefetch functions[1] with the
following signatures:
1. Data prefetch intrinsics:
void __pldx (/*constant*/ unsigned int /*access_kind*/,
/*constant*/ unsigned int /*cache_level*/,
It seems that you didn't commit it yet.
A nit comment:
+ int lmul = riscv_autovec_lmul == RVV_DYNAMIC ? RVV_M8 : riscv_autovec_lmul;
I change you could use TARGET_MAX_LMUL
> Suggested adapt codes as follows:
>
> unsigned int element_size = GET_MODE_SIZE (mode).to_constant ();
> poly_int64 nunits = exact_div (BYTES_PER_RISCV_VECTOR *TARGET_MAX_LMUL,
> element_size);
> if (!get_vector_mode(mode, nunits).exists())
> gcc_unreachable ();
Actually I was initially
LGTM from my side.
The original integer division COST seems too low.
Hi, Jeff and Kito. Could take a look at this patch ?
Thanks.
juzhe.zh...@rivai.ai
> I notice we have expand_block_move
> in riscv-v.cc
>
> Maybe we should move it into riscv-string.cc ?
Yes I will also move that one.
Regards
Robin
Hi,
This patch checks available optabs for scalar modes used in by
pieces operations. It fixes the regression cases caused by previous
patch. Now both scalar and vector modes are examined by the same
approach.
Bootstrapped and tested on x86 and powerpc64-linux BE and LE with no
regressions.
Hi Richard,
> On 26 Oct 2023, at 21:00, Iain Sandoe wrote:
>> On 26 Oct 2023, at 20:49, Richard Sandiford
>> wrote:
>>
>> Iain Sandoe writes:
>>> This was written before Thomas' modification to the ELF-handling to allow
>>> a config-based change for target details. I did consider updating
> Am 26.10.2023 um 23:10 schrieb Andrew Pinski :
>
> From: Andrew Pinski
>
> I noticed we were missing these simplifications so let's add them.
>
> This adds the following simplifications:
> U & N <= U -> true
> U & N > U -> false
> When U is known to be as non-negative.
>
> When N is
On Thu, Oct 26, 2023 at 11:56 PM Richard Biener
wrote:
>
>
>
> > Am 26.10.2023 um 23:10 schrieb Andrew Pinski :
> >
> > From: Andrew Pinski
> >
> > I noticed we were missing these simplifications so let's add them.
> >
> > This adds the following simplifications:
> > U & N <= U -> true
> > U &
Am Donnerstag, dem 26.10.2023 um 19:57 + schrieb Qing Zhao:
> I guess that what Kees wanted, ""fill the array without knowing the actual
> final size" code pattern”, as following:
>
> > > struct foo *f;
> > > char *p;
> > > int i;
> > >
> > > f = alloc(maximum_possible);
> > >
> @@ -346,7 +346,7 @@ static const struct riscv_tune_param rocket_tune_info = {
>{COSTS_N_INSNS (4), COSTS_N_INSNS (5)},/* fp_mul */
>{COSTS_N_INSNS (20), COSTS_N_INSNS (20)}, /* fp_div */
>{COSTS_N_INSNS (4), COSTS_N_INSNS (4)},/* int_mul */
> - {COSTS_N_INSNS (6),
> Am 27.10.2023 um 07:50 schrieb liuhongt :
>
> When 2 vectors are equal, kmask is allones and kortest will set CF,
> else CF will be cleared.
>
> So CF bit can be used to check for the result of the comparison.
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
> Could you put it into riscv-string.cc rather than riscv-v.cc? I would
> like to put those builtin function expander together if possible,
> riscv-string.cc might little bit confuse, but it's all included in
> string.h
Ok, sure. Will commit the adjusted patch if no further comments.
Regards
> On 26 Oct 2023, at 09:21, Thomas Schwinge wrote:
>
> Hi!
>
> First, I've pushed into GCC upstream Git branch devel/rust/libgrust-v2
> the "v2" libgrust changes as posted by Arthur, so that people can easily
> test this before it getting into Git master branch.
>
> I'll myself later try
Hi!
On 2023-10-25T23:40:40+0200, I wrote:
> On 2023-10-25T13:06:48+0200, Arthur Cohen wrote:
>> From: Pierre-Emmanuel Patry
>>
>> Define the libgrust directory as a host compilation module as well as
>> for targets.
>
> I don't see a response to Richard's comments:
>
On Fri, Oct 27, 2023 at 3:21 PM Hongtao Liu wrote:
>
> On Fri, Oct 27, 2023 at 2:49 PM Richard Biener
> wrote:
> >
> >
> >
> > > Am 27.10.2023 um 07:50 schrieb liuhongt :
> > >
> > > When 2 vectors are equal, kmask is allones and kortest will set CF,
> > > else CF will be cleared.
> > >
> > >
I notice we have expand_block_move
in riscv-v.cc
Maybe we should move it into riscv-string.cc ?
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-10-27 15:51
To: Kito Cheng; juzhe.zh...@rivai.ai
CC: rdapp.gcc; gcc-patches; palmer; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Add rawmemchr
Attached v3 that I'd commit.
Regards
Robin
>From 246b986a8ea2332ced7a094dd68d35d84dcbbc04 Mon Sep 17 00:00:00 2001
From: Robin Dapp
Date: Tue, 24 Oct 2023 10:33:15 +0200
Subject: [PATCH v3] RISC-V: Add rawmemchr expander.
This patch adds a vectorized rawmemchr expander. It also moves the
HAO CHEN GUI writes:
> Hi,
> This patch checks available optabs for scalar modes used in by
> pieces operations. It fixes the regression cases caused by previous
> patch. Now both scalar and vector modes are examined by the same
> approach.
>
> Bootstrapped and tested on x86 and
On Fri, Oct 27, 2023 at 2:49 PM Richard Biener
wrote:
>
>
>
> > Am 27.10.2023 um 07:50 schrieb liuhongt :
> >
> > When 2 vectors are equal, kmask is allones and kortest will set CF,
> > else CF will be cleared.
> >
> > So CF bit can be used to check for the result of the comparison.
> >
> >
LGTM. Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-10-27 15:38
To: 钟居哲; gcc-patches; palmer; kito.cheng; Jeff Law
CC: rdapp.gcc
Subject: Re: [PATCH] RISC-V: Add rawmemchr expander.
> Suggested adapt codes as follows:
>
> unsigned int element_size = GET_MODE_SIZE
> Am 27.10.2023 um 09:13 schrieb Hongtao Liu :
>
> On Fri, Oct 27, 2023 at 2:49 PM Richard Biener
> wrote:
>>
>>
>>
Am 27.10.2023 um 07:50 schrieb liuhongt :
>>>
>>> When 2 vectors are equal, kmask is allones and kortest will set CF,
>>> else CF will be cleared.
>>>
>>> So CF bit
Hi Andrew,
> On 26 Oct 2023, at 20:00, Andrew Pinski wrote:
>
> On Thu, Oct 26, 2023 at 11:58 AM Iain Sandoe wrote:
>>
>> tested on cfarm185 (aarch64-linux-gnu, xgene1) and with the aarch64
>> Darwin prototype. It is possible that some initial fallout could occur
>> on some test setups
On 10/27/23 01:37, juzhe.zh...@rivai.ai wrote:
LGTM from my side.
The original integer division COST seems too low.
Almost certainly, though there may be good reasons why it was initially
set so low. I'm generally hesitant to change things like that without
either someone with knowledge
On 10/27/23 14:18, Alex Coplan wrote:
On 26/10/2023 16:23, Richard Sandiford wrote:
Victor Do Nascimento writes:
On 10/18/23 21:39, Richard Sandiford wrote:
Victor Do Nascimento writes:
Implement the aarch64 intrinsics for reading and writing system
registers with the following
Hi Vladimir,
On Thu, 26 Oct 2023 at 16:00, Vladimir Makarov wrote:
>
> This is the second attempt to improve RA cost calculation for pseudos
> with equivalences. The patch explanation is in the log message.
>
> The patch was successfully bootstrapped and tested on x86-64, aarch64,
> and
The following patch fixes one aarch64 GCC test failure resulted from my
previous patch dealing with reg equivalences.
The patch was successfully bootstrapped and tested on x86-64, aarch64,
ppc64le.
commit 9b03e1d20c00dca215b787a5e959db473325b660
Author: Vladimir N. Makarov
Date: Fri Oct
On Fri, 27 Oct 2023 at 16:19, Vladimir Makarov wrote:
>
>
> On 10/27/23 09:56, Christophe Lyon wrote:
> > Hi Vladimir,
> >
> > On Thu, 26 Oct 2023 at 16:00, Vladimir Makarov
> > wrote:
> >> This is the second attempt to improve RA cost calculation for pseudos
> >> with equivalences. The patch
v2: Formatting and nits fixed.
Follow up patch to arm: Use deltas for Arm switch tables
This patch moves the switch tables for Arm from the .text section
into the .rodata section.
gcc/ChangeLog:
* config/arm/aout.h: Change to use the Lrtx label.
* config/arm/arm.h
On 10/20/23 13:05, Florian Weimer wrote:
gcc/testsuite/
* gcc.c-torture/compile/2412-2.c (f): Call
__builtin_strleninstead of strlen.
* gcc.c-torture/compile/2427-1.c (FindNearestPowerOf2):
Declare.
* gcc.c-torture/compile/2802-1.c
On 22/10/2023 13:24, Gerald Pfeifer wrote:
Hi Andrew,
On Fri, 20 Oct 2023, Andrew Stubbs wrote:
Additionally, I wonder whether "Fiji" should be changed to "Fiji
(gfx803)" in the first line and whether the "," should be removed in
"The ... configuration ... , and no longer includes".
Fair
On Thu, Oct 26, 2023 at 8:30 PM Andrew Pinski wrote:
>
> On Thu, Oct 26, 2023 at 2:29 AM Richard Biener
> wrote:
> >
> > On Wed, Oct 25, 2023 at 5:51 AM Andrew Pinski wrote:
> > >
> > > I noticed we were missing optimizing `a / (1 << b)` when
> > > we know that a is nonnegative but only due to
Hi!
Short Friday afternoon status update:
On 2023-10-27T08:51:12+0100, Iain Sandoe wrote:
>> On 26 Oct 2023, at 09:21, Thomas Schwinge wrote:
>> First, I've pushed into GCC upstream Git branch devel/rust/libgrust-v2
>> the "v2" libgrust changes as posted by Arthur, so that people can easily
>>
Hi!
Richard, as the original author of 'SSA_NAME_POINTS_TO_READONLY_MEMORY':
2018 commit 6214d5c7e7470bdd5ecbeae668c2522551bfebbc (Subversion r263958)
"Move const_parm trick to generic code"; 'gcc/tree.h':
/* Nonzero if this SSA_NAME is known to point to memory that may not
be written
In some configurations of our validation setup, we always call the
compiler with -Wl,-rpath=XXX, which instructs the driver to invoke the
linker if none of -c, -S or -E is used.
This happens to be the case in the PCH tests, where dg-flags-pch sets
dg-do-what-default to precompile.
This works
Jeff Law writes:
> On 10/24/23 04:15, Richard Sandiford wrote:
>> An inline asm with multiple output operands is represented as a
>> parallel set in which the SET_SRCs are the same (shared) ASM_OPERANDS.
>> insn_propgation didn't account for this, and instead propagated
>> into each ASM_OPERANDS
On 10/27/23 01:49, Robin Dapp wrote:
@@ -346,7 +346,7 @@ static const struct riscv_tune_param rocket_tune_info = {
{COSTS_N_INSNS (4), COSTS_N_INSNS (5)}, /* fp_mul */
{COSTS_N_INSNS (20), COSTS_N_INSNS (20)}, /* fp_div */
{COSTS_N_INSNS (4), COSTS_N_INSNS (4)}, /*
> On Oct 27, 2023, at 3:21 AM, Martin Uecker wrote:
>
> Am Donnerstag, dem 26.10.2023 um 19:57 + schrieb Qing Zhao:
>> I guess that what Kees wanted, ""fill the array without knowing the actual
>> final size" code pattern”, as following:
>>
struct foo *f;
char *p;
On Fri, Oct 27, 2023 at 12:20 PM mayshao wrote:
>
> On 2023/10/26 17:34, Uros Bizjak wrote:
> > On Wed, Oct 25, 2023 at 8:43 AM mayshao wrote:
> >>
> >> Hi all:
> >> This patch enables -march/-mtune=yongfeng, costs and tunings are set
> >> according to the characteristics of the processor.
On Fri, Oct 27, 2023 at 4:17 AM Li, Pan2 wrote:
>
> Thanks Richard S for comments.
>
> > In other words, I don't think simply removing the test from the vectoriser
> > is correct. It needs to be replaced by something more selective.
>
> Does it mean we need to check if the internal fun allow
On 10/27/23 01:38, Robin Dapp wrote:
Suggested adapt codes as follows:
unsigned int element_size = GET_MODE_SIZE (mode).to_constant ();
poly_int64 nunits = exact_div (BYTES_PER_RISCV_VECTOR *TARGET_MAX_LMUL,
element_size);
if (!get_vector_mode(mode, nunits).exists())
gcc_unreachable ();
On 10/24/23 04:15, Richard Sandiford wrote:
An inline asm with multiple output operands is represented as a
parallel set in which the SET_SRCs are the same (shared) ASM_OPERANDS.
insn_propgation didn't account for this, and instead propagated
into each ASM_OPERANDS individually. This meant
> It seems that you didn't commit it yet.
>
> A nit comment:
>
> + int lmul = riscv_autovec_lmul == RVV_DYNAMIC ? RVV_M8 : riscv_autovec_lmul;
>
> I change you could use TARGET_MAX_LMUL
No didn't commit yet, testsuite was still running.
OK, added it, will commit later.
Regards
Robin
On 10/27/23 09:56, Christophe Lyon wrote:
Hi Vladimir,
On Thu, 26 Oct 2023 at 16:00, Vladimir Makarov wrote:
This is the second attempt to improve RA cost calculation for pseudos
with equivalences. The patch explanation is in the log message.
The patch was successfully bootstrapped and
Am Freitag, dem 27.10.2023 um 14:32 + schrieb Qing Zhao:
>
> > On Oct 27, 2023, at 3:21 AM, Martin Uecker wrote:
> >
> > Am Donnerstag, dem 26.10.2023 um 19:57 + schrieb Qing Zhao:
> > > I guess that what Kees wanted, ""fill the array without knowing the
> > > actual final size" code
> On Oct 27, 2023, at 10:53 AM, Martin Uecker wrote:
>
> Am Freitag, dem 27.10.2023 um 14:32 + schrieb Qing Zhao:
>>
>>> On Oct 27, 2023, at 3:21 AM, Martin Uecker wrote:
>>>
>>> Am Donnerstag, dem 26.10.2023 um 19:57 + schrieb Qing Zhao:
I guess that what Kees wanted, ""fill
On 10/27/23 08:22, Roger Sayle wrote:
This patch improves the code generated by the ARC back-end for CPUs
without a barrel shifter but with -mswap. The -mswap option provides
a SWAP instruction that implements SImode rotations by 16, but also
logical shift instructions (left and right) by
N.B. we currently don't diagnose 'new A(1)' below ultimately because
when in a template context our valid ctor call checking only happens for
type_build_ctor_call types.
-- >8 --
gcc/testsuite/ChangeLog:
* g++.dg/template/new14.C: New test.
---
gcc/testsuite/g++.dg/template/new14.C |
On 26/10/2023 16:23, Richard Sandiford wrote:
> Victor Do Nascimento writes:
> > On 10/18/23 21:39, Richard Sandiford wrote:
> >> Victor Do Nascimento writes:
> >>> Implement the aarch64 intrinsics for reading and writing system
> >>> registers with the following signatures:
> >>>
> >>>
On Thu, Oct 26, 2023 at 5:44 PM Alexandre Oliva wrote:
>
>
> Control flow redundancy may choose abnormal edges for early checking,
> but that breaks because we can't insert checks on such edges.
>
> Introduce conditional checking on the dest block of abnormal edges,
> and leave it for the
This patch improves the code generated by the ARC back-end for CPUs
without a barrel shifter but with -mswap. The -mswap option provides
a SWAP instruction that implements SImode rotations by 16, but also
logical shift instructions (left and right) by 16 bits. Clearly these
are also useful
On 10/26/23 12:50, Yangyu Chen wrote:
This patch fixes an issue with the cost on "int_div" in various RISC-V
tune parameters including those for Rocket, SiFive U7 series, and T-Head
C906. This incorrect cost value interferes with the optimization process.
For example, it prevents the
On 20/10/2023 12:51, Andrew Stubbs wrote:
I've committed this patch that allows building binaries for AMD gfx1030
GPUs. I can't actually test it, however, so somebody else will have to
debug it (or wait for me to get my hands on a device). Richi reports
that it does not execute correctly, as
On 10/27/23 11:39, Andrew Waterman wrote:
On Fri, Oct 27, 2023 at 6:44 AM Jeff Law wrote:
On 10/27/23 01:37, juzhe.zh...@rivai.ai wrote:
LGTM from my side.
The original integer division COST seems too low.
Almost certainly, though there may be good reasons why it was initially
set so
Okay, thanks for the explanation.
We will keep this in mind.
Qing
> On Oct 27, 2023, at 1:19 PM, Kees Cook wrote:
>
> On Fri, Oct 27, 2023 at 03:10:22PM +, Qing Zhao wrote:
>> Since the dynamic array support is quite important to the kernel (is this
>> true, Kees? ),
>> We might need to
On Wed, 25 Oct 2023 16:41:07 +0530
Ajit Agarwal wrote:
> On 25/10/23 2:19 am, Vineet Gupta wrote:
> > On 10/24/23 13:36, rep.dot@gmail.com wrote:
> >> As said, I don't see why the below was not cleaned up before the V1
> >> submission.
> >> Iff it breaks when manually CSEing,
GCC recently changed to emit __riscv_restore_5 which causes this
testcase to fail.
This patch updates the regex to be more robust to change by accepting
any number after __riscv_save_ and __riscv_restore_.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/stack_save_restore_2.c: Accept any
After working with Sam off-list (thanks) I managed to get hppa to
build. Initially it looked as if hppa just had a very small number of
instruction patterns so we wouldn't generate all 10 output files.
However, the actual issue (which we will only hit with a low
pattern count) was with counting
With the previous two patches in place, we can now extend our
deletedness diagnostic to note the other considered candidates, e.g.:
deleted16.C: In function 'int main()':
deleted16.C:10:4: error: use of deleted function 'void f(int)'
10 | f(0);
| ~^~~
deleted16.C:5:6: note:
During overload resolution, we sometimes outright ignore a function in
the overload set and leave no trace of it in the candidates list, for
example when we find a perfect non-template candidate we discard all
function templates, or when the callee is a template-id we discard all
non-template
New in patch 1/3:
* consistently use "non-viable" instead of "unviable"
throughout
* make 'champ' and 'challenger' in 'tourney' be z_candidate**
to simplify moving 'champ' to the front of the list. drive-by
cleanups in tourney, including renaming 'champ_compared_to_predecessor'
On Fri, Oct 27, 2023 at 6:44 AM Jeff Law wrote:
>
>
>
> On 10/27/23 01:37, juzhe.zh...@rivai.ai wrote:
> > LGTM from my side.
> >
> > The original integer division COST seems too low.
> Almost certainly, though there may be good reasons why it was initially
> set so low. I'm generally hesitant
The following patch fixes i686 bootstrap failure because of my recent
patch:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112107
commit 7361b49d7fa3624cb3f1f825a22607d9d31986e5
Author: Vladimir N. Makarov
Date: Fri Oct 27 14:50:40 2023 -0400
[RA]: Fixing i686 bootstrap failure because
Hi David,
David Faust writes:
> On 10/26/23 08:08, Cupertino Miranda wrote:
>>
>> Changes from v1:
>> - Fixed Davids remarks on initial patch.
>> - Fixed mistake with deleted '*'.
>>
>> Changes from v2:
>> - Reversed return value for bpf_const_not_ok_for_debug_p function.
>
> Hmm..
>
>>
A minor tweak to the documentation, to use git rather than cvs to obtain
the latest version of newlib. Ok for mainline?
2023-10-27 Roger Sayle
* htdocs/simtest-howto.html: Use git to obtain newlib.
Cheers,
Roger
--
diff --git a/htdocs/simtest-howto.html
ACLE has added intrinsics to bridge between SVE and Neon.
The NEON_SVE Bridge adds intrinsics that allow conversions between NEON and
SVE vectors.
This patch adds support to GCC for the following 3 intrinsics:
svset_neonq, svget_neonq and svdup_neonq
gcc/ChangeLog:
* config.gcc: Adds
On Fri, Oct 27, 2023 at 03:10:22PM +, Qing Zhao wrote:
> Since the dynamic array support is quite important to the kernel (is this
> true, Kees? ),
> We might need to include such support into our design in the beginning.
tl;dr: We don't need "dynamic array support" in the 1st version of
On 8/25/23 15:36, Jeff Law wrote:
Spurred by Jivan's patch and a desire for cleaner testresults, I went
ahead and make the stack_save_restore tests independent of the precise
stack size by using a regexp.
Pushed to the trunk.
Jeff
Hi Jeff, A recent change that I'm still bisecting [1]
On Fri, Oct 27, 2023 at 6:55 AM Jeff Law wrote:
>
>
>
> On 10/27/23 01:49, Robin Dapp wrote:
> >> @@ -346,7 +346,7 @@ static const struct riscv_tune_param rocket_tune_info
> >> = {
> >> {COSTS_N_INSNS (4), COSTS_N_INSNS (5)}, /* fp_mul */
> >> {COSTS_N_INSNS (20), COSTS_N_INSNS (20)},
On 10/27/23 11:56, Patrick O'Neill wrote:
GCC recently changed to emit __riscv_restore_5 which causes this
testcase to fail.
This patch updates the regex to be more robust to change by accepting
any number after __riscv_save_ and __riscv_restore_.
gcc/testsuite/ChangeLog:
*
On Thu, 26 Oct 2023 at 23:40, Gerald Pfeifer wrote:
>
> On Thu, 26 Oct 2023, Sam James wrote:
> > These options both enabled more checking within the C++ standard library
> > and can expose errors in submitted code.
>
> This is a good addition, thank you! I was going to approve/push, but it's
>
On 10/23/23 02:37, Florian Weimer wrote:
Current glibc headers only declare fputs_unlocked for _GNU_SOURCE,
so define it to obtain an official prototype.
Add a fallback prototype declaration for other systems that do not
have fputs_unlocked. This seems to the most straightforward approach
On 10/23/23 03:54, pan2...@intel.com wrote:
From: Pan Li
The vsetvl asm check is unnecessary for the vector convert. We
should be focus for constrait and leave the vsetvl test to the
vsetvl pass.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Remove the
On 10/20/23 07:52, Filip Kastl wrote:
On Fri 2023-10-20 15:50:25, Filip Kastl wrote:
Bootstraped and tested* on x86_64-pc-linux-gnu.
* One testcase (pr79691.c) did regress. However that is because the test is
dependent on a certain variable not being copy propagated. I will go into more
About where we should insert the new __builtin_with_access_and_size:
> On Oct 26, 2023, at 2:54 PM, Qing Zhao wrote:
>
>
>
>> On Oct 26, 2023, at 10:05 AM, Richard Biener
>> wrote:
>>
>>
>>
>>> Am 26.10.2023 um 12:14 schrieb Martin Uecker :
>>>
>>> Am Donnerstag, dem 26.10.2023 um
This trivial patch adds the "operands" keyword to the condition in a
couple of patterns that cause warnings about "missing" mode specifiers.
With the iterators, there were a large number of warnings about these
cases that have now been silenced.
Andrewamdgcn: silence warnings
The operands
On 10/27/23 11:34, Patrick O'Neill wrote:
On 8/25/23 15:36, Jeff Law wrote:
Spurred by Jivan's patch and a desire for cleaner testresults, I went
ahead and make the stack_save_restore tests independent of the precise
stack size by using a regexp.
Pushed to the trunk.
Jeff
Hi Jeff, A
On 10/27/23 11:02, Jeff Law wrote:
On 10/27/23 11:56, Patrick O'Neill wrote:
GCC recently changed to emit __riscv_restore_5 which causes this
testcase to fail.
This patch updates the regex to be more robust to change by accepting
any number after __riscv_save_ and __riscv_restore_.
sew64_scalar_helper is handling SEW64 vx instruction pattern on RV32 system.
According to RVV ISA, we can directly use vx instruction of SEW64 on RV32 system
since RV32 GR reg is 32bit.
Consider this following case:
vsetvl e64m1
vadd.vx v,v,x
will be transform by sew64_scalar_helper:
vsetvl
On Fri, 27 Oct 2023, Jason Merrill wrote:
> On 10/27/23 15:55, Patrick Palka wrote:
> > With the previous two patches in place, we can now extend our
> > deletedness diagnostic to note the other considered candidates, e.g.:
> >
> >deleted16.C: In function 'int main()':
> >
On Fri, 27 Oct 2023, Patrick Palka wrote:
> On Fri, 27 Oct 2023, Jason Merrill wrote:
>
> > On 10/27/23 15:55, Patrick Palka wrote:
> > > With the previous two patches in place, we can now extend our
> > > deletedness diagnostic to note the other considered candidates, e.g.:
> > >
> > >
On 10/27/23 14:31, Patrick O'Neill wrote:
Hi Fei,
A recent change to GCC [1] updated the the registers in the cm.push and
cm.pop insns for these testcases:
|FAIL: gcc.target/riscv/rv32i_zcmp.c -Os check-function-bodies test1
FAIL: gcc.target/riscv/rv32i_zcmp.c -Os check-function-bodies
Hi!
To close the loop here:
On 2023-09-27T00:25:16+0200, I wrote:
> On 2023-09-20T13:59:53+0200, Arthur Cohen wrote:
>> From: Pierre-Emmanuel Patry
>>
>> Define the libgrust directory as a host compilation module as well as
>> for targets.
>
>> --- a/Makefile.def
>> +++ b/Makefile.def
>> @@
On 10/27/23 15:55, Patrick Palka wrote:
With the previous two patches in place, we can now extend our
deletedness diagnostic to note the other considered candidates, e.g.:
deleted16.C: In function 'int main()':
deleted16.C:10:4: error: use of deleted function 'void f(int)'
10 |
On 10/27/23 14:31, Patrick O'Neill wrote:
Hi Fei,
A recent change to GCC [1] updated the the registers in the cm.push and
cm.pop insns for these testcases:
|FAIL: gcc.target/riscv/rv32i_zcmp.c -Os check-function-bodies test1
FAIL: gcc.target/riscv/rv32i_zcmp.c -Os check-function-bodies
I've been under the weather so I took a few days break, I honestly was
also very reluctant to pick it back up. The current problem is what I
like to call "not friendly", but I am back at it now.
> > I don't understand what this means exactly, under what circumstances
> > would find the member
Hi!
Short Friday evening status update:
On 2023-10-27T16:20:34+0200, I wrote:
> Short Friday afternoon status update:
>
> On 2023-10-27T08:51:12+0100, Iain Sandoe wrote:
>>> On 26 Oct 2023, at 09:21, Thomas Schwinge wrote:
>>> First, I've pushed into GCC upstream Git branch
On 10/27/23 10:16, Bernhard Reutner-Fischer wrote:
On Wed, 25 Oct 2023 16:41:07 +0530
Ajit Agarwal wrote:
On 25/10/23 2:19 am, Vineet Gupta wrote:
On 10/24/23 13:36, rep.dot@gmail.com wrote:
As said, I don't see why the below was not cleaned up before the V1 submission.
Iff it breaks
On Fri, Oct 27, 2023 at 4:00 AM Iain Sandoe wrote:
>
> Hi Richard,
>
> > On 26 Oct 2023, at 21:00, Iain Sandoe wrote:
>
> >> On 26 Oct 2023, at 20:49, Richard Sandiford
> >> wrote:
> >>
> >> Iain Sandoe writes:
> >>> This was written before Thomas' modification to the ELF-handling to allow
>
On Fri, 27 Oct 2023, Patrick Palka wrote:
> On Fri, 27 Oct 2023, Patrick Palka wrote:
>
> > On Fri, 20 Oct 2023, Jason Merrill wrote:
> >
> > > Tested x86_64-pc-linux-gnu, applying to trunk. Patrick, sorry I didn't
> > > apply
> > > this sooner.
> > >
> > > -- 8< --
> > >
> > > In r13-3766
On Fri, 27 Oct 2023, Patrick Palka wrote:
> On Fri, 20 Oct 2023, Jason Merrill wrote:
>
> > Tested x86_64-pc-linux-gnu, applying to trunk. Patrick, sorry I didn't
> > apply
> > this sooner.
> >
> > -- 8< --
> >
> > In r13-3766 I changed the logic at the end of tourney to avoid redundant
> >
On 10/27/23 15:55, Patrick Palka wrote:
New in patch 1/3:
* consistently use "non-viable" instead of "unviable"
throughout
* make 'champ' and 'challenger' in 'tourney' be z_candidate**
to simplify moving 'champ' to the front of the list. drive-by
cleanups in tourney,
On 8/25/23 16:49, Jakub Jelinek wrote:
Hi!
This paper voted in as DR makes some multi-character literals ill-formed.
'abcd' stays valid, but e.g. 'á' is newly invalid in UTF-8 exec charset
while valid e.g. in ISO-8859-1, because it is a single character which needs
2 bytes to be encoded.
The
On Fri, 20 Oct 2023, Jason Merrill wrote:
> Tested x86_64-pc-linux-gnu, applying to trunk. Patrick, sorry I didn't apply
> this sooner.
>
> -- 8< --
>
> In r13-3766 I changed the logic at the end of tourney to avoid redundant
> comparisons, but the change also meant skipping any less-good
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