Re: [PATCH] Support folding min(poly,poly) to const

2023-09-07 Thread Andrew Pinski via Gcc-patches
On Thu, Sep 7, 2023 at 10:25 PM Lehua Ding  wrote:
>
> Hi,
>
> This patch adds support that tries to fold `MIN (poly, poly)` to
> a constant. Consider the following C Code:

Does it make sense to handle max also?

Thanks,
Andrew


>
> ```
> void foo2 (int* restrict a, int* restrict b, int n)
> {
> for (int i = 0; i < 3; i += 1)
>   a[i] += b[i];
> }
> ```
>
> Before this patch:
>
> ```
> void foo2 (int * restrict a, int * restrict b, int n)
> {
>   vector([4,4]) int vect__7.27;
>   vector([4,4]) int vect__6.26;
>   vector([4,4]) int vect__4.23;
>   unsigned long _32;
>
>[local count: 268435456]:
>   _32 = MIN_EXPR <3, POLY_INT_CST [4, 4]>;
>   vect__4.23_20 = .MASK_LEN_LOAD (a_11(D), 32B, { -1, ... }, _32, 0);
>   vect__6.26_15 = .MASK_LEN_LOAD (b_12(D), 32B, { -1, ... }, _32, 0);
>   vect__7.27_9 = vect__6.26_15 + vect__4.23_20;
>   .MASK_LEN_STORE (a_11(D), 32B, { -1, ... }, _32, 0, vect__7.27_9); [tail 
> call]
>   return;
>
> }
> ```
>
> After this patch:
>
> ```
> void foo2 (int * restrict a, int * restrict b, int n)
> {
>   vector([4,4]) int vect__7.27;
>   vector([4,4]) int vect__6.26;
>   vector([4,4]) int vect__4.23;
>
>[local count: 268435456]:
>   vect__4.23_20 = .MASK_LEN_LOAD (a_11(D), 32B, { -1, ... }, 3, 0);
>   vect__6.26_15 = .MASK_LEN_LOAD (b_12(D), 32B, { -1, ... }, 3, 0);
>   vect__7.27_9 = vect__6.26_15 + vect__4.23_20;
>   .MASK_LEN_STORE (a_11(D), 32B, { -1, ... }, 3, 0, vect__7.27_9); [tail call]
>   return;
>
> }
> ```
>
> For RISC-V RVV, one branch instruction can be reduced:
>
> Before this patch:
>
> ```
> foo2:
> csrra4,vlenb
> srlia4,a4,2
> li  a5,3
> bleua5,a4,.L5
> mv  a5,a4
> .L5:
> vsetvli zero,a5,e32,m1,ta,ma
> ...
> ```
>
> After this patch.
>
> ```
> foo2:
> vsetivlizero,3,e32,m1,ta,ma
> ...
> ```
>
> Best,
> Lehua
>
> gcc/ChangeLog:
>
> * fold-const.cc (can_min_p): New function.
> (poly_int_binop): Try fold MIN_EXPR.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/autovec/vls/div-1.c: Adjust.
> * gcc.target/riscv/rvv/autovec/vls/shift-3.c: Adjust.
> * gcc.target/riscv/rvv/autovec/fold-min-poly.c: New test.
>
> ---
>  gcc/fold-const.cc | 33 +++
>  .../riscv/rvv/autovec/fold-min-poly.c | 24 ++
>  .../gcc.target/riscv/rvv/autovec/vls/div-1.c  |  2 +-
>  .../riscv/rvv/autovec/vls/shift-3.c   |  2 +-
>  4 files changed, 59 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
>
> diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc
> index 1da498a3152..f7f793cc326 100644
> --- a/gcc/fold-const.cc
> +++ b/gcc/fold-const.cc
> @@ -1213,6 +1213,34 @@ wide_int_binop (wide_int ,
>return true;
>  }
>
> +/* Returns true if we know who is smaller or equal, ARG1 or ARG2., and set 
> the
> +   min value to RES.  */
> +bool
> +can_min_p (const_tree arg1, const_tree arg2, poly_wide_int )
> +{
> +  if (tree_fits_poly_int64_p (arg1) && tree_fits_poly_int64_p (arg2))
> +{
> +  if (known_le (tree_to_poly_int64 (arg1), tree_to_poly_int64 (arg2)))
> +   res = wi::to_poly_wide (arg1);
> +  else if (known_le (tree_to_poly_int64 (arg2), tree_to_poly_int64 
> (arg1)))
> +   res = wi::to_poly_wide (arg2);
> +  else
> +   return false;
> +}
> +  else if (tree_fits_poly_uint64_p (arg1) && tree_fits_poly_uint64_p (arg2))
> +{
> +  if (known_le (tree_to_poly_uint64 (arg1), tree_to_poly_uint64 (arg2)))
> +   res = wi::to_poly_wide (arg1);
> +  else if (known_le (tree_to_poly_int64 (arg2), tree_to_poly_int64 
> (arg1)))
> +   res = wi::to_poly_wide (arg2);
> +  else
> +   return false;
> +}
> +  else
> +return false;
> +  return true;
> +}
> +
>  /* Combine two poly int's ARG1 and ARG2 under operation CODE to
> produce a new constant in RES.  Return FALSE if we don't know how
> to evaluate CODE at compile-time.  */
> @@ -1261,6 +1289,11 @@ poly_int_binop (poly_wide_int , enum tree_code 
> code,
> return false;
>break;
>
> +case MIN_EXPR:
> +  if (!can_min_p (arg1, arg2, res))
> +   return false;
> +  break;
> +
>  default:
>return false;
>  }
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
> new file mode 100644
> index 000..de4c472c76e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
> @@ -0,0 +1,24 @@
> +/* { dg-do compile } */
> +/* { dg-options " -march=rv64gcv_zvl128b -mabi=lp64d -O3 --param 
> riscv-autovec-preference=scalable --param riscv-autovec-lmul=m1 
> -fno-vect-cost-model" } */
> +
> +void foo1 (int* restrict a, int* restrict b, int n)
> +{
> +for (int i = 0; i < 4; i += 1)
> +  a[i] += b[i];
> +}
> +
> +void foo2 (int* restrict a, int* 

[PATCH] Support folding min(poly,poly) to const

2023-09-07 Thread Lehua Ding
Hi,

This patch adds support that tries to fold `MIN (poly, poly)` to
a constant. Consider the following C Code:

```
void foo2 (int* restrict a, int* restrict b, int n)
{
for (int i = 0; i < 3; i += 1)
  a[i] += b[i];
}
```

Before this patch:

```
void foo2 (int * restrict a, int * restrict b, int n)
{
  vector([4,4]) int vect__7.27;
  vector([4,4]) int vect__6.26;
  vector([4,4]) int vect__4.23;
  unsigned long _32;

   [local count: 268435456]:
  _32 = MIN_EXPR <3, POLY_INT_CST [4, 4]>;
  vect__4.23_20 = .MASK_LEN_LOAD (a_11(D), 32B, { -1, ... }, _32, 0);
  vect__6.26_15 = .MASK_LEN_LOAD (b_12(D), 32B, { -1, ... }, _32, 0);
  vect__7.27_9 = vect__6.26_15 + vect__4.23_20;
  .MASK_LEN_STORE (a_11(D), 32B, { -1, ... }, _32, 0, vect__7.27_9); [tail call]
  return;

}
```

After this patch:

```
void foo2 (int * restrict a, int * restrict b, int n)
{
  vector([4,4]) int vect__7.27;
  vector([4,4]) int vect__6.26;
  vector([4,4]) int vect__4.23;

   [local count: 268435456]:
  vect__4.23_20 = .MASK_LEN_LOAD (a_11(D), 32B, { -1, ... }, 3, 0);
  vect__6.26_15 = .MASK_LEN_LOAD (b_12(D), 32B, { -1, ... }, 3, 0);
  vect__7.27_9 = vect__6.26_15 + vect__4.23_20;
  .MASK_LEN_STORE (a_11(D), 32B, { -1, ... }, 3, 0, vect__7.27_9); [tail call]
  return;

}
```

For RISC-V RVV, one branch instruction can be reduced:

Before this patch:

```
foo2:
csrra4,vlenb
srlia4,a4,2
li  a5,3
bleua5,a4,.L5
mv  a5,a4
.L5:
vsetvli zero,a5,e32,m1,ta,ma
...
```

After this patch.

```
foo2:
vsetivlizero,3,e32,m1,ta,ma
...
```

Best,
Lehua

gcc/ChangeLog:

* fold-const.cc (can_min_p): New function.
(poly_int_binop): Try fold MIN_EXPR.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/div-1.c: Adjust.
* gcc.target/riscv/rvv/autovec/vls/shift-3.c: Adjust.
* gcc.target/riscv/rvv/autovec/fold-min-poly.c: New test.

---
 gcc/fold-const.cc | 33 +++
 .../riscv/rvv/autovec/fold-min-poly.c | 24 ++
 .../gcc.target/riscv/rvv/autovec/vls/div-1.c  |  2 +-
 .../riscv/rvv/autovec/vls/shift-3.c   |  2 +-
 4 files changed, 59 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c

diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc
index 1da498a3152..f7f793cc326 100644
--- a/gcc/fold-const.cc
+++ b/gcc/fold-const.cc
@@ -1213,6 +1213,34 @@ wide_int_binop (wide_int ,
   return true;
 }
 
+/* Returns true if we know who is smaller or equal, ARG1 or ARG2., and set the
+   min value to RES.  */
+bool
+can_min_p (const_tree arg1, const_tree arg2, poly_wide_int )
+{
+  if (tree_fits_poly_int64_p (arg1) && tree_fits_poly_int64_p (arg2))
+{
+  if (known_le (tree_to_poly_int64 (arg1), tree_to_poly_int64 (arg2)))
+   res = wi::to_poly_wide (arg1);
+  else if (known_le (tree_to_poly_int64 (arg2), tree_to_poly_int64 (arg1)))
+   res = wi::to_poly_wide (arg2);
+  else
+   return false;
+}
+  else if (tree_fits_poly_uint64_p (arg1) && tree_fits_poly_uint64_p (arg2))
+{
+  if (known_le (tree_to_poly_uint64 (arg1), tree_to_poly_uint64 (arg2)))
+   res = wi::to_poly_wide (arg1);
+  else if (known_le (tree_to_poly_int64 (arg2), tree_to_poly_int64 (arg1)))
+   res = wi::to_poly_wide (arg2);
+  else
+   return false;
+}
+  else
+return false;
+  return true;
+}
+
 /* Combine two poly int's ARG1 and ARG2 under operation CODE to
produce a new constant in RES.  Return FALSE if we don't know how
to evaluate CODE at compile-time.  */
@@ -1261,6 +1289,11 @@ poly_int_binop (poly_wide_int , enum tree_code code,
return false;
   break;
 
+case MIN_EXPR:
+  if (!can_min_p (arg1, arg2, res))
+   return false;
+  break;
+
 default:
   return false;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
new file mode 100644
index 000..de4c472c76e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/fold-min-poly.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options " -march=rv64gcv_zvl128b -mabi=lp64d -O3 --param 
riscv-autovec-preference=scalable --param riscv-autovec-lmul=m1 
-fno-vect-cost-model" } */
+
+void foo1 (int* restrict a, int* restrict b, int n)
+{
+for (int i = 0; i < 4; i += 1)
+  a[i] += b[i];
+}
+
+void foo2 (int* restrict a, int* restrict b, int n)
+{
+for (int i = 0; i < 3; i += 1)
+  a[i] += b[i];
+}
+
+void foo3 (int* restrict a, int* restrict b, int n)
+{
+for (int i = 0; i < 5; i += 1)
+  a[i] += b[i];
+}
+
+/* { dg-final { scan-assembler-not {\tcsrr\t} } } */
+/* { dg-final { scan-assembler {\tvsetivli\tzero,4,e32,m1,t[au],m[au]} } } */
+/* { dg-final { scan-assembler {\tvsetivli\tzero,3,e32,m1,t[au],m[au]} } } */
diff --git 

[PATCH] Remove constraint modifier % for fcmaddcph/fcmulcph since there're not commutative.

2023-09-07 Thread liuhongt via Gcc-patches
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,} on SPR.
Ready push to trunk and backport to GCC13/GCC12.

gcc/ChangeLog:

PR target/111306
* config/i386/sse.md (int_comm): New int_attr.
(fma__):
Remove % for Complex conjugate operations since they're not
commutative.
(fma___pair): Ditto.
(___mask): Ditto.
(cmul3): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr111306.c: New test.
---
 gcc/config/i386/sse.md   | 16 ---
 gcc/testsuite/gcc.target/i386/pr111306.c | 36 
 2 files changed, 48 insertions(+), 4 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr111306.c

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 6d3ae8dea0c..833546c5228 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6480,6 +6480,14 @@ (define_int_attr complexpairopname
[(UNSPEC_COMPLEX_FMA_PAIR "fmaddc")
 (UNSPEC_COMPLEX_FCMA_PAIR "fcmaddc")])
 
+(define_int_attr int_comm
+   [(UNSPEC_COMPLEX_FMA "%")
+(UNSPEC_COMPLEX_FMA_PAIR "%")
+(UNSPEC_COMPLEX_FCMA "")
+(UNSPEC_COMPLEX_FCMA_PAIR "")
+(UNSPEC_COMPLEX_FMUL "%")
+(UNSPEC_COMPLEX_FCMUL "")])
+
 (define_int_attr conj_op
[(UNSPEC_COMPLEX_FMA "")
 (UNSPEC_COMPLEX_FCMA "_conj")
@@ -6593,7 +6601,7 @@ (define_expand "cmla4"
 (define_insn "fma__"
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=")
(unspec:VHF_AVX512VL
- [(match_operand:VHF_AVX512VL 1 "" "%v")
+ [(match_operand:VHF_AVX512VL 1 "" "v")
   (match_operand:VHF_AVX512VL 2 "" 
"")
   (match_operand:VHF_AVX512VL 3 "" "0")]
   UNSPEC_COMPLEX_F_C_MA))]
@@ -6658,7 +,7 @@ (define_insn_and_split 
"fma___fma_zero"
 (define_insn "fma___pair"
  [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=")
(unspec:VF1_AVX512VL
-[(match_operand:VF1_AVX512VL 1 "vector_operand" "%v")
+[(match_operand:VF1_AVX512VL 1 "vector_operand" "v")
  (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr")
  (match_operand:VF1_AVX512VL 3 "vector_operand" "0")]
  UNSPEC_COMPLEX_F_C_MA_PAIR))]
@@ -6727,7 +6735,7 @@ (define_insn 
"___mask"
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=")
(vec_merge:VHF_AVX512VL
  (unspec:VHF_AVX512VL
-   [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "%v")
+   [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "v")
 (match_operand:VHF_AVX512VL 2 "nonimmediate_operand" 
"")
 (match_operand:VHF_AVX512VL 3 "register_operand" "0")]
 UNSPEC_COMPLEX_F_C_MA)
@@ -6752,7 +6760,7 @@ (define_expand "cmul3"
 (define_insn "__"
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=")
  (unspec:VHF_AVX512VL
-   [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "%v")
+   [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "v")
 (match_operand:VHF_AVX512VL 2 "nonimmediate_operand" 
"")]
 UNSPEC_COMPLEX_F_C_MUL))]
   "TARGET_AVX512FP16 && "
diff --git a/gcc/testsuite/gcc.target/i386/pr111306.c 
b/gcc/testsuite/gcc.target/i386/pr111306.c
new file mode 100644
index 000..541725ebdad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr111306.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl" } */
+/* { dg-require-effective-target avx512fp16 } */
+
+#define AVX512FP16
+#include "avx512f-helper.h"
+
+__attribute__((optimize("O2"),noipa))
+void func1(_Float16 *a, _Float16 *b, int n, _Float16 *c) {
+  __m512h rA = _mm512_loadu_ph(a);
+  for (int i = 0; i < n; i += 32) {
+__m512h rB = _mm512_loadu_ph(b + i);
+_mm512_storeu_ph(c + i, _mm512_fcmul_pch(rB, rA));
+  }
+}
+
+void
+test_512 (void)
+{
+  int n = 32;
+  _Float16 a[n], b[n], c[n];
+  _Float16 exp[n];
+  for (int i = 1; i <= n; i++) {
+a[i - 1] = i & 1 ? -i : i;
+b[i - 1] = i;
+  }
+
+  func1(a, b, n, c);
+  for (int i = 0; i < n / 32; i += 2) {
+if (c[i] != a[i] * b[i] + a[i+1] * b[i+1]
+   || c[i+1] != a[i] * b[i+1] - a[i+1]*b[i])
+  __builtin_abort ();
+}
+}
+
+
-- 
2.31.1



Re: [PATCH] libstdc++: Reduce output of 'make check'

2023-09-07 Thread Eric Gallager via Gcc-patches
Maybe use $(AM_V_at) instead? That would allow it to be controlled by
the --enable-silent-rules flag to configure, as well as make V=1 vs.
make V=0 too.

On Thu, Sep 7, 2023 at 9:32 AM Jonathan Wakely via Gcc-patches
 wrote:
>
> Any objections to this change?
>
> -- >8 --
>
> This removes the 39 lines of shell commands that get echoed when
> starting the testsuite. The fact that near the end of that output it
> prints `echo "WARNING: could not find \`runtest'" 1>&2; :;` makes it
> look like that warning is actually being shown the the user.
>
> Suppress echoing the recipe, so that users only see the actual output
> from the testsuite, not the makefile recipe as well.
>
> libstdc++-v3/ChangeLog:
>
> * testsuite/Makefile.am (check-DEJAGNU): Use @ in recipe.
> * testsuite/Makefile.in: Regenerate.
> ---
>  libstdc++-v3/testsuite/Makefile.am | 2 +-
>  libstdc++-v3/testsuite/Makefile.in | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/libstdc++-v3/testsuite/Makefile.am 
> b/libstdc++-v3/testsuite/Makefile.am
> index 7adc5318192..4cee585fd8e 100644
> --- a/libstdc++-v3/testsuite/Makefile.am
> +++ b/libstdc++-v3/testsuite/Makefile.am
> @@ -117,7 +117,7 @@ $(check_DEJAGNU_normal_targets): check-DEJAGNUnormal%: 
> normal%/site.exp
>
>  # Run the testsuite in normal mode.
>  check-DEJAGNU $(check_DEJAGNU_normal_targets): check-DEJAGNU%: site.exp
> -   $(if $*,@)AR="$(AR)"; export AR; \
> +   @$(if $*,@)AR="$(AR)"; export AR; \
> RANLIB="$(RANLIB)"; export RANLIB; \
> if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \
>   rm -rf normal-parallel || true; \
>


Re: Re: [PATCH 3/3] [V2] [RISC-V] support cm.mva01s cm.mvsa01 in zcmp

2023-09-07 Thread Fei Gao
On 2023-09-08 04:33  Palmer Dabbelt  wrote:
>
>On Thu, 07 Sep 2023 13:16:36 PDT (-0700), dimi...@dinux.eu wrote:
>> Hi,
>>
>> This patch appears to have caused PR 111259. 
Hi Patrick 

We're reproducing the issue also. 

One thing that puzzles me is why a zcmp predicate casused
a regression in rv64gc single lib build. The new define_insn
and define_peephole2 are all gated by TARGET_ZCMP, which
is false when building libgcc.

Could you please share more about your findings regading 
"This patch appears to have caused PR 111259"?

BR, 
Fei

>
>Thanks.  Looks like wer'e not running our tests with RTL checking,
>Patrick is going to try and see if we've got compute time left for some
>builds -- even just having builds with checking would be a good one, we
>get bit by these bugs from time to time.
>
>I'm spinning up a --enable-checking=yes build.  Maybe we just need
>something like
>
>    diff --git a/gcc/config/riscv/predicates.md 
>b/gcc/config/riscv/predicates.md
>    index 53e7c1d03aa..aa4f02c67d5 100644
>    --- a/gcc/config/riscv/predicates.md
>    +++ b/gcc/config/riscv/predicates.md
>    @@ -172,11 +172,11 @@ (define_predicate "stack_pop_up_to_s11_operand"
>
> ;; ZCMP predicates
> (define_predicate "a0a1_reg_operand"
>    -  (and (match_operand 0 "register_operand")
>    +  (and (match_code "reg")
>    (match_test "IN_RANGE (REGNO (op), A0_REGNUM, A1_REGNUM)")))
>
> (define_predicate "zcmp_mv_sreg_operand"
>    -  (and (match_operand 0 "register_operand")
>    +  (and (match_code "reg")
>    (match_test "TARGET_RVE ? IN_RANGE (REGNO (op), S0_REGNUM, 
>S1_REGNUM)
> : IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
> || IN_RANGE (REGNO (op), S2_REGNUM, S7_REGNUM)")))
>
>> Regards,
>> Dimitar
>>
>> On Tue, Aug 29, 2023 at 08:37:46AM +, Fei Gao wrote:
>>> From: Die Li 
>>>
>>> Signed-off-by: Die Li 
>>> Co-Authored-By: Fei Gao 
>>>
>>> gcc/ChangeLog:
>>>
>>> * config/riscv/peephole.md: New pattern.
>>> * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
>>> (zcmp_mv_sreg_operand): New predicate.
>>> * config/riscv/riscv.md: New predicate.
>>> * config/riscv/zc.md (*mva01s): New pattern.
>>> (*mvsa01): New pattern.
>>>
>>> gcc/testsuite/ChangeLog:
>>>
>>> * gcc.target/riscv/cm_mv_rv32.c: New test.
>>> ---
>>>  gcc/config/riscv/peephole.md    | 28 +
>>>  gcc/config/riscv/predicates.md  | 11 
>>>  gcc/config/riscv/riscv.md   |  1 +
>>>  gcc/config/riscv/zc.md  | 22 
>>>  gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c | 23 +
>>>  5 files changed, 85 insertions(+)
>>>  create mode 100644 gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c
>>>
>>> diff --git a/gcc/config/riscv/peephole.md b/gcc/config/riscv/peephole.md
>>> index 0ef0c04410b..92e57f9a447 100644
>>> --- a/gcc/config/riscv/peephole.md
>>> +++ b/gcc/config/riscv/peephole.md
>>> @@ -38,3 +38,31 @@
>>>  {
>>>    operands[5] = GEN_INT (INTVAL (operands[2]) - INTVAL (operands[5]));
>>>  })
>>> +
>>> +;; ZCMP
>>> +(define_peephole2
>>> +  [(set (match_operand:X 0 "a0a1_reg_operand")
>>> +    (match_operand:X 1 "zcmp_mv_sreg_operand"))
>>> +   (set (match_operand:X 2 "a0a1_reg_operand")
>>> +    (match_operand:X 3 "zcmp_mv_sreg_operand"))]
>>> +  "TARGET_ZCMP
>>> +   && (REGNO (operands[2]) != REGNO (operands[0]))"
>>> +  [(parallel [(set (match_dup 0)
>>> +   (match_dup 1))
>>> +  (set (match_dup 2)
>>> +   (match_dup 3))])]
>>> +)
>>> +
>>> +(define_peephole2
>>> +  [(set (match_operand:X 0 "zcmp_mv_sreg_operand")
>>> +    (match_operand:X 1 "a0a1_reg_operand"))
>>> +   (set (match_operand:X 2 "zcmp_mv_sreg_operand")
>>> +    (match_operand:X 3 "a0a1_reg_operand"))]
>>> +  "TARGET_ZCMP
>>> +   && (REGNO (operands[0]) != REGNO (operands[2]))
>>> +   && (REGNO (operands[1]) != REGNO (operands[3]))"
>>> +  [(parallel [(set (match_dup 0)
>>> +   (match_dup 1))
>>> +  (set (match_dup 2)
>>> +   (match_dup 3))])]
>>> +)
>>> diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
>>> index 3ef09996a85..772f45df65c 100644
>>> --- a/gcc/config/riscv/predicates.md
>>> +++ b/gcc/config/riscv/predicates.md
>>> @@ -165,6 +165,17 @@
>>>    (and (match_code "const_int")
>>> (match_test "riscv_zcmp_valid_stack_adj_bytes_p (INTVAL (op), 
>>>13)")))
>>>
>>> +;; ZCMP predicates
>>> +(define_predicate "a0a1_reg_operand"
>>> +  (and (match_operand 0 "register_operand")
>>> +   (match_test "IN_RANGE (REGNO (op), A0_REGNUM, A1_REGNUM)")))
>>> +
>>> +(define_predicate "zcmp_mv_sreg_operand"
>>> +  (and (match_operand 0 "register_operand")
>>> +   (match_test "TARGET_RVE ? IN_RANGE (REGNO (op), S0_REGNUM, 
>>> S1_REGNUM)
>>> +    : IN_RANGE (REGNO (op), S0_REGNUM, 

[PATCH] LoongArch: Enable -fsched-pressure by default at -O1 and higher.

2023-09-07 Thread Guo Jie
gcc/ChangeLog:

* common/config/loongarch/loongarch-common.cc:
(default_options loongarch_option_optimization_table):
Default to -fsched-pressure.

---
 gcc/common/config/loongarch/loongarch-common.cc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/common/config/loongarch/loongarch-common.cc 
b/gcc/common/config/loongarch/loongarch-common.cc
index c5ed37d27a6..b6901910b70 100644
--- a/gcc/common/config/loongarch/loongarch-common.cc
+++ b/gcc/common/config/loongarch/loongarch-common.cc
@@ -36,6 +36,7 @@ static const struct default_options 
loongarch_option_optimization_table[] =
   { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
   { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
   { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
+  { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
   { OPT_LEVELS_NONE, 0, NULL, 0 }
 };
 
-- 
2.20.1



[PATCH v5] RISC-V:Optimize the MASK opt generation

2023-09-07 Thread Feng Wang
Accoring to Kito's advice, using "MASK(name) Var(other_flag_name)"
to generate MASK and TARGET MACRO automatically.
This patch improve the MACRO generation of MASK_* and TARGET_*.
Due to the more and more riscv extensions are added, the default target_flag
is full.
Before this patch,if you want to add new MACRO,you should define the
MACRO in the riscv-opts.h manually.
After this patch, you just need two steps:
1.Define the new TargetVariable.
2.Define "MASK(name) Var(new_target_flag).

gcc/ChangeLog:

* config/riscv/riscv-opts.h (MASK_ZICSR):
(MASK_ZIFENCEI): Delete;
(MASK_ZIHINTNTL):Ditto;
(MASK_ZIHINTPAUSE):  Ditto;
(TARGET_ZICSR):  Ditto;
(TARGET_ZIFENCEI):   Ditto;
(TARGET_ZIHINTNTL):  Ditto;
(TARGET_ZIHINTPAUSE):Ditto;
(MASK_ZAWRS):Ditto;
(TARGET_ZAWRS):  Ditto;
(MASK_ZBA):  Ditto;
(MASK_ZBB):  Ditto;
(MASK_ZBC):  Ditto;
(MASK_ZBS):  Ditto;
(TARGET_ZBA):Ditto;
(TARGET_ZBB):Ditto;
(TARGET_ZBC):Ditto;
(TARGET_ZBS):Ditto;
(MASK_ZFINX):Ditto;
(MASK_ZDINX):Ditto;
(MASK_ZHINX):Ditto;
(MASK_ZHINXMIN): Ditto;
(TARGET_ZFINX):  Ditto;
(TARGET_ZDINX):  Ditto;
(TARGET_ZHINX):  Ditto;
(TARGET_ZHINXMIN):   Ditto;
(MASK_ZBKB): Ditto;
(MASK_ZBKC): Ditto;
(MASK_ZBKX): Ditto;
(MASK_ZKNE): Ditto;
(MASK_ZKND): Ditto;
(MASK_ZKNH): Ditto;
(MASK_ZKR):  Ditto;
(MASK_ZKSED):Ditto;
(MASK_ZKSH): Ditto;
(MASK_ZKT):  Ditto;
(TARGET_ZBKB):   Ditto;
(TARGET_ZBKC):   Ditto;
(TARGET_ZBKX):   Ditto;
(TARGET_ZKNE):   Ditto;
(TARGET_ZKND):   Ditto;
(TARGET_ZKNH):   Ditto;
(TARGET_ZKR):Ditto;
(TARGET_ZKSED):  Ditto;
(TARGET_ZKSH):   Ditto;
(TARGET_ZKT):Ditto;
(MASK_ZTSO): Ditto;
(TARGET_ZTSO):   Ditto;
(MASK_VECTOR_ELEN_32):   Ditto;
(MASK_VECTOR_ELEN_64):   Ditto;
(MASK_VECTOR_ELEN_FP_32):Ditto;
(MASK_VECTOR_ELEN_FP_64):Ditto;
(MASK_VECTOR_ELEN_FP_16):Ditto;
(TARGET_VECTOR_ELEN_32): Ditto;
(TARGET_VECTOR_ELEN_64): Ditto;
(TARGET_VECTOR_ELEN_FP_32):Ditto;
(TARGET_VECTOR_ELEN_FP_64):Ditto;
(TARGET_VECTOR_ELEN_FP_16):Ditto;
 (MASK_ZVBB):   Ditto;
(MASK_ZVBC):   Ditto;
(TARGET_ZVBB): Ditto;
(TARGET_ZVBC): Ditto;
(MASK_ZVKG):   Ditto;
(MASK_ZVKNED): Ditto;
(MASK_ZVKNHA): Ditto;
(MASK_ZVKNHB): Ditto;
(MASK_ZVKSED): Ditto;
(MASK_ZVKSH):  Ditto;
(MASK_ZVKN):   Ditto;
(MASK_ZVKNC):  Ditto;
(MASK_ZVKNG):  Ditto;
(MASK_ZVKS):   Ditto;
(MASK_ZVKSC):  Ditto;
(MASK_ZVKSG):  Ditto;
(MASK_ZVKT):   Ditto;
(TARGET_ZVKG): Ditto;
(TARGET_ZVKNED):   Ditto;
(TARGET_ZVKNHA):   Ditto;
(TARGET_ZVKNHB):   Ditto;
(TARGET_ZVKSED):   Ditto;
(TARGET_ZVKSH):Ditto;
(TARGET_ZVKN): Ditto;
(TARGET_ZVKNC):Ditto;
(TARGET_ZVKNG):Ditto;
(TARGET_ZVKS): Ditto;
(TARGET_ZVKSC):Ditto;
(TARGET_ZVKSG):Ditto;
(TARGET_ZVKT): Ditto;
(MASK_ZVL32B): Ditto;
(MASK_ZVL64B): Ditto;
(MASK_ZVL128B):Ditto;
(MASK_ZVL256B):Ditto;
(MASK_ZVL512B):Ditto;
(MASK_ZVL1024B):   Ditto;
(MASK_ZVL2048B):   Ditto;
(MASK_ZVL4096B):   Ditto;
(MASK_ZVL8192B):   Ditto;
(MASK_ZVL16384B):  Ditto;
(MASK_ZVL32768B):  Ditto;
(MASK_ZVL65536B):  Ditto;
(TARGET_ZVL32B):   Ditto;
(TARGET_ZVL64B):   Ditto;
(TARGET_ZVL128B):  Ditto;
(TARGET_ZVL256B):  Ditto;
(TARGET_ZVL512B):  Ditto;
(TARGET_ZVL1024B): Ditto;
(TARGET_ZVL2048B): Ditto;
(TARGET_ZVL4096B): Ditto;
(TARGET_ZVL8192B): Ditto;
(TARGET_ZVL16384B):Ditto;
(TARGET_ZVL32768B):Ditto;
(TARGET_ZVL65536B):Ditto;
(MASK_ZICBOZ): Ditto;
(MASK_ZICBOM): Ditto;
(MASK_ZICBOP): Ditto;
(TARGET_ZICBOZ):   Ditto;
(TARGET_ZICBOM):   Ditto;
(TARGET_ZICBOP):   Ditto;
(MASK_ZICOND): Ditto;

[RFC PATCH 1/1] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t

2023-09-07 Thread Tsukasa OI via Gcc-patches
From: Tsukasa OI 

This is in parity with the LLVM commit 599421ae36c3 ("[RISCV] Re-define
sha256, Zksed, and Zksh intrinsics to use i32 types.").

SHA-256, SM3 and SM4 instructions operate on 32-bit integers and upper
32-bits have no effects on RV64 (the output is sign-extended from the
original 32-bit value).  In that sense, making those intrinsics only
operate on uint32_t is much more natural than XLEN-bits wide integers.

This commit reforms instructions and expansions based on 32-bit
instruction handling on RV64 (such as ADDW).

Before:
   riscv__si: For RV32, operate on uint32_t
   riscv__di: For RV64, operate on uint64_t
After:
  *riscv__si: For RV32, operate on uint32_t
   riscv__di_extended:
  For RV64, input is uint32_t and...
  output is sign-extended int64_t.
   riscv__si: Common and expands to either of above.
  On RV64, extract lower 32-bits from the int64_t result.

It also refines definitions of SHA-256, SM3 and SM4 intrinsics.

gcc/ChangeLog:

* config/riscv/crypto.md (riscv_sha256sig0_,
riscv_sha256sig1_, riscv_sha256sum0_,
riscv_sha256sum1_, riscv_sm3p0_, riscv_sm3p1_,
riscv_sm4ed_, riscv_sm4ks_): Remove and replace with
new insn/expansions.
(SHA256_OP, SM3_OP, SM4_OP): New iterators.
(sha256_op, sm3_op, sm4_op): New attributes for iteration.
(*riscv__si): New raw instruction for RV32.
(*riscv__si): Ditto.
(*riscv__si): Ditto.
(riscv__di_extended): New base instruction for RV64.
(riscv__di_extended): Ditto.
(riscv__di_extended): Ditto.
(riscv__si): New common instruction expansion.
(riscv__si): Ditto.
(riscv__si): Ditto.
* config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
"crypto_zksh" and "crypto_zksed".  Remove availability
"crypto_zksh{32,64}" and "crypto_zksed{32,64}".
* config/riscv/riscv-ftypes.def: Remove unused function type.
* config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
intrinsics to operate on uint32_t.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/zknh-sha256.c: Moved to...
* gcc.target/riscv/zknh-sha256-64.c: ...here.  Test RV64.
* gcc.target/riscv/zknh-sha256-32.c: New test for RV32.
* gcc.target/riscv/zksh64.c: Change the type.
* gcc.target/riscv/zksed64.c: Ditto.
---
 gcc/config/riscv/crypto.md| 161 --
 gcc/config/riscv/riscv-builtins.cc|   7 +-
 gcc/config/riscv/riscv-ftypes.def |   1 -
 gcc/config/riscv/riscv-scalar-crypto.def  |  24 +--
 .../gcc.target/riscv/zknh-sha256-32.c |  10 ++
 .../riscv/{zknh-sha256.c => zknh-sha256-64.c} |   8 +-
 gcc/testsuite/gcc.target/riscv/zksed64.c  |   4 +-
 gcc/testsuite/gcc.target/riscv/zksh64.c   |   4 +-
 8 files changed, 139 insertions(+), 80 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zknh-sha256-32.c
 rename gcc/testsuite/gcc.target/riscv/{zknh-sha256.c => zknh-sha256-64.c} (78%)

diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
index e4b7f0190dfe..03a1d03397d9 100644
--- a/gcc/config/riscv/crypto.md
+++ b/gcc/config/riscv/crypto.md
@@ -250,36 +250,47 @@
 
 ;; ZKNH - SHA256
 
-(define_insn "riscv_sha256sig0_"
-  [(set (match_operand:X 0 "register_operand" "=r")
-(unspec:X [(match_operand:X 1 "register_operand" "r")]
-  UNSPEC_SHA_256_SIG0))]
-  "TARGET_ZKNH"
-  "sha256sig0\t%0,%1"
-  [(set_attr "type" "crypto")])
-
-(define_insn "riscv_sha256sig1_"
-  [(set (match_operand:X 0 "register_operand" "=r")
-(unspec:X [(match_operand:X 1 "register_operand" "r")]
-  UNSPEC_SHA_256_SIG1))]
-  "TARGET_ZKNH"
-  "sha256sig1\t%0,%1"
+(define_int_iterator SHA256_OP [
+  UNSPEC_SHA_256_SIG0 UNSPEC_SHA_256_SIG1
+  UNSPEC_SHA_256_SUM0 UNSPEC_SHA_256_SUM1])
+(define_int_attr sha256_op [
+  (UNSPEC_SHA_256_SIG0 "sha256sig0") (UNSPEC_SHA_256_SIG1 "sha256sig1")
+  (UNSPEC_SHA_256_SUM0 "sha256sum0") (UNSPEC_SHA_256_SUM1 "sha256sum1")])
+
+(define_insn "*riscv__si"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")]
+   SHA256_OP))]
+  "TARGET_ZKNH && !TARGET_64BIT"
+  "\t%0,%1"
   [(set_attr "type" "crypto")])
 
-(define_insn "riscv_sha256sum0_"
-  [(set (match_operand:X 0 "register_operand" "=r")
-(unspec:X [(match_operand:X 1 "register_operand" "r")]
-  UNSPEC_SHA_256_SUM0))]
-  "TARGET_ZKNH"
-  "sha256sum0\t%0,%1"
+(define_insn "riscv__di_extended"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+(sign_extend:DI
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")]
+SHA256_OP)))]
+  "TARGET_ZKNH && TARGET_64BIT"
+  "\t%0,%1"
   [(set_attr "type" "crypto")])
 
-(define_insn "riscv_sha256sum1_"
-  [(set (match_operand:X 0 

[RFC PATCH 0/1] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t

2023-09-07 Thread Tsukasa OI via Gcc-patches
Hi,

This is built on another RFC PATCH "RISC-V: Change RISC-V bit manipulation
/ scalar crypto builtin types" and changes SHA-256, SM3 and SM4 intrinsics
operate on uint32_t, not on XLEN-bit wide integers.

This is in parity with the LLVM commit 599421ae36c3 ("[RISCV] Re-define
sha256, Zksed, and Zksh intrinsics to use i32 types.") by Craig Topper.

Because we had to refine the base instruction definitions, it was way harder
than that of LLVM.  Thankfully, we have a similar example: 32-bit integer
instructions on RV64 such as ADDW.

Before:
   riscv__si: For RV32, fully operate on uint32_t
   riscv__di: For RV64, fully operate on uint64_t
After:
  *riscv__si: For RV32, fully operate on uint32_t
   riscv__di_extended:
  For RV64, input is uint32_t and output is int64_t,
  sign-extended from the int32_t result
  (represents a part of  behavior).
   riscv__si: Common (fully operate on uint32_t).
  On RV32, expands to *riscv__si.
  On RV64, initially expands to riscv__di_extended *and*
  extracts lower 32-bits from the int64_t result.

Sincerely,
Tsukasa




Tsukasa OI (1):
  RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t

 gcc/config/riscv/crypto.md| 161 --
 gcc/config/riscv/riscv-builtins.cc|   7 +-
 gcc/config/riscv/riscv-ftypes.def |   1 -
 gcc/config/riscv/riscv-scalar-crypto.def  |  24 +--
 .../gcc.target/riscv/zknh-sha256-32.c |  10 ++
 .../riscv/{zknh-sha256.c => zknh-sha256-64.c} |   8 +-
 gcc/testsuite/gcc.target/riscv/zksed64.c  |   4 +-
 gcc/testsuite/gcc.target/riscv/zksh64.c   |   4 +-
 8 files changed, 139 insertions(+), 80 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zknh-sha256-32.c
 rename gcc/testsuite/gcc.target/riscv/{zknh-sha256.c => zknh-sha256-64.c} (78%)


base-commit: daaed758517c81fc8f8bc6502be648aca51ab278
prerequisite-patch-id: 4f4a84ebc0c33ea159db4dcd70fa8894f27c638a
prerequisite-patch-id: d2b85f777b042d349c5e232979ee219c8147c154
-- 
2.42.0



[pushed] analyzer: basic support for computed gotos (PR analyzer/110529)

2023-09-07 Thread David Malcolm via Gcc-patches
PR analyzer/110529 notes that -fanalyzer was giving up on execution
paths that follow a computed goto, due to ignoring CFG edges with the
flag EDGE_ABNORMAL set.

This patch implements enough handling for them to allow analysis of
such execution paths to continue.

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r14-3796-g1b761fede44afa.

gcc/analyzer/ChangeLog:
PR analyzer/110529
* program-point.cc (program_point::on_edge): Don't reject
EDGE_ABNORMAL for computed gotos.
* region-model.cc (region_model::maybe_update_for_edge): Handle
computed goto statements.
(region_model::apply_constraints_for_ggoto): New.
* region-model.h (region_model::apply_constraints_for_ggoto): New decl.
* supergraph.cc (supernode::get_label): New.
* supergraph.h (supernode::get_label): New decl.

gcc/testsuite/ChangeLog:
PR analyzer/110529
* c-c++-common/analyzer/computed-goto-1.c: New test.
* gcc.dg/analyzer/computed-goto-pr110529.c: New test.
---
 gcc/analyzer/program-point.cc | 17 +-
 gcc/analyzer/region-model.cc  | 39 +++-
 gcc/analyzer/region-model.h   |  3 +
 gcc/analyzer/supergraph.cc| 13 
 gcc/analyzer/supergraph.h |  2 +
 .../c-c++-common/analyzer/computed-goto-1.c   | 60 +++
 .../gcc.dg/analyzer/computed-goto-pr110529.c  | 27 +
 7 files changed, 158 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/analyzer/computed-goto-1.c
 create mode 100644 gcc/testsuite/gcc.dg/analyzer/computed-goto-pr110529.c

diff --git a/gcc/analyzer/program-point.cc b/gcc/analyzer/program-point.cc
index f2d6490f0c04..d7db2f522394 100644
--- a/gcc/analyzer/program-point.cc
+++ b/gcc/analyzer/program-point.cc
@@ -426,9 +426,22 @@ program_point::on_edge (exploded_graph ,
   {
const cfg_superedge *cfg_sedge = as_a  (succ);
 
-   /* Reject abnormal edges; we special-case setjmp/longjmp.  */
if (cfg_sedge->get_flags () & EDGE_ABNORMAL)
- return false;
+ {
+   const supernode *src_snode = cfg_sedge->m_src;
+   if (gimple *last_stmt = src_snode->get_last_stmt ())
+ if (last_stmt->code == GIMPLE_GOTO)
+   {
+ /* For the program_point aspect here, consider all
+out-edges from goto stmts to be valid; we'll
+consider state separately.  */
+ return true;
+   }
+
+   /* Reject other kinds of abnormal edges;
+  we special-case setjmp/longjmp.  */
+   return false;
+ }
   }
   break;
 
diff --git a/gcc/analyzer/region-model.cc b/gcc/analyzer/region-model.cc
index 999480e55ef7..a351e5cd214b 100644
--- a/gcc/analyzer/region-model.cc
+++ b/gcc/analyzer/region-model.cc
@@ -4997,7 +4997,7 @@ region_model::maybe_update_for_edge (const superedge 
,
   if (last_stmt == NULL)
 return true;
 
-  /* Apply any constraints for conditionals/switch statements.  */
+  /* Apply any constraints for conditionals/switch/computed-goto statements.  
*/
 
   if (const gcond *cond_stmt = dyn_cast  (last_stmt))
 {
@@ -5013,6 +5013,12 @@ region_model::maybe_update_for_edge (const superedge 
,
ctxt, out);
 }
 
+  if (const ggoto *goto_stmt = dyn_cast  (last_stmt))
+{
+  const cfg_superedge *cfg_sedge = as_a  ();
+  return apply_constraints_for_ggoto (*cfg_sedge, goto_stmt, ctxt);
+}
+
   /* Apply any constraints due to an exception being thrown.  */
   if (const cfg_superedge *cfg_sedge = dyn_cast  
())
 if (cfg_sedge->get_flags () & EDGE_EH)
@@ -5267,6 +5273,37 @@ region_model::apply_constraints_for_gswitch (const 
switch_cfg_superedge ,
   return sat;
 }
 
+/* Given an edge reached by GOTO_STMT, determine appropriate constraints
+   for the edge to be taken.
+
+   If they are feasible, add the constraints and return true.
+
+   Return false if the constraints contradict existing knowledge
+   (and so the edge should not be taken).  */
+
+bool
+region_model::apply_constraints_for_ggoto (const cfg_superedge ,
+  const ggoto *goto_stmt,
+  region_model_context *ctxt)
+{
+  tree dest = gimple_goto_dest (goto_stmt);
+  const svalue *dest_sval = get_rvalue (dest, ctxt);
+
+  /* If we know we were jumping to a specific label.  */
+  if (tree dst_label = edge.m_dest->get_label ())
+{
+  const label_region *dst_label_reg
+   = m_mgr->get_region_for_label (dst_label);
+  const svalue *dst_label_ptr
+   = m_mgr->get_ptr_svalue (ptr_type_node, dst_label_reg);
+
+  if (!add_constraint (dest_sval, EQ_EXPR, dst_label_ptr, ctxt))
+   return false;
+}
+
+  return true;
+}
+
 /* Apply any constraints due to an exception being thrown 

[pushed] analyzer: fix -Wunused-parameter warnings

2023-09-07 Thread David Malcolm via Gcc-patches
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r14-3793-g18f1f79ec5b1f1.

gcc/analyzer/ChangeLog:
* region-model.h: fix -Wunused-parameter warnings
---
 gcc/analyzer/region-model.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/analyzer/region-model.h b/gcc/analyzer/region-model.h
index 625f68805361..1ac3a32b7a41 100644
--- a/gcc/analyzer/region-model.h
+++ b/gcc/analyzer/region-model.h
@@ -793,8 +793,8 @@ class region_model_context
 class noop_region_model_context : public region_model_context
 {
 public:
-  bool warn (std::unique_ptr d,
-const stmt_finder *custom_finder) override { return false; }
+  bool warn (std::unique_ptr,
+const stmt_finder *) override { return false; }
   void add_note (std::unique_ptr) override;
   void add_event (std::unique_ptr) override;
   void on_svalue_leak (const svalue *) override {}
@@ -1200,7 +1200,7 @@ class test_region_model_context : public 
noop_region_model_context
 {
 public:
   bool warn (std::unique_ptr d,
-const stmt_finder *custom_finder) final override
+const stmt_finder *) final override
   {
 m_diagnostics.safe_push (d.release ());
 return true;
-- 
2.26.3



[COMMITTED] [irange] Fix typo in contains_zero_p.

2023-09-07 Thread Aldy Hernandez via Gcc-patches
In the conversion of iranges to wide_int (commit cb779afeff204f), I
mistakenly made contains_zero_p() return TRUE for undefined ranges.
This means the rest of the patch was adjusted for this stupidity.

For example, we ended up doing the following, to make up for the fact
that contains_zero_p was broken:

-  if (!lhs.contains_p (build_zero_cst (lhs.type (
+  if (lhs.undefined_p () || !contains_zero_p (lhs))

This patch fixes the thinko and adjusts all callers.

In places where a caller is not checking undefined_p(), it is because
either the caller has already handled undefined ranges in the
preceeding code, or the check is superfluous.

gcc/ChangeLog:

* value-range.h (contains_zero_p): Return false for undefined ranges.
* range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
contains_zero_p change above.
(operator_ge::op1_op2_relation): Same.
* range-op.cc (operator_equal::op1_op2_relation): Same.
(operator_not_equal::op1_op2_relation): Same.
(operator_lt::op1_op2_relation): Same.
(operator_le::op1_op2_relation): Same.
(operator_cast::op1_range): Same.
(set_nonzero_range_from_mask): Same.
(operator_bitwise_xor::op1_range): Same.
(operator_addr_expr::fold_range): Same.
(operator_addr_expr::op1_range): Same.
* range-op-float.cc (operator_equal::op1_op2_relation): Same.
(operator_not_equal::op1_op2_relation): Same.
(operator_lt::op1_op2_relation): Same.
(operator_le::op1_op2_relation): Same.
(operator_gt::op1_op2_relation): Same.
(operator_ge::op1_op2_relation): Same.
---
 gcc/range-op-float.cc |  8 
 gcc/range-op.cc   | 30 +++---
 gcc/value-range.h |  2 +-
 3 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/gcc/range-op-float.cc b/gcc/range-op-float.cc
index eebc73f9918..89c401e040a 100644
--- a/gcc/range-op-float.cc
+++ b/gcc/range-op-float.cc
@@ -783,7 +783,7 @@ operator_equal::op1_op2_relation (const irange , const 
frange &,
 return VREL_NE;
 
   // TRUE = op1 == op2 indicates EQ_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_EQ;
   return VREL_VARYING;
 }
@@ -915,7 +915,7 @@ operator_not_equal::op1_op2_relation (const irange , 
const frange &,
 return VREL_EQ;
 
   // TRUE = op1 != op2  indicates NE_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_NE;
   return VREL_VARYING;
 }
@@ -1037,7 +1037,7 @@ operator_lt::op1_op2_relation (const irange , const 
frange &,
 return VREL_GE;
 
   // TRUE = op1 < op2 indicates LT_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_LT;
   return VREL_VARYING;
 }
@@ -1144,7 +1144,7 @@ operator_le::op1_op2_relation (const irange , const 
frange &,
 return VREL_GT;
 
   // TRUE = op1 <= op2 indicates LE_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_LE;
   return VREL_VARYING;
 }
diff --git a/gcc/range-op.cc b/gcc/range-op.cc
index 619979f2f61..33b193be7d0 100644
--- a/gcc/range-op.cc
+++ b/gcc/range-op.cc
@@ -915,7 +915,7 @@ operator_equal::op1_op2_relation (const irange , const 
irange &,
 return VREL_NE;
 
   // TRUE = op1 == op2 indicates EQ_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_EQ;
   return VREL_VARYING;
 }
@@ -1017,7 +1017,7 @@ operator_not_equal::op1_op2_relation (const irange , 
const irange &,
 return VREL_EQ;
 
   // TRUE = op1 != op2  indicates NE_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_NE;
   return VREL_VARYING;
 }
@@ -1178,7 +1178,7 @@ operator_lt::op1_op2_relation (const irange , const 
irange &,
 return VREL_GE;
 
   // TRUE = op1 < op2 indicates LT_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_LT;
   return VREL_VARYING;
 }
@@ -1279,7 +1279,7 @@ operator_le::op1_op2_relation (const irange , const 
irange &,
 return VREL_GT;
 
   // TRUE = op1 <= op2 indicates LE_EXPR.
-  if (lhs.undefined_p () || !contains_zero_p (lhs))
+  if (!contains_zero_p (lhs))
 return VREL_LE;
   return VREL_VARYING;
 }
@@ -2957,7 +2957,7 @@ operator_cast::op1_range (irange , tree type,
{
  // If the LHS is not a pointer nor a singleton, then it is
  // either VARYING or non-zero.
- if (!contains_zero_p (lhs))
+ if (!lhs.undefined_p () && !contains_zero_p (lhs))
r.set_nonzero (type);
  else
r.set_varying (type);
@@ -3368,10 +3368,10 @@ operator_bitwise_and::wi_fold (irange , tree type,
 static void
 set_nonzero_range_from_mask (irange , tree type, const irange )
 {
-  if (!contains_zero_p (lhs))
-r = range_nonzero (type);
-  else
+  

Re: [PATCH] c++: cache conversion function lookup

2023-09-07 Thread Jason Merrill via Gcc-patches

On 9/7/23 16:12, Patrick Palka wrote:

On Thu, 7 Sep 2023, Jason Merrill wrote:


On 9/6/23 18:07, Patrick Palka wrote:

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk?  This cache apparently has a 98% hit rate for TYPE_HAS_CONVERSION
types on some test files.


Does it make a measurable difference in compile time?


Admittedly this optimization was probably more justified with the older
version of the PR99599 patch that added another lookup_conversions call.
Compile time for this standalone patch in the noise according to my
experiments, but I did measure a ~1MB/0.2% decrease in memory usage for
range-v3's zip.cpp.  This is because lookup_conversions_r allocates a
new list each time it's called (on a TYPE_HAS_CONVERSION type) even in
the simple case of no inheritance etc.  Maybe lookup_conversions_r's
(relatively complicated) implementation could be improved in the
simple/common case...


+/* A cache of the result of lookup_conversions.  */
+
+static GTY((cache)) type_tree_cache_map *lookup_conversions_cache;


This should probably be (deletable) rather than (cache)?


Ack.  Is that because of PCH concerns or because the cache is
purely an optimization and so has no semantic effect?


The latter.  Really, (cache) is a terrible name, it should only be used 
when it's impractical to recompute the value.


Jason



Re: [PATCH 3/3] [V2] [RISC-V] support cm.mva01s cm.mvsa01 in zcmp

2023-09-07 Thread Palmer Dabbelt

On Thu, 07 Sep 2023 13:16:36 PDT (-0700), dimi...@dinux.eu wrote:

Hi,

This patch appears to have caused PR 111259.


Thanks.  Looks like wer'e not running our tests with RTL checking, 
Patrick is going to try and see if we've got compute time left for some 
builds -- even just having builds with checking would be a good one, we 
get bit by these bugs from time to time.


I'm spinning up a --enable-checking=yes build.  Maybe we just need 
something like


   diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
   index 53e7c1d03aa..aa4f02c67d5 100644
   --- a/gcc/config/riscv/predicates.md
   +++ b/gcc/config/riscv/predicates.md
   @@ -172,11 +172,11 @@ (define_predicate "stack_pop_up_to_s11_operand"

;; ZCMP predicates

(define_predicate "a0a1_reg_operand"
   -  (and (match_operand 0 "register_operand")
   +  (and (match_code "reg")
   (match_test "IN_RANGE (REGNO (op), A0_REGNUM, A1_REGNUM)")))

(define_predicate "zcmp_mv_sreg_operand"

   -  (and (match_operand 0 "register_operand")
   +  (and (match_code "reg")
   (match_test "TARGET_RVE ? IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
: IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
|| IN_RANGE (REGNO (op), S2_REGNUM, S7_REGNUM)")))


Regards,
Dimitar

On Tue, Aug 29, 2023 at 08:37:46AM +, Fei Gao wrote:

From: Die Li 

Signed-off-by: Die Li 
Co-Authored-By: Fei Gao 

gcc/ChangeLog:

* config/riscv/peephole.md: New pattern.
* config/riscv/predicates.md (a0a1_reg_operand): New predicate.
(zcmp_mv_sreg_operand): New predicate.
* config/riscv/riscv.md: New predicate.
* config/riscv/zc.md (*mva01s): New pattern.
(*mvsa01): New pattern.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/cm_mv_rv32.c: New test.
---
 gcc/config/riscv/peephole.md| 28 +
 gcc/config/riscv/predicates.md  | 11 
 gcc/config/riscv/riscv.md   |  1 +
 gcc/config/riscv/zc.md  | 22 
 gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c | 23 +
 5 files changed, 85 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c

diff --git a/gcc/config/riscv/peephole.md b/gcc/config/riscv/peephole.md
index 0ef0c04410b..92e57f9a447 100644
--- a/gcc/config/riscv/peephole.md
+++ b/gcc/config/riscv/peephole.md
@@ -38,3 +38,31 @@
 {
   operands[5] = GEN_INT (INTVAL (operands[2]) - INTVAL (operands[5]));
 })
+
+;; ZCMP
+(define_peephole2
+  [(set (match_operand:X 0 "a0a1_reg_operand")
+(match_operand:X 1 "zcmp_mv_sreg_operand"))
+   (set (match_operand:X 2 "a0a1_reg_operand")
+(match_operand:X 3 "zcmp_mv_sreg_operand"))]
+  "TARGET_ZCMP
+   && (REGNO (operands[2]) != REGNO (operands[0]))"
+  [(parallel [(set (match_dup 0)
+   (match_dup 1))
+  (set (match_dup 2)
+   (match_dup 3))])]
+)
+
+(define_peephole2
+  [(set (match_operand:X 0 "zcmp_mv_sreg_operand")
+(match_operand:X 1 "a0a1_reg_operand"))
+   (set (match_operand:X 2 "zcmp_mv_sreg_operand")
+(match_operand:X 3 "a0a1_reg_operand"))]
+  "TARGET_ZCMP
+   && (REGNO (operands[0]) != REGNO (operands[2]))
+   && (REGNO (operands[1]) != REGNO (operands[3]))"
+  [(parallel [(set (match_dup 0)
+   (match_dup 1))
+  (set (match_dup 2)
+   (match_dup 3))])]
+)
diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 3ef09996a85..772f45df65c 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -165,6 +165,17 @@
   (and (match_code "const_int")
(match_test "riscv_zcmp_valid_stack_adj_bytes_p (INTVAL (op), 13)")))

+;; ZCMP predicates
+(define_predicate "a0a1_reg_operand"
+  (and (match_operand 0 "register_operand")
+   (match_test "IN_RANGE (REGNO (op), A0_REGNUM, A1_REGNUM)")))
+
+(define_predicate "zcmp_mv_sreg_operand"
+  (and (match_operand 0 "register_operand")
+   (match_test "TARGET_RVE ? IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
+: IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
+|| IN_RANGE (REGNO (op), S2_REGNUM, S7_REGNUM)")))
+
 ;; Only use branch-on-bit sequences when the mask is not an ANDI immediate.
 (define_predicate "branch_on_bit_operand"
   (and (match_code "const_int")
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 8e09df6ff63..aa2b5b960dc 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -132,6 +132,7 @@
(S0_REGNUM  8)
(S1_REGNUM  9)
(A0_REGNUM  10)
+   (A1_REGNUM  11)
(S2_REGNUM  18)
(S3_REGNUM  19)
(S4_REGNUM  20)
diff --git a/gcc/config/riscv/zc.md b/gcc/config/riscv/zc.md
index 8d7de97daad..77b28adde95 100644
--- 

Re: [PATCH 3/3] [V2] [RISC-V] support cm.mva01s cm.mvsa01 in zcmp

2023-09-07 Thread Dimitar Dimitrov
Hi,

This patch appears to have caused PR 111259.

Regards,
Dimitar

On Tue, Aug 29, 2023 at 08:37:46AM +, Fei Gao wrote:
> From: Die Li 
> 
> Signed-off-by: Die Li 
> Co-Authored-By: Fei Gao 
> 
> gcc/ChangeLog:
> 
> * config/riscv/peephole.md: New pattern.
> * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
> (zcmp_mv_sreg_operand): New predicate.
> * config/riscv/riscv.md: New predicate.
> * config/riscv/zc.md (*mva01s): New pattern.
> (*mvsa01): New pattern.
> 
> gcc/testsuite/ChangeLog:
> 
> * gcc.target/riscv/cm_mv_rv32.c: New test.
> ---
>  gcc/config/riscv/peephole.md| 28 +
>  gcc/config/riscv/predicates.md  | 11 
>  gcc/config/riscv/riscv.md   |  1 +
>  gcc/config/riscv/zc.md  | 22 
>  gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c | 23 +
>  5 files changed, 85 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c
> 
> diff --git a/gcc/config/riscv/peephole.md b/gcc/config/riscv/peephole.md
> index 0ef0c04410b..92e57f9a447 100644
> --- a/gcc/config/riscv/peephole.md
> +++ b/gcc/config/riscv/peephole.md
> @@ -38,3 +38,31 @@
>  {
>operands[5] = GEN_INT (INTVAL (operands[2]) - INTVAL (operands[5]));
>  })
> +
> +;; ZCMP
> +(define_peephole2
> +  [(set (match_operand:X 0 "a0a1_reg_operand")
> +(match_operand:X 1 "zcmp_mv_sreg_operand"))
> +   (set (match_operand:X 2 "a0a1_reg_operand")
> +(match_operand:X 3 "zcmp_mv_sreg_operand"))]
> +  "TARGET_ZCMP
> +   && (REGNO (operands[2]) != REGNO (operands[0]))"
> +  [(parallel [(set (match_dup 0)
> +   (match_dup 1))
> +  (set (match_dup 2)
> +   (match_dup 3))])]
> +)
> +
> +(define_peephole2
> +  [(set (match_operand:X 0 "zcmp_mv_sreg_operand")
> +(match_operand:X 1 "a0a1_reg_operand"))
> +   (set (match_operand:X 2 "zcmp_mv_sreg_operand")
> +(match_operand:X 3 "a0a1_reg_operand"))]
> +  "TARGET_ZCMP
> +   && (REGNO (operands[0]) != REGNO (operands[2]))
> +   && (REGNO (operands[1]) != REGNO (operands[3]))"
> +  [(parallel [(set (match_dup 0)
> +   (match_dup 1))
> +  (set (match_dup 2)
> +   (match_dup 3))])]
> +)
> diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
> index 3ef09996a85..772f45df65c 100644
> --- a/gcc/config/riscv/predicates.md
> +++ b/gcc/config/riscv/predicates.md
> @@ -165,6 +165,17 @@
>(and (match_code "const_int")
> (match_test "riscv_zcmp_valid_stack_adj_bytes_p (INTVAL (op), 13)")))
>  
> +;; ZCMP predicates
> +(define_predicate "a0a1_reg_operand"
> +  (and (match_operand 0 "register_operand")
> +   (match_test "IN_RANGE (REGNO (op), A0_REGNUM, A1_REGNUM)")))
> +
> +(define_predicate "zcmp_mv_sreg_operand"
> +  (and (match_operand 0 "register_operand")
> +   (match_test "TARGET_RVE ? IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
> +: IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
> +|| IN_RANGE (REGNO (op), S2_REGNUM, S7_REGNUM)")))
> +
>  ;; Only use branch-on-bit sequences when the mask is not an ANDI immediate.
>  (define_predicate "branch_on_bit_operand"
>(and (match_code "const_int")
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index 8e09df6ff63..aa2b5b960dc 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -132,6 +132,7 @@
> (S0_REGNUM8)
> (S1_REGNUM9)
> (A0_REGNUM10)
> +   (A1_REGNUM11)
> (S2_REGNUM18)
> (S3_REGNUM19)
> (S4_REGNUM20)
> diff --git a/gcc/config/riscv/zc.md b/gcc/config/riscv/zc.md
> index 8d7de97daad..77b28adde95 100644
> --- a/gcc/config/riscv/zc.md
> +++ b/gcc/config/riscv/zc.md
> @@ -1433,3 +1433,25 @@
>"TARGET_ZCMP"
>"cm.push   {ra, s0-s11}, %0"
>  )
> +
> +;; ZCMP mv
> +(define_insn "*mva01s"
> +  [(set (match_operand:X 0 "a0a1_reg_operand" "=r")
> +(match_operand:X 1 "zcmp_mv_sreg_operand" "r"))
> +   (set (match_operand:X 2 "a0a1_reg_operand" "=r")
> +(match_operand:X 3 "zcmp_mv_sreg_operand" "r"))]
> +  "TARGET_ZCMP
> +   && (REGNO (operands[2]) != REGNO (operands[0]))"
> +  { return (REGNO (operands[0]) == 
> A0_REGNUM)?"cm.mva01s\t%1,%3":"cm.mva01s\t%3,%1"; }
> +  [(set_attr "mode" "")])
> +
> +(define_insn "*mvsa01"
> +  [(set (match_operand:X 0 "zcmp_mv_sreg_operand" "=r")
> +(match_operand:X 1 "a0a1_reg_operand" "r"))
> +   (set (match_operand:X 2 "zcmp_mv_sreg_operand" "=r")
> +(match_operand:X 3 "a0a1_reg_operand" "r"))]
> +  "TARGET_ZCMP
> +   && (REGNO (operands[0]) != REGNO (operands[2]))
> +   && (REGNO (operands[1]) != REGNO (operands[3]))"
> +  { return (REGNO (operands[1]) == 
> 

Re: [PATCH] c++: cache conversion function lookup

2023-09-07 Thread Patrick Palka via Gcc-patches
On Thu, 7 Sep 2023, Jason Merrill wrote:

> On 9/6/23 18:07, Patrick Palka wrote:
> > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
> > trunk?  This cache apparently has a 98% hit rate for TYPE_HAS_CONVERSION
> > types on some test files.
> 
> Does it make a measurable difference in compile time?

Admittedly this optimization was probably more justified with the older
version of the PR99599 patch that added another lookup_conversions call.
Compile time for this standalone patch in the noise according to my
experiments, but I did measure a ~1MB/0.2% decrease in memory usage for
range-v3's zip.cpp.  This is because lookup_conversions_r allocates a
new list each time it's called (on a TYPE_HAS_CONVERSION type) even in
the simple case of no inheritance etc.  Maybe lookup_conversions_r's
(relatively complicated) implementation could be improved in the
simple/common case...

> 
> > +/* A cache of the result of lookup_conversions.  */
> > +
> > +static GTY((cache)) type_tree_cache_map *lookup_conversions_cache;
> 
> This should probably be (deletable) rather than (cache)?

Ack.  Is that because of PCH concerns or because the cache is
purely an optimization and so has no semantic effect?

> 
> Jason
> 
> 



[PATCH v2] libstdc++: Fix -Wunused-parameter warnings

2023-09-07 Thread Pekka Seppänen
On 7.9.2023 19:40, Jonathan Wakely wrote:
> On 29/08/23 15:04 +0300, Pekka Seppänen wrote:
>> libstdc++: Fix -Wunused-parameter warnings when _GLIBCXX_USE_WCHAR_T is
>> not defined.
>>
>> libstdc++-v3/ChangeLog:
>>
>> * src/c++11/cow-locale_init.cc: Add [[maybe_unused]] attribute.
>> * src/c++17/fs_path.cc (path::_S_convert_loc): Likewise.
>> * src/filesystem/path.cc (path::_S_convert_loc): Likewise.
>> ---
>>  libstdc++-v3/src/c++11/cow-locale_init.cc | 4 ++--
>>  libstdc++-v3/src/c++17/fs_path.cc | 2 +-
>>  libstdc++-v3/src/filesystem/path.cc   | 2 +-
>>  3 files changed, 4 insertions(+), 4 deletions(-)
>>
>> mbstate_t>>(__loc);
>>
>> diff --git a/libstdc++-v3/src/c++11/cow-locale_init.cc
>> b/libstdc++-v3/src/c++11/cow-locale_init.cc
>> index 85277763427..9554ed1ebf9 100644
>> --- a/libstdc++-v3/src/c++11/cow-locale_init.cc
>> +++ b/libstdc++-v3/src/c++11/cow-locale_init.cc
>> @@ -137,8 +137,8 @@ namespace
>>    }
>>
>>    void
>> -  locale::_Impl::_M_init_extra(void* cloc, void* clocm,
>> -   const char* __s, const char* __smon)
>> +  locale::_Impl::_M_init_extra(void* cloc, [[maybe_unused]] void*
>> clocm,
>> +   const char* __s, [[maybe_unused]] const char* __smon)
> 
> This line should be split to keepo it below 80 columns.
> 

Done, v2 follows.

> Otherwise the patch looks good, but please CC the libstdc++ list for
> libstdc++ patches. Otherwise I won't see them, and they won't be
> reviewed.
> 

My bad, I wasn't aware of this.

> Do you have a GCC copyright assignment on file? If not, please add a
> sign-off to confirm you can submit this under the DCO terms:
> https://gcc.gnu.org/dco.html
> 

Will add.

> 
>>    {
>>  auto& __cloc = *static_cast<__c_locale*>(cloc);
>>
>> diff --git a/libstdc++-v3/src/c++17/fs_path.cc
>> b/libstdc++-v3/src/c++17/fs_path.cc
>> index aaea7d2725d..d65b5482e8b 100644
>> --- a/libstdc++-v3/src/c++17/fs_path.cc
>> +++ b/libstdc++-v3/src/c++17/fs_path.cc
>> @@ -1947,7 +1947,7 @@ path::_M_split_cmpts()
>>
>>  path::string_type
>>  path::_S_convert_loc(const char* __first, const char* __last,
>> - const std::locale& __loc)
>> + [[maybe_unused]] const std::locale& __loc)
>>  {
>>  #if _GLIBCXX_USE_WCHAR_T
>>    auto& __cvt = std::use_facet> mbstate_t>>(__loc);
>> diff --git a/libstdc++-v3/src/filesystem/path.cc
>> b/libstdc++-v3/src/filesystem/path.cc
>> index 4c218bdae49..d04ba6d465d 100644
>> --- a/libstdc++-v3/src/filesystem/path.cc
>> +++ b/libstdc++-v3/src/filesystem/path.cc
>> @@ -498,7 +498,7 @@ path::_M_trim()
>>
>>  path::string_type
>>  path::_S_convert_loc(const char* __first, const char* __last,
>> - const std::locale& __loc)
>> + [[maybe_unused]] const std::locale& __loc)
>>  {
>>  #if _GLIBCXX_USE_WCHAR_T
>>    auto& __cvt = std::use_facet 
> 

-- >8 --
libstdc++: Fix -Wunused-parameter warnings when _GLIBCXX_USE_WCHAR_T is
not defined.

libstdc++-v3/ChangeLog:

* src/c++11/cow-locale_init.cc: Add [[maybe_unused]] attribute.
* src/c++17/fs_path.cc (path::_S_convert_loc): Likewise.
* src/filesystem/path.cc (path::_S_convert_loc): Likewise.

Signed-off-by: Pekka Seppänen 
---
 libstdc++-v3/src/c++11/cow-locale_init.cc | 5 +++--
 libstdc++-v3/src/c++17/fs_path.cc | 2 +-
 libstdc++-v3/src/filesystem/path.cc   | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/libstdc++-v3/src/c++11/cow-locale_init.cc 
b/libstdc++-v3/src/c++11/cow-locale_init.cc
index 85277763427..f48561f5b12 100644
--- a/libstdc++-v3/src/c++11/cow-locale_init.cc
+++ b/libstdc++-v3/src/c++11/cow-locale_init.cc
@@ -137,8 +137,9 @@ namespace
   }
 
   void
-  locale::_Impl::_M_init_extra(void* cloc, void* clocm,
-   const char* __s, const char* __smon)
+  locale::_Impl::_M_init_extra(void* cloc, [[maybe_unused]] void* clocm,
+  const char* __s,
+  [[maybe_unused]] const char* __smon)
   {
 auto& __cloc = *static_cast<__c_locale*>(cloc);
 
diff --git a/libstdc++-v3/src/c++17/fs_path.cc 
b/libstdc++-v3/src/c++17/fs_path.cc
index aaea7d2725d..d65b5482e8b 100644
--- a/libstdc++-v3/src/c++17/fs_path.cc
+++ b/libstdc++-v3/src/c++17/fs_path.cc
@@ -1947,7 +1947,7 @@ path::_M_split_cmpts()
 
 path::string_type
 path::_S_convert_loc(const char* __first, const char* __last,
-const std::locale& __loc)
+[[maybe_unused]] const std::locale& __loc)
 {
 #if _GLIBCXX_USE_WCHAR_T
   auto& __cvt = std::use_facet>(__loc);
diff --git a/libstdc++-v3/src/filesystem/path.cc 
b/libstdc++-v3/src/filesystem/path.cc
index 4c218bdae49..d04ba6d465d 100644
--- a/libstdc++-v3/src/filesystem/path.cc
+++ b/libstdc++-v3/src/filesystem/path.cc
@@ -498,7 +498,7 @@ path::_M_trim()
 
 path::string_type
 path::_S_convert_loc(const char* __first, const char* __last,
-const std::locale& __loc)
+

[COMMITTED] PR tree-optimization/110875 - Some ssa-names get incorrectly marked as always_current.

2023-09-07 Thread Andrew MacLeod via Gcc-patches
When range_of_stmt invokes prefill_name to evaluate unvisited 
dependneciesit should not mark visited names as always_current.


when raner_cache::get_globaL_range() is invoked with the optional  
"current_p" flag, it triggers additional functionality. This call is 
meant to be from within ranger and it is understood that if the current 
value is not current,  set_global_range will always be called later with 
a value.  Thus it sets the always_current flag in the temporal cache to 
avoid computation cycles.


the prefill_stmt_dependencies () mechanism within ranger is intended to 
emulate the bahaviour od range_of_stmt on an arbitrarily long series of 
unresolved dependencies without triggering the overhead of huge call 
chains from the range_of_expr/range_on_entry/range_on_exit routines.  
Rather, it creates a stack of unvisited names, and invokes range_of_stmt 
on them directly in order to get initial cache values for each ssa-name.


The issue in this PR was that routine was incorrectly invoking the 
get_global_cache to determine whether there was a global value.  If 
there was, it would move on to the next dependency without invoking 
set_global_range to clear the always_current flag.


What it soudl have been doing was simply checking if there as a global 
value, and if there was not, add the name for processingand THEN invoke 
get_global_value to do all the special processing.


Bootstraps on x86_64-pc-linux-gnu with no regressions.  Pushed.

Andrew




From e9be59f7d2dc6b302cf85ad69b0a77dee89ec809 Mon Sep 17 00:00:00 2001
From: Andrew MacLeod 
Date: Thu, 7 Sep 2023 11:15:50 -0400
Subject: [PATCH] Some ssa-names get incorrectly marked as always_current.

When range_of_stmt invokes prefill_name to evaluate unvisited dependencies
it should not mark already visited names as always_current.

	PR tree-optimization/110875
	gcc/
	* gimple-range.cc (gimple_ranger::prefill_name): Only invoke
	cache-prefilling routine when the ssa-name has no global value.

	gcc/testsuite/
	* gcc.dg/pr110875.c: New.
---
 gcc/gimple-range.cc | 10 +++---
 gcc/testsuite/gcc.dg/pr110875.c | 34 +
 2 files changed, 41 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/pr110875.c

diff --git a/gcc/gimple-range.cc b/gcc/gimple-range.cc
index 01173c58f02..13c3308d537 100644
--- a/gcc/gimple-range.cc
+++ b/gcc/gimple-range.cc
@@ -351,10 +351,14 @@ gimple_ranger::prefill_name (vrange , tree name)
   if (!gimple_range_op_handler::supported_p (stmt) && !is_a (stmt))
 return;
 
-  bool current;
   // If this op has not been processed yet, then push it on the stack
-  if (!m_cache.get_global_range (r, name, current))
-m_stmt_list.safe_push (name);
+  if (!m_cache.get_global_range (r, name))
+{
+  bool current;
+  // Set the global cache value and mark as alway_current.
+  m_cache.get_global_range (r, name, current);
+  m_stmt_list.safe_push (name);
+}
 }
 
 // This routine will seed the global cache with most of the dependencies of
diff --git a/gcc/testsuite/gcc.dg/pr110875.c b/gcc/testsuite/gcc.dg/pr110875.c
new file mode 100644
index 000..4d6ecbca0c8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr110875.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp2" } */
+
+void foo(void);
+static int a, b;
+static int *c = , *d;
+static unsigned e;
+static short f;
+static unsigned g(unsigned char h, char i) { return h + i; }
+int main() {
+d = 
+int *j = d;
+e = -27;
+for (; e > 18; e = g(e, 6)) {
+a = 0;
+for (; a != -3; a--) {
+if (0 != a ^ *j)
+for (; b; b++) f = -f;
+else if (*c) {
+foo();
+break;
+}
+if (!(((e) >= 235) && ((e) <= 4294967269))) {
+__builtin_unreachable();
+}
+b = 0;
+}
+}
+}
+
+
+/* { dg-final { scan-tree-dump-not "foo" "vrp2" } } */
+
+
-- 
2.41.0



Re: [PATCH] c++: cache conversion function lookup

2023-09-07 Thread Jason Merrill via Gcc-patches

On 9/6/23 18:07, Patrick Palka wrote:

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk?  This cache apparently has a 98% hit rate for TYPE_HAS_CONVERSION
types on some test files.


Does it make a measurable difference in compile time?


+/* A cache of the result of lookup_conversions.  */
+
+static GTY((cache)) type_tree_cache_map *lookup_conversions_cache;


This should probably be (deletable) rather than (cache)?

Jason



Re: [PATCH] c++: refine CWG 2369 satisfaction vs non-dep convs [PR99599]

2023-09-07 Thread Jason Merrill via Gcc-patches

On 9/6/23 18:09, Patrick Palka wrote:

On Mon, 28 Aug 2023, Jason Merrill wrote:


On 8/24/23 09:31, Patrick Palka wrote:

On Wed, 23 Aug 2023, Jason Merrill wrote:


On 8/21/23 21:51, Patrick Palka wrote:

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look like
a reasonable approach?  I didn't observe any compile time/memory impact
of this change.

-- >8 --

As described in detail in the PR, CWG 2369 has the surprising
consequence of introducing constraint recursion in seemingly valid and
innocent code.

This patch attempts to fix this surpising behavior for the majority
of problematic use cases.  Rather than checking satisfaction before
_all_ non-dependent conversions, as specified by the CWG issue,
this patch makes us first check "safe" non-dependent conversions,
then satisfaction, then followed by "unsafe" non-dependent conversions.
In this case, a conversion is "safe" if computing it is guaranteed
to not induce template instantiation.  This patch heuristically
determines "safety" by checking for a constructor template or conversion
function template in the (class) parm or arg types respectively.
If neither type has such a member, then computing the conversion
should not induce instantiation (modulo satisfaction checking of
non-template constructor and conversion functions I suppose).

+ /* We're checking only non-instantiating conversions.
+A conversion may instantiate only if it's to/from a
+class type that has a constructor template/conversion
+function template.  */
+ tree parm_nonref = non_reference (parm);
+ tree type_nonref = non_reference (type);
+
+ if (CLASS_TYPE_P (parm_nonref))
+   {
+ if (!COMPLETE_TYPE_P (parm_nonref)
+ && CLASSTYPE_TEMPLATE_INSTANTIATION (parm_nonref))
+   return unify_success (explain_p);
+
+ tree ctors = get_class_binding (parm_nonref,
+ complete_ctor_identifier);
+ for (tree ctor : lkp_range (ctors))
+   if (TREE_CODE (ctor) == TEMPLATE_DECL)
+ return unify_success (explain_p);


Today we discussed maybe checking CLASSTYPE_NON_AGGREGATE?


Done; all dups of this PR seem to use tag types that are aggregates, so this
seems like a good simplification.  I also made us punt if the arg type has a
constrained non-template conversion function.



Also, instantiation can also happen when checking for conversion to a
pointer
or reference to base class.


Oops, I suppose we just need to strip pointer types upfront as well.  The
!COMPLETE_TYPE_P && CLASSTYPE_TEMPLATE_INSTANTIATION tests will then make
sure we deem a potential derived-to-base conversion unsafe if appropriate
IIUC.

How does the following look?

-- >8 --

Subject: [PATCH] c++: refine CWG 2369 satisfaction vs non-dep convs
[PR99599]

PR c++/99599

gcc/cp/ChangeLog:

* config-lang.in (gtfiles): Add search.cc.
* pt.cc (check_non_deducible_conversions): Add bool parameter
passed down to check_non_deducible_conversion.
(fn_type_unification): Call check_non_deducible_conversions
an extra time before satisfaction with noninst_only_p=true.
(check_non_deducible_conversion): Add bool parameter controlling
whether to compute only conversions that are guaranteed to
not induce template instantiation.
* search.cc (conversions_cache): Define.
(lookup_conversions): Use it to cache the lookup.  Improve cache
rate by considering TYPE_MAIN_VARIANT of the type.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-nondep4.C: New test.
---
   gcc/cp/config-lang.in |  1 +
   gcc/cp/pt.cc  | 81 +--
   gcc/cp/search.cc  | 14 +++-
   gcc/testsuite/g++.dg/cpp2a/concepts-nondep4.C | 21 +
   4 files changed, 110 insertions(+), 7 deletions(-)
   create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-nondep4.C

@@ -22921,6 +22933,65 @@ check_non_deducible_conversion (tree parm, tree
arg, unification_kind_t strict,
   {
 bool ok = false;
 tree conv_arg = TYPE_P (arg) ? NULL_TREE : arg;
+  if (conv_p && *conv_p)
+   {
+ /* This conversion was already computed earlier (when
+computing only non-instantiating conversions).  */
+ gcc_checking_assert (!noninst_only_p);
+ return unify_success (explain_p);
+   }
+  if (noninst_only_p)
+   {
+ /* We're checking only non-instantiating conversions.
+Computing a conversion may induce template instantiation
+only if ... */


Let's factor this whole block out into another function.


Sounds good.



Incidentally, CWG1092 is a related problem with defaulted functions, which I
dealt with in a stricter way: when LOOKUP_DEFAULTED we ignore a conversion
from the parameter being 

Re: [PATCH v2] c++: Move consteval folding to cp_fold_r

2023-09-07 Thread Jason Merrill via Gcc-patches

On 9/7/23 11:23, Marek Polacek wrote:

On Tue, Sep 05, 2023 at 04:36:34PM -0400, Jason Merrill wrote:

On 9/5/23 15:59, Marek Polacek wrote:

On Tue, Sep 05, 2023 at 10:52:04AM -0400, Jason Merrill wrote:

On 9/1/23 13:23, Marek Polacek wrote:

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?

-- >8 --

In the review of P2564:

it turned out that in order to correctly handle an example in the paper,
we should stop doing immediate evaluation in build_over_call and
bot_replace, and instead do it in cp_fold_r.  This patch does that.

Another benefit is that this is a pretty significant simplification, at
least in my opinion.  Also, this fixes the c++/110997 ICE (but the test
doesn't compile yet).

The main drawback seems to be that cp_fold_r doesn't process as much
code as we did before: uninstantiated templates


That's acceptable, it's an optional diagnostic.


and things like "false ? foo () : 1".


This is a problem.  Maybe we want cp_fold_r to recurse into the arms of a
COND_EXPR before folding them away?  Maybe only if we know we've seen an
immediate function?


Unfortunately we had already thrown the dead branch away when we got to
cp_fold_r.  I wonder if we have to adjust cxx_eval_conditional_expression
to call cp_fold_r on the dead branch too,


Hmm, I guess so.


perhaps with a new ff_ flag to skip the whole second switch in cp_fold_r?


Or factor out the immediate function handling to a separate walk function
that cp_fold_r also calls?


I did that.
  

But then it's possible that the in_immediate_context checks have to stay.


We can just not do the walk in immediate (or mce_true) context, like we
currently avoid calling cp_fold_function.


Right.  Unfortunately I have to check even when mce_true, consider

   consteval int bar (int i) { if (i != 1) throw 1; return 0; }
   constexpr int a = 0 ? bar(3) : 3;


I disagree; the call is in a manifestly constant-evaluated expression, 
and so is now considered an immediate function context, and we should 
accept that example.



For mce_unknown I guess we'd want
to set *non_constant_p instead of giving an error.


I did not do this because I haven't found a case where it would make
a difference.


I think it will given the above comment.


diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
index 0ca4370deab..397d5c7ec3f 100644
--- a/gcc/cp/constexpr.cc
+++ b/gcc/cp/constexpr.cc
@@ -2311,6 +2311,29 @@ cxx_dynamic_cast_fn_p (tree fndecl)
  && CP_DECL_CONTEXT (fndecl) == abi_node);
  }
  
+/* Return true if we are in the body of a consteval function. > +   This is in addition to in_immediate_context because that

+   uses current_function_decl which may not be available.  CTX is
+   the current constexpr context.  */
+
+static bool
+in_immediate_context (const constexpr_ctx *ctx)
+{
+  if (in_immediate_context ())
+return true;


Can't we check for mce_true here instead of looking at the call chain?


+/* A wrapper around cp_fold_immediate_r.  */
+
+void
+cp_fold_immediate (tree *tp)
+{


Maybe return early if consteval isn't supported in the active standard?

Jason



Re: [PATCH 5/5] RISC-V: Remove Assert Protecting Types

2023-09-07 Thread Edwin Lu



On 9/7/2023 6:19 AM, Jeff Law wrote:



On 9/6/23 11:50, Edwin Lu wrote:

This patch turns on the assert which ensures every instruction has type
that is not TYPE_UNKNOWN.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_sched_variable_issue): Remove assert
And this is fine.  But hold off committing until all the dependencies 
are also committed.  I think there's still one earlier patch that I 
wanted to look at again.


jeff


Sounds good to me. The thead instructions were the ones that haven't 
been checked in yet.


Edwin



Re: [PATCH] analyzer: implement symbolic value support for CPython plugin's refcnt checker [PR107646]

2023-09-07 Thread David Malcolm via Gcc-patches
On Mon, 2023-09-04 at 22:13 -0400, Eric Feng wrote:

> Hi Dave,

Hi Eric, thanks for the patch.

> 
> Recently I've been working on symbolic value support for the reference
> count checker. I've attached a patch for it below; let me know it looks
> OK for trunk. Thanks!
> 
> Best,
> Eric
> 
> ---
> 
> This patch enhances the reference count checker in the CPython plugin by
> adding support for symbolic values. Whereas previously we were only able
> to check the reference count of PyObject* objects created in the scope
> of the function; we are now able to emit diagnostics on reference count
> mismatch of objects that were, for example, passed in as a function
> parameter.
> 
> rc6.c:6:10: warning: expected ‘obj’ to have reference count: N + ‘1’ but 
> ob_refcnt field is N + ‘2’
> 6 |   return obj;
>   |  ^~~

[...snip...]

>  create mode 100644 gcc/testsuite/gcc.dg/plugin/cpython-plugin-test-refcnt.c
> 
> diff --git a/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.c 
> b/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.c
> index bf1982e79c3..d7ecd7fce09 100644
> --- a/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.c
> +++ b/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.c
> @@ -314,17 +314,20 @@ public:
>{
>  diagnostic_metadata m;
>  bool warned;
> -// just assuming constants for now
> -auto actual_refcnt
> - = m_actual_refcnt->dyn_cast_constant_svalue ()->get_constant ();
> -auto ob_refcnt = m_ob_refcnt->dyn_cast_constant_svalue ()->get_constant 
> ();
> -warned = warning_meta (rich_loc, m, get_controlling_option (),
> -"expected %qE to have "
> -"reference count: %qE but ob_refcnt field is: %qE",
> -m_reg_tree, actual_refcnt, ob_refcnt);
> -
> -// location_t loc = rich_loc->get_loc ();
> -// foo (loc);
> +
> +const auto *actual_refcnt_constant
> + = m_actual_refcnt->dyn_cast_constant_svalue ();
> +const auto *ob_refcnt_constant = m_ob_refcnt->dyn_cast_constant_svalue 
> ();
> +if (!actual_refcnt_constant || !ob_refcnt_constant)
> +  return false;
> +
> +auto actual_refcnt = actual_refcnt_constant->get_constant ();
> +auto ob_refcnt = ob_refcnt_constant->get_constant ();
> +warned = warning_meta (
> + rich_loc, m, get_controlling_option (),
> + "expected %qE to have "
> + "reference count: N + %qE but ob_refcnt field is N + %qE",
> + m_reg_tree, actual_refcnt, ob_refcnt);
>  return warned;

I know you're emulating the old behavior I implemented way back in
cpychecker, but I don't like that behavior :(

Specifically, although the patch improves the behavior for symbolic
values, it regresses the precision of wording for the concrete values
case.  If we have e.g. a concrete ob_refcnt of 2, whereas we only have
1 pointer, then it's more readable to say:

  warning: expected ‘obj’ to have reference count: ‘1’ but ob_refcnt
field is ‘2’

than:

  warning: expected ‘obj’ to have reference count: N + ‘1’ but ob_refcnt field 
is N + ‘2’

...and we shouldn't quote concrete numbers, the message should be:

  warning: expected ‘obj’ to have reference count of 1 but ob_refcnt field is 2

or better:

  warning: ‘*obj’ is pointed to by 1 pointer but 'ob_refcnt' field is 2


Can you move the unwrapping of the svalue from the tests below into the
emit vfunc?  That way the m_actual_refcnt doesn't have to be a
constant_svalue; you could have logic in the emit vfunc to print
readable messages based on what kind of svalue it is.

Rather than 'N', it might be better to say 'initial'; how about:

  warning: ‘*obj’ is pointed to by 0 additional pointers but 'ob_refcnt' field 
has increased by 1
  warning: ‘*obj’ is pointed to by 1 additional pointer but 'ob_refcnt' field 
has increased by 2
  warning: ‘*obj’ is pointed to by 1 additional pointer but 'ob_refcnt' field 
is unchanged
  warning: ‘*obj’ is pointed to by 2 additional pointers but 'ob_refcnt' field 
has decreased by 1
  warning: ‘*obj’ is pointed to by 1 fewer pointers but 'ob_refcnt' field is 
unchanged

and similar?

Maybe have a flag that tracks whether we're talking about a concrete
value that's absolute versus a concrete value that's relative to the
initial value?


[...snip...]


> @@ -369,6 +368,19 @@ increment_region_refcnt (hash_map 
> , const region *key)
>refcnt = existed ? refcnt + 1 : 1;
>  }
>  
> +static const region *
> +get_region_from_svalue (const svalue *sval, region_model_manager *mgr)
> +{
> +  const auto *region_sval = sval->dyn_cast_region_svalue ();
> +  if (region_sval)
> +return region_sval->get_pointee ();
> +
> +  const auto *initial_sval = sval->dyn_cast_initial_svalue ();
> +  if (initial_sval)
> +return mgr->get_symbolic_region (initial_sval);
> +
> +  return nullptr;
> +}

This is dereferencing a pointer, right?

Can the caller use region_model::deref_rvalue instead?


[...snip...]

> +static void
> +unwrap_any_ob_refcnt_sval 

Re: [PATCH 2/5] RISC-V: Add Types for Un-Typed zc Instructions

2023-09-07 Thread Edwin Lu



On 9/6/2023 4:33 PM, Kito Cheng wrote:
csr is kind of confusing, I would suggest something like `pushpop` and 
`mvpair`.



Sounds good! I'll make the update.

Edwin



Re: [PATCH 1/5] RISC-V: Update Types for Vector Instructions

2023-09-07 Thread Edwin Lu



On 9/6/2023 4:23 PM, Kito Cheng wrote:

LGTM

Edwin Lu  於 2023年9月7日 週四 01:51 寫道:

This patch adds types to vector instructions that were added after
or were
missed by the original patch
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628594.html

gcc/ChangeLog:

        * config/riscv/autovec-opt.md: Update types
        * config/riscv/autovec.md: likewise

Signed-off-by: Edwin Lu 
---
 gcc/config/riscv/autovec-opt.md | 42
++---
 gcc/config/riscv/autovec.md     | 28 +++---
 2 files changed, 47 insertions(+), 23 deletions(-)

There seems to be around 9 new instructions that were added since this 
patch. I have tested them for the same extensions but only for linux so 
far. I'll submit a new patch later today with those changes


Edwin



Re: [PATCH] OpenMP: Fix ICE in fixup_blocks_walker [PR111274]

2023-09-07 Thread Jakub Jelinek via Gcc-patches
On Thu, Sep 07, 2023 at 10:18:37AM -0600, Sandra Loosemore wrote:
> This ICE was caused by an invalid assumption that all BIND_EXPRs have
> a non-null BIND_EXPR_BLOCK.  In C++ these do exist and are used for
> temporaries introduced in expressions that are not full-expressions.
> Since they have no block to fix up, the traversal can just ignore
> these tree nodes.
> 
> gcc/cp/ChangeLog
>   * parser.cc (fixup_blocks_walker): Check for null BIND_EXPR_BLOCK.
> 
> gcc/testsuite/ChangeLog
>   * g++.dg/gomp/pr111274.C: New test case

Missing . at the end of the ChangeLog line.

Otherwise LGTM.

> --- a/gcc/cp/parser.cc
> +++ b/gcc/cp/parser.cc
> @@ -44485,7 +44485,10 @@ fixup_blocks_walker (tree *tp, int *walk_subtrees, 
> void *dp)
>  {
>tree superblock = *(tree *)dp;
>  
> -  if (TREE_CODE (*tp) == BIND_EXPR)
> +  /* BIND_EXPR_BLOCK may be null if the expression is not a
> + full-expression; if there's no block, no patching is necessary
> + for this node.  */
> +  if (TREE_CODE (*tp) == BIND_EXPR && BIND_EXPR_BLOCK (*tp))
>  {
>tree block = BIND_EXPR_BLOCK (*tp);
>if (superblock)
> diff --git a/gcc/testsuite/g++.dg/gomp/pr111274.C 
> b/gcc/testsuite/g++.dg/gomp/pr111274.C
> new file mode 100644
> index 000..6d3414fc82c
> --- /dev/null
> +++ b/gcc/testsuite/g++.dg/gomp/pr111274.C
> @@ -0,0 +1,15 @@
> +// { dg-do "compile" }
> +
> +// This example used to ICE in fixup_blocks_walker due to a BIND_EXPR with
> +// null BIND_EXPR_BLOCK.
> +
> +struct _Vector_base {
> +  ~_Vector_base();
> +};
> +int ColumnSmallestLastOrdering_OMP_i_MaxNumThreads,
> +ColumnSmallestLastOrdering_OMP_i_MaxDegree;
> +void ColumnSmallestLastOrdering_OMP() {
> +#pragma omp for
> +  for (int i = 0; i < ColumnSmallestLastOrdering_OMP_i_MaxNumThreads; i++)
> +new _Vector_base[ColumnSmallestLastOrdering_OMP_i_MaxDegree];
> +}
> -- 
> 2.31.1

Jakub



Re: [PATCH][_GLIBCXX_INLINE_VERSION] Fix friend declarations

2023-09-07 Thread François Dumont via Gcc-patches

Hi

Any news regarding this problem ?

François

On 23/08/2023 19:35, François Dumont wrote:

Hi

The few tests that are failing in versioned namespace mode are due to 
those friend declarations.


This is a fix proposal even if I considered 2 other options:

1. Make __format::_Arg_store a struct and so do not bother with friend 
declarations.


2. Consider it as a compiler bug and do nothing. In this case I think 
we might still need this patch to avoid a non-working format library 
in versioned namespace mode in gcc 14 if compiler bug is not fixed.


I can also define _GLIBCXX_STD_V at  level to limit impact.

    libstdc++: [_GLIBCXX_INLINE_VERSION] Fix  friend declarations

    GCC do not consider the inline namespace in friend declarations. 
We need

    to explicit this namespace.

    libstdc++-v3/ChangeLog:

    * include/bits/c++config (_GLIBCXX_STD_V): New macro 
giving current

    std namespace with optionally the version namespace.
    * include/std/format (std::__format::_Arg_store): Use 
latter on friend

    declarations.

Tested under versioned mode.

Ok to commit ?

François


Re: [PATCH][Hashtable] Performance optimization through use of insertion hint

2023-09-07 Thread François Dumont via Gcc-patches



On 01/09/2023 10:59, Jonathan Wakely wrote:

On Tue, 29 Aug 2023 at 20:52, François Dumont via Libstdc++
 wrote:

Hi

Any feedback regarding this patch ?

This is a fairly large patch


I've decided to split it, at least in 2.

So just ignore this one, I'll submit new ones once abi issue is fixed.


  and before we make any more changes to
unordered containers we have an ABI break to fix:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111050



François

On 24/07/2023 13:02, François Dumont wrote:

libstdc++: [_Hashtable] Make more use of insertion hint


 When inserting an element into an empty bucket we currently insert
the new node
 after the before-begin node so in first position. The drawback of
doing this is
 that we are forced to update the bucket that was containing this
before-begin
 node to point to the newly inserted node. To do so we need at best
to do a modulo
 to find this bucket and when hash code is not cached also compute it.

 To avoid this side effect it is better to insert after the last
node. Adding
 a member to keep track of this last node would be an abi breaking
change. Still we
 can ask the user to maintain and provide this last node as an
insertion hint.

 Adapt range insertion methods to try to detect the last node and
then use it as
 the insertion hint.

 libstdc++-v3/ChangeLog:

 * include/bits/hashtable_policy.h:
 (_Insert_base::try_emplace): Adapt to use hint.
 (_Insert_base::_M_insert_range): Try to detect container
last node and use it
 as hint for insertions.
 (_Hash_code_base::_M_hash_code(const _Hash&, const
_Hash_node_value<>&)): Remove.
 (_Hash_code_base::_M_hash_code<_H2>(const _H2&, const
_Hash_node_value<>&)): Remove.
 * include/bits/hashtable.h
 (_Hashtable<>::_M_insert_bucket_begin): Add hint parameter
and use it when inserting
 into an empty bucket if hint is the last container node.
 (_Hashtable<>::_InsertInfo): New struct.
 (_Hashtable<>::_M_get_insert_info): New, return latter.
 (_Hashtable<>::_M_insert_multi_node): Add _InsertInfo
parameter.
 (_Hashtable<>::_M_insert_unique_node): Add __node_ptr hint
parameter.
 (_Hashtable<>::_M_emplace_unique(__node_ptr, _Args&&...)):
New.
 (_Hashtable<>::_M_emplace_multi(__node_ptr, _Args&&...)):
New.
 (_Hashtable<>::_M_emplace()): Adapt to use latters.
 (_Hashtable<>::_M_insert_unique): Add __node_ptr parameter.
 (_Hashtable<>::_M_insert_unique_aux): Add __node_ptr
parameter.
 (_Hashtable<>::_M_insert(__node_ptr, _Arg&&, const
_NodeGenerator&, true_type)):
 Use latter.
 (_Hashtable<>::_M_reinsert_node(const_iterator,
node_type&&)):
 Add hint parameter, adapt to use it.
 (_Hashtable<>::_M_reinsert_node_multi): Use hint parameter
if available to extract
 hash code.
 (_Hashtable<>::_M_compute_hash_code(const _Hash&,
__node_ptr, __node_ptr,
 const key_type&)): New.
(_Hashtable<>::_M_compute_hash_code<_H2>(const _H2&, __node_ptr,
__node_ptr,
 const key_type&)): New.
 (_Hashtable<>::_M_merge_unique): Adapt to use latter.
Implement small size
 optimization.
 (_Hashtable<>::_M_get_insert_info(const _Hash&,
__node_ptr, __node_ptr,
 const key_type&)): New.
(_Hashtable<>::_M_get_insert_info<_H2>(const _H2&, __node_ptr,
__node_ptr,
 const key_type&)): New.
 (_Hashtable<>::_M_merge_multi): Adapt to use latter.
 * include/bits/unordered_map.h
(unordered_map<>::insert(node_type&&)): Pass cend as
 hint.
 (unordered_map<>::insert(const_iterator, node_type&&)):
Adapt to use hint.
 * include/bits/unordered_set.h
(unordered_set<>::insert(node_type&&)): Pass cend as
 hint.
 (unordered_set<>::insert(const_iterator, node_type&&)):
Adapt to use hint.
 *
testsuite/23_containers/unordered_multimap/insert/hint.cc: Adapt
implementation
 specific tests.

Tested under linux x86_64.

Here is the performance results of this patch, before:

unordered_multiset_hint.cc-threadhash code NOT cached 200
insertions w/o hint  94r   94u0s 191999712mem0pf
unordered_multiset_hint.cc-threadhash code NOT cached 200
insertions with perfect hint  95r   94u0s 191999712mem 0pf
unordered_multiset_hint.cc-threadhash code NOT cached 200
insertions with bad hint  94r   94u0s 191999712mem0pf
unordered_multiset_hint.cc-threadhash code NOT cached 200
range insertions  88r   88u0s 191999712mem0pf
unordered_multiset_hint.cc-threadhash code cached 200
insertions w/o hint  91r   91u0s 191999712mem0pf
unordered_multiset_hint.cc-threadhash code cached 

Re: [PATCH 0/2] libstdc++: Documentation fixes.

2023-09-07 Thread Jonathan Wakely via Gcc-patches
On Mon, 21 Aug 2023 at 21:40, Jonathan Wakely  wrote:
>
>
>
> On Mon, 21 Aug 2023, 21:33 Bruno Victal,  wrote:
>>
>> This small patch-series fixes the 'doc-install-info' rule
>> and updates the URI used for docbook-xsl.
>
>
> Thanks! I'll get these committed tomorrow.

It took a little longer than that, but I've pushed them now - thanks again.


>
>
>>
>> Bruno Victal (2):
>>   libstdc++: Fix 'doc-install-info' rule.
>>   libstdc++: Update docbook xsl URI.
>>
>>  libstdc++-v3/acinclude.m4| 2 +-
>>  libstdc++-v3/doc/Makefile.am | 4 ++--
>>  2 files changed, 3 insertions(+), 3 deletions(-)
>>
>>
>> base-commit: f9ff6fa58217294d63f255dd02abfcc8a074f509
>> --
>> 2.40.1
>>


Re: [Patch] libgomp.texi: Fix ICV var name, document some memory management routines

2023-09-07 Thread Sandra Loosemore

On 9/7/23 02:56, Tobias Burnus wrote:

Main reason was to fix an ICV value; as collateral change, I also added
documentation for some of the memory-management functions.

Comments, suggestions? If not, I will commit it soon.


I only have one nit:


+@node omp_destroy_allocator
+@subsection @code{omp_destroy_allocator} -- Destroy an allocator
+@table @asis
+@item @emph{Description}:
+Releases all resources used by a memory allocator, which must not represent
+a predefined memory allocator.  Accessing memory after its allocator has been
+destroyed has unspecified behavior.  Passing @code{omp_null_allocator} to the
+routine is permitted but will have no effect.


s/will have/has/

I didn't build this to see how the formatting comes out, I assume you have done 
that and it is consistent with the way other functions are documented.


-Sandra



[PATCH] math-opts: Add dbgcounter for FMA formation

2023-09-07 Thread Martin Jambor
Hello,

This patch is a simple addition of a debug counter to FMA formation in
tree-ssa-math-opts.cc.  Given that issues with FMAs do occasionally
pop up, it seems genuinely useful.

I simply added an if right after the initial checks in
convert_mult_to_fma even though when FMA formation deferring is
active (i.e. when targeting Zen CPUs) this would interact with it (and
at this moment lead to producing all deferred candidates), so when
using the dbg counter to find a harmful set of FMAs, it is probably
best to also set param_avoid_fma_max_bits to zero.  I could not find a
better place which would not also make the code unnecessarily more
complicated.

Bootstrapped and tested on x86_64-linux.  OK for master?

Thanks,

Martin



gcc/ChangeLog:

2023-09-06  Martin Jambor  

* dbgcnt.def (form_fma): New.
* tree-ssa-math-opts.cc: Include dbgcnt.h.
(convert_mult_to_fma): Bail out if the debug counter say so.
---
 gcc/dbgcnt.def| 1 +
 gcc/tree-ssa-math-opts.cc | 4 
 2 files changed, 5 insertions(+)

diff --git a/gcc/dbgcnt.def b/gcc/dbgcnt.def
index 9e2f1d857b4..871cbf75d93 100644
--- a/gcc/dbgcnt.def
+++ b/gcc/dbgcnt.def
@@ -162,6 +162,7 @@ DEBUG_COUNTER (dom_unreachable_edges)
 DEBUG_COUNTER (dse)
 DEBUG_COUNTER (dse1)
 DEBUG_COUNTER (dse2)
+DEBUG_COUNTER (form_fma)
 DEBUG_COUNTER (gcse2_delete)
 DEBUG_COUNTER (gimple_unroll)
 DEBUG_COUNTER (global_alloc_at_func)
diff --git a/gcc/tree-ssa-math-opts.cc b/gcc/tree-ssa-math-opts.cc
index 95c22694368..3db69ad5733 100644
--- a/gcc/tree-ssa-math-opts.cc
+++ b/gcc/tree-ssa-math-opts.cc
@@ -116,6 +116,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "targhooks.h"
 #include "domwalk.h"
 #include "tree-ssa-math-opts.h"
+#include "dbgcnt.h"
 
 /* This structure represents one basic block that either computes a
division, or is a common dominator for basic block that compute a
@@ -3366,6 +3367,9 @@ convert_mult_to_fma (gimple *mul_stmt, tree op1, tree op2,
   && !has_single_use (mul_result))
 return false;
 
+  if (!dbg_cnt (form_fma))
+return false;
+
   /* Make sure that the multiplication statement becomes dead after
  the transformation, thus that all uses are transformed to FMAs.
  This means we assume that an FMA operation has the same cost
-- 
2.41.0



[committed] libstdc++: Simplify dejagnu target selector

2023-09-07 Thread Jonathan Wakely via Gcc-patches
Tested x86_64-linux. Pushed to trunk.

-- >8 --

A target selector allows multiple target triplets, it's not necessary to
use the || operator in a logical expression.

libstdc++-v3/ChangeLog:

* testsuite/27_io/filesystem/path/concat/94063.cc: Simplify
dg-do target selector.
---
 libstdc++-v3/testsuite/27_io/filesystem/path/concat/94063.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libstdc++-v3/testsuite/27_io/filesystem/path/concat/94063.cc 
b/libstdc++-v3/testsuite/27_io/filesystem/path/concat/94063.cc
index 50f34860550..a6894fc0254 100644
--- a/libstdc++-v3/testsuite/27_io/filesystem/path/concat/94063.cc
+++ b/libstdc++-v3/testsuite/27_io/filesystem/path/concat/94063.cc
@@ -15,7 +15,7 @@
 // with this library; see the file COPYING3.  If not see
 // .
 
-// { dg-do run { target { *-*-*mingw* || *-*-cygwin } } }
+// { dg-do run { target { *-*-*mingw* *-*-cygwin } } }
 // { dg-require-effective-target c++17 }
 
 #include 
-- 
2.41.0



[committed] libstdc++: Remove trailing whitespace from dejagnu files

2023-09-07 Thread Jonathan Wakely via Gcc-patches
Tested x86_64-linux. Pushed to trunk.

-- >8 --

Also fix the name of a source file used by an effective target check.

libstdc++-v3/ChangeLog:

* testsuite/config/default.exp: Remove trailing whitespace.
* testsuite/lib/dg-options.exp: Likewise.
* testsuite/lib/prune.exp: Likewise.
* testsuite/libstdc++-abi/abi.exp: Likewise.
* testsuite/libstdc++-dg/conformance.exp: Likewise.
* testsuite/libstdc++-prettyprinters/prettyprinters.exp:
Likewise.
* testsuite/libstdc++-xmethods/xmethods.exp: Likewise.
* testsuite/lib/libstdc++.exp: Likewise.
(check_v3_target_c_std): Fix filename for temporary source file.
---
 libstdc++-v3/testsuite/config/default.exp |  4 ++--
 libstdc++-v3/testsuite/lib/dg-options.exp |  4 ++--
 libstdc++-v3/testsuite/lib/libstdc++.exp  |  8 
 libstdc++-v3/testsuite/lib/prune.exp  |  4 ++--
 libstdc++-v3/testsuite/libstdc++-abi/abi.exp  |  6 +++---
 .../testsuite/libstdc++-dg/conformance.exp| 15 ---
 .../libstdc++-prettyprinters/prettyprinters.exp   |  4 ++--
 .../testsuite/libstdc++-xmethods/xmethods.exp |  4 ++--
 8 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/libstdc++-v3/testsuite/config/default.exp 
b/libstdc++-v3/testsuite/config/default.exp
index 6c5b57bd26f..a50f1dfe1ab 100644
--- a/libstdc++-v3/testsuite/config/default.exp
+++ b/libstdc++-v3/testsuite/config/default.exp
@@ -6,12 +6,12 @@
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
-# 
+#
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-# 
+#
 # You should have received a copy of the GNU General Public License
 # along with this program; see the file COPYING3.  If not see
 # .
diff --git a/libstdc++-v3/testsuite/lib/dg-options.exp 
b/libstdc++-v3/testsuite/lib/dg-options.exp
index 15e34f8a646..7ee32fbbf71 100644
--- a/libstdc++-v3/testsuite/lib/dg-options.exp
+++ b/libstdc++-v3/testsuite/lib/dg-options.exp
@@ -6,12 +6,12 @@
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
-# 
+#
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-# 
+#
 # You should have received a copy of the GNU General Public License
 # along with this program; see the file COPYING3.  If not see
 # .
diff --git a/libstdc++-v3/testsuite/lib/libstdc++.exp 
b/libstdc++-v3/testsuite/lib/libstdc++.exp
index 9f3e896751a..271f8772caf 100644
--- a/libstdc++-v3/testsuite/lib/libstdc++.exp
+++ b/libstdc++-v3/testsuite/lib/libstdc++.exp
@@ -6,12 +6,12 @@
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
-# 
+#
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-# 
+#
 # You should have received a copy of the GNU General Public License
 # along with this program; see the file COPYING3.  If not see
 # .
@@ -808,8 +808,8 @@ proc check_v3_target_c_std { } {
# Set up, compile, and execute a C++ test program that tries to use
# C99 functionality.
# For math bits, could use check_effective_target_c99_math.
-   set src fileio[pid].cc
-   set exe fileio[pid].x
+   set src c_std[pid].cc
+   set exe c_std[pid].x
 
set f [open $src "w"]
puts $f "#include "
diff --git a/libstdc++-v3/testsuite/lib/prune.exp 
b/libstdc++-v3/testsuite/lib/prune.exp
index be6d16c26e5..b4abb93294a 100644
--- a/libstdc++-v3/testsuite/lib/prune.exp
+++ b/libstdc++-v3/testsuite/lib/prune.exp
@@ -4,12 +4,12 @@
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; either version 3 of the License, or
 # (at your option) any later version.
-# 
+#
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-# 
+#
 # You should have received a copy of the GNU General Public License
 # along with this program; 

Re: [PATCH] libstdc++: Fix -Wunused-parameter warnings

2023-09-07 Thread Jonathan Wakely via Gcc-patches

On 29/08/23 15:04 +0300, Pekka Seppänen wrote:

libstdc++: Fix -Wunused-parameter warnings when _GLIBCXX_USE_WCHAR_T is
not defined.

libstdc++-v3/ChangeLog:

* src/c++11/cow-locale_init.cc: Add [[maybe_unused]] attribute.
* src/c++17/fs_path.cc (path::_S_convert_loc): Likewise.
* src/filesystem/path.cc (path::_S_convert_loc): Likewise.
---
 libstdc++-v3/src/c++11/cow-locale_init.cc | 4 ++--
 libstdc++-v3/src/c++17/fs_path.cc | 2 +-
 libstdc++-v3/src/filesystem/path.cc   | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

mbstate_t>>(__loc);

diff --git a/libstdc++-v3/src/c++11/cow-locale_init.cc
b/libstdc++-v3/src/c++11/cow-locale_init.cc
index 85277763427..9554ed1ebf9 100644
--- a/libstdc++-v3/src/c++11/cow-locale_init.cc
+++ b/libstdc++-v3/src/c++11/cow-locale_init.cc
@@ -137,8 +137,8 @@ namespace
   }

   void
-  locale::_Impl::_M_init_extra(void* cloc, void* clocm,
-   const char* __s, const char* __smon)
+  locale::_Impl::_M_init_extra(void* cloc, [[maybe_unused]] void*
clocm,
+  const char* __s, [[maybe_unused]] const char* 
__smon)


This line should be split to keepo it below 80 columns.

Otherwise the patch looks good, but please CC the libstdc++ list for
libstdc++ patches. Otherwise I won't see them, and they won't be
reviewed.

Do you have a GCC copyright assignment on file? If not, please add a
sign-off to confirm you can submit this under the DCO terms:
https://gcc.gnu.org/dco.html



   {
 auto& __cloc = *static_cast<__c_locale*>(cloc);

diff --git a/libstdc++-v3/src/c++17/fs_path.cc
b/libstdc++-v3/src/c++17/fs_path.cc
index aaea7d2725d..d65b5482e8b 100644
--- a/libstdc++-v3/src/c++17/fs_path.cc
+++ b/libstdc++-v3/src/c++17/fs_path.cc
@@ -1947,7 +1947,7 @@ path::_M_split_cmpts()

 path::string_type
 path::_S_convert_loc(const char* __first, const char* __last,
-const std::locale& __loc)
+[[maybe_unused]] const std::locale& __loc)
 {
 #if _GLIBCXX_USE_WCHAR_T
   auto& __cvt = std::use_facet>(__loc);
diff --git a/libstdc++-v3/src/filesystem/path.cc
b/libstdc++-v3/src/filesystem/path.cc
index 4c218bdae49..d04ba6d465d 100644
--- a/libstdc++-v3/src/filesystem/path.cc
+++ b/libstdc++-v3/src/filesystem/path.cc
@@ -498,7 +498,7 @@ path::_M_trim()

 path::string_type
 path::_S_convert_loc(const char* __first, const char* __last,
-const std::locale& __loc)
+[[maybe_unused]] const std::locale& __loc)
 {
 #if _GLIBCXX_USE_WCHAR_T
   auto& __cvt = std::use_facet



[PATCH] LoongArch: Slightly simplify loongarch_block_move_straight

2023-09-07 Thread Xi Ruoyao via Gcc-patches
gcc/ChangeLog:

* config/loongarch/loongarch.cc (loongarch_block_move_straight):
Check precondition (delta must be a power of 2) and use
popcount_hwi instead of a homebrew loop.
---

I've not run a full bootstrap with this, but it should be obvious.
Ok for trunk?

 gcc/config/loongarch/loongarch.cc | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 509ef2b97f1..845fad5a8e8 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -5225,9 +5225,8 @@ loongarch_block_move_straight (rtx dest, rtx src, 
HOST_WIDE_INT length,
  emit two ld.d/st.d pairs, one ld.w/st.w pair, and one ld.b/st.b
  pair.  For each load/store pair we use a dedicated register to keep
  the pipeline as populated as possible.  */
-  HOST_WIDE_INT num_reg = length / delta;
-  for (delta_cur = delta / 2; delta_cur != 0; delta_cur /= 2)
-num_reg += !!(length & delta_cur);
+  gcc_assert (pow2p_hwi (delta));
+  HOST_WIDE_INT num_reg = length / delta + popcount_hwi (length % delta);
 
   /* Allocate a buffer for the temporary registers.  */
   regs = XALLOCAVEC (rtx, num_reg);
-- 
2.42.0



Re: [PATCH] libstdc++ Add cstdarg to freestanding

2023-09-07 Thread Jonathan Wakely via Gcc-patches
On Fri, 18 Aug 2023 at 20:14, Paul M. Bendixen  wrote:
>
> Hi
> Jonathan, I just went over the proposal again as well as [compliance], which 
> Arsen mentioned ( https://wg21.link/compliance ) don't seem to mention either 
>  or .

Those headers were freestanding in C++17. They're not present in C++20
and C++23, but we support C++17 and earlier standards.

In GCC 12  and  were both installed when you
built the library with --disable-hosted-libstdcxx, so the fact they're
no longer installed for a freestanding build in GC 13 is a regression.
Please do include them.


>
> Shouldn't I just stick to the ones we know are in?
>
> (Still working on figuring out how to do the change log thing)
>
> Best regards
> Paul
>
> Den ons. 16. aug. 2023 kl. 18.50 skrev Paul M. Bendixen 
> :
>>
>> Yes, the other files are in another committee proposal, and I'm working my 
>> way through the proposals one by one.
>> Thank you for the feedback, I'll update and resend
>> /Paul
>>
>> Den ons. 16. aug. 2023 kl. 15.51 skrev Arsen Arsenović :
>>>
>>>
>>> Jonathan Wakely  writes:
>>>
>>> > On Fri, 21 Jul 2023 at 22:23, Paul M. Bendixen via Libstdc++
>>> >  wrote:
>>> >>
>>> >> P1642 includes the header cstdarg to the freestanding implementation.
>>> >> This was probably left out by accident, this patch puts it in.
>>> >> Since this is one of the headers that go in whole cloth, there should be 
>>> >> no
>>> >> further actions needed.
>>> >
>>> > Thanks for the patch. I agree that  should be freestanding,
>>> > but I think  and  were also missed from the
>>> > change. Arsen?
>>>
>>> Indeed, we should include all three, and according to [compliance],
>>> there's a couple more headers that we should provide (cwchar, cstring,
>>> cerrno, and cmath, but these are probably significantly more involved,
>>> so we can handle them separately).
>>>
>>> As guessed, the omission was not intentional.
>>>
>>> If you could, add those two to the patch as well, edit Makefile.am and
>>> regenerate using automake 1.15.1, and see
>>> https://gcc.gnu.org/contribute.html wrt. changelogs in commit messages.
>>>
>>> Thank you!  Have a lovely day :-)
>>>
>>> [compliance]: https://eel.is/c++draft/compliance
>>>
>>> > Also, the patch should change include/Makefile.am as well (the .in
>>> > file is autogenerated from that one).
>>> >
>>> >
>>> >> This might be related to PR106953, but since that one touches the partial
>>> >> headers I'm not sure
>>>
>>> The headers mentioned in this PR are provided in freestanding,
>>> partially, in 13 already, indeed.
>>>
>>> >> /Paul M. Bendixen
>>> >>
>>> >> --
>>> >> • − − •/• −/• • −/• − • •/− • • •/•/− •/− • •/• •/− • • −/•/− •/• − − •−
>>> >> •/− − •/− −/• −/• •/• − • •/• − • − • −/− • − •/− − −/− −//
>>>
>>>
>>> --
>>> Arsen Arsenović
>>
>>
>>
>> --
>> • − − •/• −/• • −/• − • •/− • • •/•/− •/− • •/• •/− • • −/•/− •/• − − •− •/− 
>> − •/− −/• −/• •/• − • •/• − • − • −/− • − •/− − −/− −//
>
>
>
> --
> • − − •/• −/• • −/• − • •/− • • •/•/− •/− • •/• •/− • • −/•/− •/• − − •− •/− 
> − •/− −/• −/• •/• − • •/• − • − • −/− • − •/− − −/− −//



[PATCH] OpenMP: Fix ICE in fixup_blocks_walker [PR111274]

2023-09-07 Thread Sandra Loosemore
This ICE was caused by an invalid assumption that all BIND_EXPRs have
a non-null BIND_EXPR_BLOCK.  In C++ these do exist and are used for
temporaries introduced in expressions that are not full-expressions.
Since they have no block to fix up, the traversal can just ignore
these tree nodes.

gcc/cp/ChangeLog
* parser.cc (fixup_blocks_walker): Check for null BIND_EXPR_BLOCK.

gcc/testsuite/ChangeLog
* g++.dg/gomp/pr111274.C: New test case
---
 gcc/cp/parser.cc |  5 -
 gcc/testsuite/g++.dg/gomp/pr111274.C | 15 +++
 2 files changed, 19 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/g++.dg/gomp/pr111274.C

diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc
index 7811d582b07..15a98019a4a 100644
--- a/gcc/cp/parser.cc
+++ b/gcc/cp/parser.cc
@@ -44485,7 +44485,10 @@ fixup_blocks_walker (tree *tp, int *walk_subtrees, 
void *dp)
 {
   tree superblock = *(tree *)dp;
 
-  if (TREE_CODE (*tp) == BIND_EXPR)
+  /* BIND_EXPR_BLOCK may be null if the expression is not a
+ full-expression; if there's no block, no patching is necessary
+ for this node.  */
+  if (TREE_CODE (*tp) == BIND_EXPR && BIND_EXPR_BLOCK (*tp))
 {
   tree block = BIND_EXPR_BLOCK (*tp);
   if (superblock)
diff --git a/gcc/testsuite/g++.dg/gomp/pr111274.C 
b/gcc/testsuite/g++.dg/gomp/pr111274.C
new file mode 100644
index 000..6d3414fc82c
--- /dev/null
+++ b/gcc/testsuite/g++.dg/gomp/pr111274.C
@@ -0,0 +1,15 @@
+// { dg-do "compile" }
+
+// This example used to ICE in fixup_blocks_walker due to a BIND_EXPR with
+// null BIND_EXPR_BLOCK.
+
+struct _Vector_base {
+  ~_Vector_base();
+};
+int ColumnSmallestLastOrdering_OMP_i_MaxNumThreads,
+ColumnSmallestLastOrdering_OMP_i_MaxDegree;
+void ColumnSmallestLastOrdering_OMP() {
+#pragma omp for
+  for (int i = 0; i < ColumnSmallestLastOrdering_OMP_i_MaxNumThreads; i++)
+new _Vector_base[ColumnSmallestLastOrdering_OMP_i_MaxDegree];
+}
-- 
2.31.1



[PATCH] LoongArch: Use LSX and LASX for block move

2023-09-07 Thread Xi Ruoyao via Gcc-patches
gcc/ChangeLog:

* config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
Define to the maximum amount of bytes able to be loaded or
stored with one machine instruction.
* config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
New static function.
(loongarch_block_move_straight): Call
loongarch_mode_for_move_size for machine_mode to be moved.
(loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
instead of UNITS_PER_WORD.
---

Bootstrapped and regtested on loongarch64-linux-gnu, with PR110939 patch
applied, the "lib_build_self_spec = %<..." line in t-linux commented out
(because it's silently making -mlasx in BOOT_CFLAGS ineffective, Yujie
is working on a proper fix), and BOOT_CFLAGS="-O3 -mlasx".  Ok for trunk?

 gcc/config/loongarch/loongarch.cc | 22 ++
 gcc/config/loongarch/loongarch.h  |  3 +++
 2 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 6698414281e..509ef2b97f1 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -5191,6 +5191,20 @@ loongarch_function_ok_for_sibcall (tree decl 
ATTRIBUTE_UNUSED,
   return true;
 }
 
+static machine_mode
+loongarch_mode_for_move_size (HOST_WIDE_INT size)
+{
+  switch (size)
+{
+case 32:
+  return V32QImode;
+case 16:
+  return V16QImode;
+}
+
+  return int_mode_for_size (size * BITS_PER_UNIT, 0).require ();
+}
+
 /* Emit straight-line code to move LENGTH bytes from SRC to DEST.
Assume that the areas do not overlap.  */
 
@@ -5220,7 +5234,7 @@ loongarch_block_move_straight (rtx dest, rtx src, 
HOST_WIDE_INT length,
 
   for (delta_cur = delta, i = 0, offs = 0; offs < length; delta_cur /= 2)
 {
-  mode = int_mode_for_size (delta_cur * BITS_PER_UNIT, 0).require ();
+  mode = loongarch_mode_for_move_size (delta_cur);
 
   for (; offs + delta_cur <= length; offs += delta_cur, i++)
{
@@ -5231,7 +5245,7 @@ loongarch_block_move_straight (rtx dest, rtx src, 
HOST_WIDE_INT length,
 
   for (delta_cur = delta, i = 0, offs = 0; offs < length; delta_cur /= 2)
 {
-  mode = int_mode_for_size (delta_cur * BITS_PER_UNIT, 0).require ();
+  mode = loongarch_mode_for_move_size (delta_cur);
 
   for (; offs + delta_cur <= length; offs += delta_cur, i++)
loongarch_emit_move (adjust_address (dest, mode, offs), regs[i]);
@@ -5326,8 +5340,8 @@ loongarch_expand_block_move (rtx dest, rtx src, rtx 
r_length, rtx r_align)
 
   HOST_WIDE_INT align = INTVAL (r_align);
 
-  if (!TARGET_STRICT_ALIGN || align > UNITS_PER_WORD)
-align = UNITS_PER_WORD;
+  if (!TARGET_STRICT_ALIGN || align > LARCH_MAX_MOVE_PER_INSN)
+align = LARCH_MAX_MOVE_PER_INSN;
 
   if (length <= align * LARCH_MAX_MOVE_OPS_STRAIGHT)
 {
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index 3fc9dc43ab1..7e391205583 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -1181,6 +1181,9 @@ typedef struct {
least twice.  */
 #define LARCH_MAX_MOVE_OPS_STRAIGHT (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER * 2)
 
+#define LARCH_MAX_MOVE_PER_INSN \
+  (ISA_HAS_LASX ? 32 : (ISA_HAS_LSX ? 16 : UNITS_PER_WORD))
+
 /* The base cost of a memcpy call, for MOVE_RATIO and friends.  These
values were determined experimentally by benchmarking with CSiBE.
 */
-- 
2.42.0



[committed] libstdc++: Add autoconf checks for mkdir, chmod, chdir, and getcwd

2023-09-07 Thread Jonathan Wakely via Gcc-patches
Tested x86_64-linux. Built on avr. Pushed to trunk.

-- >8 --

The filesystem code was using these functions without checking for their
existence, assuming that any UNIX-like libc with  would always
provide them. That's not true for some newlib targets like arm-eabi.

libstdc++-v3/ChangeLog:

* acinclude.m4 (GLIBCXX_CHECK_FILESYSTEM_DEPS): Check for mkdir,
chmod, chdir, and getcwd.
* config.h.in: Regenerate.
* configure: Regenerate.
* src/c++17/fs_ops.cc (create_dir): Use USE_MKDIR macro.
(fs::current_path): Use USE_GETCWD and USE_CHDIR macros.
(fs::permissions): Use USE_CHMOD macro.
* src/filesystem/ops-common.h [FILESYSTEM_IS_WINDOWS]
(chmod, mkdir, getcwd, chdir): Define new macros.
[FILESYSTEM_IS_WINDOWS] (chmod, mkdir, getcwd, chdir): Use
new macros.
* src/filesystem/ops.cc (create_dir): Use USE_MKDIR macro.
(fs::current_path): Use USE_GETCWD and USE_CHDIR macros.
(fs::permissions): Use USE_CHMOD macro.
---
 libstdc++-v3/acinclude.m4|  60 ++
 libstdc++-v3/config.h.in |  12 ++
 libstdc++-v3/configure   | 252 +++
 libstdc++-v3/src/c++17/fs_ops.cc |  12 +-
 libstdc++-v3/src/filesystem/ops-common.h |  18 +-
 libstdc++-v3/src/filesystem/ops.cc   |  10 +-
 6 files changed, 355 insertions(+), 9 deletions(-)

diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
index 15b3d74ffb7..13159d6e95d 100644
--- a/libstdc++-v3/acinclude.m4
+++ b/libstdc++-v3/acinclude.m4
@@ -4997,6 +4997,66 @@ dnl
   if test $glibcxx_cv_dirent_d_type = yes; then
 AC_DEFINE(HAVE_STRUCT_DIRENT_D_TYPE, 1, [Define to 1 if `d_type' is a 
member of `struct dirent'.])
   fi
+dnl
+  AC_CACHE_CHECK([for chmod], glibcxx_cv_chmod, [dnl
+GCC_TRY_COMPILE_OR_LINK(
+  [
+   #include 
+  ],
+  [
+   int i = chmod("", S_IRUSR);
+  ],
+  [glibcxx_cv_chmod=yes],
+  [glibcxx_cv_chmod=no])
+  ])
+  if test $glibcxx_cv_chmod = yes; then
+AC_DEFINE(_GLIBCXX_USE_CHMOD, 1, [Define if usable chmod is available in 
.])
+  fi
+dnl
+  AC_CACHE_CHECK([for mkdir], glibcxx_cv_mkdir, [dnl
+GCC_TRY_COMPILE_OR_LINK(
+  [
+   #include 
+  ],
+  [
+   int i = mkdir("", S_IRUSR);
+  ],
+  [glibcxx_cv_mkdir=yes],
+  [glibcxx_cv_mkdir=no])
+  ])
+  if test $glibcxx_cv_mkdir = yes; then
+AC_DEFINE(_GLIBCXX_USE_MKDIR, 1, [Define if usable mkdir is available in 
.])
+  fi
+dnl
+  AC_CACHE_CHECK([for chdir], glibcxx_cv_chdir, [dnl
+GCC_TRY_COMPILE_OR_LINK(
+  [
+   #include 
+  ],
+  [
+   int i = chdir("");
+  ],
+  [glibcxx_cv_chdir=yes],
+  [glibcxx_cv_chdir=no])
+  ])
+  if test $glibcxx_cv_chdir = yes; then
+AC_DEFINE(_GLIBCXX_USE_CHDIR, 1, [Define if usable chdir is available in 
.])
+  fi
+dnl
+  AC_CACHE_CHECK([for getcwd], glibcxx_cv_getcwd, [dnl
+GCC_TRY_COMPILE_OR_LINK(
+  [
+   #include 
+  ],
+  [
+   char* s = getcwd((char*)0, 1);
+  ],
+  [glibcxx_cv_getcwd=yes],
+  [glibcxx_cv_getcwd=no])
+  ])
+  if test $glibcxx_cv_getcwd = yes; then
+AC_DEFINE(_GLIBCXX_USE_GETCWD, 1, [Define if usable getcwd is available in 
.])
+  fi
 dnl
   AC_CACHE_CHECK([for realpath], glibcxx_cv_realpath, [dnl
 GCC_TRY_COMPILE_OR_LINK(
diff --git a/libstdc++-v3/src/c++17/fs_ops.cc b/libstdc++-v3/src/c++17/fs_ops.cc
index 6cdeac17c33..241db68bd18 100644
--- a/libstdc++-v3/src/c++17/fs_ops.cc
+++ b/libstdc++-v3/src/c++17/fs_ops.cc
@@ -577,7 +577,7 @@ namespace
   create_dir(const fs::path& p, fs::perms perm, std::error_code& ec)
   {
 bool created = false;
-#ifdef _GLIBCXX_HAVE_SYS_STAT_H
+#if _GLIBCXX_USE_MKDIR
 posix::mode_t mode = static_cast>(perm);
 if (posix::mkdir(p.c_str(), mode))
   {
@@ -735,7 +735,7 @@ fs::path
 fs::current_path(error_code& ec)
 {
   path p;
-#if defined _GLIBCXX_HAVE_UNISTD_H && ! defined __AVR__
+#if _GLIBCXX_USE_GETCWD
 #if defined __GLIBC__ || defined _GLIBCXX_FILESYSTEM_IS_WINDOWS
   if (char_ptr cwd = char_ptr{posix::getcwd(nullptr, 0)})
 {
@@ -783,7 +783,7 @@ fs::current_path(error_code& ec)
}
 }
 #endif  // __GLIBC__
-#else   // _GLIBCXX_HAVE_UNISTD_H
+#else   // _GLIBCXX_USE_GETCWD
   ec = std::make_error_code(std::errc::function_not_supported);
 #endif
   return p;
@@ -801,7 +801,7 @@ fs::current_path(const path& p)
 void
 fs::current_path(const path& p, error_code& ec) noexcept
 {
-#ifdef _GLIBCXX_HAVE_UNISTD_H
+#if _GLIBCXX_USE_CHDIR
   if (posix::chdir(p.c_str()))
 ec.assign(errno, std::generic_category());
   else
@@ -1097,6 +1097,7 @@ void
 fs::permissions(const path& p, perms prms, perm_options opts,
error_code& ec) noexcept
 {
+#if _GLIBCXX_USE_FCHMODAT || _GLIBCXX_USE_CHMOD
   const bool replace = is_set(opts, perm_options::replace);
   const bool add = is_set(opts, perm_options::add);
   const bool remove = is_set(opts, 

[committed] libstdc++: Disable support by default for avr

2023-09-07 Thread Jonathan Wakely via Gcc-patches
libstdc++-v3/ChangeLog:

* acinclude.m4 (GLIBCXX_ENABLE_BACKTRACE): Disable by default
for avr.
* configure: Regenerate.
---
 libstdc++-v3/acinclude.m4 | 5 -
 libstdc++-v3/configure| 5 -
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
index b7210e09d89..15b3d74ffb7 100644
--- a/libstdc++-v3/acinclude.m4
+++ b/libstdc++-v3/acinclude.m4
@@ -5481,7 +5481,10 @@ BACKTRACE_CPPFLAGS="$BACKTRACE_CPPFLAGS 
-DBACKTRACE_ELF_SIZE=$elfsize"
 
   AC_MSG_CHECKING([whether to build libbacktrace support])
   if test "$enable_libstdcxx_backtrace" = "auto"; then
-enable_libstdcxx_backtrace="$is_hosted"
+case "$host" in
+  avr-*-*) enable_libstdcxx_backtrace=no ;;
+  *) enable_libstdcxx_backtrace="$is_hosted" ;;
+esac
   fi
   AC_MSG_RESULT($enable_libstdcxx_backtrace)
   if test "$enable_libstdcxx_backtrace" = "yes"; then



[PATCH v2] c++: Move consteval folding to cp_fold_r

2023-09-07 Thread Marek Polacek via Gcc-patches
On Tue, Sep 05, 2023 at 04:36:34PM -0400, Jason Merrill wrote:
> On 9/5/23 15:59, Marek Polacek wrote:
> > On Tue, Sep 05, 2023 at 10:52:04AM -0400, Jason Merrill wrote:
> > > On 9/1/23 13:23, Marek Polacek wrote:
> > > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
> > > > 
> > > > -- >8 --
> > > > 
> > > > In the review of P2564:
> > > > 
> > > > it turned out that in order to correctly handle an example in the paper,
> > > > we should stop doing immediate evaluation in build_over_call and
> > > > bot_replace, and instead do it in cp_fold_r.  This patch does that.
> > > > 
> > > > Another benefit is that this is a pretty significant simplification, at
> > > > least in my opinion.  Also, this fixes the c++/110997 ICE (but the test
> > > > doesn't compile yet).
> > > > 
> > > > The main drawback seems to be that cp_fold_r doesn't process as much
> > > > code as we did before: uninstantiated templates
> > > 
> > > That's acceptable, it's an optional diagnostic.
> > > 
> > > > and things like "false ? foo () : 1".
> > > 
> > > This is a problem.  Maybe we want cp_fold_r to recurse into the arms of a
> > > COND_EXPR before folding them away?  Maybe only if we know we've seen an
> > > immediate function?
> > 
> > Unfortunately we had already thrown the dead branch away when we got to
> > cp_fold_r.  I wonder if we have to adjust cxx_eval_conditional_expression
> > to call cp_fold_r on the dead branch too,
> 
> Hmm, I guess so.
> 
> > perhaps with a new ff_ flag to skip the whole second switch in cp_fold_r?
> 
> Or factor out the immediate function handling to a separate walk function
> that cp_fold_r also calls?

I did that.
 
> > But then it's possible that the in_immediate_context checks have to stay.
> 
> We can just not do the walk in immediate (or mce_true) context, like we
> currently avoid calling cp_fold_function.

Right.  Unfortunately I have to check even when mce_true, consider

  consteval int bar (int i) { if (i != 1) throw 1; return 0; }
  constexpr int a = 0 ? bar(3) : 3;

> For mce_unknown I guess we'd want
> to set *non_constant_p instead of giving an error.

I did not do this because I haven't found a case where it would make
a difference.

> This is a problem.  Maybe we want cp_fold_r to recurse into the arms of a
> COND_EXPR before folding them away?  Maybe only if we know we've seen an
> immediate function?

Hopefully resolved now.
 
> > diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
> > index 8bd5c4a47f8..af4f98b1fe1 100644
> > --- a/gcc/cp/constexpr.cc
> > +++ b/gcc/cp/constexpr.cc
> > @@ -3135,6 +3135,11 @@ cxx_eval_call_expression (const constexpr_ctx *ctx, 
> > tree t,
> >   unsigned save_heap_alloc_count = ctx->global->heap_vars.length ();
> >   unsigned save_heap_dealloc_count = ctx->global->heap_dealloc_count;
> > + /* Make sure we fold std::is_constant_evaluated to true in an
> > +immediate function.  */
> > + if (immediate_invocation_p (fun))
> 
> I think this should just check DECL_IMMEDIATE_FUNCTION_P, the context
> doesn't matter.

Fixed.  And now I don't need to export immediate_invocation_p.
 
> > +   call_ctx.manifestly_const_eval = mce_true;
> > +
> > diff --git a/gcc/cp/cp-gimplify.cc b/gcc/cp/cp-gimplify.cc
> > index 206e791fcfd..29132aad158 100644
> > --- a/gcc/cp/cp-gimplify.cc
> > +++ b/gcc/cp/cp-gimplify.cc
> > @@ -1058,9 +1058,21 @@ cp_fold_r (tree *stmt_p, int *walk_subtrees, void 
> > *data_)
> > }
> > break;
> > +/* Expand immediate invocations.  */
> > +case CALL_EXPR:
> > +case AGGR_INIT_EXPR:
> > +  if (!in_immediate_context ())
> 
> As you mentioned in your followup, we shouldn't need to check this because
> we don't call cp_fold_r in immediate context.

Fixed.

> > +   if (tree fn = cp_get_callee (stmt))
> > + if (TREE_CODE (fn) != ADDR_EXPR || ADDR_EXPR_DENOTES_CALL_P (fn))
> > +   if (tree fndecl = cp_get_fndecl_from_callee (fn, /*fold*/false))
> > + if (DECL_IMMEDIATE_FUNCTION_P (fndecl))
> > +   *stmt_p = stmt = cxx_constant_value (stmt);
> > +  break;
> > +
> >   case ADDR_EXPR:
> > if (TREE_CODE (TREE_OPERAND (stmt, 0)) == FUNCTION_DECL
> > - && DECL_IMMEDIATE_FUNCTION_P (TREE_OPERAND (stmt, 0)))
> > + && DECL_IMMEDIATE_FUNCTION_P (TREE_OPERAND (stmt, 0))
> > + && !in_immediate_context ())
> 
> Likewise.

Fixed.
 
> > diff --git a/gcc/cp/tree.cc b/gcc/cp/tree.cc
> > index 799183dc646..7dfb6de2da3 100644
> > --- a/gcc/cp/tree.cc
> > +++ b/gcc/cp/tree.cc
> > @@ -3254,7 +3254,7 @@ bot_manip (tree* tp, int* walk_subtrees, void* data_)
> >  variables.  */
> >   static tree
> > -bot_replace (tree* t, int* walk_subtrees, void* data_)
> > +bot_replace (tree* t, int*, void* data_)
> 
> Generally we keep the parameter name as a comment like
> int */*walk_subtrees*/

I reaaally mislike that but ok, changed.

> > diff --git 

Re: [PATCH] RISC-V: Replace rtx REG for zero REGS operations

2023-09-07 Thread 钟居哲
Forget about this patch. 
I found a better and reasonable way to fix it.



juzhe.zh...@rivai.ai
 
From: Juzhe-Zhong
Date: 2023-09-07 22:05
To: gcc-patches
CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong
Subject: [PATCH] RISC-V: Replace rtx REG for zero REGS operations
This patch fixes these following FAILs:
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O0  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O0  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O1  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O1  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (internal compiler error: in gen_reg_rtx, at 
emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (internal compiler error: in gen_reg_rtx, at 
emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O3 -g  (internal compiler 
error: in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O3 -g  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -Os  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -Os  (test for excess errors)
 
These FAILs because regno_reg_rtx[regno] is VLS mode in some regno which is not 
VLMAX AVL
gcc/ChangeLog:
 
* config/riscv/riscv.cc (vector_zero_call_used_regs): Fix bug.
 
---
gcc/config/riscv/riscv.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
 
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index a3d3389e7e2..c0c9c990a23 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8998,7 +8998,7 @@ vector_zero_call_used_regs (HARD_REG_SET 
need_zeroed_hardregs)
 {
   if (TEST_HARD_REG_BIT (need_zeroed_hardregs, regno))
{
-   rtx target = regno_reg_rtx[regno];
+   rtx target = gen_rtx_REG (RVVM1SImode, regno);
  machine_mode mode = GET_MODE (target);
  if (!emitted_vlmax_vsetvl)
-- 
2.36.3
 


Re: [PATCH] fwprop: Allow UNARY_P and check register pressure.

2023-09-07 Thread Robin Dapp via Gcc-patches
Thanks for looking at it in detail.

> Yeah, I think this is potentially a blocker for propagating A into B
> when A is used elsewhere.  Combine is able to combine A and B while
> keeping A in parallel with the result.  I think either fwprop would
> need to try that too, or it would need to be restricted to cases where A
> is only used in B.

That seems a rather severe limitation and my original use case would
not get optimized considerably anymore.  The intention was to replace
all uses (if register pressure allows).  Of course the example is simple
enough that a propagation is always useful if the costs allow it, so
it might not be representative.

I'm wondering if we could (my original misunderstanding) tentatively
try to propagate into all uses of a definition and, when reaching
a certain ratio, decide that it might be worth it, otherwise revert.
Would be very crude though, and not driven by the actual problem we're
trying to avoid. 

> I think the summary is:
> 
> IMO, we have to be mindful that combine is still to run.  We need to
> avoid making equal-cost changes if the new form is more complex, or
> otherwise likely to interfere with combine.

I guess we don't have a good measure for complexity or "combinability"
and even lower-cost changes could result in worse options later.
Would it make sense to have a strict less-than cost policy for those
more complex propagations?  Or do you consider the approach in its
current shape "hopeless", given the complications we discussed?

> Alternatively, we could delay the optimisation until after combine
> and have freer rein, since we're then just mopping up opportunities
> that other passes left behind.
> 
> A while back I was experimenting with a second combine pass.  That was
> the original motiviation for rtl-ssa.  I never got chance to finish it
> off though.

This doesn't sound like something that would still materialize before
the end of stage 1 :)
Do you see any way of restricting the current approach to make it less
intrusive and still worthwhile?  Limiting to vec_duplicate might be
much too arbitrary but would still help for my original example.

Regards
 Robin



[RFC] gcc: xtensa: use salt/saltu in xtensa_expand_scc

2023-09-07 Thread Max Filippov via Gcc-patches
gcc/
* config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
unsigned comparisons.
* config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
generation of salt/saltu instructions.
* config/xtensa/xtensa.h (TARGET_SALT): New macro.
* gcc/config/xtensa/xtensa.md (salt, saltu): New instruction
patterns.
---
I've tested it both with configurations that have salt/saltu and that
don't.
The inversion of the result at the end looks wasteful. I've been reading
gccint chapter about cstoreMODE4 and the following part left me with the
question:

  The value stored for a true condition must have 1 as its low bit,
  or else must be negative.

Does it mean that some variants of cstoreMODE4 may return 1 and some may
return -1 for truth, as both have 1 as its low bit? If that's true we
could use 'addi dest, dest, -1' instead of two-intruction sequence
'movi tmp, 1; xor dest, dest, tmp'.

---
 gcc/config/xtensa/predicates.md |  2 +-
 gcc/config/xtensa/xtensa.cc | 58 +
 gcc/config/xtensa/xtensa.h  |  1 +
 gcc/config/xtensa/xtensa.md | 20 
 4 files changed, 80 insertions(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md
index a3575a688923..672fb003a6c5 100644
--- a/gcc/config/xtensa/predicates.md
+++ b/gcc/config/xtensa/predicates.md
@@ -195,7 +195,7 @@
   (match_code "plus,minus"))
 
 (define_predicate "xtensa_cstoresi_operator"
-  (match_code "eq,ne,gt,ge,lt,le"))
+  (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu"))
 
 (define_predicate "xtensa_shift_per_byte_operator"
   (match_code "ashift,ashiftrt,lshiftrt"))
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index 1afaa1cc94e7..cc63529e80ea 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -1028,6 +1028,64 @@ xtensa_expand_scc (rtx operands[4], machine_mode 
cmp_mode)
break;
   }
 
+  if (cmp_mode == SImode && TARGET_SALT)
+{
+  bool swap_args = false;
+  bool invert_res = false;
+  rtx a = operands[2], b = force_reg (SImode, operands[3]);
+
+  switch (code)
+   {
+   case GE:
+   case GEU:
+ invert_res = true;
+ break;
+   case GT:
+   case GTU:
+ swap_args = true;
+ break;
+   case LE:
+   case LEU:
+ invert_res = true;
+ swap_args = true;
+ break;
+   default:
+ break;
+   }
+
+  if (swap_args)
+   std::swap (a, b);
+
+  switch (code)
+   {
+   case GE:
+   case GT:
+   case LE:
+   case LT:
+ emit_insn (gen_salt (dest, a, b));
+ if (!invert_res)
+   return 1;
+ break;
+   case GEU:
+   case GTU:
+   case LEU:
+   case LTU:
+ emit_insn (gen_saltu (dest, a, b));
+ if (!invert_res)
+   return 1;
+ break;
+   default:
+ break;
+   }
+
+  if (invert_res)
+   {
+ one_tmp = force_reg (SImode, const1_rtx);
+ emit_insn (gen_xorsi3 (dest, dest, one_tmp));
+ return 1;
+   }
+}
+
   if (! (cmp = gen_conditional_move (code, cmp_mode,
 operands[2], operands[3])))
 return 0;
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 34e06afcff48..5987681e5496 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -54,6 +54,7 @@ along with GCC; see the file COPYING3.  If not see
 #define TARGET_WINDOWED_ABIxtensa_windowed_abi
 #define TARGET_DEBUG   XCHAL_HAVE_DEBUG
 #define TARGET_L32RXCHAL_HAVE_L32R
+#define TARGET_SALT(XTENSA_MARCH_EARLIEST >= 26)
 
 #define TARGET_DEFAULT (MASK_SERIALIZE_VOLATILE)
 
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index d6505e7eb700..594238030237 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -2393,6 +2393,26 @@
   DONE;
 })
 
+(define_insn "salt"
+  [(set (match_operand:SI 0 "register_operand" "=a")
+   (lt:SI (match_operand:SI 1 "register_operand" "r")
+  (match_operand:SI 2 "register_operand" "r")))]
+  "TARGET_SALT"
+  "salt\t%0, %1, %2"
+  [(set_attr "type""arith")
+   (set_attr "mode""SI")
+   (set_attr "length"  "3")])
+
+(define_insn "saltu"
+  [(set (match_operand:SI 0 "register_operand" "=a")
+   (ltu:SI (match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")))]
+  "TARGET_SALT"
+  "saltu\t%0, %1, %2"
+  [(set_attr "type""arith")
+   (set_attr "mode""SI")
+   (set_attr "length"  "3")])
+
 (define_expand "cstoresf4"
   [(match_operand:SI 0 "register_operand")
(match_operator:SI 1 "comparison_operator"
-- 
2.30.2



[PATCH] ARM: Block predication on atomics [PR111235]

2023-09-07 Thread Wilco Dijkstra via Gcc-patches
The v7 memory ordering model allows reordering of conditional atomic 
instructions.
To avoid this, make all atomic patterns unconditional.  Expand atomic loads and
stores for all architectures so the memory access can be wrapped into an UNSPEC.

Passes regress/bootstrap, OK for commit?

gcc/ChangeLog/
PR target/111235
* config/arm/constraints.md: Remove Pf constraint.
* onfig/arm/sync.md (arm_atomic_load): Add new pattern.
(arm_atomic_load_acquire): Likewise.
(arm_atomic_store): Likewise.
(arm_atomic_store_release): Likewise.
(atomic_load): Always expand atomic loads explicitly.
(atomic_store): Always expand atomic stores explicitly.
(arm_atomic_loaddi2_ldrd): Remove predication.
(arm_load_exclusive): Likewise.
(arm_load_acquire_exclusive): Likewise.
(arm_load_exclusivesi): Likewise.
(arm_load_acquire_exclusivesi: Likewise.
(arm_load_exclusivedi): Likewise.
(arm_load_acquire_exclusivedi): Likewise.
(arm_store_exclusive): Likewise.
(arm_store_release_exclusivedi): Likewise.
(arm_store_release_exclusive): Likewise.
* gcc/config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.

gcc/testsuite/ChangeLog/
PR target/111235
* gcc.target/arm/pr111235.c: Add new test.

---

diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md
index 
05a4ebbdd67601d7b92aa44a619d17634cc69f17..d7c4a1b0cd785f276862048005e6cfa57cdcb20d
 100644
--- a/gcc/config/arm/constraints.md
+++ b/gcc/config/arm/constraints.md
@@ -36,7 +36,7 @@
 ;; in Thumb-1 state: Pa, Pb, Pc, Pd, Pe
 ;; in Thumb-2 state: Ha, Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py, Pz, Rd, Rf, Rb, 
Ra,
 ;;  Rg, Ri
-;; in all states: Pf, Pg
+;; in all states: Pg
 
 ;; The following memory constraints have been used:
 ;; in ARM/Thumb-2 state: Uh, Ut, Uv, Uy, Un, Um, Us, Up, Uf, Ux, Ul
@@ -239,13 +239,6 @@ (define_constraint "Pe"
   (and (match_code "const_int")
(match_test "TARGET_THUMB1 && ival >= 256 && ival <= 510")))
 
-(define_constraint "Pf"
-  "Memory models except relaxed, consume or release ones."
-  (and (match_code "const_int")
-   (match_test "!is_mm_relaxed (memmodel_from_int (ival))
-   && !is_mm_consume (memmodel_from_int (ival))
-   && !is_mm_release (memmodel_from_int (ival))")))
-
 (define_constraint "Pg"
   "@internal In Thumb-2 state a constant in range 1 to 32"
   (and (match_code "const_int")
diff --git a/gcc/config/arm/sync.md b/gcc/config/arm/sync.md
index 
7626bf3c443285dc63b4c4367b11a879a99c93c6..2210810f67f37ce043b8fdc73b4f21b54c5b1912
 100644
--- a/gcc/config/arm/sync.md
+++ b/gcc/config/arm/sync.md
@@ -62,68 +62,110 @@ (define_insn "*memory_barrier"
(set_attr "conds" "unconditional")
(set_attr "predicable" "no")])
 
-(define_insn "atomic_load"
-  [(set (match_operand:QHSI 0 "register_operand" "=r,r,l")
+(define_insn "arm_atomic_load"
+  [(set (match_operand:QHSI 0 "register_operand" "=r,l")
 (unspec_volatile:QHSI
-  [(match_operand:QHSI 1 "arm_sync_memory_operand" "Q,Q,Q")
-   (match_operand:SI 2 "const_int_operand" "n,Pf,n")]  ;; model
+  [(match_operand:QHSI 1 "memory_operand" "m,m")]
+  VUNSPEC_LDR))]
+  ""
+  "ldr\t%0, %1"
+  [(set_attr "arch" "32,any")])
+
+(define_insn "arm_atomic_load_acquire"
+  [(set (match_operand:QHSI 0 "register_operand" "=r")
+(unspec_volatile:QHSI
+  [(match_operand:QHSI 1 "arm_sync_memory_operand" "Q")]
   VUNSPEC_LDA))]
   "TARGET_HAVE_LDACQ"
-  {
-if (aarch_mm_needs_acquire (operands[2]))
-  {
-   if (TARGET_THUMB1)
- return "lda\t%0, %1";
-   else
- return "lda%?\t%0, %1";
-  }
-else
-  {
-   if (TARGET_THUMB1)
- return "ldr\t%0, %1";
-   else
- return "ldr%?\t%0, %1";
-  }
-  }
-  [(set_attr "arch" "32,v8mb,any")
-   (set_attr "predicable" "yes")])
+  "lda\t%0, %C1"
+)
 
-(define_insn "atomic_store"
-  [(set (match_operand:QHSI 0 "memory_operand" "=Q,Q,Q")
+(define_insn "arm_atomic_store"
+  [(set (match_operand:QHSI 0 "memory_operand" "=m,m")
+(unspec_volatile:QHSI
+  [(match_operand:QHSI 1 "register_operand" "r,l")]
+  VUNSPEC_STR))]
+  ""
+  "str\t%1, %0";
+  [(set_attr "arch" "32,any")])
+
+(define_insn "arm_atomic_store_release"
+  [(set (match_operand:QHSI 0 "arm_sync_memory_operand" "=Q")
 (unspec_volatile:QHSI
-  [(match_operand:QHSI 1 "general_operand" "r,r,l")
-   (match_operand:SI 2 "const_int_operand" "n,Pf,n")]  ;; model
+  [(match_operand:QHSI 1 "register_operand" "r")]
   VUNSPEC_STL))]
   "TARGET_HAVE_LDACQ"
-  {
-if (aarch_mm_needs_release (operands[2]))
-  {
-   if (TARGET_THUMB1)
- return "stl\t%1, %0";
-   else
- return "stl%?\t%1, %0";
-  }
-else
-  {
-   if (TARGET_THUMB1)
- return "str\t%1, %0";
-   else
- return "str%?\t%1, %0";
-  }
- 

[pushed][PR111225][LRA]: Don't reuse chosen insn alternative with special memory constraint

2023-09-07 Thread Vladimir Makarov via Gcc-patches

The following patch solves

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111225

The patch was successfully bootstrapped and tested on x86-64, aarch64, 
and ppc64le.


commit f7bca44d97ad01b39f9d6e7809df7bf517eeb2fb
Author: Vladimir N. Makarov 
Date:   Thu Sep 7 09:59:10 2023 -0400

[LRA]: Don't reuse chosen insn alternative with special memory constraint

To speed up GCC, LRA reuses chosen alternative from previous
constraint subpass.  A spilled pseudo is considered ok for any memory
constraint although stack slot assigned to the pseudo later might not
satisfy the chosen alternative constraint.  As we don't consider all insn
alternatives on the subsequent LRA sub-passes, it might result in LRA failure
to generate the correct insn.  This patch solves the problem.

gcc/ChangeLog:

PR target/111225
* lra-constraints.cc (goal_reuse_alt_p): New global flag.
(process_alt_operands): Set up the flag.  Clear flag for chosen
alternative with special memory constraints.
(process_alt_operands): Set up used insn alternative depending on the flag.

gcc/testsuite/ChangeLog:

PR target/111225
* gcc.target/i386/pr111225.c: New test.

diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index c718bedff32..3aaa4906999 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -1462,6 +1462,9 @@ static int goal_alt_matches[MAX_RECOG_OPERANDS];
 static int goal_alt_dont_inherit_ops_num;
 /* Numbers of operands whose reload pseudos should not be inherited.  */
 static int goal_alt_dont_inherit_ops[MAX_RECOG_OPERANDS];
+/* True if we should try only this alternative for the next constraint sub-pass
+   to speed up the sub-pass.  */
+static bool goal_reuse_alt_p;
 /* True if the insn commutative operands should be swapped.  */
 static bool goal_alt_swapped;
 /* The chosen insn alternative.	 */
@@ -2130,6 +2133,7 @@ process_alt_operands (int only_alternative)
   int curr_alt_dont_inherit_ops_num;
   /* Numbers of operands whose reload pseudos should not be inherited.	*/
   int curr_alt_dont_inherit_ops[MAX_RECOG_OPERANDS];
+  bool curr_reuse_alt_p;
   /* True if output stack pointer reload should be generated for the current
  alternative.  */
   bool curr_alt_out_sp_reload_p;
@@ -2217,6 +2221,7 @@ process_alt_operands (int only_alternative)
   reject += static_reject;
   early_clobbered_regs_num = 0;
   curr_alt_out_sp_reload_p = false;
+  curr_reuse_alt_p = true;
   
   for (nop = 0; nop < n_operands; nop++)
 	{
@@ -2574,7 +2579,10 @@ process_alt_operands (int only_alternative)
 		  if (satisfies_memory_constraint_p (op, cn))
 			win = true;
 		  else if (spilled_pseudo_p (op))
-			win = true;
+			{
+			  curr_reuse_alt_p = false;
+			  win = true;
+			}
 		  break;
 		}
 		  break;
@@ -3318,6 +3326,7 @@ process_alt_operands (int only_alternative)
 	  goal_alt_offmemok[nop] = curr_alt_offmemok[nop];
 	}
 	  goal_alt_dont_inherit_ops_num = curr_alt_dont_inherit_ops_num;
+	  goal_reuse_alt_p = curr_reuse_alt_p;
 	  for (nop = 0; nop < curr_alt_dont_inherit_ops_num; nop++)
 	goal_alt_dont_inherit_ops[nop] = curr_alt_dont_inherit_ops[nop];
 	  goal_alt_swapped = curr_swapped;
@@ -4399,7 +4408,8 @@ curr_insn_transform (bool check_only_p)
 }
 
   lra_assert (goal_alt_number >= 0);
-  lra_set_used_insn_alternative (curr_insn, goal_alt_number);
+  lra_set_used_insn_alternative (curr_insn, goal_reuse_alt_p
+ ? goal_alt_number : LRA_UNKNOWN_ALT);
 
   if (lra_dump_file != NULL)
 {
diff --git a/gcc/testsuite/gcc.target/i386/pr111225.c b/gcc/testsuite/gcc.target/i386/pr111225.c
new file mode 100644
index 000..5d92daf215b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr111225.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -fsanitize=thread -mforce-drap -mavx512cd" } */
+
+typedef long long __m256i __attribute__ ((__vector_size__ (32)));
+
+int foo (__m256i x, __m256i y)
+{
+  __m256i a = x & ~y;
+  return !__builtin_ia32_ptestz256 (a, a);
+}
+
+int bar (__m256i x, __m256i y)
+{
+  __m256i a = ~x & y;
+  return !__builtin_ia32_ptestz256 (a, a);
+}


[PATCH] RISC-V: Replace rtx REG for zero REGS operations

2023-09-07 Thread Juzhe-Zhong
This patch fixes these following FAILs:
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O0  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O0  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O1  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O1  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (internal compiler error: in gen_reg_rtx, at 
emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (internal compiler error: in gen_reg_rtx, at 
emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O3 -g  (internal compiler 
error: in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -O3 -g  (test for excess errors)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -Os  (internal compiler error: 
in gen_reg_rtx, at emit-rtl.cc:1176)
FAIL: gcc.target/riscv/zero-scratch-regs-3.c   -Os  (test for excess errors)

These FAILs because regno_reg_rtx[regno] is VLS mode in some regno which is not 
VLMAX AVL
gcc/ChangeLog:

* config/riscv/riscv.cc (vector_zero_call_used_regs): Fix bug.

---
 gcc/config/riscv/riscv.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index a3d3389e7e2..c0c9c990a23 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8998,7 +8998,7 @@ vector_zero_call_used_regs (HARD_REG_SET 
need_zeroed_hardregs)
 {
   if (TEST_HARD_REG_BIT (need_zeroed_hardregs, regno))
{
- rtx target = regno_reg_rtx[regno];
+ rtx target = gen_rtx_REG (RVVM1SImode, regno);
  machine_mode mode = GET_MODE (target);
 
  if (!emitted_vlmax_vsetvl)
-- 
2.36.3



Re: [PATCH 2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler

2023-09-07 Thread Andrew MacLeod via Gcc-patches



On 9/1/23 02:40, Andrew Pinski wrote:

On Fri, Aug 11, 2023 at 8:08 AM Andrew MacLeod via Gcc-patches
 wrote:


If this is only going to work with integers, you might want to check
that somewhere or switch to irange and int_range_max..

You can make it work with any kind (if you know op1 is a constant) by
simply doing

Value_Range op1_range (TREE_TYPE (op1))
get_global_range_query->range_of_expr (op1_range, op1)

That will convert trees to a the appropriate range...  THis is also true
for integer constants... but you can also just do the WI conversion like
you do.

The routine also get confusing to read because it passes in op0 and
op1,  but of course ranger uses op1 and op2 nomenclature, and it looks a
bit confusing :-P   I'd change the operands passed in to op1 and op2 if
we are rewriting the routine.

Ranger using the nomenclature of op1/op2 and gimple is inconsistent
with trees and other parts of GCC.
It seems like we have to live with this inconsistency now too.
Renaming things in this one function to op1/op2 might be ok but the
rest of the file uses op0/op1 too; most likely because it was
originally written before gimple.

I think it would be good to have this written in the coding style,
which way should we have it for new code; if we start at 0 or 1 for
operands. It might reduce differences based on who wrote which part
(and even to some extent when). I don't really care which one is
picked as long as we pick one.

Thanks,
Andrew Pinski

I certainly wont argue it would be good to be consistent, but of course 
its quite prevalent. Perhaps we should rewrite vr-values.cc to change 
the terminology in one patch?


long term some of it is likely to get absorbed into rangeops, and what 
isn't could/should be made vrange/irange  aware...  no one has gotten to 
it yet. we could change the terminology as the routines are reworked too...


Andrew




Re: [PATCH] fwprop: Allow UNARY_P and check register pressure.

2023-09-07 Thread Richard Sandiford via Gcc-patches
Robin Dapp  writes:
> Hi Richard,
>
> I did some testing with the attached v2 that does not restrict to UNARY
> anymore.  As feared ;) there is some more fallout that I'm detailing below.
>
> On Power there is one guality fail (pr43051-1.c) that I would take
> the liberty of ignoring for now.
>
> On x86 there are four fails:
>
>  - cond_op_addsubmuldiv__Float16-2.c: assembler error
>unsupported masking for `vmovsh'.  I guess that's a latent backend
>problem.
>
>  - ifcvt-3.c, pr49095.c: Here we propagate into a compare.  Before, we had
>(cmp (reg/CC) 0) and now we have (cmp (plus (reg1 reg2) 0).
>That looks like a costing problem and can hopefully solveable by making
>the second compare more expensive, preventing the propagation.
>i386 costing (or every costing?) is brittle so that could well break other
>things. 
>
>  - pr88873.c: This is interesting because even before this patch we
>propagated with different register classes (V2DF vs DI).  With the patch
>we check the register pressure, find the class NO_REGS for V2DF and
>abort (because the patch assumes NO_REGS = high pressure).  I'm thinking
>of keeping the old behavior for reg-reg propagations and only checking
>the pressure for more complex operations.
>
> aarch64 has the most fails:
>
>  - One guality fail (same as Power).
>  - shrn-combine-[123].c as before.
>
>  - A class of (hopefully, I only checked some) similar cases where we
>propagate an unspec_whilelo into an unspec_ptest.  Before we would only
>set a REG_EQUALS note.
>Before we managed to create a while_ultsivnx16bi_cc whereas now we have
>while_ultsivnx16bi and while_ultsivnx16bi_ptest that won't be combined.
>We create redundant whilelos and I'm not sure how to improve that. I
>guess a peephole is out of the question :)

Yeah, I think this is potentially a blocker for propagating A into B
when A is used elsewhere.  Combine is able to combine A and B while
keeping A in parallel with the result.  I think either fwprop would
need to try that too, or it would need to be restricted to cases where A
is only used in B.

I don't think that's really a UNARY_P-or-not thing.  The same problem
would in principle apply to plain unary operations.

>  - pred-combine-and.c: Here the new propagation appears useful at first.

I'm not sure about that, because...

>We propagate a "vector mask and" into a while_ultsivnx4bi_ptest and the
>individual and registers remain live up to the propagation site (while
>being dead before the patch).
>With the registers dead, combine could create a single fcmgt before.
>Now it only manages a 2->2 combination because we still need the registers
>and end up with two fcmgts.
>The code is worse but this seems more bad luck than anything.

...the fwprop1 change is:

(insn 26 25 27 4 (set (reg:VNx4BI 102 [ vec_mask_and_64 ])
(and:VNx4BI (reg:VNx4BI 116 [ mask__30.13 ])
(reg:VNx4BI 98 [ loop_mask_58 ]))) 8420 {andvnx4bi3}
 (nil))
...
(insn 31 30 32 4 (set (reg:VNx4BI 106 [ mask__24.18 ])
(and:VNx4BI (reg:VNx4BI 118 [ mask__25.17 ])
(reg:VNx4BI 102 [ vec_mask_and_64 ]))) 8420 {andvnx4bi3}
 (nil))

to:

(insn 26 25 27 4 (set (reg:VNx4BI 102 [ vec_mask_and_64 ])
(and:VNx4BI (reg:VNx4BI 116 [ mask__30.13 ])
(reg:VNx4BI 98 [ loop_mask_58 ]))) 8420 {andvnx4bi3}
 (expr_list:REG_DEAD (reg:VNx4BI 116 [ mask__30.13 ])
(expr_list:REG_DEAD (reg:VNx4BI 98 [ loop_mask_58 ])
(nil
...
(insn 31 30 32 4 (set (reg:VNx4BI 106 [ mask__24.18 ])
(and:VNx4BI (and:VNx4BI (reg:VNx4BI 116 [ mask__30.13 ])
(reg:VNx4BI 98 [ loop_mask_58 ]))
(reg:VNx4BI 118 [ mask__25.17 ]))) 8428 {aarch64_pred_andvnx4bi_z}
 (nil))

On its own this isn't worse.  But it's also not a win.  The before and
after sequences have equal cost, but the after sequence is more complex.

That would probably be OK for something that runs near the end of
the pre-RA pipeline, since it could in principle increase parallelism.
But it's probably a bad idea when we know that the main instruction
combination pass is still to run.  By making insn 31 more complex,
we're making it a less likely combination candidate.

So this isn't necesarily the wrong thing to do.  But I think it is
the wrong time to do it.

>  - Addressing fails from before:  I looked into these and suspect all of
>them are a similar.
>What happens is that we have a poly_int offset that we shift, negate
>and then add to x0.  The result is used as load address.
>Before, we would pull (combine) the (plus x0 reg) into the load keeping
>the neg and shift.
>Now we propagate everything into a single (set (minus x0 offset)).
>The propagation itself seems worthwhile because we save one insn.
>However as we got rid of the base/offset split by lumping everything
>together, combine cannot pull the (plus) into the 

[PATCHSET] Reintroduce targetrustm hooks

2023-09-07 Thread Arthur Cohen

Alright, was not expecting to mess up this patchset so bad so here we go:

This patchset reintroduces proper targetrustm hooks without the old
problematic mess of macros we had, which had been removed for the first
merge of gccrs upstream.

Tested on x86-64 GNU Linux, and has also been present in our development
repository for a long time - added by this pull-request from Iain [1]
which was merged in October 2022.

Ok for trunk?

[PATCH 01/14] rust: Add skeleton support and documentation for
[PATCH 02/14] rust: Reintroduce TARGET_RUST_CPU_INFO hook
[PATCH 03/14] rust: Reintroduce TARGET_RUST_OS_INFO hook
[PATCH 04/14] rust: Implement TARGET_RUST_CPU_INFO for i[34567]86-*-*
[PATCH 05/14] rust: Implement TARGET_RUST_OS_INFO for *-*-darwin*
[PATCH 06/14] rust: Implement TARGET_RUST_OS_INFO for *-*-freebsd*
[PATCH 07/14] rust: Implement TARGET_RUST_OS_INFO for *-*-netbsd*
[PATCH 08/14] rust: Implement TARGET_RUST_OS_INFO for *-*-openbsd*
[PATCH 09/14] rust: Implement TARGET_RUST_OS_INFO for *-*-solaris2*.
[PATCH 10/14] rust: Implement TARGET_RUST_OS_INFO for *-*-dragonfly*
[PATCH 11/14] rust: Implement TARGET_RUST_OS_INFO for *-*-vxworks*
[PATCH 12/14] rust: Implement TARGET_RUST_OS_INFO for *-*-fuchsia*.
[PATCH 13/14] rust: Implement TARGET_RUST_OS_INFO for
[PATCH 14/14] rust: Implement TARGET_RUST_OS_INFO for *-*-*linux*.

[1]: https://github.com/Rust-GCC/gccrs/pull/1543


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[PATCH 09/14] rust: Implement TARGET_RUST_OS_INFO for *-*-solaris2*.

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-solaris2*): Set rust_target_objs and
target_has_targetrustm.
* config/t-sol2 (sol2-rust.o): New rule.
* config/sol2-rust.cc: New file.
---
 gcc/config.gcc  |  2 ++
 gcc/config/sol2-rust.cc | 40 
 gcc/config/t-sol2   |  5 +
 3 files changed, 47 insertions(+)
 create mode 100644 gcc/config/sol2-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index f2b4381362c..81142763ac2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1056,6 +1056,8 @@ case ${target} in
   ;;
   esac
   target_has_targetdm=yes
+  rust_target_objs="${rust_target_objs} sol2-rust.o"
+  target_has_targetrustm=yes
   ;;
 *-*-*vms*)
   extra_options="${extra_options} vms/vms.opt"
diff --git a/gcc/config/sol2-rust.cc b/gcc/config/sol2-rust.cc
new file mode 100644
index 000..e36bd450bcc
--- /dev/null
+++ b/gcc/config/sol2-rust.cc
@@ -0,0 +1,40 @@
+/* Solaris support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for Solaris targets.  */
+
+static void
+solaris_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_os", "solaris");
+  rust_add_target_info ("target_vendor", "sun");
+  rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO solaris_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-sol2 b/gcc/config/t-sol2
index 83d4c85fdeb..d454409d346 100644
--- a/gcc/config/t-sol2
+++ b/gcc/config/t-sol2
@@ -31,6 +31,11 @@ sol2-d.o: $(srcdir)/config/sol2-d.cc
$(COMPILE) $<
$(POSTCOMPILE)
 
+# Solaris-specific Rust support.
+sol2-rust.o: $(srcdir)/config/sol2-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
+
 # Corresponding stub routines.
 sol2-stubs.o: $(srcdir)/config/sol2-stubs.cc
$(COMPILE) $<
-- 
2.42.0



[PATCH 14/14] rust: Implement TARGET_RUST_OS_INFO for *-*-*linux*.

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*linux*): Set rust target_objs, and
target_has_targetrustm,
* config/t-linux (linux-rust.o): New rule.
* config/linux-rust.cc: New file.
---
 gcc/config.gcc   |  2 ++
 gcc/config/linux-rust.cc | 57 
 gcc/config/t-linux   |  4 +++
 3 files changed, 63 insertions(+)
 create mode 100644 gcc/config/linux-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index a7a36fccd8d..0c8d756a895 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -944,6 +944,8 @@ case ${target} in
 *-*-*linux*)
   d_target_objs="${d_target_objs} linux-d.o"
   target_has_targetdm=yes
+  rust_target_objs="${rust_target_objs} linux-rust.o"
+  target_has_targetrustm=yes
   ;;
 *-*-kfreebsd*-gnu)
   d_target_objs="${d_target_objs} kfreebsd-d.o"
diff --git a/gcc/config/linux-rust.cc b/gcc/config/linux-rust.cc
new file mode 100644
index 000..3eaa91818ff
--- /dev/null
+++ b/gcc/config/linux-rust.cc
@@ -0,0 +1,57 @@
+/* Linux support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* `-mandroid' is not available as an command-line option.  */
+#ifndef TARGET_ANDROID
+#define TARGET_ANDROID 0
+#endif
+
+/* Implement TARGET_RUST_OS_INFO for Linux targets.  */
+
+static void
+linux_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_vendor", "unknown");
+
+  if (TARGET_ANDROID)
+rust_add_target_info ("target_os", "android");
+  else
+rust_add_target_info ("target_os", "linux");
+
+  if (OPTION_GLIBC)
+rust_add_target_info ("target_env", "gnu");
+  else if (OPTION_MUSL)
+rust_add_target_info ("target_env", "musl");
+  else if (OPTION_UCLIBC)
+rust_add_target_info ("target_env", "uclibc");
+  else
+rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO linux_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-linux b/gcc/config/t-linux
index 03966d5ce96..96593fbf27f 100644
--- a/gcc/config/t-linux
+++ b/gcc/config/t-linux
@@ -23,3 +23,7 @@ linux.o: $(srcdir)/config/linux.cc
 linux-d.o: $(srcdir)/config/linux-d.cc
  $(COMPILE) $<
  $(POSTCOMPILE)
+
+linux-rust.o: $(srcdir)/config/linux-rust.cc
+ $(COMPILE) $<
+ $(POSTCOMPILE)
-- 
2.42.0



[PATCH 08/14] rust: Implement TARGET_RUST_OS_INFO for *-*-openbsd*

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-openbsd*): Set rust_target_objs and
target_has_targetrustm.
* config/t-openbsd (openbsd-rust.o): New rule.
* config/openbsd-rust.cc: New file.
---
 gcc/config.gcc |  2 ++
 gcc/config/openbsd-rust.cc | 40 ++
 gcc/config/t-openbsd   |  5 +
 3 files changed, 47 insertions(+)
 create mode 100644 gcc/config/openbsd-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index ad4c01dfc89..f2b4381362c 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -990,6 +990,8 @@ case ${target} in
   esac
   d_target_objs="${d_target_objs} openbsd-d.o"
   target_has_targetdm=yes
+  rust_target_objs="${rust_target_objs} openbsd-rust.o"
+  target_has_targetrustm=yes
   ;;
 *-*-phoenix*)
   gas=yes
diff --git a/gcc/config/openbsd-rust.cc b/gcc/config/openbsd-rust.cc
new file mode 100644
index 000..c4721ea18e9
--- /dev/null
+++ b/gcc/config/openbsd-rust.cc
@@ -0,0 +1,40 @@
+/* OpenBSD support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for OpenBSD targets.  */
+
+static void
+openbsd_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_os", "openbsd");
+  rust_add_target_info ("target_vendor", "unknown");
+  rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO openbsd_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-openbsd b/gcc/config/t-openbsd
index 69643f521fb..3b625d62b30 100644
--- a/gcc/config/t-openbsd
+++ b/gcc/config/t-openbsd
@@ -5,3 +5,8 @@ USER_H = $(EXTRA_HEADERS)
 openbsd-d.o: $(srcdir)/config/openbsd-d.cc
$(COMPILE) $<
$(POSTCOMPILE)
+
+# OpenBSD-specific Rust support.
+openbsd-rust.o: $(srcdir)/config/openbsd-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
-- 
2.42.0



[PATCH 10/14] rust: Implement TARGET_RUST_OS_INFO for *-*-dragonfly*

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-dragonfly*): Set rust_target_objs and
target_has_targetrustm.
* config/t-dragonfly (dragonfly-rust.o): New rule.
* config/dragonfly-rust.cc: New file.
---
 gcc/config.gcc   |  2 ++
 gcc/config/dragonfly-rust.cc | 40 
 gcc/config/t-dragonfly   |  4 
 3 files changed, 46 insertions(+)
 create mode 100644 gcc/config/dragonfly-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 81142763ac2..9344e26a48e 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -813,6 +813,8 @@ case ${target} in
   d_target_objs="${d_target_objs} dragonfly-d.o"
   tmake_file="${tmake_file} t-dragonfly"
   target_has_targetdm=yes
+  rust_target_objs="${rust_target_objs} dragonfly-rust.o"
+  target_has_targetrustm=yes
   ;;
 *-*-freebsd*)
   # This is the generic ELF configuration of FreeBSD.  Later
diff --git a/gcc/config/dragonfly-rust.cc b/gcc/config/dragonfly-rust.cc
new file mode 100644
index 000..ce501d1b6fd
--- /dev/null
+++ b/gcc/config/dragonfly-rust.cc
@@ -0,0 +1,40 @@
+/* DragonFly support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for DragonFly targets.  */
+
+static void
+dragonfly_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_os", "dragonfly");
+  rust_add_target_info ("target_vendor", "unknown");
+  rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO dragonfly_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-dragonfly b/gcc/config/t-dragonfly
index b80587dd0d3..e60fa18f116 100644
--- a/gcc/config/t-dragonfly
+++ b/gcc/config/t-dragonfly
@@ -19,3 +19,7 @@
 dragonfly-d.o: $(srcdir)/config/dragonfly-d.cc
$(COMPILE) $<
$(POSTCOMPILE)
+
+dragonfly-rust.o: $(srcdir)/config/dragonfly-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
-- 
2.42.0



[PATCH 07/14] rust: Implement TARGET_RUST_OS_INFO for *-*-netbsd*

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-netbsd*): Set rust_target_objs and
target_has_targetrustm.
* config/t-netbsd (netbsd-rust.o): New rule.
* config/netbsd-rust.cc: New file.
---
 gcc/config.gcc|  2 ++
 gcc/config/netbsd-rust.cc | 40 +++
 gcc/config/t-netbsd   |  4 
 3 files changed, 46 insertions(+)
 create mode 100644 gcc/config/netbsd-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 61d77567bb6..ad4c01dfc89 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -973,6 +973,8 @@ case ${target} in
   default_gnu_indirect_function=yes
   ;;
   esac
+  rust_target_objs="${rust_target_objs} netbsd-rust.o"
+  target_has_targetrustm=yes
   ;;
 *-*-openbsd*)
   tmake_file="t-openbsd"
diff --git a/gcc/config/netbsd-rust.cc b/gcc/config/netbsd-rust.cc
new file mode 100644
index 000..9395466cbbe
--- /dev/null
+++ b/gcc/config/netbsd-rust.cc
@@ -0,0 +1,40 @@
+/* NetBSD support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for NetBSD targets.  */
+
+static void
+netbsd_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_os", "netbsd");
+  rust_add_target_info ("target_vendor", "unknown");
+  rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO netbsd_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-netbsd b/gcc/config/t-netbsd
index 1d9a8ce8c7b..fdbfda52412 100644
--- a/gcc/config/t-netbsd
+++ b/gcc/config/t-netbsd
@@ -23,3 +23,7 @@ netbsd.o: $(srcdir)/config/netbsd.cc
 netbsd-d.o: $(srcdir)/config/netbsd-d.cc
$(COMPILE) $<
$(POSTCOMPILE)
+
+netbsd-rust.o: $(srcdir)/config/netbsd-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
-- 
2.42.0



[PATCH 12/14] rust: Implement TARGET_RUST_OS_INFO for *-*-fuchsia*.

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
and target_has_targetrustm.
* config/fuchsia-rust.cc: New file.
* config/t-fuchsia: New file.
---
 gcc/config.gcc |  3 +++
 gcc/config/fuchsia-rust.cc | 40 ++
 gcc/config/t-fuchsia   | 21 
 3 files changed, 64 insertions(+)
 create mode 100644 gcc/config/fuchsia-rust.cc
 create mode 100644 gcc/config/t-fuchsia

diff --git a/gcc/config.gcc b/gcc/config.gcc
index da59fa3eecd..a512eb37275 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -871,6 +871,9 @@ case ${target} in
   ;;
 *-*-fuchsia*)
   native_system_header_dir=/include
+  tmake_file="t-fuchsia"
+  rust_target_objs="${rust_target_objs} fuchsia-rust.o"
+  target_has_targetrustm=yes
   ;;
 *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | 
*-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
   extra_options="$extra_options gnu-user.opt"
diff --git a/gcc/config/fuchsia-rust.cc b/gcc/config/fuchsia-rust.cc
new file mode 100644
index 000..86262504ac2
--- /dev/null
+++ b/gcc/config/fuchsia-rust.cc
@@ -0,0 +1,40 @@
+/* Fuchsia support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for Fuchsia targets.  */
+
+static void
+fushsia_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_os", "fushsia");
+  rust_add_target_info ("target_vendor", "unknown");
+  rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO fushsia_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-fuchsia b/gcc/config/t-fuchsia
new file mode 100644
index 000..55c884bcb2e
--- /dev/null
+++ b/gcc/config/t-fuchsia
@@ -0,0 +1,21 @@
+# Copyright (C) 2022 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# .
+
+fuchsia-rust.o: $(srcdir)/config/fuchsia-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
-- 
2.42.0



[PATCH 06/14] rust: Implement TARGET_RUST_OS_INFO for *-*-freebsd*

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-freebsd*): Set rust_target_objs and
target_has_targetrustm.
* config/t-freebsd (freebsd-rust.o): New rule.
* config/freebsd-rust.cc: New file.
---
 gcc/config.gcc |  2 ++
 gcc/config/freebsd-rust.cc | 40 ++
 gcc/config/t-freebsd   |  4 
 3 files changed, 46 insertions(+)
 create mode 100644 gcc/config/freebsd-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index a654c7c5a83..61d77567bb6 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -864,6 +864,8 @@ case ${target} in
   d_target_objs="${d_target_objs} freebsd-d.o"
   tmake_file="${tmake_file} t-freebsd"
   target_has_targetdm=yes
+  rust_target_objs="${rust_target_objs} freebsd-rust.o"
+  target_has_targetrustm=yes
   ;;
 *-*-fuchsia*)
   native_system_header_dir=/include
diff --git a/gcc/config/freebsd-rust.cc b/gcc/config/freebsd-rust.cc
new file mode 100644
index 000..1dbf2ed8ef9
--- /dev/null
+++ b/gcc/config/freebsd-rust.cc
@@ -0,0 +1,40 @@
+/* FreeBSD support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for FreeBSD targets.  */
+
+static void
+freebsd_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_os", "freebsd");
+  rust_add_target_info ("target_vendor", "unknown");
+  rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO freebsd_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-freebsd b/gcc/config/t-freebsd
index fb36685653a..d4b4615e567 100644
--- a/gcc/config/t-freebsd
+++ b/gcc/config/t-freebsd
@@ -19,3 +19,7 @@
 freebsd-d.o: $(srcdir)/config/freebsd-d.cc
$(COMPILE) $<
$(POSTCOMPILE)
+
+freebsd-rust.o: $(srcdir)/config/freebsd-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
-- 
2.42.0



[PATCH 13/14] rust: Implement TARGET_RUST_OS_INFO for i[34567]86-*-mingw* and x86_64-*-mingw*.

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
rust_target_objs and target_has_targetrustm.
* config/t-winnt (winnt-rust.o): New rule.
* config/winnt-rust.cc: New file.
---
 gcc/config.gcc   |  2 ++
 gcc/config/t-winnt   |  4 
 gcc/config/winnt-rust.cc | 40 
 3 files changed, 46 insertions(+)
 create mode 100644 gcc/config/winnt-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index a512eb37275..a7a36fccd8d 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2170,6 +2170,8 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
d_target_objs="${d_target_objs} winnt-d.o"
target_has_targetcm="yes"
target_has_targetdm="yes"
+   rust_target_objs="${rust_target_objs} winnt-rust.o"
+   target_has_targetrustm="yes"
case ${target} in
x86_64-*-* | *-w64-*)
need_64bit_isa=yes
diff --git a/gcc/config/t-winnt b/gcc/config/t-winnt
index 73ce48af12b..b70c7f799e4 100644
--- a/gcc/config/t-winnt
+++ b/gcc/config/t-winnt
@@ -20,3 +20,7 @@ winnt-c.o: config/winnt-c.cc $(CONFIG_H) $(SYSTEM_H) 
coretypes.h \
   $(C_TARGET_H) $(C_TARGET_DEF_H)
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \
  $< $(OUTPUT_OPTION)
+
+winnt-rust.o: $(srcdir)/config/winnt-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
diff --git a/gcc/config/winnt-rust.cc b/gcc/config/winnt-rust.cc
new file mode 100644
index 000..190584d3961
--- /dev/null
+++ b/gcc/config/winnt-rust.cc
@@ -0,0 +1,40 @@
+/* Windows support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for Windows targets.  */
+
+static void
+winnt_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "windows");
+  rust_add_target_info ("target_os", "windows");
+  rust_add_target_info ("target_vendor", "pc");
+  rust_add_target_info ("target_env", "gnu");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO winnt_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
-- 
2.42.0



[PATCH 05/14] rust: Implement TARGET_RUST_OS_INFO for *-*-darwin*

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-darwin*): Set rust_target_objs and
target_has_targetrustm.
* config/t-darwin (darwin-rust.o): New rule.
* config/darwin-rust.cc: New file.
---
 gcc/config.gcc|  2 ++
 gcc/config/darwin-rust.cc | 44 +++
 gcc/config/t-darwin   |  4 
 3 files changed, 50 insertions(+)
 create mode 100644 gcc/config/darwin-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 13c575839ef..a654c7c5a83 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -779,8 +779,10 @@ case ${target} in
   cxx_target_objs="${cxx_target_objs} darwin-c.o"
   d_target_objs="${d_target_objs} darwin-d.o"
   fortran_target_objs="darwin-f.o"
+  rust_target_objs="${rust_target_objs} darwin-rust.o"
   target_has_targetcm=yes
   target_has_targetdm=yes
+  target_has_targetrustm=yes
   extra_objs="${extra_objs} darwin.o"
   extra_gcc_objs="darwin-driver.o"
   default_use_cxa_atexit=yes
diff --git a/gcc/config/darwin-rust.cc b/gcc/config/darwin-rust.cc
new file mode 100644
index 000..4b014b88c52
--- /dev/null
+++ b/gcc/config/darwin-rust.cc
@@ -0,0 +1,44 @@
+/* Darwin support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for Darwin targets.  */
+
+static void
+darwin_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+
+  /* TODO: rust actually has "macos", "ios", and "tvos" for darwin targets, but
+ gcc seems to have no current support for them, so assuming that target_os
+ is always macos for now.  */
+  rust_add_target_info ("target_os", "macos");
+  rust_add_target_info ("target_vendor", "apple");
+  rust_add_target_info ("target_env", "");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO darwin_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
diff --git a/gcc/config/t-darwin b/gcc/config/t-darwin
index e22a579e951..52b6d89b6d4 100644
--- a/gcc/config/t-darwin
+++ b/gcc/config/t-darwin
@@ -34,6 +34,10 @@ darwin-f.o: $(srcdir)/config/darwin-f.cc
$(COMPILE) $<
$(POSTCOMPILE)
 
+darwin-rust.o: $(srcdir)/config/darwin-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
+
 darwin-driver.o: $(srcdir)/config/darwin-driver.cc
$(COMPILE) $<
$(POSTCOMPILE)
-- 
2.42.0



[PATCH 11/14] rust: Implement TARGET_RUST_OS_INFO for *-*-vxworks*

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* config.gcc (*-*-vxworks*): Set rust_target_objs and
target_has_targetrustm.
* config/t-vxworks (vxworks-rust.o): New rule.
* config/vxworks-rust.cc: New file.
---
 gcc/config.gcc |  3 +++
 gcc/config/t-vxworks   |  4 
 gcc/config/vxworks-rust.cc | 40 ++
 3 files changed, 47 insertions(+)
 create mode 100644 gcc/config/vxworks-rust.cc

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 9344e26a48e..da59fa3eecd 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1092,6 +1092,9 @@ case ${target} in
   extra_headers="${extra_headers} ../vxworks/vxworks-predef.h"
   target_has_targetcm="yes"
 
+  rust_target_objs="${rust_target_objs} vxworks-rust.o"
+  target_has_targetrustm=yes
+
   extra_gcc_objs="vxworks-driver.o"
 
   # This private header exposes a consistent interface for checks on
diff --git a/gcc/config/t-vxworks b/gcc/config/t-vxworks
index 164869a7bf0..639b2fd7a21 100644
--- a/gcc/config/t-vxworks
+++ b/gcc/config/t-vxworks
@@ -28,6 +28,10 @@ vxworks-c.o: $(srcdir)/config/vxworks-c.cc
$(COMPILE) $<
$(POSTCOMPILE)
 
+vxworks-rust.o: $(srcdir)/config/vxworks-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
+
 # We leverage $sysroot to find target system headers only, distributed
 # in a VxWorks (a)typical fashion with a different set of headers for
 # rtp vs kernel mode.  We setup SYSROOT_HEADERS_SUFFIX_SPEC to handle
diff --git a/gcc/config/vxworks-rust.cc b/gcc/config/vxworks-rust.cc
new file mode 100644
index 000..76d618cdcd1
--- /dev/null
+++ b/gcc/config/vxworks-rust.cc
@@ -0,0 +1,40 @@
+/* VxWorks support needed only by Rust front-end.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+#include "rust/rust-target-def.h"
+
+/* Implement TARGET_RUST_OS_INFO for VxWorks targets.  */
+
+static void
+vxworks_rust_target_os_info (void)
+{
+  rust_add_target_info ("target_family", "unix");
+  rust_add_target_info ("target_os", "vxworks");
+  rust_add_target_info ("target_vendor", "wrs");
+  rust_add_target_info ("target_env", "gnu");
+}
+
+#undef TARGET_RUST_OS_INFO
+#define TARGET_RUST_OS_INFO vxworks_rust_target_os_info
+
+struct gcc_targetrustm targetrustm = TARGETRUSTM_INITIALIZER;
-- 
2.42.0



[PATCH 04/14] rust: Implement TARGET_RUST_CPU_INFO for i[34567]86-*-* and x86_64-*-*

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

There are still quite a lot of the previously reverted i386-rust.cc
missing, so it's only a partial reimplementation.

gcc/ChangeLog:

* config/i386/t-i386 (i386-rust.o): New rule.
* config/i386/i386-rust.cc: New file.
* config/i386/i386-rust.h: New file.
---
 gcc/config/i386/i386-rust.cc | 129 +++
 gcc/config/i386/i386-rust.h  |  22 ++
 gcc/config/i386/t-i386   |   4 ++
 3 files changed, 155 insertions(+)
 create mode 100644 gcc/config/i386/i386-rust.cc
 create mode 100644 gcc/config/i386/i386-rust.h

diff --git a/gcc/config/i386/i386-rust.cc b/gcc/config/i386/i386-rust.cc
new file mode 100644
index 000..a00c4f8cee1
--- /dev/null
+++ b/gcc/config/i386/i386-rust.cc
@@ -0,0 +1,129 @@
+/* Subroutines for the Rust front end on the x86 architecture.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#define IN_TARGET_CODE 1
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "tm_rust.h"
+#include "rust/rust-target.h"
+
+/* Implement TARGET_RUST_CPU_INFO for x86 targets.  */
+
+void
+ix86_rust_target_cpu_info (void)
+{
+  if (TARGET_64BIT)
+rust_add_target_info ("target_arch", "x86_64");
+  else
+rust_add_target_info ("target_arch", "x86");
+
+  // features officially "stabilised" in rustc
+  if (TARGET_MMX)
+rust_add_target_info ("target_feature", "mmx");
+  if (TARGET_SSE)
+rust_add_target_info ("target_feature", "sse");
+  if (TARGET_SSE2)
+rust_add_target_info ("target_feature", "sse2");
+  if (TARGET_SSE3)
+rust_add_target_info ("target_feature", "sse3");
+  if (TARGET_SSSE3)
+rust_add_target_info ("target_feature", "ssse3");
+  if (TARGET_SSE4_1)
+rust_add_target_info ("target_feature", "sse4.1");
+  if (TARGET_SSE4_2)
+rust_add_target_info ("target_feature", "sse4.2");
+  if (TARGET_AES)
+rust_add_target_info ("target_feature", "aes");
+  if (TARGET_SHA)
+rust_add_target_info ("target_feature", "sha");
+  if (TARGET_AVX)
+rust_add_target_info ("target_feature", "avx");
+  if (TARGET_AVX2)
+rust_add_target_info ("target_feature", "avx2");
+  if (TARGET_AVX512F)
+rust_add_target_info ("target_feature", "avx512f");
+  if (TARGET_AVX512ER)
+rust_add_target_info ("target_feature", "avx512er");
+  if (TARGET_AVX512CD)
+rust_add_target_info ("target_feature", "avx512cd");
+  if (TARGET_AVX512PF)
+rust_add_target_info ("target_feature", "avx512pf");
+  if (TARGET_AVX512DQ)
+rust_add_target_info ("target_feature", "avx512dq");
+  if (TARGET_AVX512BW)
+rust_add_target_info ("target_feature", "avx512bw");
+  if (TARGET_AVX512VL)
+rust_add_target_info ("target_feature", "avx512vl");
+  if (TARGET_AVX512VBMI)
+rust_add_target_info ("target_feature", "avx512vbmi");
+  if (TARGET_AVX512IFMA)
+rust_add_target_info ("target_feature", "avx512ifma");
+  if (TARGET_AVX512VPOPCNTDQ)
+rust_add_target_info ("target_feature", "avx512vpopcntdq");
+  if (TARGET_FMA)
+rust_add_target_info ("target_feature", "fma");
+  if (TARGET_RTM)
+rust_add_target_info ("target_feature", "rtm");
+  if (TARGET_SSE4A)
+rust_add_target_info ("target_feature", "sse4a");
+  if (TARGET_BMI)
+{
+  rust_add_target_info ("target_feature", "bmi1");
+  rust_add_target_info ("target_feature", "bmi");
+}
+  if (TARGET_BMI2)
+rust_add_target_info ("target_feature", "bmi2");
+  if (TARGET_LZCNT)
+rust_add_target_info ("target_feature", "lzcnt");
+  if (TARGET_TBM)
+rust_add_target_info ("target_feature", "tbm");
+  if (TARGET_POPCNT)
+rust_add_target_info ("target_feature", "popcnt");
+  if (TARGET_RDRND)
+{
+  rust_add_target_info ("target_feature", "rdrand");
+  rust_add_target_info ("target_feature", "rdrnd");
+}
+  if (TARGET_F16C)
+rust_add_target_info ("target_feature", "f16c");
+  if (TARGET_RDSEED)
+rust_add_target_info ("target_feature", "rdseed");
+  if (TARGET_ADX)
+rust_add_target_info ("target_feature", "adx");
+  if (TARGET_FXSR)
+rust_add_target_info ("target_feature", "fxsr");
+  if (TARGET_XSAVE)
+rust_add_target_info ("target_feature", "xsave");
+  if (TARGET_XSAVEOPT)
+rust_add_target_info ("target_feature", "xsaveopt");
+  if (TARGET_XSAVEC)
+rust_add_target_info ("target_feature", "xsavec");
+  if (TARGET_XSAVES)
+

[PATCH 03/14] rust: Reintroduce TARGET_RUST_OS_INFO hook

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* doc/tm.texi: Regenerate.
* doc/tm.texi.in: Document TARGET_RUST_OS_INFO.

gcc/rust/ChangeLog:

* rust-session-manager.cc (Session::init): Call
targetrustm.rust_os_info.
* rust-target.def (rust_os_info): New hook.
---
 gcc/doc/tm.texi  | 5 +
 gcc/doc/tm.texi.in   | 2 ++
 gcc/rust/rust-session-manager.cc | 1 +
 gcc/rust/rust-target.def | 8 
 4 files changed, 16 insertions(+)

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index f7a2f8be542..b0779724d30 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -10975,6 +10975,11 @@ Configuration pairs predefined by this hook apply to 
all files that are being
 compiled.
 @end deftypefn
 
+@deftypefn {Rust Target Hook} void TARGET_RUST_OS_INFO (void)
+Similar to @code{TARGET_RUST_CPU_INFO}, but is used for configuration info
+relating to the target operating system.
+@end deftypefn
+
 @node Named Address Spaces
 @section Adding support for named address spaces
 @cindex named address spaces
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index cd4e687aea1..d3e18955628 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -7150,6 +7150,8 @@ floating-point support; they are not included in this 
mechanism.
 
 @hook TARGET_RUST_CPU_INFO
 
+@hook TARGET_RUST_OS_INFO
+
 @node Named Address Spaces
 @section Adding support for named address spaces
 @cindex named address spaces
diff --git a/gcc/rust/rust-session-manager.cc b/gcc/rust/rust-session-manager.cc
index 112960ad3c0..ce1fdbb02af 100644
--- a/gcc/rust/rust-session-manager.cc
+++ b/gcc/rust/rust-session-manager.cc
@@ -140,6 +140,7 @@ Session::init ()
 {
   // initialize target hooks
   targetrustm.rust_cpu_info ();
+  targetrustm.rust_os_info ();
 
   // target-independent values that should exist in all targets
   options.target_data.insert_key_value_pair ("target_pointer_width",
diff --git a/gcc/rust/rust-target.def b/gcc/rust/rust-target.def
index 285b7503528..9c72c1c86d3 100644
--- a/gcc/rust/rust-target.def
+++ b/gcc/rust/rust-target.def
@@ -40,5 +40,13 @@ compiled.",
  void, (void),
  hook_void_void)
 
+/* Environmental OS info relating to the target OS.  */
+DEFHOOK
+(rust_os_info,
+ "Similar to @code{TARGET_RUST_CPU_INFO}, but is used for configuration info\n\
+relating to the target operating system.",
+ void, (void),
+ hook_void_void)
+
 /* Close the 'struct gcc_targetrustm' definition.  */
 HOOK_VECTOR_END (C90_EMPTY_HACK)
-- 
2.42.0



[PATCH 02/14] rust: Reintroduce TARGET_RUST_CPU_INFO hook

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* doc/tm.texi: Regenerate.
* doc/tm.texi.in: Add @node for Rust language and ABI, and document
TARGET_RUST_CPU_INFO.

gcc/rust/ChangeLog:

* rust-lang.cc (rust_add_target_info): Remove sorry.
* rust-session-manager.cc: Replace include of target.h with
include of tm.h and rust-target.h.
(Session::init): Call targetrustm.rust_cpu_info.
* rust-target.def (rust_cpu_info): New hook.
* rust-target.h (rust_add_target_info): Declare.
---
 gcc/doc/tm.texi  | 13 +
 gcc/doc/tm.texi.in   |  7 +++
 gcc/rust/rust-lang.cc|  2 --
 gcc/rust/rust-session-manager.cc |  7 ++-
 gcc/rust/rust-target.def | 12 
 gcc/rust/rust-target.h   |  4 
 6 files changed, 42 insertions(+), 3 deletions(-)

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 69123f00298..f7a2f8be542 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -53,6 +53,7 @@ through the macros defined in the @file{.h} file.
 * PCH Target::  Validity checking for precompiled headers.
 * C++ ABI:: Controlling C++ ABI changes.
 * D Language and ABI::  Controlling D ABI changes.
+* Rust Language and ABI:: Controlling Rust ABI changes.
 * Named Address Spaces:: Adding support for named address spaces
 * Misc::Everything else.
 @end menu
@@ -10962,6 +10963,18 @@ if they have external linkage.  If this flag is false, 
then instantiated
 decls will be emitted as weak symbols.  The default is @code{false}.
 @end deftypevr
 
+@node Rust Language and ABI
+@section Rust ABI parameters
+@cindex parameters, rust abi
+
+@deftypefn {Rust Target Hook} void TARGET_RUST_CPU_INFO (void)
+Declare all environmental CPU info and features relating to the target CPU
+using the function @code{rust_add_target_info}, which takes a string
+representing the feature key and a string representing the feature value.
+Configuration pairs predefined by this hook apply to all files that are being
+compiled.
+@end deftypefn
+
 @node Named Address Spaces
 @section Adding support for named address spaces
 @cindex named address spaces
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 9bac02b9b66..cd4e687aea1 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -53,6 +53,7 @@ through the macros defined in the @file{.h} file.
 * PCH Target::  Validity checking for precompiled headers.
 * C++ ABI:: Controlling C++ ABI changes.
 * D Language and ABI::  Controlling D ABI changes.
+* Rust Language and ABI:: Controlling Rust ABI changes.
 * Named Address Spaces:: Adding support for named address spaces
 * Misc::Everything else.
 @end menu
@@ -7143,6 +7144,12 @@ floating-point support; they are not included in this 
mechanism.
 
 @hook TARGET_D_TEMPLATES_ALWAYS_COMDAT
 
+@node Rust Language and ABI
+@section Rust ABI parameters
+@cindex parameters, rust abi
+
+@hook TARGET_RUST_CPU_INFO
+
 @node Named Address Spaces
 @section Adding support for named address spaces
 @cindex named address spaces
diff --git a/gcc/rust/rust-lang.cc b/gcc/rust/rust-lang.cc
index 1fb1c25da7a..978b8b9ead2 100644
--- a/gcc/rust/rust-lang.cc
+++ b/gcc/rust/rust-lang.cc
@@ -101,8 +101,6 @@ struct GTY (()) language_function
 void
 rust_add_target_info (const char *key, const char *value)
 {
-  sorry ("TODO");
-
   Rust::Session::get_instance ().options.target_data.insert_key_value_pair (
 key, value);
 }
diff --git a/gcc/rust/rust-session-manager.cc b/gcc/rust/rust-session-manager.cc
index 074bad9c5d7..112960ad3c0 100644
--- a/gcc/rust/rust-session-manager.cc
+++ b/gcc/rust/rust-session-manager.cc
@@ -44,7 +44,8 @@
 #include "diagnostic.h"
 #include "input.h"
 #include "selftest.h"
-#include "target.h"
+#include "tm.h"
+#include "rust-target.h"
 
 extern bool
 saw_errors (void);
@@ -137,6 +138,10 @@ validate_crate_name (const std::string _name, Error 
)
 void
 Session::init ()
 {
+  // initialize target hooks
+  targetrustm.rust_cpu_info ();
+
+  // target-independent values that should exist in all targets
   options.target_data.insert_key_value_pair ("target_pointer_width",
 std::to_string (POINTER_SIZE));
   options.target_data.insert_key_value_pair ("target_endian", BYTES_BIG_ENDIAN
diff --git a/gcc/rust/rust-target.def b/gcc/rust/rust-target.def
index c800eefcfaa..285b7503528 100644
--- a/gcc/rust/rust-target.def
+++ b/gcc/rust/rust-target.def
@@ -28,5 +28,17 @@ HOOK_VECTOR (TARGETRUSTM_INITIALIZER, gcc_targetrustm)
 #undef HOOK_PREFIX
 #define HOOK_PREFIX "TARGET_"
 
+/* Environmental CPU info and features (e.g. endianness, pointer size) relating
+   to the target CPU.  */
+DEFHOOK
+(rust_cpu_info,
+ "Declare all environmental CPU info and features relating to the target CPU\n\
+using the function @code{rust_add_target_info}, which takes a string\n\
+representing the feature key and a string representing 

[PATCH 01/14] rust: Add skeleton support and documentation for targetrustm hooks.

2023-09-07 Thread arthur . cohen
From: Iain Buclaw 

gcc/ChangeLog:

* Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
(tm_rust.h, cs-tm_rust.h, default-rust.o,
rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
(s-tm-texi): Also check timestamp on rust-target.def.
(generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
(build/genhooks.o): Also depend on RUST_TARGET_DEF.
* config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
New variables.
* configure: Regenerate.
* configure.ac (tm_rust_file_list, tm_rust_include_list,
rust_target_objs): Add substitutes.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (targetrustm): Document.
(target_has_targetrustm): Document.
* genhooks.cc: Include rust/rust-target.def.
* config/default-rust.cc: New file.

gcc/rust/ChangeLog:

* rust-target-def.h: New file.
* rust-target.def: New file.
* rust-target.h: New file.
---
 gcc/Makefile.in| 34 +-
 gcc/config.gcc | 25 +
 gcc/config/default-rust.cc | 29 +
 gcc/configure  | 21 +++--
 gcc/configure.ac   | 14 ++
 gcc/doc/tm.texi|  8 
 gcc/doc/tm.texi.in |  8 
 gcc/genhooks.cc|  1 +
 gcc/rust/rust-target-def.h | 20 
 gcc/rust/rust-target.def   | 32 
 gcc/rust/rust-target.h | 31 +++
 11 files changed, 220 insertions(+), 3 deletions(-)
 create mode 100644 gcc/config/default-rust.cc
 create mode 100644 gcc/rust/rust-target-def.h
 create mode 100644 gcc/rust/rust-target.def
 create mode 100644 gcc/rust/rust-target.h

diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 6d608db4dd2..9cc16268abf 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -600,6 +600,8 @@ tm_p_file_list=@tm_p_file_list@
 tm_p_include_list=@tm_p_include_list@
 tm_d_file_list=@tm_d_file_list@
 tm_d_include_list=@tm_d_include_list@
+tm_rust_file_list=@tm_rust_file_list@
+tm_rust_include_list=@tm_rust_include_list@
 build_xm_file_list=@build_xm_file_list@
 build_xm_include_list=@build_xm_include_list@
 build_xm_defines=@build_xm_defines@
@@ -898,6 +900,7 @@ TCONFIG_H = tconfig.h $(xm_file_list)
 # Some $(target)-protos.h depends on tree.h
 TM_P_H= tm_p.h$(tm_p_file_list) $(TREE_H)
 TM_D_H= tm_d.h$(tm_d_file_list)
+TM_RUST_H = tm_rust.h $(tm_rust_file_list)
 GTM_H = tm.h  $(tm_file_list) insn-constants.h
 TM_H  = $(GTM_H) insn-flags.h $(OPTIONS_H)
 
@@ -956,10 +959,12 @@ TARGET_DEF = target.def target-hooks-macros.h 
target-insns.def
 C_TARGET_DEF = c-family/c-target.def target-hooks-macros.h
 COMMON_TARGET_DEF = common/common-target.def target-hooks-macros.h
 D_TARGET_DEF = d/d-target.def target-hooks-macros.h
+RUST_TARGET_DEF = rust/rust-target.def target-hooks-macros.h
 TARGET_H = $(TM_H) target.h $(TARGET_DEF) insn-modes.h insn-codes.h
 C_TARGET_H = c-family/c-target.h $(C_TARGET_DEF)
 COMMON_TARGET_H = common/common-target.h $(INPUT_H) $(COMMON_TARGET_DEF)
 D_TARGET_H = d/d-target.h $(D_TARGET_DEF)
+RUST_TARGET_H = rust/rust-target.h $(RUST_TARGET_DEF)
 MACHMODE_H = machmode.h mode-classes.def
 HOOKS_H = hooks.h
 HOSTHOOKS_DEF_H = hosthooks-def.h $(HOOKS_H)
@@ -1268,6 +1273,9 @@ D_TARGET_OBJS=@d_target_objs@
 # Target specific, Fortran specific object file
 FORTRAN_TARGET_OBJS=@fortran_target_objs@
 
+# Target specific, Rust specific object file
+RUST_TARGET_OBJS=@rust_target_objs@
+
 # Object files for gcc many-languages driver.
 GCC_OBJS = gcc.o gcc-main.o ggc-none.o
 
@@ -1999,6 +2007,7 @@ tconfig.h: cs-tconfig.h ; @true
 tm.h: cs-tm.h ; @true
 tm_p.h: cs-tm_p.h ; @true
 tm_d.h: cs-tm_d.h ; @true
+tm_rust.h: cs-tm_rust.h ; @true
 
 cs-config.h: Makefile
TARGET_CPU_DEFAULT="" \
@@ -2030,6 +2039,11 @@ cs-tm_d.h: Makefile
HEADERS="$(tm_d_include_list)" DEFINES="" \
$(SHELL) $(srcdir)/mkconfig.sh tm_d.h
 
+cs-tm_rust.h: Makefile
+   TARGET_CPU_DEFAULT="" \
+   HEADERS="$(tm_rust_include_list)" DEFINES="" \
+   $(SHELL) $(srcdir)/mkconfig.sh tm_rust.h
+
 # Don't automatically run autoconf, since configure.ac might be accidentally
 # newer than configure.  Also, this writes into the source directory which
 # might be on a read-only file system.  If configured for maintainer mode
@@ -2366,6 +2380,12 @@ default-d.o: config/default-d.cc
$(COMPILE) $<
$(POSTCOMPILE)
 
+# Files used by the Rust language front end.
+
+default-rust.o: config/default-rust.cc
+   $(COMPILE) $<
+   $(POSTCOMPILE)
+
 # Language-independent files.
 
 DRIVER_DEFINES = \
@@ -2672,6 +2692,15 @@ s-d-target-hooks-def-h: build/genhooks$(build_exeext)
   

[PATCH] libstdc++: Reduce output of 'make check'

2023-09-07 Thread Jonathan Wakely via Gcc-patches
Any objections to this change?

-- >8 --

This removes the 39 lines of shell commands that get echoed when
starting the testsuite. The fact that near the end of that output it
prints `echo "WARNING: could not find \`runtest'" 1>&2; :;` makes it
look like that warning is actually being shown the the user.

Suppress echoing the recipe, so that users only see the actual output
from the testsuite, not the makefile recipe as well.

libstdc++-v3/ChangeLog:

* testsuite/Makefile.am (check-DEJAGNU): Use @ in recipe.
* testsuite/Makefile.in: Regenerate.
---
 libstdc++-v3/testsuite/Makefile.am | 2 +-
 libstdc++-v3/testsuite/Makefile.in | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/testsuite/Makefile.am 
b/libstdc++-v3/testsuite/Makefile.am
index 7adc5318192..4cee585fd8e 100644
--- a/libstdc++-v3/testsuite/Makefile.am
+++ b/libstdc++-v3/testsuite/Makefile.am
@@ -117,7 +117,7 @@ $(check_DEJAGNU_normal_targets): check-DEJAGNUnormal%: 
normal%/site.exp
 
 # Run the testsuite in normal mode.
 check-DEJAGNU $(check_DEJAGNU_normal_targets): check-DEJAGNU%: site.exp
-   $(if $*,@)AR="$(AR)"; export AR; \
+   @$(if $*,@)AR="$(AR)"; export AR; \
RANLIB="$(RANLIB)"; export RANLIB; \
if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \
  rm -rf normal-parallel || true; \



Re: [PATCH 5/5] RISC-V: Remove Assert Protecting Types

2023-09-07 Thread Jeff Law via Gcc-patches




On 9/6/23 11:50, Edwin Lu wrote:

This patch turns on the assert which ensures every instruction has type
that is not TYPE_UNKNOWN.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_sched_variable_issue): Remove assert
And this is fine.  But hold off committing until all the dependencies 
are also committed.  I think there's still one earlier patch that I 
wanted to look at again.


jeff


Re: [PATCH 3/5] RISC-V: Add Types to Un-Typed Zicond Instructions

2023-09-07 Thread Jeff Law via Gcc-patches




On 9/6/23 18:42, Tsukasa OI via Gcc-patches wrote:



Looks okay to me but will need to resolve merge conflicts after commit
af88776caa20 ("RISC-V: Add support for 'XVentanaCondOps' reusing
'Zicond' support").
Sure.  We allow trival updates to resolve merge conflicts without 
needing another round of review.


Jeff


Re: [MAINTAINERS/KERNEL SUMMIT] Trust and maintenance of file systems

2023-09-07 Thread Segher Boessenkool
On Thu, Sep 07, 2023 at 02:23:00PM +0300, Dan Carpenter wrote:
> On Thu, Sep 07, 2023 at 06:04:09AM -0500, Segher Boessenkool wrote:
> > On Thu, Sep 07, 2023 at 12:48:25PM +0300, Dan Carpenter via Gcc-patches 
> > wrote:
> > > I started to hunt
> > > down all the Makefile which add a -Werror but there are a lot and
> > > eventually I got bored and gave up.
> > 
> > I have a patch stack for that, since 2014 or so.  I build Linux with
> > unreleased GCC versions all the time, so pretty much any new warning is
> > fatal if you unwisely use -Werror.
> > 
> > > Someone should patch GCC so there it checks an environment variable to
> > > ignore -Werror.  Somethine like this?
> > 
> > No.  You should patch your program, instead.
> 
> There are 2930 Makefiles in the kernel source.

Yes.  And you need patches to about thirty.  Or a bit more, if you want
to do it more cleanly.  This isn't a guess.

> > One easy way is to add a
> > -Wno-error at the end of your command lines.  Or even just -w if you
> > want or need a bigger hammer.
> 
> I tried that.  Some of the Makefiles check an environemnt variable as
> well if you want to turn off -Werror.  It's not a complete solution at
> all.  I have no idea what a complete solution looks like because I gave
> up.

A solution can not involve changing the compiler.  That is just saying
the kernel doesn't know how to fix its own problems, so let's give the
compiler some more unnecessary problems.

> > Or nicer, put it all in Kconfig, like powerpc already has for example.
> > There is a CONFIG_WERROR as well, so maybe use that in all places?
> 
> That's a good idea but I'm trying to compile old kernels and not the
> current kernel.

You can patch older kernels, too, you know :-)

If you need to not make any changes to your source code for some crazy
reason (political perhaps?), just use a shell script or shell function
instead of invoking the compiler driver directly?


Segher

Segher


Re: [MAINTAINERS/KERNEL SUMMIT] Trust and maintenance of file systems

2023-09-07 Thread Segher Boessenkool
On Thu, Sep 07, 2023 at 07:22:45AM -0400, Steven Rostedt wrote:
> On Thu, 7 Sep 2023 06:04:09 -0500
> Segher Boessenkool  wrote:
> > On Thu, Sep 07, 2023 at 12:48:25PM +0300, Dan Carpenter via Gcc-patches 
> > wrote:
> > No.  You should patch your program, instead.  One easy way is to add a
> > -Wno-error at the end of your command lines.  Or even just -w if you
> > want or need a bigger hammer.
> 
> That's not really possible when bisecting a kernel bug into older kernels.
> The build system is highly complex and requires hundreds of changes to do
> what you suggested. As it is for a bisection that takes a minimum of 13
> iterations, your approach just isn't feasible.

Isn't this exactly what KCFLAGS is for?

But, I meant to edit the build system.  It isn't so hard to bisect with
patch stacks on top.  Just a bit annoying.


Segher


Re: [PATCH 01/13] [APX EGPR] middle-end: Add insn argument to base_reg_class

2023-09-07 Thread Vladimir Makarov via Gcc-patches



On 9/7/23 02:23, Uros Bizjak wrote:

On Wed, Sep 6, 2023 at 9:43 PM Vladimir Makarov  wrote:


On 9/1/23 05:07, Hongyu Wang wrote:



I think the approach proposed by Intel developers is better.  In some way
we already use such approach when we pass memory mode to get the base
reg class.  Although we could use different memory constraints for
different modes when the possible base reg differs for some memory
modes.

Using special memory constraints probably can be implemented too (I
understand attractiveness of such approach for readability of the
machine description).  But in my opinion it will require much bigger
work in IRA/LRA/reload.  It also significantly slow down RA as we need
to process insn constraints for processing each memory in many places
(e.g. for calculation of reg classes and costs in IRA).  Still I think
there will be a few cases for this approach resulting in a bigger
probability of assigning hard reg out of specific base reg class and
this will result in additional reloads.

So the approach proposed by Intel is ok for me.  Although if x86 maintainers
are strongly against this approach and the changes in x86 machine
dependent code and Intel developers implement Uros approach, I am
ready to review this.  But still I prefer the current Intel developers
approach for reasons I mentioned above.

My above proposal is more or less a wish from a target maintainer PoV.
Ideally, we would have a bunch of different memory constraints, and a
target hook that returns corresponding BASE/INDEX reg classes.
However, I have no idea about the complexity of the implementation in
the infrastructure part of the compiler.

Basically, it needs introducing new hooks which return base and index 
classes from special memory constraints. When we process memory in an 
insn (a lot of places in IRA, LRA,reload) we should consider all 
possible memory insn constraints, take intersection of basic and index 
reg classes for the constraints and use them instead of the default base 
and reg classes.


The required functionality is absent in reload too.

I would say that it is a moderate size project (1-2 months for me).  It 
still requires to introduce new hooks and I guess there are few cases 
when we will still assign hard regs out of desirable base class for 
address pseudos and this will results in generation of additional reload 
insns.  It also means much more additional changes in RA source code and 
x86 machine dependent files.


Probably, with this approach there will be also edge cases when we need 
to solve new PRs because of LRA failures to generate the correct code 
but I believe they can be solved.


Therefore I lean toward the current Intel approach when to get base reg 
class we pass the insn as a parameter additionally to memory mode.





Re: [PATCH] RISC-V: Add VLS mask modes mov patterns[PR111311]

2023-09-07 Thread Lehua Ding

Committed, thanks Robin.

On 2023/9/7 20:00, Robin Dapp via Gcc-patches wrote:

I have an almost identical patch locally that passed testing as well
but didn't get around to posting it yet.  Therefore LGTM.

Regards
  Robin


--
Best,
Lehua



Re: [PATCH] RISC-V: Add VLS mask modes mov patterns[PR111311]

2023-09-07 Thread Robin Dapp via Gcc-patches
I have an almost identical patch locally that passed testing as well
but didn't get around to posting it yet.  Therefore LGTM.

Regards
 Robin


[PATCH] RISC-V: Add VLS mask modes mov patterns[PR111311]

2023-09-07 Thread Juzhe-Zhong
This patterns fix these following ICE FAILs when running the whole GCC testsuite
with enabling scalable vector by default.

All of these FAILs are fixed:
FAIL: c-c++-common/opaque-vector.c  -std=c++14 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/opaque-vector.c  -std=c++14 (test for excess errors)
FAIL: c-c++-common/opaque-vector.c  -std=c++17 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/opaque-vector.c  -std=c++17 (test for excess errors)
FAIL: c-c++-common/opaque-vector.c  -std=c++20 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/opaque-vector.c  -std=c++20 (test for excess errors)
FAIL: c-c++-common/opaque-vector.c  -std=c++98 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/opaque-vector.c  -std=c++98 (test for excess errors)
FAIL: c-c++-common/pr105998.c  -std=c++14 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/pr105998.c  -std=c++14 (test for excess errors)
FAIL: c-c++-common/pr105998.c  -std=c++17 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/pr105998.c  -std=c++17 (test for excess errors)
FAIL: c-c++-common/pr105998.c  -std=c++20 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/pr105998.c  -std=c++20 (test for excess errors)
FAIL: c-c++-common/pr105998.c  -std=c++98 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/pr105998.c  -std=c++98 (test for excess errors)
FAIL: c-c++-common/vector-scalar.c  -std=c++14 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/vector-scalar.c  -std=c++14 (test for excess errors)
FAIL: c-c++-common/vector-scalar.c  -std=c++17 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/vector-scalar.c  -std=c++17 (test for excess errors)
FAIL: c-c++-common/vector-scalar.c  -std=c++20 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/vector-scalar.c  -std=c++20 (test for excess errors)
FAIL: c-c++-common/vector-scalar.c  -std=c++98 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/vector-scalar.c  -std=c++98 (test for excess errors)
FAIL: g++.dg/ext/vector36.C  -std=gnu++14 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/ext/vector36.C  -std=gnu++14 (test for excess errors)
FAIL: g++.dg/ext/vector36.C  -std=gnu++17 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/ext/vector36.C  -std=gnu++17 (test for excess errors)
FAIL: g++.dg/ext/vector36.C  -std=gnu++20 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/ext/vector36.C  -std=gnu++20 (test for excess errors)
FAIL: g++.dg/ext/vector36.C  -std=gnu++98 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/ext/vector36.C  -std=gnu++98 (test for excess errors)
FAIL: g++.dg/pr58950.C  -std=gnu++14 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/pr58950.C  -std=gnu++14 (test for excess errors)
FAIL: g++.dg/pr58950.C  -std=gnu++17 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/pr58950.C  -std=gnu++17 (test for excess errors)
FAIL: g++.dg/pr58950.C  -std=gnu++20 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/pr58950.C  -std=gnu++20 (test for excess errors)
FAIL: g++.dg/pr58950.C  -std=gnu++98 (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/pr58950.C  -std=gnu++98 (test for excess errors)
FAIL: c-c++-common/torture/builtin-shufflevector-2.c   -O0  (internal compiler 
error: in emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/torture/vector-compare-2.c   -O0  (internal compiler error: 
in emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/torture/vector-compare-2.c   -O0  (test for excess errors)
FAIL: g++.dg/torture/pr104450.C   -O0  (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: g++.dg/torture/pr104450.C   -O0  (test for excess errors)

FAIL: gcc.dg/analyzer/pr96713.c (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: gcc.dg/analyzer/pr96713.c (test for excess errors)
FAIL: c-c++-common/opaque-vector.c  -Wc++-compat  (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/opaque-vector.c  -Wc++-compat  (test for excess errors)
FAIL: c-c++-common/pr105998.c  -Wc++-compat  (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/pr105998.c  -Wc++-compat  (test for excess errors)
FAIL: c-c++-common/vector-scalar.c  -Wc++-compat  (internal compiler error: in 
emit_move_multi_word, at expr.cc:4079)
FAIL: c-c++-common/vector-scalar.c  -Wc++-compat  (test for excess errors)
FAIL: 

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

2023-09-07 Thread Yang Yujie
On Thu, Sep 07, 2023 at 05:47:36PM +0800, Xi Ruoyao wrote:
> On Thu, 2023-09-07 at 17:31 +0800, Yang Yujie wrote:
> > > This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx
> > > silently ignored so we cannot test a LSX/LASX or vectorizer change with
> > > them.
> > > 
> > > Why do we need to purge all user-specified -m options here?
> > 
> > Yes, that is an issue that I haven't considered.
> > 
> > The purge rules (self_specs) exist to clean up the driver-generated
> > canonical option tuple.  These options are generated before to the
> > injection of library-building options from --with-multilib-{list,default}.
> > They are dependent on the default GCC settings and may not be safely
> > overriden by any injected individual options, so we choose to start
> > over with a purge.
> > 
> > Working on a patch now, Thanks!
> 
> I've made some local experiment too, I think we can add a "-mbuild-
> multilib" option which does nothing but in the hacked spec we can wrap
> the line in %{mbuild-multilib:...}:
> 
> %{mbuild-multilib:% %{mabi=lp64d:-march=la464 -mno-strict-align -msimd=lsx}   
> %{mabi=lp64s:-march=abi-default -mfpu=32}}
> 
> Then we can use -mbuild-multilib -mabi=lp64d for non-default multilibs
> (or all multilibs unless --disable-multilib?).  In the document we can
> just document mbuild-multilib as "internal use only".
> 
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University


My idea is to move these options out of self_spec by defining a new spec
rule $(early_self_spec), so that they get processed by the driver before
the canonicalization.

This also solves the problem that one cannot use -m[no-]lsx/-m[no-]lasx
in --with-multilib-list (because they are driver-only options that are
only recognized during the canonicalization).



Re: [MAINTAINERS/KERNEL SUMMIT] Trust and maintenance of file systems

2023-09-07 Thread Dan Carpenter via Gcc-patches
On Thu, Sep 07, 2023 at 06:04:09AM -0500, Segher Boessenkool wrote:
> On Thu, Sep 07, 2023 at 12:48:25PM +0300, Dan Carpenter via Gcc-patches wrote:
> > I started to hunt
> > down all the Makefile which add a -Werror but there are a lot and
> > eventually I got bored and gave up.
> 
> I have a patch stack for that, since 2014 or so.  I build Linux with
> unreleased GCC versions all the time, so pretty much any new warning is
> fatal if you unwisely use -Werror.
> 
> > Someone should patch GCC so there it checks an environment variable to
> > ignore -Werror.  Somethine like this?
> 
> No.  You should patch your program, instead.

There are 2930 Makefiles in the kernel source.

> One easy way is to add a
> -Wno-error at the end of your command lines.  Or even just -w if you
> want or need a bigger hammer.

I tried that.  Some of the Makefiles check an environemnt variable as
well if you want to turn off -Werror.  It's not a complete solution at
all.  I have no idea what a complete solution looks like because I gave
up.

> 
> Or nicer, put it all in Kconfig, like powerpc already has for example.
> There is a CONFIG_WERROR as well, so maybe use that in all places?

That's a good idea but I'm trying to compile old kernels and not the
current kernel.

regards,
dan carpenter



Re: [MAINTAINERS/KERNEL SUMMIT] Trust and maintenance of file systems

2023-09-07 Thread Steven Rostedt
On Thu, 7 Sep 2023 06:04:09 -0500
Segher Boessenkool  wrote:

> On Thu, Sep 07, 2023 at 12:48:25PM +0300, Dan Carpenter via Gcc-patches wrote:
> > I started to hunt
> > down all the Makefile which add a -Werror but there are a lot and
> > eventually I got bored and gave up.  
> 
> I have a patch stack for that, since 2014 or so.  I build Linux with
> unreleased GCC versions all the time, so pretty much any new warning is
> fatal if you unwisely use -Werror.
> 
> > Someone should patch GCC so there it checks an environment variable to
> > ignore -Werror.  Somethine like this?  
> 
> No.  You should patch your program, instead.  One easy way is to add a
> -Wno-error at the end of your command lines.  Or even just -w if you
> want or need a bigger hammer.

That's not really possible when bisecting a kernel bug into older kernels.
The build system is highly complex and requires hundreds of changes to do
what you suggested. As it is for a bisection that takes a minimum of 13
iterations, your approach just isn't feasible.

-- Steve


Re: [MAINTAINERS/KERNEL SUMMIT] Trust and maintenance of file systems

2023-09-07 Thread Segher Boessenkool
On Thu, Sep 07, 2023 at 12:48:25PM +0300, Dan Carpenter via Gcc-patches wrote:
> I started to hunt
> down all the Makefile which add a -Werror but there are a lot and
> eventually I got bored and gave up.

I have a patch stack for that, since 2014 or so.  I build Linux with
unreleased GCC versions all the time, so pretty much any new warning is
fatal if you unwisely use -Werror.

> Someone should patch GCC so there it checks an environment variable to
> ignore -Werror.  Somethine like this?

No.  You should patch your program, instead.  One easy way is to add a
-Wno-error at the end of your command lines.  Or even just -w if you
want or need a bigger hammer.

Or nicer, put it all in Kconfig, like powerpc already has for example.
There is a CONFIG_WERROR as well, so maybe use that in all places?

> +static bool
> +ignore_w_error(void)
> +{
> +  char *str;
> +
> +  str = getenv("IGNORE_WERROR");
> +  if (str && strcmp(str, "1") == 0)

space before (

>  case OPT_Werror:
> +  if (ignore_w_error())
> + break;
>dc->warning_as_error_requested = value;
>break;
>  
>  case OPT_Werror_:
> -  if (lang_mask == CL_DRIVER)
> + if (ignore_w_error())
> + break;
> + if (lang_mask == CL_DRIVER)
>   break;

The new indentation is messed up.  And please don't move the existing
early-out to later, it make more sense earlier, the way it was.


Segher


Re: [PATCH 2/2] ARC: Use intrinsics for __builtin_sub_overflow*()

2023-09-07 Thread Claudiu Zissulescu Ianculescu via Gcc-patches
OK,

Thank you for your contribution,
Claudiu

On Wed, Sep 6, 2023 at 3:50 PM Shahab Vahedi  wrote:
>
> This patch covers signed and unsigned subtractions.  The generated code
> would be something along these lines:
>
> signed:
>   sub.f   r0, r1, r2
>   b.v @label
>
> unsigned:
>   sub.f   r0, r1, r2
>   b.c @label
>
> gcc/ChangeLog:
>
> * config/arc/arc.md (subsi3_v): New insn.
> (subvsi4): New expand.
> (subsi3_c): New insn.
> (usubvsi4): New expand.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arc/overflow-2.c: New.
>
> Signed-off-by: Shahab Vahedi 
> ---
>  gcc/config/arc/arc.md | 48 +++
>  gcc/testsuite/gcc.target/arc/overflow-2.c | 97 +++
>  2 files changed, 145 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/arc/overflow-2.c
>
> diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
> index 9d011f6b4a9..34e9e1a7f1d 100644
> --- a/gcc/config/arc/arc.md
> +++ b/gcc/config/arc/arc.md
> @@ -2973,6 +2973,54 @@ archs4x, archs4xd"
>(set_attr "cpu_facility" "*,cd,*,*,*,*,*,*,*,*")
>])
>
> +(define_insn "subsi3_v"
> +  [(set (match_operand:SI  0 "register_operand"  "=r,r,r,  r")
> +   (minus:SI (match_operand:SI 1 "register_operand"   "r,r,0,  r")
> + (match_operand:SI 2 "nonmemory_operand"  "r,L,I,C32")))
> +   (set (reg:CC_V CC_REG)
> +   (compare:CC_V (sign_extend:DI (minus:SI (match_dup 1)
> +   (match_dup 2)))
> + (minus:DI (sign_extend:DI (match_dup 1))
> +   (sign_extend:DI (match_dup 2)]
> +   ""
> +   "sub.f\\t%0,%1,%2"
> +   [(set_attr "cond"   "set")
> +(set_attr "type"   "compare")
> +(set_attr "length" "4,4,4,8")])
> +
> +(define_expand "subvsi4"
> + [(match_operand:SI 0 "register_operand")
> +  (match_operand:SI 1 "register_operand")
> +  (match_operand:SI 2 "nonmemory_operand")
> +  (label_ref (match_operand 3 "" ""))]
> +  ""
> +  "emit_insn (gen_subsi3_v (operands[0], operands[1], operands[2]));
> +   arc_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
> +   DONE;")
> +
> +(define_insn "subsi3_c"
> +  [(set (match_operand:SI  0 "register_operand"  "=r,r,r,  r")
> +   (minus:SI (match_operand:SI 1 "register_operand"   "r,r,0,  r")
> + (match_operand:SI 2 "nonmemory_operand"  "r,L,I,C32")))
> +   (set (reg:CC_C CC_REG)
> +   (compare:CC_C (match_dup 1)
> + (match_dup 2)))]
> +   ""
> +   "sub.f\\t%0,%1,%2"
> +   [(set_attr "cond"   "set")
> +(set_attr "type"   "compare")
> +(set_attr "length" "4,4,4,8")])
> +
> +(define_expand "usubvsi4"
> +  [(match_operand:SI 0 "register_operand")
> +   (match_operand:SI 1 "register_operand")
> +   (match_operand:SI 2 "nonmemory_operand")
> +   (label_ref (match_operand 3 "" ""))]
> +   ""
> +   "emit_insn (gen_subsi3_c (operands[0], operands[1], operands[2]));
> +arc_gen_unlikely_cbranch (LTU, CC_Cmode, operands[3]);
> +DONE;")
> +
>  (define_expand "subdi3"
>[(set (match_operand:DI 0 "register_operand" "")
> (minus:DI (match_operand:DI 1 "register_operand" "")
> diff --git a/gcc/testsuite/gcc.target/arc/overflow-2.c 
> b/gcc/testsuite/gcc.target/arc/overflow-2.c
> new file mode 100644
> index 000..b4de8c03b22
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/overflow-2.c
> @@ -0,0 +1,97 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O1" } */
> +
> +#include 
> +#include 
> +
> +/*
> + * sub.f  r0,r0,r1
> + * st_s   r0,[r2]
> + * mov_s  r0,1
> + * j_s.d  [blink]
> + * mov.nv r0,0
> + */
> +bool sub_overflow (int32_t a, int32_t b, int32_t *res)
> +{
> +  return __builtin_sub_overflow (a, b, res);
> +}
> +
> +/*
> + * sub.f  r0,r0,-1234
> + * st_s   r0,[r1]
> + * mov_s  r0,1
> + * j_s.d  [blink]
> + * mov.nv r0,0
> + */
> +bool subi_overflow (int32_t a, int32_t *res)
> +{
> +  return __builtin_sub_overflow (a, -1234, res);
> +}
> +
> +/*
> + * sub.f  r3,r0,r1
> + * st_s   r3,[r2]
> + * j_s.d  [blink]
> + * setlo  r0,r0,r1
> + */
> +bool usub_overflow (uint32_t a, uint32_t b, uint32_t *res)
> +{
> +  return __builtin_sub_overflow (a, b, res);
> +}
> +
> +/*
> + * sub.f  r2,r0,4321
> + * seths  r0,4320,r0
> + * j_s.d  [blink]
> + * st_s   r2,[r1]
> + */
> +bool usubi_overflow (uint32_t a, uint32_t *res)
> +{
> +  return __builtin_sub_overflow (a, 4321, res);
> +}
> +
> +/*
> + * sub.f  r0,r0,r1
> + * mov_s  r0,1
> + * j_s.d  [blink]
> + * mov.nv r0,0
> + */
> +bool sub_overflow_p (int32_t a, int32_t b, int32_t res)
> +{
> +  return __builtin_sub_overflow_p (a, b, res);
> +}
> +
> +/*
> + * sub.f  r0,r0,-1000
> + * mov_s  r0,1
> + * j_s.d  [blink]
> + * mov.nv r0,0
> + */
> +bool subi_overflow_p (int32_t a, int32_t res)
> +{
> +  return __builtin_sub_overflow_p (a, -1000, res);
> +}
> +
> +/*
> + * j_s.d  [blink]
> + * setlo  r0,r0,r1
> + */
> +bool usub_overflow_p (uint32_t a, uint32_t b, uint32_t res)
> +{
> + 

Re: [PATCH 1/2] ARC: Use intrinsics for __builtin_add_overflow*()

2023-09-07 Thread Claudiu Zissulescu Ianculescu via Gcc-patches
Ok.

Thank you for your contribution,
Claudiu

On Wed, Sep 6, 2023 at 3:50 PM Shahab Vahedi  wrote:
>
> This patch covers signed and unsigned additions.  The generated code
> would be something along these lines:
>
> signed:
>   add.f   r0, r1, r2
>   b.v @label
>
> unsigned:
>   add.f   r0, r1, r2
>   b.c @label
>
> gcc/ChangeLog:
>
> * config/arc/arc-modes.def: Add CC_V mode.
> * config/arc/predicates.md (proper_comparison_operator): Handle
> E_CC_Vmode.
> (equality_comparison_operator): Exclude CC_Vmode from eq/ne.
> (cc_set_register): Handle CC_Vmode.
> (cc_use_register): Likewise.
> * config/arc/arc.md (addsi3_v): New insn.
> (addvsi4): New expand.
> (addsi3_c): New insn.
> (uaddvsi4): New expand.
> * config/arc/arc-protos.h (arc_gen_unlikely_cbranch): New.
> * config/arc/arc.cc (arc_gen_unlikely_cbranch): New.
> (get_arc_condition_code): Handle E_CC_Vmode.
> (arc_init_reg_tables): Handle CC_Vmode.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arc/overflow-1.c: New.
>
> Signed-off-by: Shahab Vahedi 
> ---
>  gcc/config/arc/arc-modes.def  |   1 +
>  gcc/config/arc/arc-protos.h   |   1 +
>  gcc/config/arc/arc.cc |  26 +-
>  gcc/config/arc/arc.md |  49 +++
>  gcc/config/arc/predicates.md  |  14 ++-
>  gcc/testsuite/gcc.target/arc/overflow-1.c | 100 ++
>  6 files changed, 187 insertions(+), 4 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/arc/overflow-1.c
>
> diff --git a/gcc/config/arc/arc-modes.def b/gcc/config/arc/arc-modes.def
> index 763e880317d..69eeec5935a 100644
> --- a/gcc/config/arc/arc-modes.def
> +++ b/gcc/config/arc/arc-modes.def
> @@ -24,6 +24,7 @@ along with GCC; see the file COPYING3.  If not see
>
>  CC_MODE (CC_ZN);
>  CC_MODE (CC_Z);
> +CC_MODE (CC_V);
>  CC_MODE (CC_C);
>  CC_MODE (CC_FP_GT);
>  CC_MODE (CC_FP_GE);
> diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
> index 4f2db7ffb59..bc78fb0b370 100644
> --- a/gcc/config/arc/arc-protos.h
> +++ b/gcc/config/arc/arc-protos.h
> @@ -50,6 +50,7 @@ extern bool arc_check_mov_const (HOST_WIDE_INT );
>  extern bool arc_split_mov_const (rtx *);
>  extern bool arc_can_use_return_insn (void);
>  extern bool arc_split_move_p (rtx *);
> +extern void arc_gen_unlikely_cbranch (enum rtx_code, machine_mode, rtx);
>  #endif /* RTX_CODE */
>
>  extern bool arc_ccfsm_branch_deleted_p (void);
> diff --git a/gcc/config/arc/arc.cc b/gcc/config/arc/arc.cc
> index f8c9bf17e2c..ec93d40aeb9 100644
> --- a/gcc/config/arc/arc.cc
> +++ b/gcc/config/arc/arc.cc
> @@ -1538,6 +1538,13 @@ get_arc_condition_code (rtx comparison)
> case GEU : return ARC_CC_NC;
> default : gcc_unreachable ();
> }
> +case E_CC_Vmode:
> +  switch (GET_CODE (comparison))
> +   {
> +   case EQ : return ARC_CC_NV;
> +   case NE : return ARC_CC_V;
> +   default : gcc_unreachable ();
> +   }
>  case E_CC_FP_GTmode:
>if (TARGET_ARGONAUT_SET && TARGET_SPFP)
> switch (GET_CODE (comparison))
> @@ -1868,7 +1875,7 @@ arc_init_reg_tables (void)
>   /* mode_class hasn't been initialized yet for EXTRA_CC_MODES, so
>  we must explicitly check for them here.  */
>   if (i == (int) CCmode || i == (int) CC_ZNmode || i == (int) CC_Zmode
> - || i == (int) CC_Cmode
> + || i == (int) CC_Cmode || i == (int) CC_Vmode
>   || i == CC_FP_GTmode || i == CC_FP_GEmode || i == CC_FP_ORDmode
>   || i == CC_FPUmode || i == CC_FPUEmode || i == CC_FPU_UNEQmode)
> arc_mode_class[i] = 1 << (int) C_MODE;
> @@ -11852,6 +11859,23 @@ arc_libm_function_max_error (unsigned cfn, 
> machine_mode mode,
>return default_libm_function_max_error (cfn, mode, boundary_p);
>  }
>
> +/* Generate RTL for conditional branch with rtx comparison CODE in mode
> +   CC_MODE.  */
> +
> +void
> +arc_gen_unlikely_cbranch (enum rtx_code cmp, machine_mode cc_mode, rtx label)
> +{
> +  rtx cc_reg, x;
> +
> +  cc_reg = gen_rtx_REG (cc_mode, CC_REG);
> +  label = gen_rtx_LABEL_REF (VOIDmode, label);
> +
> +  x = gen_rtx_fmt_ee (cmp, VOIDmode, cc_reg, const0_rtx);
> +  x = gen_rtx_IF_THEN_ELSE (VOIDmode, x, label, pc_rtx);
> +
> +  emit_unlikely_jump (gen_rtx_SET (pc_rtx, x));
> +}
> +
>  #undef TARGET_USE_ANCHORS_FOR_SYMBOL_P
>  #define TARGET_USE_ANCHORS_FOR_SYMBOL_P arc_use_anchors_for_symbol_p
>
> diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
> index d37ecbf4292..9d011f6b4a9 100644
> --- a/gcc/config/arc/arc.md
> +++ b/gcc/config/arc/arc.md
> @@ -2725,6 +2725,55 @@ archs4x, archs4xd"
>   }
>")
>
> +(define_insn "addsi3_v"
> + [(set (match_operand:SI 0 "register_operand"  "=r,r,r,  r")
> +   (plus:SI (match_operand:SI 1 "register_operand"   "r,r,0,  r")
> +   (match_operand:SI 2 

Re: [PATCH V5 1/4] rs6000: build constant via li;rotldi

2023-09-07 Thread Jiufu Guo via Gcc-patches


Hi,

Gentle ping...

BR,
Jeff (Jiufu Guo)

Jiufu Guo  writes:

> Hi,
>
> If a constant is possible to be rotated to/from a positive or negative
> value which "li" can generated, then "li;rotldi" can be used to build
> the constant.
>
> Compare with the previous version:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-July/623528.html
> This patch just did minor changes to the comments according to previous
> review.
>
> Bootstrap and regtest pass on ppc64{,le}.
>
> Is this ok for trunk?
>
>
> BR,
> Jeff (Jiufu)
>
> gcc/ChangeLog:
>
>   * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
>   (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
>
> gcc/testsuite/ChangeLog:
>
>   * gcc.target/powerpc/const-build.c: New test.
> ---
>  gcc/config/rs6000/rs6000.cc   | 47 +--
>  .../gcc.target/powerpc/const-build.c  | 57 +++
>  2 files changed, 98 insertions(+), 6 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/powerpc/const-build.c
>
> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
> index 42f49e4a56b..acc332acc05 100644
> --- a/gcc/config/rs6000/rs6000.cc
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -10258,6 +10258,31 @@ rs6000_emit_set_const (rtx dest, rtx source)
>return true;
>  }
>  
> +/* Check if value C can be built by 2 instructions: one is 'li', another is
> +   'rotldi'.
> +
> +   If so, *SHIFT is set to the shift operand of rotldi(rldicl), and *MASK
> +   is set to the mask operand of rotldi(rldicl), and return true.
> +   Return false otherwise.  */
> +
> +static bool
> +can_be_built_by_li_and_rotldi (HOST_WIDE_INT c, int *shift,
> +HOST_WIDE_INT *mask)
> +{
> +  /* If C or ~C contains at least 49 successive zeros, then C can be rotated
> + to/from a positive or negative value that 'li' is able to load.  */
> +  int n;
> +  if (can_be_rotated_to_lowbits (c, 15, )
> +  || can_be_rotated_to_lowbits (~c, 15, ))
> +{
> +  *mask = HOST_WIDE_INT_M1;
> +  *shift = HOST_BITS_PER_WIDE_INT - n;
> +  return true;
> +}
> +
> +  return false;
> +}
> +
>  /* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode.
> Output insns to set DEST equal to the constant C as a series of
> lis, ori and shl instructions.  */
> @@ -10266,15 +10291,14 @@ static void
>  rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c)
>  {
>rtx temp;
> +  int shift;
> +  HOST_WIDE_INT mask;
>HOST_WIDE_INT ud1, ud2, ud3, ud4;
>  
>ud1 = c & 0x;
> -  c = c >> 16;
> -  ud2 = c & 0x;
> -  c = c >> 16;
> -  ud3 = c & 0x;
> -  c = c >> 16;
> -  ud4 = c & 0x;
> +  ud2 = (c >> 16) & 0x;
> +  ud3 = (c >> 32) & 0x;
> +  ud4 = (c >> 48) & 0x;
>  
>if ((ud4 == 0x && ud3 == 0x && ud2 == 0x && (ud1 & 0x8000))
>|| (ud4 == 0 && ud3 == 0 && ud2 == 0 && ! (ud1 & 0x8000)))
> @@ -10305,6 +10329,17 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT 
> c)
>emit_move_insn (dest, gen_rtx_XOR (DImode, temp,
>GEN_INT ((ud2 ^ 0x) << 16)));
>  }
> +  else if (can_be_built_by_li_and_rotldi (c, , ))
> +{
> +  temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
> +  unsigned HOST_WIDE_INT imm = (c | ~mask);
> +  imm = (imm >> shift) | (imm << (HOST_BITS_PER_WIDE_INT - shift));
> +
> +  emit_move_insn (temp, GEN_INT (imm));
> +  if (shift != 0)
> + temp = gen_rtx_ROTATE (DImode, temp, GEN_INT (shift));
> +  emit_move_insn (dest, temp);
> +}
>else if (ud3 == 0 && ud4 == 0)
>  {
>temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
> diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c 
> b/gcc/testsuite/gcc.target/powerpc/const-build.c
> new file mode 100644
> index 000..69b37e2bb53
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c
> @@ -0,1 +1,57 @@
> +/* { dg-do run } */
> +/* { dg-options "-O2 -save-temps" } */
> +/* { dg-require-effective-target has_arch_ppc64 } */
> +
> +/* Verify that two instructions are successfully used to build constants.
> +   One insn is li, another is rotate: rldicl.  */
> +
> +#define NOIPA __attribute__ ((noipa))
> +
> +struct fun
> +{
> +  long long (*f) (void);
> +  long long val;
> +};
> +
> +long long NOIPA
> +li_rotldi_1 (void)
> +{
> +  return 0x75310LL;
> +}
> +
> +long long NOIPA
> +li_rotldi_2 (void)
> +{
> +  return 0x2164LL;
> +}
> +
> +long long NOIPA
> +li_rotldi_3 (void)
> +{
> +  return 0x8531LL;
> +}
> +
> +long long NOIPA
> +li_rotldi_4 (void)
> +{
> +  return 0x2194LL;
> +}
> +
> +struct fun arr[] = {
> +  {li_rotldi_1, 0x75310LL},
> +  {li_rotldi_2, 0x2164LL},
> +  {li_rotldi_3, 0x8531LL},
> +  {li_rotldi_4, 0x2194LL},
> +};
> +
> +/* { dg-final { scan-assembler-times {\mrotldi\M} 4 } } */
> +
> 

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

2023-09-07 Thread Xi Ruoyao via Gcc-patches
On Thu, 2023-09-07 at 17:47 +0800, Xi Ruoyao wrote:

/* snip */

> I've made some local experiment too, I think we can add a "-mbuild-
> multilib" option which does nothing but in the hacked spec we can wrap
> the line in %{mbuild-multilib:...}:
> 
> %{mbuild-multilib:% %{mabi=lp64d:-march=la464 -mno-strict-align -msimd=lsx}  
> %{mabi=lp64s:-march=abi-default -mfpu=32}}
> 
> Then we can use -mbuild-multilib -mabi=lp64d for non-default multilibs
    typo, should be removed

> (or all multilibs unless --disable-multilib?).  In the document we can
> just document mbuild-multilib as "internal use only".

-- 
Xi Ruoyao 
School of Aerospace Science and Technology, Xidian University


Re: [MAINTAINERS/KERNEL SUMMIT] Trust and maintenance of file systems

2023-09-07 Thread Dan Carpenter via Gcc-patches
On Wed, Sep 06, 2023 at 09:53:27PM -0400, Steven Rostedt wrote:
> On Thu, 7 Sep 2023 08:54:38 +1000
> Dave Chinner  wrote:
> 
> > And let's not forget: removing a filesystem from the kernel is not
> > removing end user support for extracting data from old filesystems.
> > We have VMs for that - we can run pretty much any kernel ever built
> > inside a VM, so users that need to extract data from a really old
> > filesystem we no longer support in a modern kernel can simply boot
> > up an old distro that did support it and extract the data that way.
> 
> Of course there's the case of trying to recreate a OS that can run on a
> very old kernel. Just building an old kernel is difficult today because
> today's compilers will refuse to build them (I've hit issues in bisections
> because of that!)

Yeah.  I can't run Smatch on obsolete kernels because I can't build the
tools/ directory etc.  For example, it would be interesting to look at
really ancient kernels to see how buggy they are.  I started to hunt
down all the Makefile which add a -Werror but there are a lot and
eventually I got bored and gave up.

Someone should patch GCC so there it checks an environment variable to
ignore -Werror.  Somethine like this?

diff --git a/gcc/opts.cc b/gcc/opts.cc
index ac81d4e42944..2de69300d4fe 100644
--- a/gcc/opts.cc
+++ b/gcc/opts.cc
@@ -2598,6 +2598,17 @@ print_help (struct gcc_options *opts, unsigned int 
lang_mask,
 lang_mask);
 }
 
+static bool
+ignore_w_error(void)
+{
+  char *str;
+
+  str = getenv("IGNORE_WERROR");
+  if (str && strcmp(str, "1") == 0)
+return true;
+  return false;
+}
+
 /* Handle target- and language-independent options.  Return zero to
generate an "unknown option" message.  Only options that need
extra handling need to be listed here; if you simply want
@@ -2773,11 +2784,15 @@ common_handle_option (struct gcc_options *opts,
   break;
 
 case OPT_Werror:
+  if (ignore_w_error())
+   break;
   dc->warning_as_error_requested = value;
   break;
 
 case OPT_Werror_:
-  if (lang_mask == CL_DRIVER)
+ if (ignore_w_error())
+   break;
+ if (lang_mask == CL_DRIVER)
break;
 
   enable_warning_as_error (arg, value, lang_mask, handlers,


Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

2023-09-07 Thread Xi Ruoyao via Gcc-patches
On Thu, 2023-09-07 at 17:31 +0800, Yang Yujie wrote:
> > This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx
> > silently ignored so we cannot test a LSX/LASX or vectorizer change with
> > them.
> > 
> > Why do we need to purge all user-specified -m options here?
> 
> Yes, that is an issue that I haven't considered.
> 
> The purge rules (self_specs) exist to clean up the driver-generated
> canonical option tuple.  These options are generated before to the
> injection of library-building options from --with-multilib-{list,default}.
> They are dependent on the default GCC settings and may not be safely
> overriden by any injected individual options, so we choose to start
> over with a purge.
> 
> Working on a patch now, Thanks!

I've made some local experiment too, I think we can add a "-mbuild-
multilib" option which does nothing but in the hacked spec we can wrap
the line in %{mbuild-multilib:...}:

%{mbuild-multilib:%
School of Aerospace Science and Technology, Xidian University


Re: [Patch] contrib/gcc-changelog: Check whether revert-commit exists

2023-09-07 Thread Jakub Jelinek via Gcc-patches
On Thu, Sep 07, 2023 at 10:20:19AM +0200, Christophe Lyon via Gcc-patches wrote:
> On Tue, 5 Sept 2023 at 16:38, Tobias Burnus  wrote:
> 
> > That's based on the fail
> > https://gcc.gnu.org/pipermail/gccadmin/2023q3/020349.html
> > and on the discussion on IRC.
> >
> 
> Sorry I didn't notice the problem, nor the discussion on IRC, but I can see
> that my commits created the problem, sorry for that.
> 
> I'm not sure how your patch would have prevented me from doing this?
> What happened is that I had 3 patches on top of master
> - HEAD: the one I wanted to push
> - HEAD-1: revert of HEAD-2

git reset HEAD^
instead of committing a revert would be better I think.

> - HEAD-2:  libstdc-Use-GLIBCXX_CHECK_LINKER_FEATURES-for.patch
> 
> I had actually forgotten about HEAD-1 and HEAD-2, HEAD was unrelated to
> those, so when I pushed, I pushed 3 commits while I thought there was only
> one.
> I did run contrib/gcc-changelog/git_check_commit.py (I realize I'm not sure
> whether I used git_check_commit.py or git_commit.py), but only on HEAD
> since I had forgotten about the other two.

Could you please remove your
2023-09-04  Christophe Lyon  

PR libstdc++/111238
* configure: Regenerate.
* configure.ac: Call GLIBCXX_CHECK_LINKER_FEATURES in cross,
non-Canadian builds.
libstdc++-v3/ChangeLog entry if that commit is indeed not in (or add
a Revert: entry for it right after it if you think it needs to be in)?
That is a part I haven't done, my/Arsen's hacks to make the version update
get through basically ignored that revert commit.

ChangeLog files can be changed by commits which only touch ChangeLog files
and nothing else (ok, date stamp too, but please don't update that), no
ChangeLog in the message needs to be provided for such changes.

Jakub



Re: [PATCHSET] Add error metadata to diagnostics

2023-09-07 Thread Arthur Cohen

Pushed to trunk this morning with Changelogs and SoB lines.

Thanks for the review David!

All the best,

Arthur

On 9/6/23 15:53, Arthur Cohen wrote:

This short patchset from David Malcolm enables errors to contain extra
metadata - this is particularly useful for the Rust frontend, which will
rely on that implementation to emit standard Rust error codes [1].

This series of patches is necessary for much of our more recent
additions to the frontend, including the work of one of this year's GSoC
student, Mahad Muhammad, who has spent a lot of time working on emitting
these error codes from the Rust frontend for GCC.

We will soon resume upstreaming patches from our development repository
to the main GCC repository, in the hopes of distributing the Rust frontend
as part of the GCC 14.1 release.

[PATCH 1/2] diagnostics: add error_meta
[PATCH 2/2] Experiment with adding an error code to an error

Are these OK for trunk?

Kindly,

Arthur





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Re: [Patch] contrib/gcc-changelog: Check whether revert-commit exists

2023-09-07 Thread Jakub Jelinek via Gcc-patches
On Thu, Sep 07, 2023 at 11:30:53AM +0200, Tobias Burnus wrote:
> contrib/gcc-changelog: Check whether revert-commit exists
> 
> contrib/ChangeLog:
> 
>   * gcc-changelog/git_commit.py (GitCommit.__init__):
>   Handle commit_to_info_hook = None; otherwise, if None,
>   regard it as error.
>   (to_changelog_entries): Handle commit_to_info_hook = None;
>   if info is None, create a warning for it.
>   * gcc-changelog/git_email.py (GitEmail.__init__):
>   call super() with commit_to_info_hook=None instead
>   of a lamda function.
> 
>  contrib/gcc-changelog/git_commit.py | 20 +++-
>  contrib/gcc-changelog/git_email.py  |  3 +--
>  2 files changed, 16 insertions(+), 7 deletions(-)
> 
> diff --git a/contrib/gcc-changelog/git_commit.py 
> b/contrib/gcc-changelog/git_commit.py
> index 4f3131021f2..4f1bd4d7293 100755
> --- a/contrib/gcc-changelog/git_commit.py
> +++ b/contrib/gcc-changelog/git_commit.py
> @@ -329,11 +329,15 @@ class GitCommit:
>  self.revert_commit = m.group('hash')
>  break
>  if self.revert_commit:
> +# The following happens for get_email.py:
> +if not self.commit_to_info_hook:
> +self.warnings.append(f"Invoked script can technically not 
> obtain info about "
> + f"reverted commits such as 
> '{self.revert_commit}'")

I think not should precede technically (or should we just drop technically)?

> +self.warnings.append(f"Invoked script can 
> technically not obtain info about "
> + f"cherry-picked commits such as 
> '{self.revert_commit}'")

Likewise.

>  timestamp = current_timestamp
>  elif not timestamp or use_commit_ts:
>  timestamp = current_timestamp
> diff --git a/contrib/gcc-changelog/git_email.py 
> b/contrib/gcc-changelog/git_email.py
> index 49f41f2ec99..93808dfabb6 100755
> --- a/contrib/gcc-changelog/git_email.py
> +++ b/contrib/gcc-changelog/git_email.py
> @@ -89,8 +89,7 @@ class GitEmail(GitCommit):
>  t = 'M'
>  modified_files.append((target if t != 'D' else source, t))
>  git_info = GitInfo(None, date, author, message, modified_files)
> -super().__init__(git_info,
> - commit_to_info_hook=lambda x: None)
> +super().__init__(git_info, commit_to_info_hook=None)
>  
>  
>  def show_help():

Otherwise LGTM, but it would be good after committing it try to commit
reversion commit of some non-existent hash (willing to handle ChangeLog
manually again if it makes it through).

Jakub



Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

2023-09-07 Thread Yang Yujie
> This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx
> silently ignored so we cannot test a LSX/LASX or vectorizer change with
> them.
>
> Why do we need to purge all user-specified -m options here?

Yes, that is an issue that I haven't considered.

The purge rules (self_specs) exist to clean up the driver-generated
canonical option tuple.  These options are generated before to the
injection of library-building options from --with-multilib-{list,default}.
They are dependent on the default GCC settings and may not be safely
overriden by any injected individual options, so we choose to start
over with a purge.

Working on a patch now, Thanks!

Yujie



Re: [Patch] contrib/gcc-changelog: Check whether revert-commit exists

2023-09-07 Thread Tobias Burnus

First: Hi all,

attached is an updated patch (v3) where I changed the wording
of the warning to distinguish technical reasons for not using
the commit data (→ git_email.py) from not-found lookups (git_check_commit.py)
to avoid confusion. (See also below.)

Any remarks/suggestions - related to this (e.g. wording improvements or ...)
or to the patch in general?

Hi Christoph,

On 07.09.23 10:20, Christophe Lyon wrote:


On Tue, 5 Sept 2023 at 16:38, Tobias Burnus 
wrote:

That's based on the fail
https://gcc.gnu.org/pipermail/gccadmin/2023q3/020349.html
and on the discussion on IRC.


Sorry I didn't notice the problem, nor the discussion on IRC, but I
can see that my commits created the problem, sorry for that.


Well, as the saying goes: you can't make an omelette without breaking eggs.

And there were three issues: The invalid reference, the missing check
for the former, and that it caused the nightly script to break.

While we cannot prevent human errors (nor KI ones) and have fixed/worked
around the latter, we can improve on the checking part :-)


I'm not sure how your patch would have prevented me from doing this?


There are two checking scripts:

One for manual running on a file produced by 'git format-patch', which is
  ./contrib/gcc-changelog/git_email.py

Before it crashed for the revert, now it prints OK with the warning:
  Cannot obtain info about reverted commit 
'46c2e94ca66ed9991c45a6ba6204ed02869efc39'
re-reading it, I think the wording is wrong. It should be:
  Invoked script cannot obtain info about reverted commits such as 
'46c2e94ca66ed9991c45a6ba6204ed02869efc39'
as that's a generic limitation - we simply do not know whether
that commit exists or not. (Changed in the attached patch.)


And the other operates on the git repository:
  ./contrib/gcc-changelog/git_check_commit.py
the latter now fails with:
  ERR: Cannot find to-be-reverted commit: 
"46c2e94ca66ed9991c45a6ba6204ed02869efc39"

That script can be run manually on any commit (e.g. before the commit;
consider using the '-v' and/or '-p' options; see '--help').

But that script is also run on the GCC server as pre-commit hook.

Therefore, the latter would have rejected your commit with the error message
during "git push", permitting to fix the commit (git commit --amend) before
trying again, similar to missing '\t' in the changelog or ...

Tobias
-
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München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955
contrib/gcc-changelog: Check whether revert-commit exists

contrib/ChangeLog:

	* gcc-changelog/git_commit.py (GitCommit.__init__):
	Handle commit_to_info_hook = None; otherwise, if None,
	regard it as error.
	(to_changelog_entries): Handle commit_to_info_hook = None;
	if info is None, create a warning for it.
	* gcc-changelog/git_email.py (GitEmail.__init__):
	call super() with commit_to_info_hook=None instead
	of a lamda function.

 contrib/gcc-changelog/git_commit.py | 20 +++-
 contrib/gcc-changelog/git_email.py  |  3 +--
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/contrib/gcc-changelog/git_commit.py b/contrib/gcc-changelog/git_commit.py
index 4f3131021f2..4f1bd4d7293 100755
--- a/contrib/gcc-changelog/git_commit.py
+++ b/contrib/gcc-changelog/git_commit.py
@@ -329,11 +329,15 @@ class GitCommit:
 self.revert_commit = m.group('hash')
 break
 if self.revert_commit:
+# The following happens for get_email.py:
+if not self.commit_to_info_hook:
+self.warnings.append(f"Invoked script can technically not obtain info about "
+ f"reverted commits such as '{self.revert_commit}'")
+return
 self.info = self.commit_to_info_hook(self.revert_commit)
-
-# The following happens for get_email.py:
-if not self.info:
-return
+if not self.info:
+self.errors.append(Error('Cannot find to-be-reverted commit', self.revert_commit))
+return
 
 self.check_commit_email()
 
@@ -796,12 +800,18 @@ class GitCommit:
 orig_date = self.original_info.date
 current_timestamp = orig_date.strftime(DATE_FORMAT)
 elif self.cherry_pick_commit:
-info = self.commit_to_info_hook(self.cherry_pick_commit)
+info = (self.commit_to_info_hook
+and self.commit_to_info_hook(self.cherry_pick_commit))
 # it can happen that it is a cherry-pick for a different
 # repository
 if info:
 timestamp = info.date.strftime(DATE_FORMAT)
 else:
+if self.commit_to_info_hook:
+

[PATCH] Tweak language choice in config-list.mk

2023-09-07 Thread Richard Sandiford via Gcc-patches
When I tried to use config-list.mk, the build for every triple except
the build machine's failed for m2.  This is because, unlike other
languages, m2 builds target objects during all-gcc.  The build will
therefore fail unless you have access to an appropriate binutils
(or an equivalent).  That's quite a big ask for over 100 targets. :)

This patch therefore makes m2 an optional inclusion.

Doing that wasn't entirely straightforward though.  The current
configure line includes "--enable-languages=all,...", which means
that the "..." can only force languages to be added that otherwise
wouldn't have been.  (I.e. the only effect of the "..." is to
override configure autodetection.)

The choice of all,ada and:

  # Make sure you have a recent enough gcc (with ada support) in your path so
  # that --enable-werror-always will work.

make it clear that lack of GNAT should be a build failure rather than
silently ignored.  This predates the D frontend, which requires GDC
in the same way that Ada requires GNAT.  I don't know of a reason
why D should be treated differently.

The patch therefore expands the "all" into a specific list of
languages.

That in turn meant that Fortran had to be handled specially,
since bpf and mmix don't support Fortran.

Perhaps there's an argument that m2 shouldn't build target objects
during all-gcc, but (a) it works for practical usage and (b) the
patch is an easy workaround.  I'd be happy for the patch to be
reverted if the build system changes.

OK to install?

Richard


gcc/
* contrib/config-list.mk (OPT_IN_LANGUAGES): New variable.
($(LIST)): Replace --enable-languages=all with a specifc list.
Disable fortran on bpf and mmix.  Enable the languages in
OPT_IN_LANGUAGES.
---
 contrib/config-list.mk | 17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/contrib/config-list.mk b/contrib/config-list.mk
index e570b13c71b..50ecb014bc0 100644
--- a/contrib/config-list.mk
+++ b/contrib/config-list.mk
@@ -12,6 +12,11 @@ TEST=all-gcc
 # supply an absolute path.
 GCC_SRC_DIR=../../gcc
 
+# Define this to ,m2 if you want to build Modula-2.  Modula-2 builds target
+# objects during all-gcc, so it can only be included if you've installed
+# binutils (or an equivalent) for each target.
+OPT_IN_LANGUAGES=
+
 # Use -j / -l make arguments and nice to assure a smooth resource-efficient
 # load on the build machine, e.g. for 24 cores:
 # svn co svn://gcc.gnu.org/svn/gcc/branches/foo-branch gcc
@@ -126,17 +131,23 @@ $(LIST): make-log-dir
TGT=`echo $@ | awk 'BEGIN { FS = "OPT" }; { print $$1 }'` &&
\
TGT=`$(GCC_SRC_DIR)/config.sub $$TGT` &&
\
case $$TGT in   
\
-   *-*-darwin* | *-*-cygwin* | *-*-mingw* | *-*-aix* | 
bpf-*-*)\
+   bpf-*-*)
\
ADDITIONAL_LANGUAGES="";
\
;;  
\
-   *)  
\
+   *-*-darwin* | *-*-cygwin* | *-*-mingw* | *-*-aix* | 
bpf-*-*)\
+   ADDITIONAL_LANGUAGES=",fortran";
\
+   ;;  
\
+   mmix-*-*)   
\
ADDITIONAL_LANGUAGES=",go"; 
\
;;  
\
+   *)  
\
+   ADDITIONAL_LANGUAGES=",fortran,go"; 
\
+   ;;  
\
esac && 
\
$(GCC_SRC_DIR)/configure
\
--target=$(subst SCRIPTS,`pwd`/../scripts/,$(subst 
OPT,$(empty) -,$@))  \
--enable-werror-always ${host_options}  
\
-   --enable-languages=all,ada$$ADDITIONAL_LANGUAGES;   
\
+   
--enable-languages=c,ada,c++,d,lto,objc,obj-c++,rust$$ADDITIONAL_LANGUAGES$(OPT_IN_LANGUAGES);
 \
) > log/$@-config.out 2>&1
 
 $(LOGFILES) : log/%-make.out : %
-- 
2.25.1



[committed] middle-end: Avoid calling targetm.c.bitint_type_info inside of gcc_assert [PR102989]

2023-09-07 Thread Jakub Jelinek via Gcc-patches
On Thu, Sep 07, 2023 at 10:36:02AM +0200, Thomas Schwinge wrote:
> Minor comment/question: are we doing away with the property that
> 'assert'-like "calls" must not have side effects?  Per 'gcc/system.h',
> this is "OK" for 'gcc_assert' for '#if ENABLE_ASSERT_CHECKING' or
> '#elif (GCC_VERSION >= 4005)' -- that is, GCC 4.5, which is always-true,
> thus the "offending" '#else' is never active.  However, it's different
> for standard 'assert' and 'gcc_checking_assert', so I'm not sure if
> that's a good property for 'gcc_assert' only?  For example, see also
>  "warn about asserts with side effects", or
> recent 
> "RFE: could -fanalyzer warn about assertions that have side effects?".

You're right, the
  #define gcc_assert(EXPR) ((void)(0 && (EXPR)))
fallback definition is incompatible with the way I've used it, so for
--disable-checking built by non-GCC it would not work properly.

Fixed thusly, committed to trunk as obvious.

2023-09-07  Jakub Jelinek  

PR c/102989
* expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
inside gcc_assert, as later code relies on it filling info variable.
* gimple-fold.cc (clear_padding_bitint_needs_padding_p,
clear_padding_type): Likewise.
* varasm.cc (output_constant): Likewise.
* fold-const.cc (native_encode_int, native_interpret_int): Likewise.
* stor-layout.cc (finish_bitfield_representative, layout_type):
Likewise.
* gimple-lower-bitint.cc (bitint_precision_kind): Likewise.

--- gcc/expr.cc.jj  2023-09-06 17:28:24.216977643 +0200
+++ gcc/expr.cc 2023-09-07 11:11:57.761912944 +0200
@@ -11039,7 +11039,8 @@ expand_expr_real_1 (tree exp, rtx target
  {
unsigned int prec = TYPE_PRECISION (type);
struct bitint_info info;
-   gcc_assert (targetm.c.bitint_type_info (prec, ));
+   bool ok = targetm.c.bitint_type_info (prec, );
+   gcc_assert (ok);
scalar_int_mode limb_mode
  = as_a  (info.limb_mode);
unsigned int limb_prec = GET_MODE_PRECISION (limb_mode);
--- gcc/gimple-fold.cc.jj   2023-09-06 17:28:24.221977578 +0200
+++ gcc/gimple-fold.cc  2023-09-07 11:11:57.765912888 +0200
@@ -4602,7 +4602,8 @@ static bool
 clear_padding_bitint_needs_padding_p (tree type)
 {
   struct bitint_info info;
-  gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type), ));
+  bool ok = targetm.c.bitint_type_info (TYPE_PRECISION (type), );
+  gcc_assert (ok);
   if (info.extended)
 return false;
   scalar_int_mode limb_mode = as_a  (info.limb_mode);
@@ -4880,7 +4881,8 @@ clear_padding_type (clear_padding_struct
 case BITINT_TYPE:
   {
struct bitint_info info;
-   gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type), ));
+   bool ok = targetm.c.bitint_type_info (TYPE_PRECISION (type), );
+   gcc_assert (ok);
scalar_int_mode limb_mode = as_a  (info.limb_mode);
if (TYPE_PRECISION (type) <= GET_MODE_PRECISION (limb_mode))
  {
--- gcc/varasm.cc.jj2023-09-06 17:28:24.239977342 +0200
+++ gcc/varasm.cc   2023-09-07 11:11:57.769912832 +0200
@@ -5289,8 +5289,8 @@ output_constant (tree exp, unsigned HOST
{
  struct bitint_info info;
  tree type = TREE_TYPE (exp);
- gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type),
- ));
+ bool ok = targetm.c.bitint_type_info (TYPE_PRECISION (type), );
+ gcc_assert (ok);
  scalar_int_mode limb_mode = as_a  (info.limb_mode);
  if (TYPE_PRECISION (type) <= GET_MODE_PRECISION (limb_mode))
{
--- gcc/fold-const.cc.jj2023-09-06 17:28:24.219977604 +0200
+++ gcc/fold-const.cc   2023-09-07 11:11:57.772912790 +0200
@@ -7731,8 +7731,8 @@ native_encode_int (const_tree expr, unsi
   if (TREE_CODE (type) == BITINT_TYPE)
 {
   struct bitint_info info;
-  gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type),
- ));
+  bool ok = targetm.c.bitint_type_info (TYPE_PRECISION (type), );
+  gcc_assert (ok);
   scalar_int_mode limb_mode = as_a  (info.limb_mode);
   if (TYPE_PRECISION (type) > GET_MODE_PRECISION (limb_mode))
{
@@ -8661,8 +8661,8 @@ native_interpret_int (tree type, const u
   if (TREE_CODE (type) == BITINT_TYPE)
 {
   struct bitint_info info;
-  gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type),
- ));
+  bool ok = targetm.c.bitint_type_info (TYPE_PRECISION (type), );
+  gcc_assert (ok);
   scalar_int_mode limb_mode = as_a  (info.limb_mode);
   if (TYPE_PRECISION (type) > GET_MODE_PRECISION (limb_mode))
{
--- gcc/stor-layout.cc.jj   2023-09-06 17:28:24.226977512 +0200
+++ gcc/stor-layout.cc  2023-09-07 11:11:57.775912748 +0200
@@ 

[Patch] libgomp.texi: Fix ICV var name, document some memory management routines

2023-09-07 Thread Tobias Burnus

Main reason was to fix an ICV value; as collateral change, I also added
documentation for some of the memory-management functions.

Comments, suggestions? If not, I will commit it soon.

Tobias
-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
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München, HRB 106955
libgomp.texi: Fix ICV var name, document some memory management routines

libgomp/

* libgomp.texi (Memory Management Routines): New; add documentation for
	omp_init_allocator, omp_destroy_allocator, omp_set_default_allocator,
	omp_get_default_allocator.
	(OMP_ALLOCATOR): Fix ICV var name; add see-also references.

 libgomp/libgomp.texi | 160 ++-
 1 file changed, 145 insertions(+), 15 deletions(-)

diff --git a/libgomp/libgomp.texi b/libgomp/libgomp.texi
index 4aad8cc52f4..c6cd825bbaa 100644
--- a/libgomp/libgomp.texi
+++ b/libgomp/libgomp.texi
@@ -518,7 +518,7 @@ specification in version 5.2.
 * Timing Routines::
 * Event Routine::
 @c * Interoperability Routines::
-@c * Memory Management Routines::
+* Memory Management Routines::
 @c * Tool Control Routine::
 @c * Environment Display Routine::
 @end menu
@@ -2112,17 +2112,17 @@ event handle that has already been fulfilled is also undefined.
 @c * omp_get_interop_rc_desc:: 
 @c @end menu
 
-@c @node Memory Management Routines
-@c @section Memory Management Routines
-@c
-@c Routines to manage and allocate memory on the current device.
-@c They have C linkage and do not throw exceptions.
-@c
-@c @menu
-@c * omp_init_allocator:: 
-@c * omp_destroy_allocator:: 
-@c * omp_set_default_allocator:: 
-@c * omp_get_default_allocator:: 
+@node Memory Management Routines
+@section Memory Management Routines
+
+Routines to manage and allocate memory on the current device.
+They have C linkage and do not throw exceptions.
+
+@menu
+* omp_init_allocator:: Create an allocator
+* omp_destroy_allocator:: Destroy an allocator
+* omp_set_default_allocator:: Set the default allocator
+* omp_get_default_allocator:: Get the default allocator
 @c * omp_alloc:: 
 @c * omp_aligned_alloc:: 
 @c * omp_free:: 
@@ -2131,7 +2131,136 @@ event handle that has already been fulfilled is also undefined.
 @c * omp_realloc:: 
 @c * omp_get_memspace_num_resources:: /TR11
 @c * omp_get_submemspace:: /TR11
-@c @end menu
+@end menu
+
+
+
+@node omp_init_allocator
+@subsection @code{omp_init_allocator} -- Create an allocator
+@table @asis
+@item @emph{Description}:
+Create an allocator that uses the specified memory space and has the specified
+traits; if an allocator that fulfills the requirements cannot be created,
+@code{omp_null_allocator} is returned.
+
+The predefined memory spaces and available traits can be found at
+@ref{OMP_ALLOCATOR}, where the trait names have to be be prefixed by
+@code{omp_atk_} (e.g. @code{omp_atk_pinned}) and the named trait values by
+@code{omp_atv_} (e.g. @code{omp_atv_true}); additionally, @code{omp_atv_default}
+may be used as trait value to specify that the default value should be used.
+
+@item @emph{C/C++}:
+@multitable @columnfractions .20 .80
+@item @emph{Prototype}: @tab @code{omp_allocator_handle_t omp_init_allocator(}
+@item   @tab @code{  omp_memspace_handle_t memspace,}
+@item   @tab @code{  int ntraits,}
+@item   @tab @code{  const omp_alloctrait_t traits[]);}
+@end multitable
+
+@item @emph{Fortran}:
+@multitable @columnfractions .20 .80
+@item @emph{Interface}: @tab @code{function omp_init_allocator(memspace, ntraits, traits)}
+@item   @tab @code{integer (kind=omp_allocator_handle_kind) :: omp_init_allocator}
+@item   @tab @code{integer (kind=omp_memspace_handle_kind), intent(in) :: memspace}
+@item   @tab @code{integer, intent(in) :: ntraits}
+@item   @tab @code{type (omp_alloctrait), intent(in) :: traits(*)}
+@end multitable
+
+@item @emph{See also}:
+@ref{OMP_ALLOCATOR}, @ref{Memory allocation}, @ref{omp_destroy_allocator}
+
+@item @emph{Reference}:
+@uref{https://www.openmp.org, OpenMP specification v5.0}, Section 3.7.2
+@end table
+
+
+
+@node omp_destroy_allocator
+@subsection @code{omp_destroy_allocator} -- Destroy an allocator
+@table @asis
+@item @emph{Description}:
+Releases all resources used by a memory allocator, which must not represent
+a predefined memory allocator.  Accessing memory after its allocator has been
+destroyed has unspecified behavior.  Passing @code{omp_null_allocator} to the
+routine is permitted but will have no effect.
+
+
+@item @emph{C/C++}:
+@multitable @columnfractions .20 .80
+@item @emph{Prototype}: @tab @code{void omp_destroy_allocator (omp_allocator_handle_t allocator);}
+@end multitable
+
+@item @emph{Fortran}:
+@multitable @columnfractions .20 .80
+@item @emph{Interface}: @tab 

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

2023-09-07 Thread Xi Ruoyao via Gcc-patches
On Wed, 2023-09-06 at 09:04 +0800, Yang Yujie wrote:
> On Tue, Sep 05, 2023 at 09:31:56PM +0800, Xi Ruoyao wrote:
> > On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote:
> > > * Support options for LoongArch SIMD extensions:
> > >   new configure options --with-simd={none,lsx,lasx};
> > >   new compiler option -msimd={none,lsx,lasx};
> > >   new driver options -m[no]-l[a]sx.
> > 
> > Hmm... In my build (a cross compiler configured with
> > ../gcc/configure --
> > target=loongarch64-linux-gnu --with-system-zlib) I have:
> > 
> > $ cat lasx.c
> > int x __attribute__((vector_size(32)));
> > int y __attribute__((vector_size(32)));
> > void test(void) { x += y; }
> > $ gcc/cc1 lasx.c -msimd=lasx -o- -nostdinc -mexplicit-relocs -O2
> > 
> > ... ...
> > 
> > pcalau12i   $r12,%pc_hi20(.LANCHOR0)
> > addi.d  $r12,$r12,%pc_lo12(.LANCHOR0)
> > xvld$xr0,$r12,0
> > xvld$xr1,$r12,32
> > xvadd.w $xr0,$xr0,$xr1
> > xvst$xr0,$r12,0
> > jr  $r1
> > 
> > ... ...
> > 
> > This seems perfectly fine.  But:
> > 
> > $ gcc/xgcc -B gcc lasx.c -mlasx -o- -nostdinc -mexplicit-relocs -O2
> > -S
> > 
> > ... ...
> > 
> > test:
> > .LFB0 = .
> > pcalau12i   $r12,%pc_hi20(.LANCHOR0)
> > addi.d  $r12,$r12,%pc_lo12(.LANCHOR0)
> > addi.d  $r3,$r3,-16
> > .LCFI0 = .
> > st.d$r23,$r3,8
> > .LCFI1 = .
> > ldptr.w $r7,$r12,0
> > ldptr.w $r23,$r12,32
> > ldptr.w $r6,$r12,8
> > 
> > ... ... (no SIMD instructions)
> > 
> > Is this a bug in the driver or I missed something?
> > 
> > -- 
> > Xi Ruoyao 
> > School of Aerospace Science and Technology, Xidian University
> 
> Maybe you can try deleting gcc/specs first.
> 
> It contains a modified version of self_specs that is used for building
> the libraries, which purges all user-specified "-m" options.
> This file is automatically restored prior to "make check*".

This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx
silently ignored so we cannot test a LSX/LASX or vectorizer change with
them.

Why do we need to purge all user-specified -m options here?

-- 
Xi Ruoyao 
School of Aerospace Science and Technology, Xidian University


Re: [PATCH 4/12] Middle-end _BitInt support [PR102989]

2023-09-07 Thread Thomas Schwinge
Hi Jakub!

On 2023-08-09T20:17:50+0200, Jakub Jelinek via Gcc-patches 
 wrote:
> The following patch introduces the middle-end part of the _BitInt
> support, a new BITINT_TYPE, handling it where needed, except the lowering
> pass and sanitizer support.

Minor comment/question: are we doing away with the property that
'assert'-like "calls" must not have side effects?  Per 'gcc/system.h',
this is "OK" for 'gcc_assert' for '#if ENABLE_ASSERT_CHECKING' or
'#elif (GCC_VERSION >= 4005)' -- that is, GCC 4.5, which is always-true,
thus the "offending" '#else' is never active.  However, it's different
for standard 'assert' and 'gcc_checking_assert', so I'm not sure if
that's a good property for 'gcc_assert' only?  For example, see also
 "warn about asserts with side effects", or
recent 
"RFE: could -fanalyzer warn about assertions that have side effects?".

> --- gcc/expr.cc.jj2023-08-08 16:02:52.837633995 +0200
> +++ gcc/expr.cc   2023-08-09 10:30:13.524295673 +0200

> @@ -11002,13 +11028,35 @@ expand_expr_real_1 (tree exp, rtx target

> + struct bitint_info info;
> + gcc_assert (targetm.c.bitint_type_info (prec, ));
> + scalar_int_mode limb_mode
> +   = as_a  (info.limb_mode);

> --- gcc/fold-const.cc.jj  2023-08-08 15:55:06.507164442 +0200
> +++ gcc/fold-const.cc 2023-08-08 16:12:02.318939952 +0200

> @@ -7714,7 +7726,29 @@ static int

> +  struct bitint_info info;
> +  gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type),
> +   ));
> +  scalar_int_mode limb_mode = as_a  (info.limb_mode);

> @@ -8622,7 +8656,29 @@ native_encode_initializer (tree init, un

> +  struct bitint_info info;
> +  gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type),
> +   ));
> +  scalar_int_mode limb_mode = as_a  (info.limb_mode);

> --- gcc/gimple-fold.cc.jj 2023-08-08 15:55:06.609163014 +0200
> +++ gcc/gimple-fold.cc2023-08-08 16:18:44.828303852 +0200

> +static bool
> +clear_padding_bitint_needs_padding_p (tree type)
> +{
> +  struct bitint_info info;
> +  gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type), ));
> +  if (info.extended)
> +return false;

> @@ -4854,6 +4877,57 @@ clear_padding_type (clear_padding_struct

> + struct bitint_info info;
> + gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type), ));
> + scalar_int_mode limb_mode = as_a  (info.limb_mode);

> --- gcc/stor-layout.cc.jj 2023-08-08 15:54:34.855607692 +0200
> +++ gcc/stor-layout.cc2023-08-08 16:15:41.003877836 +0200

> @@ -2148,6 +2148,22 @@ finish_bitfield_representative (tree rep

> +   struct bitint_info info;
> +   unsigned prec = TYPE_PRECISION (TREE_TYPE (field));
> +   gcc_assert (targetm.c.bitint_type_info (prec, ));
> +   scalar_int_mode limb_mode = as_a  (info.limb_mode);

> @@ -2393,6 +2409,64 @@ layout_type (tree type)

> + struct bitint_info info;
> + int cnt;
> + gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type), ));
> + scalar_int_mode limb_mode = as_a  (info.limb_mode);

> --- gcc/varasm.cc.jj  2023-08-08 15:54:35.517598423 +0200
> +++ gcc/varasm.cc 2023-08-08 16:12:02.330939784 +0200

> @@ -5281,6 +5281,61 @@ output_constant (tree exp, unsigned HOST

> +   struct bitint_info info;
> +   tree type = TREE_TYPE (exp);
> +   gcc_assert (targetm.c.bitint_type_info (TYPE_PRECISION (type),
> +   ));
> +   scalar_int_mode limb_mode = as_a  (info.limb_mode);


Grüße
 Thomas
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Re: [Patch] contrib/gcc-changelog: Check whether revert-commit exists

2023-09-07 Thread Christophe Lyon via Gcc-patches
Hi!

On Tue, 5 Sept 2023 at 16:38, Tobias Burnus  wrote:

> That's based on the fail
> https://gcc.gnu.org/pipermail/gccadmin/2023q3/020349.html
> and on the discussion on IRC.
>

Sorry I didn't notice the problem, nor the discussion on IRC, but I can see
that my commits created the problem, sorry for that.

I'm not sure how your patch would have prevented me from doing this?
What happened is that I had 3 patches on top of master
- HEAD: the one I wanted to push
- HEAD-1: revert of HEAD-2
- HEAD-2:  libstdc-Use-GLIBCXX_CHECK_LINKER_FEATURES-for.patch

I had actually forgotten about HEAD-1 and HEAD-2, HEAD was unrelated to
those, so when I pushed, I pushed 3 commits while I thought there was only
one.
I did run contrib/gcc-changelog/git_check_commit.py (I realize I'm not sure
whether I used git_check_commit.py or git_commit.py), but only on HEAD
since I had forgotten about the other two.

Are these scripts executed by the commit hooks too? (and thus they would
now warn?)

Thanks,

Christophe


> The problem in for the cron job was that
> r14-3661-g084a7cf9fb2d9cb98dfbe7d91602c840ec50b002
> referenced a commit that did not exist.
>
> This was temporarily fixed by Jakub, but it makes sense to detect this
> in the pre-commit hook.
>
>
> With the patch,
>contrib/gcc-changelog/git_email.py
> 0001-Revert-libstdc-Use-GLIBCXX_CHECK_LINKER_FEATURES-for.patch
> now prints:
> OK
> Warnings:
> Cannot obtain info about reverted commit
> '46c2e94ca66ed9991c45a6ba6204ed02869efc39'
>
> while
>contrib/gcc-changelog/git_check_commit.py
> 084a7cf9fb2d9cb98dfbe7d91602c840ec50b002
> now fails with:
>Checking 084a7cf9fb2d9cb98dfbe7d91602c840ec50b002: FAILED
>ERR: Cannot find to-be-reverted commit:
> "46c2e94ca66ed9991c45a6ba6204ed02869efc39"
>
> (check_email.py always shows the warning, git_check_commit.py only with
> '-v')
>
> Notes:
> - I am not sure whether a sensible testcase can be added - and, hence, I
> have not added one.
> - I have run "pytest-3' but my python is too old and thus might miss some
> checks which
>newer pytest/flake8 will find. But at least it did pass here.
> - I have not tested the cherry-pick + commit does not exist case,
>which now creates a warning as I did not quickly find a testcase.
>
> Comments, remarks, suggestions, approval?
>
> Tobias
> -
> Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201,
> 80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsführer:
> Thomas Heurung, Frank Thürauf; Sitz der Gesellschaft: München;
> Registergericht München, HRB 106955
>


Re: [PATCH] LoongArch: Use bstrins instruction for (a & ~mask) and (a & mask) | (b & ~mask) [PR111252]

2023-09-07 Thread Xi Ruoyao via Gcc-patches
On Thu, 2023-09-07 at 10:15 +0800, chenglulu wrote:
> 
> 在 2023/9/6 下午6:58, Xi Ruoyao 写道:
> > Forgot to mention: I've bootstrapped and regtested this patch on
> > loongarch64-linux-gnu (with PR110939 patch applied to unbreak the
> > bootstrapping).  Ok for trunk?
> 
> LGTM!
> 
> Thanks!

Pushed r14-3773.

> > 
> > On Wed, 2023-09-06 at 18:46 +0800, Xi Ruoyao wrote:
> > 
> > > If mask is a constant with value ((1 << N) - 1) << M we can
> > > perform this
> > > optimization.
> > > 
> > > gcc/ChangeLog:
> > > 
> > >  PR target/111252
> > >  * config/loongarch/loongarch-protos.h
> > >  (loongarch_pre_reload_split): Declare new function.
> > >  (loongarch_use_bstrins_for_ior_with_mask): Likewise.
> > >  * config/loongarch/loongarch.cc
> > >  (loongarch_pre_reload_split): Implement.
> > >  (loongarch_use_bstrins_for_ior_with_mask): Likewise.
> > >  * config/loongarch/predicates.md
> > > (ins_zero_bitmask_operand):
> > >  New predicate.
> > >  * config/loongarch/loongarch.md
> > > (bstrins__for_mask):
> > >  New define_insn_and_split.
> > >  (bstrins__for_ior_mask): Likewise.
> > >  (define_peephole2): Further optimize code sequence
> > > produced by
> > >  bstrins__for_ior_mask if possible.
> > > 
> > > gcc/testsuite/ChangeLog:
> > > 
> > >  * g++.target/loongarch/bstrins-compile.C: New test.
> > >  * g++.target/loongarch/bstrins-run.C: New test.
> > /* snip */
> > 
> 

-- 
Xi Ruoyao 
School of Aerospace Science and Technology, Xidian University


Re: [PATCH] fwprop: Allow UNARY_P and check register pressure.

2023-09-07 Thread Robin Dapp via Gcc-patches
> Thanks for giving it a go.  Can you post the latest version of the
> regpressure patch too?  The previous on-list version I could find
> seems to be too old.

Oh, sure, attached.  Apologies, I added the regpressure_same_class
convenience helper but forgot to re-send it.

Regards
 Robin

>From d3f87e4de7d7d05a2fcf8c948097b14eadf08c90 Mon Sep 17 00:00:00 2001
From: Robin Dapp 
Date: Mon, 24 Jul 2023 16:25:38 +0200
Subject: [PATCH] gcse: Extract reg pressure handling into separate file.

This patch extracts the hoist-pressure handling from gcse and puts it
into a separate file so it can be used by other passes in the future.
No functional change.

gcc/ChangeLog:

* Makefile.in: Add regpressure.o.
* gcse.cc (struct bb_data): Move to regpressure.cc.
(BB_DATA): Ditto.
(get_regno_pressure_class): Ditto.
(get_pressure_class_and_nregs): Ditto.
(record_set_data): Ditto.
(update_bb_reg_pressure): Ditto.
(should_hoist_expr_to_dom): Ditto.
(hoist_code): Ditto.
(change_pressure): Ditto.
(calculate_bb_reg_pressure): Ditto.
(one_code_hoisting_pass): Ditto.
* gcse.h (single_set_gcse): Export single_set_gcse.
* regpressure.cc: New file.
* regpressure.h: New file.
---
 gcc/Makefile.in|   1 +
 gcc/gcse.cc| 304 ++-
 gcc/gcse.h |   2 +
 gcc/regpressure.cc | 391 +
 gcc/regpressure.h  |  48 ++
 5 files changed, 459 insertions(+), 287 deletions(-)
 create mode 100644 gcc/regpressure.cc
 create mode 100644 gcc/regpressure.h

diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 5930b52462a..62768a84f81 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -1610,6 +1610,7 @@ OBJS = \
reg-stack.o \
regcprop.o \
reginfo.o \
+   regpressure.o \
regrename.o \
regstat.o \
reload.o \
diff --git a/gcc/gcse.cc b/gcc/gcse.cc
index f689c0c2687..5bafef7970f 100644
--- a/gcc/gcse.cc
+++ b/gcc/gcse.cc
@@ -160,6 +160,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "gcse.h"
 #include "gcse-common.h"
 #include "function-abi.h"
+#include "regpressure.h"
 
 /* We support GCSE via Partial Redundancy Elimination.  PRE optimizations
are a superset of those done by classic GCSE.
@@ -419,30 +420,6 @@ static bool doing_code_hoisting_p = false;
 /* For available exprs */
 static sbitmap *ae_kill;
 
-/* Data stored for each basic block.  */
-struct bb_data
-{
-  /* Maximal register pressure inside basic block for given register class
- (defined only for the pressure classes).  */
-  int max_reg_pressure[N_REG_CLASSES];
-  /* Recorded register pressure of basic block before trying to hoist
- an expression.  Will be used to restore the register pressure
- if the expression should not be hoisted.  */
-  int old_pressure;
-  /* Recorded register live_in info of basic block during code hoisting
- process.  BACKUP is used to record live_in info before trying to
- hoist an expression, and will be used to restore LIVE_IN if the
- expression should not be hoisted.  */
-  bitmap live_in, backup;
-};
-
-#define BB_DATA(bb) ((struct bb_data *) (bb)->aux)
-
-static basic_block curr_bb;
-
-/* Current register pressure for each pressure class.  */
-static int curr_reg_pressure[N_REG_CLASSES];
-
 
 static void compute_can_copy (void);
 static void *gmalloc (size_t) ATTRIBUTE_MALLOC;
@@ -494,8 +471,6 @@ static bool should_hoist_expr_to_dom (basic_block, struct 
gcse_expr *,
  enum reg_class,
  int *, bitmap, rtx_insn *);
 static bool hoist_code (void);
-static enum reg_class get_regno_pressure_class (int regno, int *nregs);
-static enum reg_class get_pressure_class_and_nregs (rtx_insn *insn, int 
*nregs);
 static bool one_code_hoisting_pass (void);
 static rtx_insn *process_insert_insn (struct gcse_expr *);
 static bool pre_edge_insert (struct edge_list *, struct gcse_expr **);
@@ -2402,7 +2377,7 @@ record_set_data (rtx dest, const_rtx set, void *data)
 }
 }
 
-static const_rtx
+const_rtx
 single_set_gcse (rtx_insn *insn)
 {
   struct set_data s;
@@ -2804,72 +2779,6 @@ compute_code_hoist_data (void)
 fprintf (dump_file, "\n");
 }
 
-/* Update register pressure for BB when hoisting an expression from
-   instruction FROM, if live ranges of inputs are shrunk.  Also
-   maintain live_in information if live range of register referred
-   in FROM is shrunk.
-   
-   Return 0 if register pressure doesn't change, otherwise return
-   the number by which register pressure is decreased.
-   
-   NOTE: Register pressure won't be increased in this function.  */
-
-static int
-update_bb_reg_pressure (basic_block bb, rtx_insn *from)
-{
-  rtx dreg;
-  rtx_insn *insn;
-  basic_block succ_bb;
-  df_ref use, op_ref;
-  edge succ;
-  edge_iterator ei;
-  int decreased_pressure = 0;
-  int nregs;
- 

Re: [PATCH v2 2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.

2023-09-07 Thread Xi Ruoyao via Gcc-patches
On Thu, 2023-09-07 at 15:00 +0800, Xiaolong Chen wrote:

/* snip */

> diff --git 
> a/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h 
> b/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h
> new file mode 100644
> index 000..7be199ee3a0
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h

Please reformat with GNU style (maybe using clang-format --style=GNU).

> @@ -0,0 +1,39 @@
> +#include 
> +#include 
> +#include 
> +
> +#define ASSERTEQ_64(line, ref, res)  
>   \
> +do{  
>   \
> +    int fail = 0;
>   \
> +    for(size_t i = 0; i < sizeof(res)/sizeof(res[0]); ++i){  
>   \
> +   long *temp_ref = [i], *temp_res = [i];
>   \
> +   if(abs(*temp_ref - *temp_res) > 0){   
>   \
> +   printf(" error: %s at line %ld , expected "#ref"[%ld]:0x%lx, got: 
> 0x%lx\n", \
> +   __FILE__, line, i, *temp_ref, *temp_res); 
>   \
> +   fail = 1; 
>   \
> +   } 
>   \
> +    }
>   \
> +    if(fail == 1) abort();   
>   \
> +}while(0) 
> +
> +#define ASSERTEQ_32(line, ref, res)  
>   \
> +do{  
>   \
> +    int fail = 0;
>   \
> +    for(size_t i = 0; i < sizeof(res)/sizeof(res[0]); ++i){  
>   \
> +   int *temp_ref = [i], *temp_res = [i]; 
>   \
> +   if(abs(*temp_ref - *temp_res) > 0){   
>   \
> +   printf(" error: %s at line %ld , expected "#ref"[%ld]:0x%x, got: 
> 0x%x\n",   \
> +  __FILE__, line, i, *temp_ref, *temp_res);  
>   \
> +   fail = 1; 
>   \
> +   } 
>   \
> +    }
>   \
> +    if(fail == 1) abort();   
>   \
> +}while(0) 
> +
> +#define ASSERTEQ_int(line, ref, res) 
>   \
> +do{  
>   \
> +    if (ref != res){ 
>   \
> +   printf(" error: %s at line %ld , expected %d, got %d\n",  
>   \
> +  __FILE__, line, ref, res); 
>   \
> +    }
>   \
> +}while(0) 

-- 
Xi Ruoyao 
School of Aerospace Science and Technology, Xidian University


[PATCH] RISC-V: Enable RVV scalable vectorization by default[PR111311]

2023-09-07 Thread Juzhe-Zhong
This patch is not ready but they all will be fixed very soon.

gcc/ChangeLog:

* config/riscv/riscv.opt: Set default as scalable vectorization.

---
 gcc/config/riscv/riscv.opt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 98f342348b7..bf2eca08221 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -292,7 +292,7 @@ EnumValue
 Enum(riscv_autovec_preference) String(fixed-vlmax) Value(RVV_FIXED_VLMAX)
 
 -param=riscv-autovec-preference=
-Target RejectNegative Joined Enum(riscv_autovec_preference) 
Var(riscv_autovec_preference) Init(NO_AUTOVEC)
+Target RejectNegative Joined Enum(riscv_autovec_preference) 
Var(riscv_autovec_preference) Init(RVV_SCALABLE)
 -param=riscv-autovec-preference=   Set the preference of 
auto-vectorization in the RISC-V port.
 
 Enum
-- 
2.36.3



[committed] libstdc++: Fix tests that fail in C++23

2023-09-07 Thread Jonathan Wakely via Gcc-patches
Tested x86_64-linux. Pushed to trunk.

-- >8 --

The tests for the std::ranges access CPOs (ranges::begin etc) use
pathological types with ridiculous overload sets for begin/end/data
members, to exercise all the corner cases in the specification.

Since P2278R4 "cbegin should always return a constant iterator" was
implemented for C++23 mode, some of the range access CPOs now require
the argument to satisfy the range concept, which was not previously
required. The behaviour of the CPO also changes for corner cases where
the type is a range R for which constant_range is satisfied in
addition to constant_range (meaning there's no need to wrap its
iterators in const_iterator). Adjust the expected results for those
pathological types that changed meaning in C++23, and add some new types
to verify other corner cases.

Some other range adaptor tests fail for C++20 because they assert that
ranges::end and ranges::cend return different types, which is not true
when the type satisfies constant_range.

This fixes the tests to PASS for both C++20 and C++23 (and later).

libstdc++-v3/ChangeLog:

* testsuite/std/ranges/access/cbegin.cc: Adjust for C++23
compatibility.
* testsuite/std/ranges/access/cdata.cc: Likewise.
* testsuite/std/ranges/access/cend.cc: Likewise.
* testsuite/std/ranges/access/crbegin.cc: Likewise.
* testsuite/std/ranges/access/crend.cc: Likewise.
* testsuite/std/ranges/adaptors/take.cc: Likewise.
* testsuite/std/ranges/adaptors/take_while.cc: Likewise.
* testsuite/std/ranges/adaptors/transform.cc: Likewise.
---
 .../testsuite/std/ranges/access/cbegin.cc | 13 ++
 .../testsuite/std/ranges/access/cdata.cc  | 38 +-
 .../testsuite/std/ranges/access/cend.cc   | 29 +-
 .../testsuite/std/ranges/access/crbegin.cc| 40 ++-
 .../testsuite/std/ranges/access/crend.cc  | 33 ++-
 .../testsuite/std/ranges/adaptors/take.cc |  2 +
 .../std/ranges/adaptors/take_while.cc |  2 +
 .../std/ranges/adaptors/transform.cc  |  4 ++
 8 files changed, 154 insertions(+), 7 deletions(-)

diff --git a/libstdc++-v3/testsuite/std/ranges/access/cbegin.cc 
b/libstdc++-v3/testsuite/std/ranges/access/cbegin.cc
index 10376040c16..3667b0d021f 100644
--- a/libstdc++-v3/testsuite/std/ranges/access/cbegin.cc
+++ b/libstdc++-v3/testsuite/std/ranges/access/cbegin.cc
@@ -48,6 +48,10 @@ struct R
   friend int* begin(R&&); // this function is not defined
   friend const int* begin(const R& r) noexcept { return r.a + 2; }
   friend const int* begin(const R&&); // this function is not defined
+
+#if __cpp_lib_ranges_as_const
+  friend const int* end(const R&) noexcept; // C++23 requires this.
+#endif
 };
 
 struct RV // view on an R
@@ -56,6 +60,10 @@ struct RV // view on an R
 
   friend int* begin(RV&); // this function is not defined
   friend const int* begin(const RV& rv) noexcept { return 
begin(std::as_const(rv.r)); }
+
+#if __cpp_lib_ranges_as_const
+  friend const int* end(const RV&) noexcept; // C++23 requires this.
+#endif
 };
 
 // Allow ranges::begin to work with RV&&
@@ -88,6 +96,11 @@ struct RR
   friend int* begin(RR&& r) { return r.a + 1; }
   friend const int* begin(const RR& r) { return r.a + 2; }
   friend const int* begin(const RR&& r) noexcept { return r.a + 3; }
+
+#if __cpp_lib_ranges_as_const
+  short* end() noexcept { return  + 1; }   // C++23 requires this.
+  const long* end() const { return  + 1; } // C++23 requires this.
+#endif
 };
 
 // N.B. this is a lie, cbegin on an RR rvalue will return a dangling pointer.
diff --git a/libstdc++-v3/testsuite/std/ranges/access/cdata.cc 
b/libstdc++-v3/testsuite/std/ranges/access/cdata.cc
index f0f45eeb6bf..d69b04c8f74 100644
--- a/libstdc++-v3/testsuite/std/ranges/access/cdata.cc
+++ b/libstdc++-v3/testsuite/std/ranges/access/cdata.cc
@@ -41,15 +41,43 @@ test01()
   static_assert( has_cdata );
   static_assert( has_cdata );
   R r;
-  const R& c = r;
+#if ! __cpp_lib_ranges_as_const
   VERIFY( std::ranges::cdata(r) == (R*)nullptr );
   static_assert( noexcept(std::ranges::cdata(r)) );
+#else
+  // constant_range is not satisfied, so cdata(r) == data(r).
+  VERIFY( std::ranges::cdata(r) ==  );
+  static_assert( ! noexcept(std::ranges::cdata(r)) );
+#endif
+  const R& c = r;
   VERIFY( std::ranges::cdata(c) == (R*)nullptr );
   static_assert( noexcept(std::ranges::cdata(c)) );
 
   // not lvalues and not borrowed ranges
   static_assert( !has_cdata );
   static_assert( !has_cdata );
+
+  struct R2
+  {
+// These overloads mean that range and range are satisfied.
+int* begin();
+int* end();
+const int* begin() const;
+const int* end() const;
+
+int i = 0;
+int j = 0;
+int* data() { return  }
+const R2* data() const noexcept { return nullptr; }
+  };
+  static_assert( has_cdata );
+  static_assert( has_cdata );
+  R2 r2;
+  VERIFY( std::ranges::cdata(r2) == (R2*)nullptr );
+  

[committed] libstdc++: Fix missing/misplaced { dg-options "-std=gnu++20" } in tests

2023-09-07 Thread Jonathan Wakely via Gcc-patches
Tested x86_64-linux. Pushed to trunk.

-- >8 --

These tests do not run by default, because the c++20 effective target
selector isn't matched.

libstdc++-v3/ChangeLog:

* testsuite/23_containers/unordered_map/operations/1.cc: Add
dg-options for C++20 mode.
* testsuite/23_containers/unordered_multimap/operations/1.cc:
Likewise.
* testsuite/23_containers/unordered_multiset/operations/1.cc:
Likewise.
* testsuite/23_containers/unordered_set/operations/1.cc:
Likewise.
* testsuite/std/time/parse.cc: Move dg-options before dg-do.
---
 .../testsuite/23_containers/unordered_map/operations/1.cc   | 1 +
 .../testsuite/23_containers/unordered_multimap/operations/1.cc  | 1 +
 .../testsuite/23_containers/unordered_multiset/operations/1.cc  | 1 +
 .../testsuite/23_containers/unordered_set/operations/1.cc   | 1 +
 libstdc++-v3/testsuite/std/time/parse.cc| 2 +-
 5 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/libstdc++-v3/testsuite/23_containers/unordered_map/operations/1.cc 
b/libstdc++-v3/testsuite/23_containers/unordered_map/operations/1.cc
index cfeca606c55..835f845621b 100644
--- a/libstdc++-v3/testsuite/23_containers/unordered_map/operations/1.cc
+++ b/libstdc++-v3/testsuite/23_containers/unordered_map/operations/1.cc
@@ -15,6 +15,7 @@
 // with this library; see the file COPYING3.  If not see
 // .
 
+// { dg-options "-std=gnu++20" }
 // { dg-do run { target c++20 } }
 
 #include 
diff --git 
a/libstdc++-v3/testsuite/23_containers/unordered_multimap/operations/1.cc 
b/libstdc++-v3/testsuite/23_containers/unordered_multimap/operations/1.cc
index 7e3867f345b..988a66695ef 100644
--- a/libstdc++-v3/testsuite/23_containers/unordered_multimap/operations/1.cc
+++ b/libstdc++-v3/testsuite/23_containers/unordered_multimap/operations/1.cc
@@ -15,6 +15,7 @@
 // with this library; see the file COPYING3.  If not see
 // .
 
+// { dg-options "-std=gnu++20" }
 // { dg-do run { target c++20 } }
 
 #include 
diff --git 
a/libstdc++-v3/testsuite/23_containers/unordered_multiset/operations/1.cc 
b/libstdc++-v3/testsuite/23_containers/unordered_multiset/operations/1.cc
index 7db4d129c52..91b0f87cab8 100644
--- a/libstdc++-v3/testsuite/23_containers/unordered_multiset/operations/1.cc
+++ b/libstdc++-v3/testsuite/23_containers/unordered_multiset/operations/1.cc
@@ -15,6 +15,7 @@
 // with this library; see the file COPYING3.  If not see
 // .
 
+// { dg-options "-std=gnu++20" }
 // { dg-do run { target c++20 } }
 
 #include 
diff --git a/libstdc++-v3/testsuite/23_containers/unordered_set/operations/1.cc 
b/libstdc++-v3/testsuite/23_containers/unordered_set/operations/1.cc
index b2f13990b56..dea21df7bcb 100644
--- a/libstdc++-v3/testsuite/23_containers/unordered_set/operations/1.cc
+++ b/libstdc++-v3/testsuite/23_containers/unordered_set/operations/1.cc
@@ -15,6 +15,7 @@
 // with this library; see the file COPYING3.  If not see
 // .
 
+// { dg-options "-std=gnu++20" }
 // { dg-do run { target c++20 } }
 
 #include 
diff --git a/libstdc++-v3/testsuite/std/time/parse.cc 
b/libstdc++-v3/testsuite/std/time/parse.cc
index 86222d59596..0ef56cf1cfa 100644
--- a/libstdc++-v3/testsuite/std/time/parse.cc
+++ b/libstdc++-v3/testsuite/std/time/parse.cc
@@ -1,5 +1,5 @@
-// { dg-do run { target c++20 } }
 // { dg-options "-std=gnu++20" }
+// { dg-do run { target c++20 } }
 
 #include 
 #include 
-- 
2.41.0



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