* build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing passed.
* build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-atomic passed.
* build/MIPS_SE/tests/fast/quick/00.hello/mips/linux/simple-atomic passed.
*
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delete
changeset 1444787b1c93 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1444787b1c93
description:
IGbE: Remove is8257 variable
diffstat:
1 file changed, 1 insertion(+), 4 deletions(-)
src/dev/i8254xGBe.cc |5 +
diffs (60 lines):
diff -r 50c9d48de3ca -r
changeset ff12aefd2cc2 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ff12aefd2cc2
description:
INET: Add functions to header types to get offset in packet and start
of payload; add function to split packet at last known header
diffstat:
2 files changed, 10
I feel like I'm missing some context with this patch (though I will
admit to not following the mailing list very closely after the last
few months. Was this the solution to us not being able to switch back
to timing from detailed? Can you write up a commit message?
At first glance, it seems
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changeset 5030d9fb0d70 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=5030d9fb0d70
description:
X86: Change indentation on microop disassembly.
diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
src/arch/x86/insts/static_inst.cc |2 +-
diffs (19 lines):
diff
changeset e3a6f53818fe in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=e3a6f53818fe
description:
X86: Move the function that prints memory args into the inst base class.
diffstat:
2 files changed, 20 insertions(+)
src/arch/x86/insts/static_inst.cc | 19
These patches let you trace the macroops that go with the currently
executing microops. By default, microops are traced and macroops aren't.
Instructions that are neither still work the same way. That means if you
don't do anything differently, you shouldn't really see a difference. If
you
