* do-regression: qsub timed out, retrying locally
* build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/o3-timing passed.
* build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/simple-atomic passed.
* build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/simple-timing passed.
*
I don't know much about IDE either, but it may have more to do with DMA in
general than with IDE specifically. What is the specific panic that you're
getting (i.e., the actual output)?
Steve
On Wed, Apr 8, 2009 at 1:36 AM, Gabe Black gbl...@eecs.umich.edu wrote:
Anybody? The ATA spec I have
It's a panic that is supposed to check that the state machine in
operating correctly. To start a dma transfer the device is supposed to
be in Transfer_Data_Dma (which some device access writes put in in)
and the dmaState is supposed to be in Dma_Transfer (as opposed to some
other phase of
Thanks for your kind reply of this problem. You're so nice.
Using the MIPS architecture on M5 for some system
performance evaluation is our recent research interest. I
will report on what we find for you, hope it useful for you
and other developers to perfect the MIPS architecture on
M5.
changeset 6df0633d883b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=6df0633d883b
description:
style: fix style hook for some newer versions of mercurial.
diffstat:
1 file changed, 2 insertions(+), 2 deletions(-)
util/style.py |4 ++--
diffs (21 lines):
diff -r
changeset 410194bb3049 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=410194bb3049
description:
tlb: Don't separate the TLB classes into an instruction TLB and a data
TLB
diffstat:
34 files changed, 310 insertions(+), 601 deletions(-)
src/arch/alpha/AlphaTLB.py
changeset 47b4fcb10c11 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=47b4fcb10c11
description:
tlb: More fixing of unified TLB
diffstat:
20 files changed, 130 insertions(+), 129 deletions(-)
src/arch/alpha/AlphaTLB.py |8 +-
src/arch/alpha/tlb.cc
changeset 0555121b5c5f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0555121b5c5f
description:
tests: update tests for TLB unification
diffstat:
197 files changed, 1885 insertions(+), 1171 deletions(-)
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
