Hi,
Is single stepping supported in gem5 x86 (by setting the Trap Flag in
RFLAGS register) ? I was working with an educational OS that runs on gem5,
and was trying to add a single step feature to it. But when I set the Trap
flag in the RFLAGS saved on stack and called IRETQ instruction, it seems
Hi,
I was trying to implement a baremetal OS for the RISCV architecture, that
runs on gem5. I have a few doubts regarding the implementation of RISCV
Interrupts in gem5.
1) The privileged ISA spec (section 3.1.6.1) says that :
Interrupts for lower-privilege modes,
Hi,
I was writing an OS that can run on RISC-V FS mode in gem5. I want
to make certain address ranges uncacheable (for some memory mapped
devices). RISCV page table entries doesn't provide any flags to
achieve this. The proper way to do this in RISCV seems to be using PMA
(Physical Memory
how this can be used in the gem5 config script:
>
> https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/develop/src/riscv-fs/configs-riscv-fs/system/system.py#214
>
> -Ayaz
>
> On Tue, Jun 15, 2021 at 1:23 PM Deepak Mohan via gem5-users
> wrote:
>>
>> Hi,
&
Hi,
I wanted to compute the power consumption for a RISCV full system
simulation using McPAT. It would be great if anyone can give some
pointers towards how to do this, like what are the important
parameters that has to be given as input to McPAT to get reasonable
values for power consumption.
Hi,
I'm doing some experiments using gem5 FS mode for x86.
In the FS mode I'm running a custom OS written for the requirements of
my experiment. I have added a PIO device to the x86 system which
responds to reads and writes to an address range. In the OS I have
mapped this device to a range in
Hi,
I'm working on an older version of gem5 (20.1.0.5), in which I run a
RISCV full system simulation, I have added a minimal platform in this
version of gem5 to run the FS simulation, but when I add cache
hierarchy to the simulation the following error occurs after writing
to the satp CSR.
void
le.
>
> Gabe
>
> On Wed, Mar 10, 2021 at 2:07 AM Deepak Mohan via gem5-users
> wrote:
>>
>> Hi,
>> I was implementing an x86 operating system that runs on gem5
>> simulator. I have to implement the shutdown functionality for the OS.
>> From my initial
Hi,
I was implementing an x86 operating system that runs on gem5
simulator. I have to implement the shutdown functionality for the OS.
>From my initial research I found out that I have to use the ACPI for
implementing shutdown (using outw(PM1a_CNT, SLP_TYPa | SLP_EN ); ).
But the values of
