[gem5-users] Re: Introducing randomness to gem5

2021-11-26 Thread Victor Kariofillis via gem5-users
Hi, Gabriel I'm not interested in a specific gem5 component. I have a microbenchmark that makes use of the srand and rand functions with srand() being seeded by using time. struct timeval t1; gettimeofday(, NULL); srand(t1.tv_usec * t1.tv_sec); I assume that gem5 always uses the same time for

[gem5-users] Introducing randomness to gem5

2021-11-24 Thread Victor Kariofillis via gem5-users
Hi, I have followed the instructions in the post below in order to introduce randomness between different runs of gem5. https://www.mail-archive.com/gem5-users@gem5.org/msg19749.html However, it does not seem to work. I'm producing random numbers in my program by seeding srand with time and

[gem5-users] Re: Gem5 stuck when simulate C++ workload in SE mode

2021-11-22 Thread Victor Kariofillis via gem5-users
Hi Gabriel, I've followed the instructions you have provided but I'm still getting the same numbers on every gem5 run. The changes I made to se.py are the following. + from _m5.core import seedRandom seedRandom(int()) I'm producing random numbers in my program by seeding srand with time srand

[gem5-users] Re: Use xbar stat in BaseCPU

2021-10-22 Thread Victor Kariofillis via gem5-users
ther parse the stats.txt or use the new python stats interface ( > https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/src/python/m5/stats/gem5stats.py#237) > to access stats from your python run script. > > Cheers, > Jason > > On Thu, Oct 21, 2021 at 4:12 PM Victor Kario

[gem5-users] Use xbar stat in BaseCPU

2021-10-21 Thread Victor Kariofillis via gem5-users
Hi, I have created a new stat of type Formula in the xbar.cc/hh files. There I aggregate all the different transDist types. I'd like to use this newly created stat to compute another stat in the BaseCPU object. What is the best way to have access to it (i.e., allTransactions stat) from BaseCPU?

[gem5-users] gem5 Power Model

2021-09-15 Thread Victor Kariofillis via gem5-users
Hi, I have some questions about the power model in gem5. - In what extent is it implemented? I'm mainly interested in a power model for the CPU. Is there one? - I have seen a python configuration script (fs_power.py) for ARM. Is there a power model only for the ARM architecture? - If yes, can it

[gem5-users] Re: 答复: Re: SPEC2017 in FS mode

2021-05-27 Thread Victor Kariofillis via gem5-users
More specifically, it will replace >> gcc_dir = "/opt/rh/devtoolset-7/root/usr" >> by >> gcc_dir = "/usr" >> >> However, in your SPEC 2017 disc, it comes with devtoolset-9 and not >> devtoolset-7. >> >> So, one way to fix that is

[gem5-users] Re: 答复: Re: SPEC2017 in FS mode

2021-05-20 Thread Victor Kariofillis via gem5-users
ou can mount the disk image and check the log file > generated by spec. > > packer fails due to "output directory already exists". In this case, > you'll need to remove the "spec-2017/spec-2017-image" folder before > starting packer again. > > Regards,

[gem5-users] Re: SPEC2017 in FS mode

2021-05-20 Thread Victor Kariofillis via gem5-users
lding process fails. > - After that, you can mount the disk image and check the log file > generated by spec. > > packer fails due to "output directory already exists". In this case, > you'll need to remove the "spec-2017/spec-2017-image" folder before > starting

[gem5-users] SPEC2017 in FS mode

2021-05-17 Thread Victor Kariofillis via gem5-users
Hi, I've tried running the SPEC2017 benchmarks in FS mode of gem5 using the instructions/files provided by the gem5 resources page. https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/spec-2017 I've also followed the step by step instructions in the git repo for

[gem5-users] Re: Accessing cache stats during execution

2020-06-30 Thread Victor Kariofillis via gem5-users
at from CPU > > On Fri, Jun 26, 2020 at 4:20 PM Victor Kariofillis via gem5-users < > gem5-users@gem5.org> wrote: > >> Hi, >> >> Building on top of my previous question and making it a bit more general. >> Is there a way to access stats in a somewhat global man

[gem5-users] Re: Accessing cache stats during execution

2020-06-26 Thread Victor Kariofillis via gem5-users
accessible? Thanks, Victor On Thu, 18 Jun 2020 at 17:38, Victor Kariofillis wrote: > Hi, > > I want to run some tests for phase predictors using cache stats (e.g., L1 > and L2 MPKIs). I need access to those stats during program execution, in > order to both keep a log of these and m

[gem5-users] Accessing cache stats during execution

2020-06-18 Thread Victor Kariofillis via gem5-users
Hi, I want to run some tests for phase predictors using cache stats (e.g., L1 and L2 MPKIs). I need access to those stats during program execution, in order to both keep a log of these and make predictions based on them. What is the best way to access them? Would this be done through the cache.cc

Re: [gem5-users] Computing stat of type Value

2020-02-12 Thread Victor Kariofillis
Hi Daniel, Thanks for your answer. Unfortunately, I don't want to only do that. At the end of the execution, I take the *n* most frequently appearing cache lines and check the similarity (based on a hash value) of the entirety of the cache lines vector to them. This can only be done at the end.

[gem5-users] Computing stat of type Value

2020-02-11 Thread Victor Kariofillis
Hi, I have created a stat of type Value called zeroBytesPercentage. It is the percentage of zero bytes of all the lines that are written in the LLC. I want it to get a value from a function (calcZeroBytesPercentage), so I'm using functor. zeroBytesPercentage

Re: [gem5-users] Stat of type Formula getting value from function

2019-11-29 Thread Victor Kariofillis
No, it should only be calculated at the end. > ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Stat of type Formula getting value from function

2019-11-29 Thread Victor Kariofillis
Hi, I have created a Stat of type Formula. Since the formula is complicated, instead of having it in the regStats file, I want to call another function that returns the proper value. The code would be something like this. zeroPercentage.flags(total); zeroPercentage = calcZeroPercentage(); The

Re: [gem5-users] Printing stats in ROI

2019-10-25 Thread Victor Kariofillis
. In se.py there is this line: "CacheConfig.config_cache(options, system)". Do I pass the options from main.py as another argument? Is there any other better or easier way to do this? I would appreciate any help. Thanks, Victor On Thu, 24 Oct 2019 at 17:51, Victor Kariofillis wrote: &g

Re: [gem5-users] Printing stats in ROI

2019-10-24 Thread Victor Kariofillis
may also add them in respective > mem/cache file and compile the gem. > > Regards, > Prathap > > On Wed, Oct 23, 2019 at 4:41 PM Victor Kariofillis < > vickariofil...@gmail.com> wrote: > >> Hi, >> >> I have implemented pseudo instructions for recogn

[gem5-users] Printing stats in ROI

2019-10-23 Thread Victor Kariofillis
Hi, I have implemented pseudo instructions for recognizing the Region of Interest of the benchmarks that I am running. What I want to do is to start printing some information (cache data) to a file as soon as the ROI begins. This printing will be done through the base.cc file in mem/cache. I

Re: [gem5-users] Adding latencies in cache accesses

2019-10-18 Thread Victor Kariofillis
Hi everyone, I have one more question for the setWhenReady() function. I see that when it's called it is like that: blk->setWhenReady(clockEdge(fillLatency) + pkt->headerDelay + std::max(cyclesToTicks(tag_latency), (uint64_t)pkt->payloadDelay)); I am trying to understand the

Re: [gem5-users] Adding latencies in cache accesses

2019-10-16 Thread Victor Kariofillis
2019 at 22:40, Victor Kariofillis wrote: > Hi, > > I am interested in adding additional latencies during a cache access. I > have implemented some extra functionality that happens in the cache and I > am wondering about how to model the extra time it will take for that to >

[gem5-users] Adding latencies in cache accesses

2019-10-13 Thread Victor Kariofillis
Hi, I am interested in adding additional latencies during a cache access. I have implemented some extra functionality that happens in the cache and I am wondering about how to model the extra time it will take for that to happen. Where would I add the extra latency? For example, inside the

Re: [gem5-users] Multiple cache line evictions issue

2019-07-25 Thread Victor Kariofillis
list" and don't use Atomic mode, would that fix the problem? Thanks On Wed, 24 Jul 2019 at 16:23, Victor Kariofillis wrote: > Hi, > > I am interested in using the cache compression schemes that gem5 has > (mainly BDI). I was going through the commits and I saw one named "Remo

[gem5-users] Multiple cache line evictions issue

2019-07-24 Thread Victor Kariofillis
Hi, I am interested in using the cache compression schemes that gem5 has (mainly BDI). I was going through the commits and I saw one named "Remove writebacks packet list", that was later reverted because it introduced a bug in atomic mode. Using a compression scheme will probably result in

Re: [gem5-users] Instrumenting ROI in Syscall emulation mode

2019-06-13 Thread Victor Kariofillis
Jun 2019 at 13:52, Victor Kariofillis wrote: > Hi Jason, > > Sadly removing that flag didn't make a difference. I'm still getting an > mmap warning (when running it with sudo). I also tried removing the flag > (-DM5OP_ADDR=0x) from util/m5/Makefile.x86, but it made no &g

Re: [gem5-users] Instrumenting ROI in Syscall emulation mode

2019-06-13 Thread Victor Kariofillis
tor, > > Drop the -DM5OP_ADDR define when you're compiling. That will force the > m5ops to use the pseudo instruction implementation instead of the MMIO > implementation. MMIO is required when using KVM, but no other time. > > Cheers, > Jason > > On Wed, Jun 12, 2019

Re: [gem5-users] Instrumenting ROI in Syscall emulation mode

2019-06-12 Thread Victor Kariofillis
Hi Andrea, I can't get my microbenchmark to run with gem5. If I execute it without sudo, I get a "Can't open /dev/mem: Permission denied". If I execute it with sudo on its own, it seems to finish fine. But when I want to execute it with gem5, I get a segfault. "warn: mmap: writing to shared mmap

[gem5-users] Instrumenting ROI in Syscall emulation mode

2019-06-10 Thread Victor Kariofillis
Hi, I have already implemented pseudo instructions for full system mode based on this tutorial. It is time consuming though to test everything after I make even a small change. Is there any way to implement the same