[gem5-users] Re: Introducing randomness to gem5

[Victor Kariofillis via gem5-users]

Hi,
Gabriel

I'm not interested in a specific gem5 component. I have a microbenchmark
that makes use of the srand and rand functions with srand() being seeded by
using time.

struct timeval t1;
gettimeofday(, NULL);
srand(t1.tv_usec * t1.tv_sec);

I assume that gem5 always uses the same time for the simulation and that's
why I get the same streak of random numbers. Is this the case and if yes
what would be the approach to change it?

Thanks,
Victor

On Thu, 25 Nov 2021 at 12:20, Gabriel Busnot via gem5-users <
gem5-users@gem5.org> wrote:

> Hi Victor,
>
> It MAY result in different results depending on which components you are
> using in gem5. As stated in my post you cited, the main random number
> generator which is seeded by seedRandom (random_mt) is not always used in
> gem5, which is an issue. Also, not every component in gem5 support
> randomization. If you are using Ruby, you should observe different outputs
> with different seeds though.
>
> If the component you use support randomization but use the wrong number
> generator, replace it with random_mt (src/base/random.hh). If you think
> that some components could add some randomness but don't, you can add it
> yourself. Typically, you can add random delays to packets when ordering is
> not a functional requirement. Take a look at MessageBuffer::enqueue for an
> example.
>
> Best,
> Gabriel
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[gem5-users] Introducing randomness to gem5

[Victor Kariofillis via gem5-users]

Hi,

I have followed the instructions in the post below in order to introduce
randomness between different runs of gem5.

https://www.mail-archive.com/gem5-users@gem5.org/msg19749.html

However, it does not seem to work. I'm producing random numbers in my
program by seeding srand with time and then use rand. Shouldn't changing
the seed I provide to the seedRandom function result in different numbers
generated in each run of the program. Please correct me if my understanding
is wrong.

Thanks,
Victor
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[gem5-users] Re: Gem5 stuck when simulate C++ workload in SE mode

[Victor Kariofillis via gem5-users]

Hi Gabriel,

I've followed the instructions you have provided but I'm still getting the
same numbers on every gem5 run. The changes I made to se.py are the
following.

+
from _m5.core import seedRandom
seedRandom(int())

I'm producing random numbers in my program by seeding srand with time srand
and rand. Shouldn't changing the seed I provide to the seedRandom function
result in different numbers generated in each run of the program. Please
correct me if my understanding is wrong.

Thanks,
Victor
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[gem5-users] Re: Use xbar stat in BaseCPU

[Victor Kariofillis via gem5-users]

"I would suggest computing any and all formulas after running the
simulation, not during the simulation loop."

I'd be ok with that since I have the variable values that I need. Is that,
however, achievable only through Python or can I do this computation
through C++ at the end of the simulation?

Thanks

On Fri, 22 Oct 2021 at 12:59, Jason Lowe-Power  wrote:

> Hi Victor,
>
> It's not super easy to access stats between SimObjects. I would suggest
> computing any and all formulas after running the simulation, not during the
> simulation loop.
>
> You can either parse the stats.txt or use the new python stats interface (
> https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/src/python/m5/stats/gem5stats.py#237)
> to access stats from your python run script.
>
> Cheers,
> Jason
>
> On Thu, Oct 21, 2021 at 4:12 PM Victor Kariofillis via gem5-users <
> gem5-users@gem5.org> wrote:
>
>> Hi,
>>
>> I have created a new stat of type Formula in the xbar.cc/hh files. There
>> I aggregate all the different transDist types. I'd like to use this newly
>> created stat to compute another stat in the BaseCPU object. What is the
>> best way to have access to it (i.e., allTransactions stat) from BaseCPU? Is
>> there any way to make it globally accessible?
>>
>> Thanks
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[gem5-users] Use xbar stat in BaseCPU

[Victor Kariofillis via gem5-users]

Hi,

I have created a new stat of type Formula in the xbar.cc/hh files. There I
aggregate all the different transDist types. I'd like to use this newly
created stat to compute another stat in the BaseCPU object. What is the
best way to have access to it (i.e., allTransactions stat) from BaseCPU? Is
there any way to make it globally accessible?

Thanks
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[gem5-users] gem5 Power Model

[Victor Kariofillis via gem5-users]

Hi,

I have some questions about the power model in gem5.

- In what extent is it implemented? I'm mainly interested in a power model
for the CPU. Is there one?
- I have seen a python configuration script (fs_power.py) for ARM. Is there
a power model only for the ARM architecture?
- If yes, can it be used on a syscall emulation mode or only in full system?

And more generally, what are the options of combining external power
modelling programs with gem5? Which one would be the easiest / most
straightforward to integrate? (maybe McPat?)

Thanks,
Victor
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[gem5-users] Re: 答复: Re: SPEC2017 in FS mode

[Victor Kariofillis via gem5-users]

First of all, thanks Hoa for the help. Indeed, there was an issue with the
gcc directory.

Unfortunately, I'm having some other issues as well.

1) With the gem5 resources method, the intrate benchmarks build and train
successfully in the vm. (Only 502.gcc_r has a problem). However, using
run_spec.py to run them with gem5 results in an error.

Traceback (most recent call last):
  File "", line 1, in 
  File "build/X86/python/m5/main.py", line 457, in main
  File "~/spec2017/gem5-resources/configs/run_spec.py", line 254, in

root, system = create_system(linux_kernel_path, disk_image_path,
  File "~/spec2017/gem5-resources/configs/run_spec.py", line 142, in
create_system
system = MySystem(kernel = linux_kernel_path,
  File "~/spec2017/gem5-resources/configs/system/system.py", line 63, in
__init__
self.system_port = self.membus.cpu_side_ports
  File "build/X86/python/m5/SimObject.py", line 1277, in __getattr__
*AttributeError: object 'SystemXBar' has no attribute 'cpu_side_ports'*
  (C++ object is not yet constructed, so wrapped C++ methods are
unavailable.)

I know that gem5 has made some changes recently to the naming of the ports,
but looking at SystemXBar there is definitely a cpu_side_ports object.

2) I've also tried the approach using gem5art based on this
<http://www.gem5.org/documentation/gem5art/tutorials/spec-tutorial>
tutorial. There are two issues.
a) I get an error that there is no -E option for the celery command.
Looking at the documentation of celery and at --help, there's no mention of
an -E option.
b) At the end of the launch_spec2017_experiment.py file, there is mention
of run_script_repo that is not defined as an artifact beforehand. Should it
be defined, and if yes how?

Thanks,
Victor

On Tue, 25 May 2021 at 14:05, Bobby Bruce via gem5-users <
gem5-users@gem5.org> wrote:

> FYI: Hoa has a fix for this, reported here:
> https://gem5.atlassian.net/browse/GEM5-996.
>
> Thanks Hoa!
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, May 24, 2021 at 4:22 AM Hoa Nguyen via gem5-users <
> gem5-users@gem5.org> wrote:
>
>> Hi Victor,
>>
>> I see the problem now.
>>
>> In install-spec2017 script line 21
>> (
>> https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/spec-2017/disk-image/spec-2017/install-spec2017.sh#21
>> ),
>> we replace the default gcc_dir so that specmake will use
>> Ubuntu-installed gcc rather than spec's one.
>> More specifically, it will replace
>> gcc_dir = "/opt/rh/devtoolset-7/root/usr"
>> by
>> gcc_dir = "/usr"
>>
>> However, in your SPEC 2017 disc, it comes with devtoolset-9 and not
>> devtoolset-7.
>>
>> So, one way to fix that is to change "devtoolset-7" in the line 21 to
>> "devtoolset-9".
>>
>> Regards,
>> Hoa Nguyen
>>
>> On 5/20/21, Victor Kariofillis via gem5-users 
>> wrote:
>> > Hi Hoa,
>> >
>> > Thanks for the help. I'm able now to look into why the builds fail.
>> >
>> > The gcc and gfortran commands are not found, which is weird since in
>> > *install-spec2017.sh* there is a command for installing them. In the
>> > terminal, I can clearly see that it is executed.
>> >
>> > qemu: build-essential is already the newest version (12.4ubuntu1).
>> >> qemu: gfortran is already the newest version (4:7.4.0-1ubuntu2.3).
>> >> qemu: 0 upgraded, 0 newly installed, 0 to remove and 176 not upgraded.
>> >>
>> >
>> > But when it's time to build spec benchmarks they fail.
>> >
>> > specmake: /opt/rh/devtoolset-9/root/usr/bin/gfortran: Command not found
>> >>
>> >
>> > Thanks
>> >
>> > On Thu, 20 May 2021 at 21:01, Liyichao via gem5-users <
>> gem5-users@gem5.org>
>> > wrote:
>> >
>> >> Hi Hoa:
>> >> Is the spec-2017 img just for X86?
>> >>
>> >>  Does it support for AARCH64?Does it support for running with
>> KVM+O3?
>> >>
>> >>
>> >> -邮件原件-
>> >> 发件人: Hoa Nguyen via gem5-users [mailto:gem5-users@gem5.org]
>> >> 发送时间: 2021年5月19日 19:09
>> >> 收件人: gem5 users mailing list 
>> >> 抄送: Hoa Nguyen 
>> >> 主题: [gem5-users] Re: SPEC2017 in FS mode
>> >>
>> >> Hi Victor,
>> >>
>> >> I'm not sure what caused the errors of building the spec benchmarks.
>> >>
>> >> Also, I'm not sure ho

[gem5-users] Re: 答复: Re: SPEC2017 in FS mode

[Victor Kariofillis via gem5-users]

Hi Hoa,

Thanks for the help. I'm able now to look into why the builds fail.

The gcc and gfortran commands are not found, which is weird since in
*install-spec2017.sh* there is a command for installing them. In the
terminal, I can clearly see that it is executed.

qemu: build-essential is already the newest version (12.4ubuntu1).
> qemu: gfortran is already the newest version (4:7.4.0-1ubuntu2.3).
> qemu: 0 upgraded, 0 newly installed, 0 to remove and 176 not upgraded.
>

But when it's time to build spec benchmarks they fail.

specmake: /opt/rh/devtoolset-9/root/usr/bin/gfortran: Command not found
>

Thanks

On Thu, 20 May 2021 at 21:01, Liyichao via gem5-users 
wrote:

> Hi Hoa:
> Is the spec-2017 img just for X86?
>
>  Does it support for AARCH64?Does it support for running with KVM+O3?
>
>
> -邮件原件-
> 发件人: Hoa Nguyen via gem5-users [mailto:gem5-users@gem5.org]
> 发送时间: 2021年5月19日 19:09
> 收件人: gem5 users mailing list 
> 抄送: Hoa Nguyen 
> 主题: [gem5-users] Re: SPEC2017 in FS mode
>
> Hi Victor,
>
> I'm not sure what caused the errors of building the spec benchmarks.
>
> Also, I'm not sure how to prevent the vm from being closed after the
> builds fail. However, there are a few steps can be done to exterminate the
> disk image after the builds fail:
> - In the file src/spec-2017/disk-image/spec-2017/install-spec2017.sh,
> the last line "rm -f /home/gem5/spec2017/result/*" should be removed to
> keep the log generated by spec during benchmark compilation time.
> - When running packer, you can run "./packer build -on-error=abort
> spec-2017/spec-2017.json" to keep the disk image if the disk image building
> process fails.
> - After that, you can mount the disk image and check the log file
> generated by spec.
>
> packer fails due to "output directory already exists". In this case,
> you'll need to remove the "spec-2017/spec-2017-image" folder before
> starting packer again.
>
> Regards,
> Hoa Nguyen
>
> On 5/17/21, Victor Kariofillis via gem5-users  wrote:
> > Hi,
> >
> > I've tried running the SPEC2017 benchmarks in FS mode of gem5 using
> > the instructions/files provided by the gem5 resources page.
> >
> > https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stabl
> > e/src/spec-2017
> >
> > I've also followed the step by step instructions in the git repo for
> > gem5-art.
> >
> > https://github.com/darchr/gem5art-experiments/blob/master/README.md
> >
> > Everything works as intended until the benchmarks are supposed to be
> built.
> > All of them fail with one of the two following errors:
> >
> > 1) Error with make!
> > 2) Error with fdo_make_pass1!
> >
> > First of all, why is this happening? Secondly, the vm closes after the
> > builds fail. I don't have the opportunity to check the make.out files
> > that have more information about the errors. Is there a way to prevent
> > the connection from closing or reopening it again? Running it again
> > with packer fails due to the directory existing already.
> >
> > I'd appreciate any help,
> > Victor
> >
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[gem5-users] Re: SPEC2017 in FS mode

[Victor Kariofillis via gem5-users]

Hi Hoa,

I tried the changes you proposed. After running the packer build command,
the only thing that's in the spec-2017-image directory is a binary file.
Shouldn't the disk image be a .img file or something like that? How can I
look into the file system of the vm and check the build logs?

I tried converting the binary file to an .iso and mounting that, but I'm
seeing the exact same files as if I'm mounting the SPEC2017 iso.

Thanks

On Wed, 19 May 2021 at 07:09, Hoa Nguyen via gem5-users 
wrote:

> Hi Victor,
>
> I'm not sure what caused the errors of building the spec benchmarks.
>
> Also, I'm not sure how to prevent the vm from being closed after the
> builds fail. However, there are a few steps can be done to exterminate
> the disk image after the builds fail:
> - In the file src/spec-2017/disk-image/spec-2017/install-spec2017.sh,
> the last line "rm -f /home/gem5/spec2017/result/*" should be removed
> to keep the log generated by spec during benchmark compilation time.
> - When running packer, you can run "./packer build -on-error=abort
> spec-2017/spec-2017.json" to keep the disk image if the disk image
> building process fails.
> - After that, you can mount the disk image and check the log file
> generated by spec.
>
> packer fails due to "output directory already exists". In this case,
> you'll need to remove the "spec-2017/spec-2017-image" folder before
> starting packer again.
>
> Regards,
> Hoa Nguyen
>
> On 5/17/21, Victor Kariofillis via gem5-users  wrote:
> > Hi,
> >
> > I've tried running the SPEC2017 benchmarks in FS mode of gem5 using the
> > instructions/files provided by the gem5 resources page.
> >
> >
> https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/spec-2017
> >
> > I've also followed the step by step instructions in the git repo for
> > gem5-art.
> >
> > https://github.com/darchr/gem5art-experiments/blob/master/README.md
> >
> > Everything works as intended until the benchmarks are supposed to be
> built.
> > All of them fail with one of the two following errors:
> >
> > 1) Error with make!
> > 2) Error with fdo_make_pass1!
> >
> > First of all, why is this happening? Secondly, the vm closes after the
> > builds fail. I don't have the opportunity to check the make.out files
> that
> > have more information about the errors. Is there a way to prevent the
> > connection from closing or reopening it again? Running it again with
> packer
> > fails due to the directory existing already.
> >
> > I'd appreciate any help,
> > Victor
> >
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[gem5-users] SPEC2017 in FS mode

[Victor Kariofillis via gem5-users]

Hi,

I've tried running the SPEC2017 benchmarks in FS mode of gem5 using the
instructions/files provided by the gem5 resources page.

https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/spec-2017

I've also followed the step by step instructions in the git repo for
gem5-art.

https://github.com/darchr/gem5art-experiments/blob/master/README.md

Everything works as intended until the benchmarks are supposed to be built.
All of them fail with one of the two following errors:

1) Error with make!
2) Error with fdo_make_pass1!

First of all, why is this happening? Secondly, the vm closes after the
builds fail. I don't have the opportunity to check the make.out files that
have more information about the errors. Is there a way to prevent the
connection from closing or reopening it again? Running it again with packer
fails due to the directory existing already.

I'd appreciate any help,
Victor
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[gem5-users] Re: Accessing cache stats during execution

[Victor Kariofillis via gem5-users]

Hi Abhishek,

First of all thanks for your answer.  I've tried looking at what you
suggested, namely the communication between the cpu and the lsq. I'm not
sure if it's the same with the cache. I should mention that the phase
predictor I'm trying to simulate is more like how a branch predictor is
implemented in gem5 rather than an LSQ (i.e., separate directory in
cpu/pred).

Isn't the communication between cpu and cache (L1 caches) done through the
mem icache and dcache ports? Packets are sent through the ports and then
arrive at the cache. I'm not sure how to directly access the cache stats.
For example, in the cache you can directly access the prefetcher object
since it's passed in the parameters. I don't see anything similar for the
L1 cache in the cpu files. Also, what would be done with the L2 (and/or
L3)? Lower level caches belong to the system, not the cpu. I'm assuming
that the communication should be done through the system. Is there any
place where stats are gathered (before program end) that all of them can be
accessed or is going through the cache the only way?

Thanks.

On Fri, 26 Jun 2020 at 16:48, Abhishek Singh via gem5-users <
gem5-users@gem5.org> wrote:

> Hi,
>
> For now the standard stats file from gem5 using classic cache model does
> not have MPKI.
>
> So you need to declare the stats and you can access the declared stats in
> cpu, see the how cpu calls LSQ (or cache) objects and using that you can
> access the MPKI stat from CPU
>
> On Fri, Jun 26, 2020 at 4:20 PM Victor Kariofillis via gem5-users <
> gem5-users@gem5.org> wrote:
>
>> Hi,
>>
>> Building on top of my previous question and making it a bit more general.
>> Is there a way to access stats in a somewhat global manner? Let me explain
>> that with an example. During program execution, I need to know the number
>> of instructions committed and the MPKIs for L1 and L2. On every commit of
>> an instruction, I want to check the cache miss rates and see if and how
>> they changed. (All of these done from a module in the src/cpu directory.)
>> Do I have to connect the cpu and cache objects to my predictor via the
>> Python files? Or are the stats saved somewhere so that they are globally
>> accessible?
>>
>> Thanks,
>> Victor
>>
>> On Thu, 18 Jun 2020 at 17:38, Victor Kariofillis <
>> vickariofil...@gmail.com> wrote:
>>
>>> Hi,
>>>
>>> I want to run some tests for phase predictors using cache stats (e.g.,
>>> L1 and L2 MPKIs). I need access to those stats during program execution, in
>>> order to both keep a log of these and make predictions based on them. What
>>> is the best way to access them? Would this be done through the cache.cc and
>>> cache.hh files?
>>>
>>> Also, since the phase predictor would be using cache stats is it best
>>> for it to be implemented in the src/mem/cache directory?
>>>
>>> Thanks,
>>> Victor
>>>
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[gem5-users] Re: Accessing cache stats during execution

[Victor Kariofillis via gem5-users]

Hi,

Building on top of my previous question and making it a bit more general.
Is there a way to access stats in a somewhat global manner? Let me explain
that with an example. During program execution, I need to know the number
of instructions committed and the MPKIs for L1 and L2. On every commit of
an instruction, I want to check the cache miss rates and see if and how
they changed. (All of these done from a module in the src/cpu directory.)
Do I have to connect the cpu and cache objects to my predictor via the
Python files? Or are the stats saved somewhere so that they are globally
accessible?

Thanks,
Victor

On Thu, 18 Jun 2020 at 17:38, Victor Kariofillis 
wrote:

> Hi,
>
> I want to run some tests for phase predictors using cache stats (e.g., L1
> and L2 MPKIs). I need access to those stats during program execution, in
> order to both keep a log of these and make predictions based on them. What
> is the best way to access them? Would this be done through the cache.cc and
> cache.hh files?
>
> Also, since the phase predictor would be using cache stats is it best for
> it to be implemented in the src/mem/cache directory?
>
> Thanks,
> Victor
>
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[gem5-users] Accessing cache stats during execution

[Victor Kariofillis via gem5-users]

Hi,

I want to run some tests for phase predictors using cache stats (e.g., L1
and L2 MPKIs). I need access to those stats during program execution, in
order to both keep a log of these and make predictions based on them. What
is the best way to access them? Would this be done through the cache.cc and
cache.hh files?

Also, since the phase predictor would be using cache stats is it best for
it to be implemented in the src/mem/cache directory?

Thanks,
Victor
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Re: [gem5-users] Computing stat of type Value

[Victor Kariofillis]

 Hi Daniel,

Thanks for your answer. Unfortunately, I don't want to only do that. At the
end of the execution, I take the *n* most frequently appearing cache lines
and check the similarity (based on a hash value) of the entirety of the
cache lines vector to them. This can only be done at the end. Theoretically
I could do it while the program is executing, but it seems like a huge
waste of computational time.

Thanks.
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[gem5-users] Computing stat of type Value

[Victor Kariofillis]

Hi,

I have created a stat of type Value called zeroBytesPercentage. It is the
percentage of zero bytes of all the lines that are written in the LLC. I
want it to get a value from a function (calcZeroBytesPercentage), so I'm
using functor.

zeroBytesPercentage
.functor(calcZeroBytesPercentage)
.flags(total)
.precision(3)
;

Throughout the program execution I'm populating a vector called totalLines,
which I've declared as public in BaseCache. This vector stores all the
cache lines that are written to the LLC during the execution of the program.

My problem is that the function is not static and that it uses non-static
variables (the totalLines vector). I've tried having the function as a
member of either BaseCache or BaseCache::CacheStats, but either way I'm
getting errors about the use of non-static data members.

How can I do this calculation at the end of the execution and be able to
access variables that are non-static?
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Re: [gem5-users] Stat of type Formula getting value from function

[Victor Kariofillis]

No, it should only be calculated at the end.

>
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[gem5-users] Stat of type Formula getting value from function

[Victor Kariofillis]

Hi,

I have created a Stat of type Formula. Since the formula is complicated,
instead of having it in the regStats file, I want to call another function
that returns the proper value. The code would be something like this.

zeroPercentage.flags(total);
zeroPercentage = calcZeroPercentage();

The calcZeroPercentage is a typical function in the file. The numbers that
I'm crunching to get the value that I want are not stats. Would something
like this be possible? In the gem5 documentation statistics page, it states
that if the variables are not stats they should be qualified with constant.

"If bar or num are regular variables, then they must be qualified with
constant(bar)."

Is this true for this case as well?
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Re: [gem5-users] Printing stats in ROI

[Victor Kariofillis]

I have figured out how to it. I added a boolean named roi in the system.hh
header file, right after the totalNumInsts variable. This is now available
in src/mem/cache/base.cc, so I can print the cache data only in the region
of interest of the benchmarks.

I'm also interested in changing the output directory of the file. I would
like to use that directory path that is given as a command line argument
with the --d option. After looking into the python files, I see that this
option is in the main.py file. I would like to copy this option to
CacheConfig.py, so that I can pass it to base.cc. In se.py there is this
line: "CacheConfig.config_cache(options, system)". Do I pass the options
from main.py as another argument? Is there any other better or easier way
to do this?

I would appreciate any help.

Thanks,
Victor



On Thu, 24 Oct 2019 at 17:51, Victor Kariofillis 
wrote:

> Hi Prathap,
>
> I have already implemented pseudo instructions for the ROI. The code is
> the following:
>
> //
> // Mark beginning of ROI in simulated programs
> //
> void
> roibegin(ThreadContext *tc)
> {
> DPRINTF(PseudoInst, "PseudoInst::roibegin()\n");
> resetstats(tc, 0, 0);
> }
> //
> // Mark end of ROI in simulated programs
> //
> void roiend(ThreadContext *tc)
> {
> dumpresetstats(tc, 0, 0);
> exitSimLoop("roiend");
> }
>
> As I've said I would like to have a global variable that I can change in
> these functions and have it be available in src/mem/cache/base.cc. I'm not
> sure I understand the second part of your answer.
>
> Cheers,
> Victor
>
>
> On Thu, 24 Oct 2019 at 00:58, Prathap Kolakkampadath 
> wrote:
>
>> Why don't you use existing m5_ pseudo instructions around ROI of the
>> benchmark. Note to compile your benchmark with the m5 library.
>>
>> If you are looking for more data, you may also add them in respective
>> mem/cache file and compile the gem.
>>
>> Regards,
>> Prathap
>>
>> On Wed, Oct 23, 2019 at 4:41 PM Victor Kariofillis <
>> vickariofil...@gmail.com> wrote:
>>
>>> Hi,
>>>
>>> I have implemented pseudo instructions for recognizing the Region of
>>> Interest of the benchmarks that I am running. What I want to do is to start
>>> printing some information (cache data) to a file as soon as the ROI begins.
>>> This printing will be done through the base.cc file in mem/cache. I tried
>>> having a boolean "roi" variable in system.hh, so that it will globally
>>> available, but I'm getting compiler errors of multiple definitions. How can
>>> I have knowledge of whether the execution of the program is in the ROI in
>>> the base.cc file?
>>>
>>> I have another question also. Is it possible to delay this printing
>>> until the ROI ends? The problem I have with that is that when the "roiend"
>>> pseudo instruction is encountered, I dump the stats and exit the
>>> simulation. Is it possible to print these data from base.cc just as it is
>>> done with regstats before exiting the simulation?
>>>
>>> Thanks,
>>> Victor
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Re: [gem5-users] Printing stats in ROI

[Victor Kariofillis]

Hi Prathap,

I have already implemented pseudo instructions for the ROI. The code is the
following:

//
// Mark beginning of ROI in simulated programs
//
void
roibegin(ThreadContext *tc)
{
DPRINTF(PseudoInst, "PseudoInst::roibegin()\n");
resetstats(tc, 0, 0);
}
//
// Mark end of ROI in simulated programs
//
void roiend(ThreadContext *tc)
{
dumpresetstats(tc, 0, 0);
exitSimLoop("roiend");
}

As I've said I would like to have a global variable that I can change in
these functions and have it be available in src/mem/cache/base.cc. I'm not
sure I understand the second part of your answer.

Cheers,
Victor


On Thu, 24 Oct 2019 at 00:58, Prathap Kolakkampadath 
wrote:

> Why don't you use existing m5_ pseudo instructions around ROI of the
> benchmark. Note to compile your benchmark with the m5 library.
>
> If you are looking for more data, you may also add them in respective
> mem/cache file and compile the gem.
>
> Regards,
> Prathap
>
> On Wed, Oct 23, 2019 at 4:41 PM Victor Kariofillis <
> vickariofil...@gmail.com> wrote:
>
>> Hi,
>>
>> I have implemented pseudo instructions for recognizing the Region of
>> Interest of the benchmarks that I am running. What I want to do is to start
>> printing some information (cache data) to a file as soon as the ROI begins.
>> This printing will be done through the base.cc file in mem/cache. I tried
>> having a boolean "roi" variable in system.hh, so that it will globally
>> available, but I'm getting compiler errors of multiple definitions. How can
>> I have knowledge of whether the execution of the program is in the ROI in
>> the base.cc file?
>>
>> I have another question also. Is it possible to delay this printing until
>> the ROI ends? The problem I have with that is that when the "roiend" pseudo
>> instruction is encountered, I dump the stats and exit the simulation. Is it
>> possible to print these data from base.cc just as it is done with regstats
>> before exiting the simulation?
>>
>> Thanks,
>> Victor
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[gem5-users] Printing stats in ROI

[Victor Kariofillis]

Hi,

I have implemented pseudo instructions for recognizing the Region of
Interest of the benchmarks that I am running. What I want to do is to start
printing some information (cache data) to a file as soon as the ROI begins.
This printing will be done through the base.cc file in mem/cache. I tried
having a boolean "roi" variable in system.hh, so that it will globally
available, but I'm getting compiler errors of multiple definitions. How can
I have knowledge of whether the execution of the program is in the ROI in
the base.cc file?

I have another question also. Is it possible to delay this printing until
the ROI ends? The problem I have with that is that when the "roiend" pseudo
instruction is encountered, I dump the stats and exit the simulation. Is it
possible to print these data from base.cc just as it is done with regstats
before exiting the simulation?

Thanks,
Victor
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Re: [gem5-users] Adding latencies in cache accesses

[Victor Kariofillis]

Hi everyone,

I have one more question for the setWhenReady() function. I see that when
it's called it is like that:

blk->setWhenReady(clockEdge(fillLatency) + pkt->headerDelay +
std::max(cyclesToTicks(tag_latency),
(uint64_t)pkt->payloadDelay));

I am trying to understand the different components that comprise the total
time after which the block will be ready to be accessed. If my
implementation means that there is stuff going on before the data is
actually written, does that mean that it directly added the above formula?
What is the significance of this part of the formula:

std::max(cyclesToTicks(tag_latency), (uint64_t)pkt->payloadDelay)

Thanks,
Victor
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Re: [gem5-users] Adding latencies in cache accesses

[Victor Kariofillis]

Hi Daniel,

First of all thanks for answering. I have some more questions. In my case,
latencies are added every time data is written to the cache. So for
example, theoretically latency should be added in handleFill() as well. I
see that handleFill() doesn't have any latency computation in it. It is
also absent from recvTimingResp() that calls it. Is this because it is off
the critical path?

Also, it there any way to multiply a Cycles type variable? What I want to
do is indicate that a because some things happen serially, a particular
latency happens n times.

Thanks,
Victor

On Sun, 13 Oct 2019 at 22:40, Victor Kariofillis 
wrote:

> Hi,
>
> I am interested in adding additional latencies during a cache access. I
> have implemented some extra functionality that happens in the cache and I
> am wondering about how to model the extra time it will take for that to
> happen.
>
> Where would I add the extra latency? For example, inside the access()
> function there is this line of code:
>
> // Calculate access latency on top of when the packet arrives. This
> // takes into account the bus delay.
> lat = calculateTagOnlyLatency(pkt->headerDelay, tag_latency);
>
> Right below that, there is a "return false;" line. How is that latency
> being used? Also, how can I make sure whether the execution stalls until
> something else has finished or things that can happen concurrently?
>
> Thank you,
> Victor
>
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[gem5-users] Adding latencies in cache accesses

[Victor Kariofillis]

Hi,

I am interested in adding additional latencies during a cache access. I
have implemented some extra functionality that happens in the cache and I
am wondering about how to model the extra time it will take for that to
happen.

Where would I add the extra latency? For example, inside the access()
function there is this line of code:

// Calculate access latency on top of when the packet arrives. This
// takes into account the bus delay.
lat = calculateTagOnlyLatency(pkt->headerDelay, tag_latency);

Right below that, there is a "return false;" line. How is that latency
being used? Also, how can I make sure whether the execution stalls until
something else has finished or things that can happen concurrently?

Thank you,
Victor
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Re: [gem5-users] Multiple cache line evictions issue

[Victor Kariofillis]

I tried using compression, but I'm getting a segmentation fault error. This
happens regardless to whether I use an AtomicSimpleCPU and atomic mem mode
or TimingSimpleCPU and timing mem mode. The error is the same and occurs
after a WritebackDirty miss to the LLC.

I use the following command to run gem5 in debug mode:
run --debug-flags=Cache,CacheTags,CacheComp configs/example/se.py -c
/home/vic/Documents/tests/simple_array --cpu-type TimingSimpleCPU -n 1
--caches --l1d_size 128B --l1i_size 128B --l2cache --num-l2caches 1
--l2_size 512B --compression --compressor BDI

The error is the following:
Program received signal SIGSEGV, Segmentation fault.
0x01030f92 in __gnu_cxx::__atomic_add (__mem=0x9, __val=1)
at /usr/include/c++/5/ext/atomicity.h:53
53  { __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); }

If I merge the changes from "Remove writebacks packet list" and don't use
Atomic mode, would that fix the problem?

Thanks

On Wed, 24 Jul 2019 at 16:23, Victor Kariofillis 
wrote:

> Hi,
>
> I am interested in using the cache compression schemes that gem5 has
> (mainly BDI). I was going through the commits and I saw one named "Remove
> writebacks packet list", that was later reverted because it introduced a
> bug in atomic mode. Using a compression scheme will probably result in
> multiple evictions in the case of a writeback. Does this mean that I
> shouldn't use atomic mode along with compressed_tags (i.e. compression) as
> the reverted commit suggests? Is it fine if compression is used in timing
> mode?
>
> Thank you,
> Victor
>
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[gem5-users] Multiple cache line evictions issue

[Victor Kariofillis]

Hi,

I am interested in using the cache compression schemes that gem5 has
(mainly BDI). I was going through the commits and I saw one named "Remove
writebacks packet list", that was later reverted because it introduced a
bug in atomic mode. Using a compression scheme will probably result in
multiple evictions in the case of a writeback. Does this mean that I
shouldn't use atomic mode along with compressed_tags (i.e. compression) as
the reverted commit suggests? Is it fine if compression is used in timing
mode?

Thank you,
Victor
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Re: [gem5-users] Instrumenting ROI in Syscall emulation mode

[Victor Kariofillis]

I found the solution. Besides dropping the flag when compiling the
microbenchmark as you said, I removed the same flag from the Makefile.x86
and recompiled. Also in the microbenchmark, I removed the incude of
m5_mmap.h and calling map_m5_mem() in main. Thanks Jason for the
suggestion.

On Thu, 13 Jun 2019 at 13:52, Victor Kariofillis 
wrote:

> Hi Jason,
>
> Sadly removing that flag didn't make a difference. I'm still getting an
> mmap warning (when running it with sudo). I also tried removing the flag
> (-DM5OP_ADDR=0x) from util/m5/Makefile.x86, but it made no
> difference. I'm gonna post my changes in case someone is interested.
>
> This is the microbenchmark.
> https://filebin.net/cb5jsu1fakpdo163/gem5_array.pdf?t=d6gmvy5e
>
> This are the instructions I'm following (heavily based on the blogpost)
> https://filebin.net/cb5jsu1fakpdo163/instructions.pdf?t=d6gmvy5e
>
> And finally these are the changes (diff) that I made in gem5 for
> implementing the pseudo instructions. (I know the pseudo instructions don't
> do anything currently. I'm just trying to get them to work before
> implementing any functionality.)
> https://filebin.net/cb5jsu1fakpdo163/diff.pdf?t=d6gmvy5e
>
> Thanks.
>
> On Thu, 13 Jun 2019 at 11:40, Jason Lowe-Power 
> wrote:
>
>> Hi Victor,
>>
>> Drop the -DM5OP_ADDR define when you're compiling. That will force the
>> m5ops to use the pseudo instruction implementation instead of the MMIO
>> implementation. MMIO is required when using KVM, but no other time.
>>
>> Cheers,
>> Jason
>>
>> On Wed, Jun 12, 2019 at 2:38 PM Victor Kariofillis <
>> vickariofil...@gmail.com> wrote:
>>
>>> Hi Andrea,
>>>
>>> I can't get my microbenchmark to run with gem5. If I execute it without
>>> sudo, I get a "Can't open /dev/mem: Permission denied". If I execute it
>>> with sudo on its own, it seems to finish fine. But when I want to execute
>>> it with gem5, I get a segfault.
>>>
>>> "warn: mmap: writing to shared mmap region is currently unsupported. The
>>> write succeeds on the target, but it will not be propagated to the host or
>>> shared mappings
>>> warn: mmap: failed to map file into host address space
>>> panic: Tried to read unmapped address 0x55ff.
>>> PC: 0x400879, Instr:   MOV_R_M : ld   rax, DS:[rax + r11]
>>> Memory Usage: 678516 KBytes
>>> Program aborted at tick 86427000"
>>>
>>> I built my microbenchmark like this:
>>>
>>> 1) gcc -O2 -DM5OP_ADDR=0x -Ipath/to/gem5/include -c
>>> gem5_array.cpp -o gem5_array.o
>>> 2) gcc gem5_array.o -o gem5_array path/to/gem5/util/m5/m5op_x86.o
>>> path/to/gem5/util/m5/m5_mmap.o
>>>
>>> I don't only want to get the stats for the ROI in the stats file. I'm
>>> using some debug flags, so in the output of gem5, I want to see only the
>>> printouts from inside the ROI. I'm not sure I would achieve that.
>>>
>>> Thanks,
>>> Victor
>>> ___
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Re: [gem5-users] Instrumenting ROI in Syscall emulation mode

[Victor Kariofillis]

Hi Jason,

Sadly removing that flag didn't make a difference. I'm still getting an
mmap warning (when running it with sudo). I also tried removing the flag
(-DM5OP_ADDR=0x) from util/m5/Makefile.x86, but it made no
difference. I'm gonna post my changes in case someone is interested.

This is the microbenchmark.
https://filebin.net/cb5jsu1fakpdo163/gem5_array.pdf?t=d6gmvy5e

This are the instructions I'm following (heavily based on the blogpost)
https://filebin.net/cb5jsu1fakpdo163/instructions.pdf?t=d6gmvy5e

And finally these are the changes (diff) that I made in gem5 for
implementing the pseudo instructions. (I know the pseudo instructions don't
do anything currently. I'm just trying to get them to work before
implementing any functionality.)
https://filebin.net/cb5jsu1fakpdo163/diff.pdf?t=d6gmvy5e

Thanks.

On Thu, 13 Jun 2019 at 11:40, Jason Lowe-Power  wrote:

> Hi Victor,
>
> Drop the -DM5OP_ADDR define when you're compiling. That will force the
> m5ops to use the pseudo instruction implementation instead of the MMIO
> implementation. MMIO is required when using KVM, but no other time.
>
> Cheers,
> Jason
>
> On Wed, Jun 12, 2019 at 2:38 PM Victor Kariofillis <
> vickariofil...@gmail.com> wrote:
>
>> Hi Andrea,
>>
>> I can't get my microbenchmark to run with gem5. If I execute it without
>> sudo, I get a "Can't open /dev/mem: Permission denied". If I execute it
>> with sudo on its own, it seems to finish fine. But when I want to execute
>> it with gem5, I get a segfault.
>>
>> "warn: mmap: writing to shared mmap region is currently unsupported. The
>> write succeeds on the target, but it will not be propagated to the host or
>> shared mappings
>> warn: mmap: failed to map file into host address space
>> panic: Tried to read unmapped address 0x55ff.
>> PC: 0x400879, Instr:   MOV_R_M : ld   rax, DS:[rax + r11]
>> Memory Usage: 678516 KBytes
>> Program aborted at tick 86427000"
>>
>> I built my microbenchmark like this:
>>
>> 1) gcc -O2 -DM5OP_ADDR=0x -Ipath/to/gem5/include -c
>> gem5_array.cpp -o gem5_array.o
>> 2) gcc gem5_array.o -o gem5_array path/to/gem5/util/m5/m5op_x86.o
>> path/to/gem5/util/m5/m5_mmap.o
>>
>> I don't only want to get the stats for the ROI in the stats file. I'm
>> using some debug flags, so in the output of gem5, I want to see only the
>> printouts from inside the ROI. I'm not sure I would achieve that.
>>
>> Thanks,
>> Victor
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Re: [gem5-users] Instrumenting ROI in Syscall emulation mode

[Victor Kariofillis]

Hi Andrea,

I can't get my microbenchmark to run with gem5. If I execute it without
sudo, I get a "Can't open /dev/mem: Permission denied". If I execute it
with sudo on its own, it seems to finish fine. But when I want to execute
it with gem5, I get a segfault.

"warn: mmap: writing to shared mmap region is currently unsupported. The
write succeeds on the target, but it will not be propagated to the host or
shared mappings
warn: mmap: failed to map file into host address space
panic: Tried to read unmapped address 0x55ff.
PC: 0x400879, Instr:   MOV_R_M : ld   rax, DS:[rax + r11]
Memory Usage: 678516 KBytes
Program aborted at tick 86427000"

I built my microbenchmark like this:

1) gcc -O2 -DM5OP_ADDR=0x -Ipath/to/gem5/include -c gem5_array.cpp
-o gem5_array.o
2) gcc gem5_array.o -o gem5_array path/to/gem5/util/m5/m5op_x86.o
path/to/gem5/util/m5/m5_mmap.o

I don't only want to get the stats for the ROI in the stats file. I'm using
some debug flags, so in the output of gem5, I want to see only the
printouts from inside the ROI. I'm not sure I would achieve that.

Thanks,
Victor
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[gem5-users] Instrumenting ROI in Syscall emulation mode

[Victor Kariofillis]

Hi,

I have already implemented pseudo instructions for full system mode based
on this

tutorial. It is time consuming though to test everything after I make even
a small change. Is there any way to implement the same functionality for
syscall mode?

Thank you,
Victor
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