Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

Hello Patrick, here is a short way to convert a FSM encoding to a binary representation for an FPGA internal logic analyzer: Thanks for the suggestion, it seems to me less error prone than using select with. You can go even a step further and convert every enum member name into a string and

Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

tik Lehrstuhl VLSI-Entwurfssysteme, Diagnostik und Architektur 01062 Dresden -Original Message- From: Ghdl-discuss [mailto:ghdl-discuss-boun...@gna.org] On Behalf Of Jonas Baggett Sent: Thursday, July 28, 2016 8:35 PM To: GHDL discuss list <ghdl-discuss@gna.org> Subject: Re: [Ghdl-discuss]

Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

nf.tu-dresden.de -Original Message- From: Ghdl-discuss [mailto:ghdl-discuss-boun...@gna.org] On Behalf Of Jonas Baggett Sent: Wednesday, July 27, 2016 9:43 PM To: ghdl-discuss@gna.org Subject: Re: [Ghdl-discuss] Better way for integer handling in VHDL ? Hello Patrick, > you can define

Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

> On 28 Jul 2016, at 2:08 am, Patrick Lehmann > wrote: > > Hmmm 9.5 > > I must have missed the point that universal_expressions are also bound by > "normal" integers/implementation restrictions It's common believe me. > But how does it relate to some

Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

And it could be also nice to be able to define our own fixed/floating point types. Ok there is now the new IEEE package that create a fixed and a floating point type, but it isn't real fixed/floating point types but, as it is for IEEE signed/unsigned, they are representing array of characters

Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

Hello Patrick, you can define own integers in VHDL: type myint is range -12 to 32234324; Ok. When I am doing testbench code, I use integer types as much as possible. But for synthetizable code, I am not used to use integer signals, but to use signed/unsigned from numeric_std. That's the way

Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

> On 27 Jul 2016, at 7:29 pm, Patrick Lehmann > wrote: > > The languages doesn't forbid large integers, but must tools are restricted > in handling such large literals/signals/variables. You could create your own > "64 bit" integer: It's safer to say that the

Re: [Ghdl-discuss] Better way for integer handling in VHDL ?

16 8:42 PM To: ghdl-discuss@gna.org Subject: [Ghdl-discuss] Better way for integer handling in VHDL ? Hello, I always had the impression that there must be a better way to handle numbers than using strings array as numbers as numeric_std does and creating all the functions needed to do arithmet

[Ghdl-discuss] Better way for integer handling in VHDL ?

Hello, I always had the impression that there must be a better way to handle numbers than using strings array as numbers as numeric_std does and creating all the functions needed to do arithmetic on them. I don't know why the IEEE comity didn't instead decide to allow us to give