Re: VSAM Performance - CPU reduction

Just to be clear. The similar behavior i am referring to is the strobe report listing QSAM INIT I/O & EXITS and PARTITION COMMUNICATION as the top CPU contributors. -- For IBM-MAIN subscribe / signoff / archive access

Re: VSAM Performance - CPU reduction

Apologies. I missed to mention that depending on a record that matches in the 2nd file, there are some random reads that refer back to a previous record as per the business logic. Hence, the second file has to be VSAM. We also see a similar behavior with few other programs that do skip

Re: VSAM Performance - CPU reduction

Classic two file match. Sort the two and produce the report. Not a good use of VSAM... On Sat, Jan 6, 2018 at 2:15 PM, Gerhard Adam wrote: > Seems a bit round-about. > > Why not REPRO them to a sequential file, sort by key, and then produce > your output. > > > > Sent from

Re: Accessing 65536 devices

On 1/5/2018 12:06 PM, John Eells wrote: Ward, Mike S wrote: Innovation has a product called FDRPAS that can be rented that does the copies while the system is up and running. We have used it several times and it works great. I have no experience with FDRPAS or its IBM counterparts (like

Re: VSAM Performance - CPU reduction

Seems a bit round-about. Why not REPRO them to a sequential file, sort by key, and then produce your output. Sent from my iPhone > On Jan 5, 2018, at 4:20 PM, Arun Venkatratnam > wrote: > > Hi All, > > We are looking to improve the performance of a COBOL

Re: VSAM Performance - CPU reduction

Arun, Strobe gives you a lot more information than this little tidbit. I cannot answer your specific questions, but you mention that the 2nd dataset is skip sequential. Is there some chance that someone has set this up to be accessed as LSR with SMS or Batch/LSR? If you can estimate the

Re: Accessing 65536 devices

FDRMOVE anyone. -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Jesse 1 Robinson Sent: Friday, January 5, 2018 2:28 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: [IBM-MAIN] Accessing 65536 devices We have device count reduction on

Re: catalog doubt

Kirk, Auribus teneo lupum. Sharing SMS managed outside of SMS is on the cardinal sins of SMS. It is more than just aid to allocation, but also an enabler of function. If your LPAR doesn't read the NVR, then your open is dead in the water, right? Ron -Original Message- From: IBM

Re: VSAM Performance - CPU reduction

Hello - You might be seeing issues with physical dasd retrieval of the data. But that is just a guess. Have you looked at adding STRNO on the VSAM definition or using RLS to provide the records to be instorage? In your JCL for the job, have you coded BUFND, or BUFNI or BUFSP? Could you

VSAM Performance - CPU reduction

Hi All, We are looking to improve the performance of a COBOL program that processes 2 VSAM files. The first file is the I/P file and every record read from the input VSAM file is searched for a matching record in the other file and a report is written. The program also applies some business

Re: Accessing 65536 devices

On 1/5/2018 2:27 PM, Jesse 1 Robinson wrote: We have device count reduction on our wish list. Unfortunately we know of no way to accomplish that without taking (multiple) application outages to consolidate data on fewer larger volumes. High impact and high risk with the benefit going mainly

Re: Accessing 65536 devices

We have device count reduction on our wish list. Unfortunately we know of no way to accomplish that without taking (multiple) application outages to consolidate data on fewer larger volumes. High impact and high risk with the benefit going mainly to infrastructure care-and-feeders. Our stated

Re: SRST Question

DOH! Thanks for clarifying that. I'm obviously a little out of practice with my assembler. Regards and happy Friday to all. -- Donald Grinsell, Systems Programmer Enterprise Technology Services Bureau SITSD/Montana Department of Administration 406.444.2983 (D) "This is a war of the

Re: Accessing 65536 devices

On 1/5/2018 3:52 AM, John Eells wrote: Jesse 1 Robinson wrote: We would like to be able to access >65535 device addresses (UCBs) from a single LPAR via a single IODF. The need is for bringing a new DASD subsystem online while retaining the old subsystem until all volumes can be copied across.

Re: SRST Question

He was confusing MASK value with Condition Code. Chris Blaicher Technical Architect Mainframe Development P: 201-930-8234 | M: 512-627-3803 E: cblaic...@syncsort.com Syncsort Incorporated 2 Blue Hill Plaza #1563 Pearl River, NY 10965 www.syncsort.com Data quality leader Trillium Software is

Re: catalog doubt

What is a catalog?. It's a list of files and where they can be found. What is SMS management? It's basically an aid to allocation. Simple right? NO We're IBM and nothing is allowed to be that simple. On Tue, Jan 2, 2018 at 11:13 AM, Kirk Wolf wrote: > On Mon, Jan 1, 2018 at

Re: SRST Question

Without looking at the PoOp, doesn't CC=1 indicate that the search has failed so far, but that more length remains in the register pair, so you should branch back and keep trying? A number of instructions are interruptible and work that way. Charles -Original Message- From: IBM

Re: SRST Question

On 5 January 2018 at 16:11, Grinsell, Don wrote: > Has anybody played with the SRST instruction? Yes - I use it all the time. > I am confused by the examples in the PoP. Why do they branch back to the > SRST instruction when the string is found, e.g. BC 1,LOOP1? Shouldn't

Re: Accessing 65536 devices

Ain't they gots no eMail? In a message dated 1/5/2018 2:07:03 PM Central Standard Time, ee...@us.ibm.com writes:   there was no required outage, is another question I'd need those same people for...the ones that aren't around today, I mean.

Re: Accessing 65536 devices

UCBs are not devices. There is no way for a single z/OS system to access more than 64Ki minus 256 devices, although you can add additional exposures to existing devices. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe

SRST Question

Has anybody played with the SRST instruction? I am confused by the examples in the PoP. Why do they branch back to the SRST instruction when the string is found, e.g. BC 1,LOOP1? Shouldn't the branch be to the FOUND label, e.g. BC 1,FOUND? L 5,STRAADR L 4,STRALEN AR 4,5

Re: Intel Chip flaw

No, but expect other issues, since you're talking about new architectures that haven't yet been vetted. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe Discussion List on behalf of Paul Gilmartin

Re: Accessing 65536 devices

Ward, Mike S wrote: Innovation has a product called FDRPAS that can be rented that does the copies while the system is up and running. We have used it several times and it works great. I have no experience with FDRPAS or its IBM counterparts (like TDMF, if I recall correctly). However,

Re: JZOS on open systems question

He "suggested" you should be concerned if you stole it. No need to go off imagining nefarious secret machinations. sas On Fri, Jan 5, 2018 at 1:09 PM, Tony Harminc wrote: > I'm not sure what you mean by "physical or information-based". Are you > contrasting hardware with

Re: From the Shark Tank - Law & Order: IT Victims Unit

Yep. Reminds me of the last time HR was going to hold a Pre-disciplinary hearing, about 5 years ago. Had about 20 instances of overtime, used 24 hour clock on all my requests for overtime. HR was questioning every overtime that could have occurred during work hours if the am/pm was flipped. I

Re: Stop

IRX0026I Error running STOP, line 25: Invalid whole number Must be Friday. -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Gord Tomlin Sent: Friday, January 05, 2018 1:45 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Stop On

Re: TA18-004A: Meltdown and Spectre Side-Channel Vulnerability Guidance

> On Jan 5, 2018, at 10:15 AM, Paul Gilmartin > <000433f07816-dmarc-requ...@listserv.ua.edu> wrote: > > Where I read: >... >Per our business as usual process, all information for IBM Z clients can > be found at the IBM Z Portal. > >IBM Storage appliances are not impacted by

Re: Stop

On 2018-01-05 12:01, Shumate, Scott wrote: Stop IEE311I STOP PARAMETER MISSING -- Regards, Gord Tomlin Action Software International (a division of Mazda Computer Corporation) Tel: (905) 470-7113, Fax: (905) 470-6507 Support: https://actionsoftware.com/support/

Re: JZOS on open systems question

On 5 January 2018 at 00:56, Timothy Sipples wrote: ... > I'm aware of a party that ripped a piece of OS/390 and then used it > somewhere else, without an OS/390 license, without asking IBM for > permission. IBM was not amused. :-( There was a price; it was paid. I dare > say

Re: Intel Chip flaw

Didn't search archives but there was a guy that managed to get a PC game loaded into the local printer. Not sure of brand. Big cut-sheet jobber... In a message dated 1/5/2018 7:49:19 AM Central Standard Time, arno...@us.ibm.com writes:   with a model that already lets everything access all

Re: Stop

without doubt, it is "code to stop hell" i.e. the hadid.s.lamc.la is done -- and the proof, the proof is in every word: http://math.s.lamc.la http://nity.s.lamc.la http://how.shiningbright.online http://wick.s.lamc.la - dear sisters, i'm single. http://xe.s.lamc.la - dear earth, you're blind

Re: JZOS on open systems question

Don't know what the rules are or if they're still valid. I broached this with local branch in the nineties and the answer was 'We can only observe'. They would drop by and comment occasionally but never would reply 'on-list'. In a message dated 1/5/2018 9:15:20 AM Central Standard Time,

Re: Stop

> The information in this transmission may contain proprietary and non-public information It must be some kind of code. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Shumate, Scott Sent: Friday, January 5, 2018 9:02 AM To:

Stop

Stop The information in this transmission may contain proprietary and non-public information of BB or its affiliates and may be subject to protection under the law. The message is intended for the sole use of the individual or entity to which it is addressed. If you are not the intended

Re: TA18-004A: Meltdown and Spectre Side-Channel Vulnerability Guidance

On Fri, 5 Jan 2018 14:46:18 +0800, Timothy Sipples wrote: >Here are the latest advisories from IBM, published/updated within the past >couple hours as I write this: > >https://www.ibm.com/blogs/psirt/potential-cpu-security-issue/ > Where I read: ... Per our business as usual process, all

Re: Accessing 65536 devices

We started putting PAV aliases into SS1 to save on UCBs. It does make for an interesting IODF. The only issue was with z/VM. We have several z/VM lpars along with our z/OS lpars. z/VM currently can't handle PAV aliases in SS1, they have to be in SS0. Thanks.. Paul Feller AGT Mainframe

Re: Accessing 65536 devices

Innovation has a product called FDRPAS that can be rented that does the copies while the system is up and running. We have used it several times and it works great. -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Jesse 1 Robinson

Re: JZOS on open systems question

If only we had a "friendly IBM representative" on the list :-) The IBM JZOS Record Generator download site is actually up today (it wasn't yesterday), so you can download it yourself: https://www.ibm.com/support/knowledgecenter/SSMQ4D_3.0.0/documentation/welcome.html Check with your attorney or

Re: TA18-004A: Meltdown and Spectre Side-Channel Vulnerability Guidance

The applicable IBM zSeries Security Notice says: Ecosystem components not affected z Systems prior to z196 All models of Hardware Master Console (HMC) All models of Service Element (SE) But: Further mitigation details for z/OS will be released as they become available. Dana

Re: Hot off the press

Apparently there are training dollars available through state unemployment insurance (?) if your job is offshored. Chris -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Nightwatch RenBand Sent: Thursday, January 04, 2018 10:56 AM

Re: Intel Chip flaw

I read a 3% to 50% performance hit, depending on workload. I don't know what kind of workload does what though. My guess is lots of small transactions will be hit. Chris Kittell U.S. BANCORP made the following annotations -

Re: Intel Chip flaw

Remember that in order to exploit these, you need to be able to load and run your own code next to the code you're trying to attack. You generally can't do that in embedded devices like printers, routers, POS terminals, etc. Also, these are attacks that apply to systems running multiple

Re: Intel Chip flaw

How many Viruses did it encounter? -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Pommier, Rex Sent: Thursday, January 4, 2018 3:25 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Intel Chip flaw Dana, I'm asking this more out of

Re: Intel Chip flaw

The IBM Security/Integrity portal has the information you're seeking. Mark Jacobs > David Crayford > January 5, 2018 at 7:09 AM > > > Indeed. And there are Linux patches for AMD WRT RDSTC speculation > exploits >

Fwd: From the Shark Tank - Law & Order: IT Victims Unit

Database admin pilot fish at this state law-enforcement agency is spending too much of his time dealing with an unruly mainframe database system that's less than a year old. Continued at https://www.computerworld.com/article/3245774/data-center/law-order-it-victims-unit.html -- Regards,

Re: Intel Chip flaw

On 5/01/2018 5:53 PM, Cannaerts, Jan wrote: And as you said, you need some control over what lives in the cache and what does not. There are some z/Arch instructions to mark cached data as no longer important, but the PoP specifically mentions that the CPU does not necessarily remove the data

Re: Accessing 65536 devices

Jesse 1 Robinson wrote: We would like to be able to access >65535 device addresses (UCBs) from a single LPAR via a single IODF. The need is for bringing a new DASD subsystem online while retaining the old subsystem until all volumes can be copied across. We currently have spare UCBs

GSE UK - Large Systems 2018 Plans

Happy New Year to all! 2018 is proving to be an exciting year for the GSE and for the individual working groups. Webex This year the Large Systems team have decided on providing bi-monthly WebEx sessions to keep our participants fresh and in touch with their working group. Each WebEx meeting

Re: Intel Chip flaw

Don't know about the guts, but the externals are all new. Looks to be some hybrid that starts up and checks all the stuff and then brings up XP.  In a message dated 1/4/2018 2:17:54 PM Central Standard Time, t...@tombrennansoftware.com writes:   That may actually be a benefit, assuming the

Re: Intel Chip flaw

>Example code is already out there >https://gist.github.com/ErikAugust/724d4a969fb2c6ae1bbd7b2a9e3d4bb6. I >built this on my PC and it worked! Is there a zArch instruction to flush >a cache line like the _mm_clflush() built-in for x86? If so it would be >easy to compile and run spectre.c on z/OS

Re: Intel Chip flaw

Cannaerts, Jan wrote: >We'll most likely never find out whether or not this flaw exists on z/Arch, as >IBM is going to patch this. I'd try it out but I have neither the time nor the >hardware. Big Blue is already aware about this. Look at

Re: Intel Chip flaw

On 5/01/2018 5:10 PM, Cannaerts, Jan wrote: If a similar attack works, as long as it's addressable, you can read it. I do not exactly know where the DAT tables live, and if they, or the real address they reside at are in fetch-protected common storage, you could get a hold of them. But

Re: Intel Chip flaw

The (three differnet) Intel flaws rely on "speculative execution". As the CPU executes both possible execution paths after a branch, the incorrect path's work is not "committed". Intel's fetch protection is only raised as each instruction is committed. As a result, you can fetch protected memory,

Re: Accessing 65536 devices

Why can't you define the CSS id more than 1 and then have partition access to that as well so example as below CSS Devices in SS0Devices in SS1Devices in SS2Devices in SS3 / ID Maximum + Actual Maximum + Actual Maximum + Actual Maximum + Actual _ 0 65280