On Mon, 2014-03-24 at 17:56 +, Lespiau, Damien wrote:
On Mon, Mar 24, 2014 at 11:00:07PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
For disabling L3 clock gating we need to set bit 25 of MMIO
register 940c. Earlier this was being done by just writing 1
On Mon, Mar 24, 2014 at 06:21:22PM -0700, Ben Widawsky wrote:
I am not clear why we've never enabled it by default for GEN7. Looking
at the git hostiry, it seems Rodrigo disabled it by default, and it's
never been turned on. Quite a few fixes have gone in over the past year,
and I think many
On Tue, Mar 25, 2014 at 11:29:02AM +0530, Arun R Murthy wrote:
In wait for vblank use usleep_range, which will use hrtimers instead of
msleep. Using msleep(1~20) there are more chances of sleeping for 20ms.
Using usleep_range uses hrtimers and hence are precise, worst case will
trigger an
On Mon, Mar 24, 2014 at 07:43:48PM -0700, Ben Widawsky wrote:
On Mon, Mar 24, 2014 at 07:41:17PM -0700, Ben Widawsky wrote:
On Fri, Mar 21, 2014 at 12:41:53PM +, Chris Wilson wrote:
As Broadwell has an increased virtual address size, it requires more
than 32 bits to store offsets into
On Tue, Mar 25, 2014 at 2:44 AM, Stéphane Marchesin
marc...@chromium.org wrote:
When using HDMI, the 300MHz clock is legal, but when in DVI mode it's
definitely not. This causes issues when we send a 300MHz signal over a
DVI cable which is specced for 165MHz only. So when in DVI mode let's
If we try to execute on a known ring, but it has failed to be
initialised correctly, report that the GPU is hung rather than the
command invalid. This leaves us reporting EINVAL only if the user
requests execution on a ring that is not supported by the device.
This should prevent UXA from getting
On Tue, Mar 25, 2014 at 9:03 AM, Chris Wilson ch...@chris-wilson.co.uk wrote:
If we try to execute on a known ring, but it has failed to be
initialised correctly, report that the GPU is hung rather than the
command invalid. This leaves us reporting EINVAL only if the user
requests execution on
On Tue, Mar 25, 2014 at 8:27 AM, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Mon, Mar 24, 2014 at 06:21:22PM -0700, Ben Widawsky wrote:
I am not clear why we've never enabled it by default for GEN7. Looking
at the git hostiry, it seems Rodrigo disabled it by default, and it's
never been
On Tue, Mar 25, 2014 at 09:07:00AM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 9:03 AM, Chris Wilson ch...@chris-wilson.co.uk
wrote:
If we try to execute on a known ring, but it has failed to be
initialised correctly, report that the GPU is hung rather than the
command invalid.
From: Akash Goel akash.g...@intel.com
Added a new rendering specific Workaround 'WaTlbInvalidateStoreDataBefore'.
This workaround has to be applied before doing TLB Invalidation.
In this WA, before pipecontrol with TLB invalidate set, need to add 2 MI
Store data commands.
Without this, hardware
In wait for vblank use usleep_range, which will use hrtimers instead of
msleep. Using msleep(1~20) there are more chances of sleeping for 20ms.
Using usleep_range uses hrtimers and hence are precise, worst case will
trigger an interrupt at the higher/max timeout.
As per kernel document
On Tue, Mar 25, 2014 at 02:28:22PM +0530, Arun R Murthy wrote:
In wait for vblank use usleep_range, which will use hrtimers instead of
msleep. Using msleep(1~20) there are more chances of sleeping for 20ms.
Using usleep_range uses hrtimers and hence are precise, worst case will
trigger an
On Tue, Mar 25, 2014 at 02:01:05PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
Added a new rendering specific Workaround 'WaTlbInvalidateStoreDataBefore'.
This workaround has to be applied before doing TLB Invalidation.
In this WA, before pipecontrol with TLB
On Tue, 25 Mar 2014, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Tue, Mar 25, 2014 at 02:28:22PM +0530, Arun R Murthy wrote:
In wait for vblank use usleep_range, which will use hrtimers instead of
msleep. Using msleep(1~20) there are more chances of sleeping for 20ms.
Using usleep_range
On Tue, 2014-03-25 at 09:15 +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:01:05PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
Added a new rendering specific Workaround 'WaTlbInvalidateStoreDataBefore'.
This workaround has to be applied before doing
On Mon, Mar 24, 2014 at 03:37:12PM -0700, Ben Widawsky wrote:
On Sat, Mar 22, 2014 at 06:52:25PM +0100, Daniel Vetter wrote:
On Fri, Mar 21, 2014 at 07:33:59PM +0200, Mika Kuoppala wrote:
Hi,
Daniel Vetter daniel.vet...@ffwll.ch writes:
There's an entire pile of issues in
On Mon, Mar 24, 2014 at 04:17:42PM -0700, Ben Widawsky wrote:
On Mon, Mar 24, 2014 at 04:14:32PM -0700, Ausmus, James wrote:
On Sat, Mar 22, 2014 at 4:34 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Fri, Mar 21, 2014 at 05:51:01PM -0700, Ben Widawsky wrote:
Let's try this again. I've
On Mon, Mar 24, 2014 at 06:06:00PM -0700, Ben Widawsky wrote:
When PPGTT was disabled by default, the patch also prevented the user
from overriding this behavior via module parameter. Being able to test
this on arbitrary kernels is extremely beneficial to track down the
remaining bugs. The
On Tue, Mar 25, 2014 at 09:47:01AM +0530, Vandana Kannan wrote:
Added a property to enable user space to set aspect ratio for HDMI displays.
If there is no user specified value, then PAR_NONE/Automatic option is set
by default. User can select aspect ratio 4:3 or 16:9. The aspect ratio
On Tue, Mar 25, 2014 at 11:25:03AM +0530, Arun R Murthy wrote:
BZ: 178761
In wait for vblank use usleep_range, which will use hrtimers instead of
msleep. Using msleep(1~20) there are more chances of sleeping for 20ms.
Using usleep_range uses hrtimers and hence are precise, worst case will
Hi Damien,
Could you please clarify following queries.
Thanks,
Sagar
On Fri, 2014-03-21 at 19:06 +0530, Sagar Arun Kamble wrote:
Hi Damien,
On Thu, 2014-03-20 at 14:45 +, Damien Lespiau wrote:
On Thu, Mar 20, 2014 at 02:11:40PM +, Damien Lespiau wrote:
(source is premultiplied)
From: Sagar Kamble sagar.a.kam...@intel.com
Cursor size is changed now take care of larger cursor sizes.
wm calculation was hardcoded to 64 before so changing it.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Cc: Jani Nikula jani.nik...@linux.intel.com
Cc: Damien Lespiau damien.lesp...@intel.com
On Tue, Mar 25, 2014 at 03:33:42PM +0530, Sagar Arun Kamble wrote:
Hi Damien,
Could you please clarify following queries.
He did, in a reply to your mail ...
-Daniel
Thanks,
Sagar
On Fri, 2014-03-21 at 19:06 +0530, Sagar Arun Kamble wrote:
Hi Damien,
On Thu, 2014-03-20 at 14:45
On Tue, Mar 25, 2014 at 03:23:34PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
Added a new rendering specific Workaround 'WaTlbInvalidateStoreDataBefore'.
This workaround has to be applied before doing TLB Invalidation on render
ring.
In this WA, before
On Mon, Mar 24, 2014 at 11:58:22PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
Removing the VS_TIMER_DISPATCH bit enable for MI MODE reg for
Gen7 platform as it is not required.
v2: Enhancing the scope of the patch to full Gen7 (Chris)
Signed-off-by: Akash
On Tue, Mar 25, 2014 at 11:51:57AM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 03:33:42PM +0530, Sagar Arun Kamble wrote:
Hi Damien,
Could you please clarify following queries.
He did, in a reply to your mail ...
In case you cannot find it:
From: Akash Goel akash.g...@intel.com
This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for
platforms Gen6.
VS_TIMER_DISPATCH bit enable was earlier required as a part of
WA 'WaTimedSingleVertexDispatch', which is now applicable only to
platforms Gen7.
v2: Enhancing the scope
On Tue, Mar 25, 2014 at 06:01:50PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for
platforms Gen6.
VS_TIMER_DISPATCH bit enable was earlier required as a part of
WA
On Thu, Mar 20, 2014 at 04:43:05PM +0200, Jani Nikula wrote:
Hi Bradley -
Apologies for my procrastination with the review; I don't easily recall
as tedious a review as the command and register tables. And I sure have
reviewed a lot of miserable stuff in the past.
Most infuriatingly, I
On Thu, Jan 30, 2014 at 11:46:15AM +, Chris Wilson wrote:
On Wed, Jan 29, 2014 at 10:10:47PM +, Chris Wilson wrote:
On Wed, Jan 29, 2014 at 01:58:29PM -0800, bradley.d.vol...@intel.com wrote:
From: Brad Volkin bradley.d.vol...@intel.com
Signed-off-by: Brad Volkin
On Tue, 25 Mar 2014, Daniel Vetter dan...@ffwll.ch wrote:
On Thu, Mar 20, 2014 at 04:43:05PM +0200, Jani Nikula wrote:
Hi Bradley -
Apologies for my procrastination with the review; I don't easily recall
as tedious a review as the command and register tables. And I sure have
reviewed a
We can share a few lines of tricky lock handling we need to use for both
shrinker routines and in the process fix the return value for count()
when reporting a deadlock.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem.c | 42
When the machine is under a lot of memory pressure and being stressed by
multiple GPU threads, we quite often report fewer than shrinker-batch
(i.e. SHRINK_BATCH) pages to be freed. This causes the shrink_control to
skip calling into i915.ko to release pages, despite the GPU holding onto
most of
shmemfs first checks if there is enough memory to allocate the page
and reports ENOSPC should there be insufficient, along with
the usual ENOMEM for a genuine allocation failure.
We use ENOSPC in our driver to mean that we have run out of aperture
space and so want to translate the error from
On Wed, Jan 29, 2014 at 10:12:08PM +, Chris Wilson wrote:
On Wed, Jan 29, 2014 at 01:58:30PM -0800, bradley.d.vol...@intel.com wrote:
From: Brad Volkin bradley.d.vol...@intel.com
This is a speculative test in that it's not particularly relevant
today, but is important if we switch
I think we might have some use for a do_ioctl_expected_errno or some
such thing. But that's for later.
Cc: Brad Volkin bradley.d.vol...@intel.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
tests/gem_exec_parse.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff
Try to flush out dirty pages into the swapcache (and from there into the
swapfile) when under memory pressure and forced to drop GEM objects from
memory. In effect, this should just allow us to discard unused pages for
memory reclaim and to start writeback earlier.
v2: Hugh Dickins warned that
On Mon, Mar 24, 2014 at 01:02:57PM -0700, Ben Widawsky wrote:
On Mon, Mar 24, 2014 at 07:45:56PM +, Chris Wilson wrote:
On Mon, Mar 24, 2014 at 12:36:23PM -0700, Ben Widawsky wrote:
On Thu, Mar 20, 2014 at 11:10:13AM +, Chris Wilson wrote:
On Fri, Dec 06, 2013 at 02:11:55PM
From: arsharma ankitprasad.r.sha...@intel.com
v1: This test currently tests constant alpha setting of sprite planes.
It verifies alpha setting of 0 and 255 with CRC.
Signed-off-by: Sharma, Ankitprasad R ankitprasad.r.sha...@intel.com
Signed-off-by: Sagar Kamble sagar.a.kam...@intel.com
---
On Tue, Mar 25, 2014 at 03:46:36PM +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
Cursor size is changed now take care of larger cursor sizes.
wm calculation was hardcoded to 64 before so changing it.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Cc: Jani
Noticed that, if I'm not mistaken, we were misunderstanding the intention of
mode_config.cursor_{width,height}, and those 3 patches are the resulting fixes.
Damien Lespiau (3):
drm/i915: Don't set mode_config's cursor size
drm/i915: Remove max_cursor_{width,height} from the crtc
drm/i915:
From: Sagar Kamble sagar.a.kam...@intel.com
This patch enables constant alpha property for Sprite planes.
Client has to set BIT(DRM_BLEND_CONSTANT_ALPHA) | ((alpha value) 32)
for applying constant alpha on a plane. To disable constant alpha,
client has to set BIT(DRM_BLEND_SRC_COLOR)
v2: Fixing
Now that we can use different cursor sizes, we can't hardcode 64 pixels
as the cursor width anymore.
Cc: Sagar Kamble sagar.a.kam...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Sagar Kamble sagar.a.kam...@intel.com
This patch creates a generic blending bitmask property modeled after
glBlendFunc. Drivers may support subset of these values.
v2: Removing blend properties that are not applicable
[Damien's Review Comments].
Adding DRM_MODE_PROP_32BIT_PAIR flag
From: Sagar Kamble sagar.a.kam...@intel.com
With this patch new flag DRM_MODE_PROP_32BIT_PAIR is added that will help make
use
of 64 bit value of bitmask property as two 32 bit values.
Cc: airl...@linux.ie
Cc: dri-de...@lists.freedesktop.org
Cc: linux-ker...@vger.kernel.org
Signed-off-by: Sagar
On Tue, Mar 25, 2014 at 02:54:56PM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:49:30PM +, Damien Lespiau wrote:
Those fields are supposed to be a good default value for the cursor
size, intended for the case where the hardware doesn't support 64x64
cursors, for use with a hw
On Tue, Mar 25, 2014 at 02:49:30PM +, Damien Lespiau wrote:
Those fields are supposed to be a good default value for the cursor
size, intended for the case where the hardware doesn't support 64x64
cursors, for use with a hw agnostic DDX driver for instance.
We're fine with 64x64 cursors
From: Sagar Kamble sagar.a.kam...@intel.com
v2: Added description for src-color and constant-alpha property.
Cc: Rob Landley rob at landley.net
Cc: Dave Airlie airlied at redhat.com
Cc: Daniel Vetter daniel.vetter at ffwll.ch
Cc: Laurent Pinchart laurent.pinchart+renesas at ideasonboard.com
Cc:
On Tue, Mar 25, 2014 at 02:59:18PM +, Damien Lespiau wrote:
On Tue, Mar 25, 2014 at 02:54:56PM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:49:30PM +, Damien Lespiau wrote:
Those fields are supposed to be a good default value for the cursor
size, intended for the case
On Tue, 2014-03-25 at 14:59 +, Damien Lespiau wrote:
On Tue, Mar 25, 2014 at 02:54:56PM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:49:30PM +, Damien Lespiau wrote:
Those fields are supposed to be a good default value for the cursor
size, intended for the case where the
On Tue, 2014-03-25 at 14:49 +, Damien Lespiau wrote:
Those fields are supposed to be a good default value for the cursor
size, intended for the case where the hardware doesn't support 64x64
cursors, for use with a hw agnostic DDX driver for instance.
We're fine with 64x64 cursors though
Those fields are supposed to be a good default value for the cursor
size, intended for the case where the hardware doesn't support 64x64
cursors, for use with a hw agnostic DDX driver for instance.
We're fine with 64x64 cursors though and don't need to set those fields
(DRM core will return 64 is
On Tue, Mar 25, 2014 at 10:42:09AM +0100, Daniel Vetter wrote:
On Mon, Mar 24, 2014 at 03:37:12PM -0700, Ben Widawsky wrote:
On Sat, Mar 22, 2014 at 06:52:25PM +0100, Daniel Vetter wrote:
On Fri, Mar 21, 2014 at 07:33:59PM +0200, Mika Kuoppala wrote:
Hi,
Daniel Vetter
On Tue, Mar 25, 2014 at 3:54 PM, Ben Widawsky b...@bwidawsk.net wrote:
I don't think it's quite that easy, but I took it as a, yes. Which one
is patch 3?
drm/i915: make semaphore signaller detection more robust - it was a
follow-up patch in this thread, hence no 3/3. If the relevant bits on
bdw
On Tue, Mar 25, 2014 at 01:41:25PM +, Chris Wilson wrote:
On Mon, Mar 24, 2014 at 01:02:57PM -0700, Ben Widawsky wrote:
On Mon, Mar 24, 2014 at 07:45:56PM +, Chris Wilson wrote:
On Mon, Mar 24, 2014 at 12:36:23PM -0700, Ben Widawsky wrote:
On Thu, Mar 20, 2014 at 11:10:13AM
On Tue, Mar 25, 2014 at 08:15:54AM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 09:07:00AM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 9:03 AM, Chris Wilson ch...@chris-wilson.co.uk
wrote:
If we try to execute on a known ring, but it has failed to be
initialised
On Tuesday 25 March 2014 03:02 PM, Jani Nikula wrote:
On Tue, 25 Mar 2014, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Tue, Mar 25, 2014 at 02:28:22PM +0530, Arun R Murthy wrote:
In wait for vblank use usleep_range, which will use hrtimers instead of
msleep. Using msleep(1~20) there are
On Tuesday 25 March 2014 01:00 PM, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 11:29:02AM +0530, Arun R Murthy wrote:
In wait for vblank use usleep_range, which will use hrtimers instead of
msleep. Using msleep(1~20) there are more chances of sleeping for 20ms.
Using usleep_range uses hrtimers
On Tue, Mar 25, 2014 at 03:11:10PM +0200, Ville Syrjälä wrote:
On Tue, Mar 25, 2014 at 06:01:50PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for
platforms Gen6.
VS_TIMER_DISPATCH bit
On Tue, Mar 25, 2014 at 08:03:28AM +, Chris Wilson wrote:
If we try to execute on a known ring, but it has failed to be
initialised correctly, report that the GPU is hung rather than the
command invalid. This leaves us reporting EINVAL only if the user
requests execution on a ring that is
On Tue, Mar 25, 2014 at 03:09:16PM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:59:18PM +, Damien Lespiau wrote:
On Tue, Mar 25, 2014 at 02:54:56PM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:49:30PM +, Damien Lespiau wrote:
Those fields are supposed to be a
We don't need them anymore as they were used to initialize DRM's
mode_config.
As a side note, it was a bit strange to put them on the CRTC object,
they are global values, not specific to a CRTC.
As another side note, those values were only used in that one function,
so we didn't need to store
On Tue, Mar 25, 2014 at 08:24:00AM -0700, Ben Widawsky wrote:
On Tue, Mar 25, 2014 at 08:03:28AM +, Chris Wilson wrote:
If we try to execute on a known ring, but it has failed to be
initialised correctly, report that the GPU is hung rather than the
command invalid. This leaves us
On Tue, Mar 25, 2014 at 04:36:05PM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 08:15:54AM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 09:07:00AM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 9:03 AM, Chris Wilson ch...@chris-wilson.co.uk
wrote:
If we try to
On Tue, Mar 25, 2014 at 04:05:29PM +, Damien Lespiau wrote:
On Tue, Mar 25, 2014 at 03:09:16PM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:59:18PM +, Damien Lespiau wrote:
On Tue, Mar 25, 2014 at 02:54:56PM +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 02:49:30PM
On Tue, Mar 25, 2014 at 10:46:12AM +0100, Daniel Vetter wrote:
On Mon, Mar 24, 2014 at 06:06:00PM -0700, Ben Widawsky wrote:
When PPGTT was disabled by default, the patch also prevented the user
from overriding this behavior via module parameter. Being able to test
this on arbitrary kernels
It sucks a bit atm :(
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
README | 11 +++
1 file changed, 11 insertions(+)
diff --git a/README b/README
index 66462c8a9bda..7ae9bb2e2609 100644
--- a/README
+++ b/README
@@ -115,6 +115,17 @@ docs/
reference documenation in
On Tue, Mar 25, 2014 at 5:42 PM, Ben Widawsky b...@bwidawsk.net wrote:
My apologies for breaking this a bit harder than intended, and thanks for
fixing it up. Patch merged to dinq.
-Daniel
No harm, no foul. FWIW QA had been reported 0 PPGTT regressions for the
last week or so. Score one for
On Tue, Mar 25, 2014 at 5:29 PM, Chris Wilson ch...@chris-wilson.co.uk wrote:
Yeah I've seen the other patches. I think we should try to keep all the
ring structures around even when the hw init failed. I've made some feeble
attempts a while ago to split the structure init from the hw init
On Tue, Mar 25, 2014 at 04:38:24PM +, Chris Wilson wrote:
For the record,
16:30 agd5f ickle, our GPUs don't have selectable cursor sizes
16:31 agd5f so on the newer ones, xf86-video-modesetting, etc. would
allocate a 64x64 cursor and it would look squashed and funky since the
hw
Multiple tests are introducing hangs by fidding with i915_ring_stop
debugfs entry.
Signed-off-by: Mika Kuoppala mika.kuopp...@intel.com
---
lib/igt_debugfs.c | 107 +
lib/igt_debugfs.h | 28 ++
2 files changed, 135 insertions(+)
on gem_reset_stats, kms_flip and pm_rps.
Signed-off-by: Mika Kuoppala mika.kuopp...@intel.com
---
tests/gem_reset_stats.c | 30 +-
tests/kms_flip.c| 37 +
tests/pm_rps.c | 35
On Tue, Mar 25, 2014 at 04:38:24PM +, Chris Wilson wrote:
Are you saying the Intel DDX currently derives a different meaning to
the intented behaviour? in which case it can still be changed to not do
that?
I still disagree though. This provides all the information I need to
support
On Tue, Mar 25, 2014 at 07:02:21PM +0200, Mika Kuoppala wrote:
Multiple tests are introducing hangs by fidding with i915_ring_stop
debugfs entry.
Signed-off-by: Mika Kuoppala mika.kuopp...@intel.com
Both patches look good to me. One thing we could do is add an exit handler
to reset
On Tue, Mar 25, 2014 at 04:57:04PM +, Damien Lespiau wrote:
On Tue, Mar 25, 2014 at 04:38:24PM +, Chris Wilson wrote:
For the record,
16:30 agd5f ickle, our GPUs don't have selectable cursor sizes
16:31 agd5f so on the newer ones, xf86-video-modesetting, etc. would
allocate a
On Tue, Mar 25, 2014 at 07:23:26PM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 04:57:04PM +, Damien Lespiau wrote:
On Tue, Mar 25, 2014 at 04:38:24PM +, Chris Wilson wrote:
For the record,
16:30 agd5f ickle, our GPUs don't have selectable cursor sizes
16:31 agd5f
quick_dump built fine, but it could actually run, since a lot of the
linking happens at run time. There is one hack where we redefine the
environment stuff, since depending on igt_aux means we have to pull in
libdrm, which I do not want to do.
Cc: Ville Syrjälä ville.syrj...@linux.intel.com
On Tue, Mar 25, 2014 at 07:23:26PM +0100, Daniel Vetter wrote:
Or we simply do this per-pixel format with one for each framebuffer plane,
i.e.
struct drm_get_plane_fb_limits {
uint32_t plane_id; /* in */
uint32_t fourcc; /* in */
struct drm_plane_limits
Outside of staging, there aren't any more uses of __FUNCTION__ now...
Joe Perches (5):
powerpc: Convert last uses of __FUNCTION__ to __func__
x86: Convert last uses of __FUNCTION__ to __func__
block: Convert last uses of __FUNCTION__ to __func__
i915: Convert last uses of __FUNCTION__ to
On Tue, Mar 25, 2014 at 7:51 PM, Damien Lespiau
damien.lesp...@intel.com wrote:
On Tue, Mar 25, 2014 at 07:23:26PM +0100, Daniel Vetter wrote:
Or we simply do this per-pixel format with one for each framebuffer plane,
i.e.
struct drm_get_plane_fb_limits {
uint32_t plane_id; /* in */
Just about all of these have been converted to __func__,
so convert the last uses.
Signed-off-by: Joe Perches j...@perches.com
---
drivers/gpu/drm/i915/dvo_ns2501.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c
On Tue, Mar 25, 2014 at 06:15:36AM -0700, Daniel Vetter wrote:
On Thu, Mar 20, 2014 at 04:43:05PM +0200, Jani Nikula wrote:
Hi Bradley -
Apologies for my procrastination with the review; I don't easily recall
as tedious a review as the command and register tables. And I sure have
On Tue, Mar 25, 2014 at 12:35:06PM -0700, Joe Perches wrote:
Just about all of these have been converted to __func__,
so convert the last uses.
Signed-off-by: Joe Perches j...@perches.com
Pulled into drm-intel, should land in 3.15.
Thanks, Daniel
---
drivers/gpu/drm/i915/dvo_ns2501.c |
On Tue, Mar 25, 2014 at 11:38:51AM -0700, Ben Widawsky wrote:
quick_dump built fine, but it could actually run, since a lot of the
linking happens at run time. There is one hack where we redefine the
environment stuff, since depending on igt_aux means we have to pull in
libdrm, which I do not
On Tue, Mar 25, 2014 at 06:17:55AM -0700, Daniel Vetter wrote:
On Thu, Jan 30, 2014 at 11:46:15AM +, Chris Wilson wrote:
On Wed, Jan 29, 2014 at 10:10:47PM +, Chris Wilson wrote:
On Wed, Jan 29, 2014 at 01:58:29PM -0800, bradley.d.vol...@intel.com
wrote:
From: Brad Volkin
On Tue, Mar 25, 2014 at 12:46:37PM -0700, Volkin, Bradley D wrote:
On Tue, Mar 25, 2014 at 06:15:36AM -0700, Daniel Vetter wrote:
- Secure batch dispatch is still fubar.
I'm not sure that this will still impact us once we implement the batch copy
step. I was only using the secure dispatch
On Tue, Mar 25, 2014 at 05:52:00PM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 5:29 PM, Chris Wilson ch...@chris-wilson.co.uk
wrote:
Yeah I've seen the other patches. I think we should try to keep all the
ring structures around even when the hw init failed. I've made some feeble
On Tue, Mar 25, 2014 at 08:47:47PM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 11:38:51AM -0700, Ben Widawsky wrote:
quick_dump built fine, but it could actually run, since a lot of the
linking happens at run time. There is one hack where we redefine the
environment stuff, since
On Tue, Mar 25, 2014 at 10:33 PM, Chris Wilson ch...@chris-wilson.co.uk wrote:
That, or fix the mess called ring init code ...
So if we fixed resume to avoid reallocating the ringbuffers across
resume, g45 would still fail to restart, but now we still have valid
objects (or would we tear them
While the context is not being used, we can make the PTEs invalid, so
nothing can accidentally corrupt it. Systems tend to have a lot of
trouble when the context gets corrupted.
NOTE: This is a slightly different patch than what I posted to Bugzilla.
References:
On Tue, Mar 25, 2014 at 12:27 AM, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Mon, Mar 24, 2014 at 06:21:22PM -0700, Ben Widawsky wrote:
I am not clear why we've never enabled it by default for GEN7. Looking
at the git hostiry, it seems Rodrigo disabled it by default, and it's
never been
Added a property to enable user space to set aspect ratio for HDMI displays.
If there is no user specified value, then PAR_NONE/Automatic option is set
by default. User can select aspect ratio 4:3 or 16:9. The aspect ratio
selected by user would come into effect with a mode set.
v2: Daniel's
From: Akash Goel akash.g...@intel.com
This patch adds a new drm crtc property for varying the Pipe Src size
or the Panel fitter input size. Pipe Src controls the size that is
scaled from.
This will allow to dynamically flip (without modeset) the frame buffers
of different resolutions
v2: Added a
From: Akash Goel akash.g...@intel.com
This patch adds a new drm crtc property for varying the size of
the horizontal vertical borers of the output/display window.
This will control the output of Panel fitter.
v2: Added a new check for the invalid border size input
v3: Fixed bugs in output
From: Akash Goel akash.g...@intel.com
This test is a derivative of kms_setmode. This will verify the 2 new drm
crtc properties, added to control the Panel fitter's input output.
v2: Modified the setting of 'border size' property. As now the 33rd bit
can be used to forcefully enable the Panel
Hello,
The version of the command parser which landed in drm-intel-nightly (and
is now enabled by default) completely breaks the 3D driver. Running any
program - glxgears, KDE, GNOME, whatever - results in:
intel_do_flush_locked failed: Invalid argument
and then Mesa aborts the program.
On Tue, 2014-03-25 at 10:59 +, Chris Wilson wrote:
On Tue, Mar 25, 2014 at 03:23:34PM +0530, sourab.gu...@intel.com wrote:
From: Akash Goel akash.g...@intel.com
Added a new rendering specific Workaround 'WaTlbInvalidateStoreDataBefore'.
This workaround has to be applied before doing
Mesa needs to be able to write OACONTROL in order to expose the
Observability Architecture's performance counters via OpenGL.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 1 +
drivers/gpu/drm/i915/i915_reg.h| 2 ++
2 files changed, 3
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