Re: [PATCH] drm/i915: Don't enable hwmon for selftests

On Fri, 12 Apr 2024 17:35:15 -0700, Dixit, Ashutosh wrote: > > On Thu, 11 Apr 2024 03:47:13 -0700, Ville Syrjälä wrote: > > > > On Wed, Apr 10, 2024 at 10:09:32PM -0700, Dixit, Ashutosh wrote: > > > On Wed, 10 Apr 2024 04:42:46 -0700, Ville Syrjälä wrote: > > > > > > > > On Tue, Apr 09, 2024 at

Re: [PATCH] drm/i915: Don't enable hwmon for selftests

On Thu, 11 Apr 2024 03:47:13 -0700, Ville Syrjälä wrote: > > On Wed, Apr 10, 2024 at 10:09:32PM -0700, Dixit, Ashutosh wrote: > > On Wed, 10 Apr 2024 04:42:46 -0700, Ville Syrjälä wrote: > > > > > > On Tue, Apr 09, 2024 at 09:28:55PM -0700, Ashutosh Dixit wrote: > > > > There are no hwmon

[PATCH] drm/i915/hwmon: Get rid of devm

When both hwmon and hwmon drvdata (on which hwmon depends) are device managed resources, the expectation, on device unbind, is that hwmon will be released before the drvdata. However, it appears devres does not do this consistently, so that we occasionally see drvdata being released before hwmon

[PATCH v1] drm/xe: no need to call fixup_initial_plane_config in XE

In XE, the updated fb mapping is already done and updated as part of intel_find_initial_plane_obj(). So no need to invoke fixup_initial_plane_config() again as it would basically write the same data to "PLAN_SURF" again. Signed-off-by: Vinod Govindapillai ---

[linux-next:master] BUILD REGRESSION 9ed46da14b9b9b2ad4edb3b0c545b6dbe5c00d39

tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 9ed46da14b9b9b2ad4edb3b0c545b6dbe5c00d39 Add linux-next specific files for 20240412 Unverified Error/Warning (likely false positive, please contact us if interested): {standard input}:1011

[PATCH 16/18] drm/i915: Carve up struct intel_dpll_hw_state

From: Ville Syrjälä struct intel_dpll_hw_state has a spot for all possible PLL registers across all platforms (well, apart from cx0/snps). This makes it rather confusing when trying to figure out which members belong to which platform(s). Split the struct up into five different platform

[PATCH 15/18] drm/i915: Add local DPLL 'hw_state' variables

From: Ville Syrjälä Add some local 'hw_state' variables to the old DPLL code. Will help with unionizing the dpll_hw_state later. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll.c | 98 +-- 1 file changed, 54 insertions(+), 44 deletions(-) diff

[PATCH 14/18] drm/i915: s/pipe_config/crtc_state/ in legacy PLL code

From: Ville Syrjälä Rename all the ye olde 'pipe_config's to the modern 'crtc_state' name in the legacy DPLL code. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll.c | 30 +++ drivers/gpu/drm/i915/display/intel_dpll.h | 6 ++--- 2 files changed, 18

[PATCH 18/18] drm/i915: Suck snps/cx0 PLL states into dpll_hw_state

From: Ville Syrjälä For some reason the snps/cx0 PLL states were added into a union alongside dpll_hw_state. Just suck them into dpll_hw_state so that we don't have so many levels of unions/etc. TODO: Get rid of 'clock' from the snps/cx0 PLL states as it is not a register values and thus

[PATCH 13/18] drm/i915: Drop pointless 'crtc' argument from *_crtc_clock_get()

From: Ville Syrjälä We are alreayd passing the crtc_state to *_crtc_clock_get(). Passing the crtc as well is 100% redundant, so don't do it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dpll.c | 21

[PATCH 17/18] drm/i915: Unionize dpll_hw_state

From: Ville Syrjälä intel_dpll_hw_state contains space for all possible PLL register values across all platforms. That is rather wasteful as each machine only needs to store the registers values that are appropriate for the platform. Turn intel_dpll_hw_state into a union so that we don't waste

[PATCH 12/18] drm/i915: Modernize i9xx_pll_refclk()

From: Ville Syrjälä Drop the redundant 'dev' argument from i9xx_pll_refclk() and rename its variables to conform to modern standards. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git

[PATCH 09/18] drm/i915: Extract i965_dpll_md()

From: Ville Syrjälä We have three copies of the DPLL_MD value computation. Share it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c

[PATCH 10/18] drm/i915: Extract {i9xx,i8xx,ilk}_dpll()

From: Ville Syrjälä The *_compute_dpll() functions generally contain two things: - huge pile of inline code to calculate the DPLL register value - a few calls to helpers to calculate the DPLL_MD and FP register values Pull the DPLL register value calculations into a helpers as well, so that

[PATCH 08/18] drm/i915: Pass the PLL hw_state to pll->enable()

From: Ville Syrjälä Stop rummaging around inside pll->state directly in the low level pll->enable() functions, and instead let the higher level code figure out where the correct state is stored and pass it in. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 69

[PATCH 11/18] drm/i915: Inline {i9xx,ilk}_update_pll_dividers()

From: Ville Syrjälä Now that *_compute_dpll() are no longer a mess {i9xx,ilk}_update_pll_dividers() don't serve any real purpose anymore. Just inline them into the callers. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll.c | 46 +++ 1 file changed,

[PATCH 07/18] drm/i915: Extract i9xx_dpll_get_hw_state()

From: Ville Syrjälä Start making the GMCH DPLL code a bit more like the more modern platforms by separating out the DPLL hw state readout from the rest of the pipe readout. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 24 +++-

[PATCH 06/18] drm/i915: Extract ilk_dpll_compute_fp()

From: Ville Syrjälä Let's not repeat ourselves so much and pull the entire PCH DPLL FP register value calculation into its own function. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll.c | 24 --- 1 file changed, 13 insertions(+), 11 deletions(-)

[PATCH 05/18] drm/i915: Extract ilk_fb_cb_factor()

From: Ville Syrjälä Pull the code to calculate PCH DPLL tuning factor into its own function. Helps declutter ilk_update_pll_dividers(). Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll.c | 32 --- 1 file changed, 17 insertions(+), 15 deletions(-)

[PATCH 04/18] drm/i915: Introduce some local PLL state variables

From: Ville Syrjälä Spinkle local PLL hw_state variables into various low level PLL functions. Will make subsequent changes cleaner when we don't have to touch so many places when renaming struct members and whatnot. Signed-off-by: Ville Syrjälä ---

[PATCH 03/18] drm/i915: Rename PLL hw_state variables/arguments

From: Ville Syrjälä We have zero consistency in out PLL state naming scheme. Try to unify things a bit by using 'dpll_hw_state' for high level stuff and just 'hw_state' for low level stuff. Currently both are the same, but I want to unionize intel_dpll_hw_state at which point using different

[PATCH 02/18] drm/i915: Use printer for the rest of PLL debugfs dump

From: Ville Syrjälä Since we now have the printer around for intel_dpll_dump_hw_state() use it for all the other PLL prints as well. Just to make the thing looks less crazy. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 8 1 file changed, 4

[PATCH 01/18] drm/i915: Replace hand rolled PLL state dump with intel_dpll_dump_hw_state()

From: Ville Syrjälä Just use intel_dpll_dump_hw_state() instead of hand rolling it. Signed-off-by: Ville Syrjälä --- .../drm/i915/display/intel_display_debugfs.c | 31 ++- 1 file changed, 2 insertions(+), 29 deletions(-) diff --git

[PATCH 00/18] drm/i915: PLL refactoring

From: Ville Syrjälä A bunch of refactoring around PLLs. Main feature is the unionization of dpll_hw_state. The eventual goal is to unify the approach for PLLs across all platforms instead of the current "shared PLLs are somehow different than other PLLs" approach. Ville Syrjälä (18):

[PATCH 8/8] drm/i915: Enable per-lane DP drive settings for bxt/glk

From: Ville Syrjälä Now the bxt/glk PHY code is ready for per-lane drive settings so enable it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 4/8] drm/i915/dpio: Introdude bxt_ddi_phy_rmw_grp()

From: Ville Syrjälä Add a helper to do the "read from one per-lane register and write to the group register" rmw cycle. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 59 --- 1 file changed, 38 insertions(+), 21 deletions(-) diff --git

[PATCH 7/8] drm/i915/dpio: Program bxt/glk PHY TX registers per-lane

From: Ville Syrjälä Program each bxt/glk PHY TX lane with its own settings instead of blasting them all with the same stuff via group access. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 35 --- 1 file changed, 22 insertions(+), 13

[PATCH 6/8] drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuff

From: Ville Syrjälä Since all of this lives in intel_dpio_phy.c let's rename the bxt/glk functions to have bxt_dpio_phy_ namespace. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 10 +- .../i915/display/intel_display_power_well.c | 18 +--

[PATCH 5/8] drm/i915/dpio: Use intel_de_rmw() for BXT DPIO latency optim setup

From: Ville Syrjälä Replace the hand rolled intel_de_rmw() with the real thing. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c

[PATCH 3/8] drm/i915/dpio: Extract bxt_dpio_phy_regs.h

From: Ville Syrjälä Extract the BXT/GLK DPIO PHY register definitions into their own file. Signed-off-by: Ville Syrjälä --- .../gpu/drm/i915/display/bxt_dpio_phy_regs.h | 273 ++ drivers/gpu/drm/i915/display/intel_dpio_phy.c | 1 +

[PATCH 2/8] drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glk

From: Ville Syrjälä Add consistent definitions for the per-lane PHY TX registers on bxt/glk. The current situation is a slight mess with some registers having a LN0 define, while others have a parametrized per-lane definition. Signed-off-by: Ville Syrjälä ---

[PATCH 1/8] drm/i915/dpio: Clean up bxt/glk PHY registers

From: Ville Syrjälä Use REG_BIT() & co. for the bxt/glk PHY register definitons. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 44 +-- drivers/gpu/drm/i915/i915_reg.h | 74 +-- 2 files changed, 59 insertions(+), 59

[PATCH 0/8] drm/i915: BXT/GLK per-lane vswing and PHY reg cleanup

From: Ville Syrjälä Start off with a bit of cleanup around the BXT/GLK DPIO PHY registers, and finish off with per-lane vswing programming. Ville Syrjälä (8): drm/i915/dpio: Clean up bxt/glk PHY registers drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glk drm/i915/dpio:

[PATCH 3/3] drm/i915: Compute CMRR and calculate vtotal

Compute Fixed Average Vtotal/CMRR with resepect to userspace VRR enablement. Also calculate required parameters in case of CMRR is enabled. During intel_vrr_compute_config, CMRR is getting enabled based on userspace has enabled Adaptive Sync Vtotal mode (Legacy VRR) or not. --v2: - Update

[PATCH 2/3] drm/i915: Add Enable/Disable for CMRR based on VRR state

Add CMRR/Fixed Average Vtotal mode enable and disable functions based on change in VRR mode of operation. When Adaptive Sync Vtotal is enabled, Fixed Average Vtotal mode is disabled and vice versa. With this commit setting the stage for subsequent CMRR enablement. --v2: - Check pipe active state

[PATCH 1/3] drm/i915: Define and compute Transcoder CMRR registers

Add register definitions for Transcoder Fixed Average Vtotal mode/CMRR function, with the necessary bitfields. Compute these registers when CMRR is enabled, extending Adaptive refresh rate capabilities. --v2: - Use intel_de_read64_2x32 in intel_vrr_get_config. [Jani] - Fix indent and order based

[PATCH 0/3] Implement CMRR Support

CMRR is a display feature that uses adaptive sync framework to vary Vtotal slightly to match the content rate exactly without frame drops. This feature is a variation of VRR where it varies Vtotal slightly (between additional 0 and 1 Vtotal scanlines) to match content rate exactly without frame

Re: [PATCH 3/6] drm/i915/display: split out intel_fbc_regs.h from i915_reg.h

On Fri, Apr 12, 2024 at 06:50:57PM +0300, Jani Nikula wrote: > On Fri, 12 Apr 2024, Ville Syrjälä wrote: > > On Fri, Apr 12, 2024 at 05:52:55PM +0300, Jani Nikula wrote: > >> +/* > >> + * Framebuffer compression (915+ only) > >> + */ > > > > Outdated comment. Looks like pretty much all the

[PATCH v2 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL

Set the Link Off Between Frames Enable bit in ALPM_CTL register. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_alpm.c | 5 + drivers/gpu/drm/i915/display/intel_display_types.h | 1 + 2 files changed, 6 insertions(+) diff --git

[PATCH v2 4/6] drm/i915/alpm: Add compute config for lobf

Link Off Between Active Frames, is a new feature for eDP that allows the panel to go to lower power state after transmission of data. This is a feature on top of ALPM, AS SDP. Add compute config during atomic-check phase. v1: RFC version. v2: Add separate flag for auxless-alpm. [Jani]

[PATCH v2 3/6] drm/display: Add missing aux less alpm wake related bits

From: Jouni Högander eDP1.5 adds some more bits into DP_RECEIVER_ALPM_CAP and DP_RECEIVER_ALPM_CONFIG registers. Add definitions for these. Signed-off-by: Jouni Högander --- include/drm/display/drm_dp.h | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git

[PATCH v2 6/6] drm/i915/alpm: Add debugfs for LOBF

For validation purpose add debugfs for LOBF. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_alpm.c | 47 +++ drivers/gpu/drm/i915/display/intel_alpm.h | 2 + .../drm/i915/display/intel_display_debugfs.c | 2 + 3 files changed, 51 insertions(+)

[PATCH v2 2/6] drm/i915/alpm: Move alpm related code to a new file

Move ALPM feature related code as it will be used for non-psr panel also thorugh LOBF feature. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_alpm.c | 292 ++ drivers/gpu/drm/i915/display/intel_alpm.h |

[PATCH v2 1/6] drm/i915/alpm: Move alpm parameters from intel_psr

ALPM can be enabled for non psr panel and currenly aplm-params are encapsulated under intel_psr struct, so moving out to intel_dp struct. Signed-off-by: Animesh Manna --- .../drm/i915/display/intel_display_types.h| 21 + drivers/gpu/drm/i915/display/intel_psr.c | 43

[PATCH v2 0/6] Link off between frames for edp

Link Off Between Active Frames (LOBF) allows an eDP link to be turned Off and On durning long VBLANK durations without enabling any of the PSR/PSR2/PR modes of operation. Bspec: 71477 Note: These patches are not tested, sending early for review feedback. Signed-off-by: Animesh Manna Animesh

Re: [PATCH 5/6] drm/i915/display: split out intel_dpio_regs.h from i915_reg.h

On Fri, 12 Apr 2024, Ville Syrjälä wrote: > On Fri, Apr 12, 2024 at 05:52:57PM +0300, Jani Nikula wrote: >> Clean up i915_reg.h. >> >> Signed-off-by: Jani Nikula >> --- >> .../i915/display/intel_display_power_well.c | 1 + >> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 1 + >>

Re: [PATCH 3/6] drm/i915/display: split out intel_fbc_regs.h from i915_reg.h

On Fri, 12 Apr 2024, Ville Syrjälä wrote: > On Fri, Apr 12, 2024 at 05:52:55PM +0300, Jani Nikula wrote: >> +/* >> + * Framebuffer compression (915+ only) >> + */ > > Outdated comment. Looks like pretty much all the comments > in this file are misleading/outdated. Maybe just nuke them > all while

Re: [PATCH 5/6] drm/i915/display: split out intel_dpio_regs.h from i915_reg.h

On Fri, Apr 12, 2024 at 05:52:57PM +0300, Jani Nikula wrote: > Clean up i915_reg.h. > > Signed-off-by: Jani Nikula > --- > .../i915/display/intel_display_power_well.c | 1 + > drivers/gpu/drm/i915/display/intel_dpio_phy.c | 1 + > drivers/gpu/drm/i915/display/intel_dpll.c | 1 + >

Re: [v2] drm/i915: Implement Audio WA_14020863754

On Fri, Apr 12, 2024 at 03:25:23AM -0700, Shankar, Uma wrote: > > > > -Original Message- > > From: Roper, Matthew D > > Sent: Friday, April 12, 2024 4:07 AM > > To: Shankar, Uma > > Cc: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org; Borah, > > Chaitanya Kumar ; > >

Re: [PATCH 4/6] drm/i915/display: split out intel_sprite_regs.h from i915_reg.h

On Fri, Apr 12, 2024 at 05:52:56PM +0300, Jani Nikula wrote: > Clean up i915_reg.h. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_sprite.c | 1 + > .../gpu/drm/i915/display/intel_sprite_regs.h | 349 ++ > drivers/gpu/drm/i915/gvt/cmd_parser.c

Re: [PATCH 2/6] drm/i915/color: move palette registers to intel_color_regs.h

On Fri, Apr 12, 2024 at 05:52:54PM +0300, Jani Nikula wrote: > For some reason the paletter registers were missed when adding > intel_color_regs.h. Finish the job. > > Signed-off-by: Jani Nikula > --- > .../gpu/drm/i915/display/intel_color_regs.h | 30 +++ >

Re: [PATCH 1/6] drm/i915/audio: move LPE audio regs to intel_audio_regs.h

On Fri, Apr 12, 2024 at 05:52:53PM +0300, Jani Nikula wrote: > There are too few registers to warrant a dedicated file for LPE audio > regs, but the audio reg file is better than i915_reg.h. > > Signed-off-by: Jani Nikula Reviewed-by: Ville Syrjälä > --- >

Re: [PATCH 3/6] drm/i915/display: split out intel_fbc_regs.h from i915_reg.h

On Fri, Apr 12, 2024 at 05:52:55PM +0300, Jani Nikula wrote: > Clean up i915_reg.h. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_fbc.c | 1 + > drivers/gpu/drm/i915/display/intel_fbc_regs.h | 152 ++ >

[PATCH 6/6] drm/i915/display: split out bxt_phy_regs.h from i915_reg.h

Clean up i915_reg.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/bxt_phy_regs.h | 292 ++ drivers/gpu/drm/i915/display/intel_ddi.c | 1 + drivers/gpu/drm/i915/display/intel_dpio_phy.c | 1 + drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 1 +

[PATCH 5/6] drm/i915/display: split out intel_dpio_regs.h from i915_reg.h

Clean up i915_reg.h. Signed-off-by: Jani Nikula --- .../i915/display/intel_display_power_well.c | 1 + drivers/gpu/drm/i915/display/intel_dpio_phy.c | 1 + drivers/gpu/drm/i915/display/intel_dpll.c | 1 + drivers/gpu/drm/i915/display/vlv_dpio_regs.h | 352 ++

[PATCH 4/6] drm/i915/display: split out intel_sprite_regs.h from i915_reg.h

Clean up i915_reg.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_sprite.c | 1 + .../gpu/drm/i915/display/intel_sprite_regs.h | 349 ++ drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 + drivers/gpu/drm/i915/gvt/display.c| 1 +

[PATCH 3/6] drm/i915/display: split out intel_fbc_regs.h from i915_reg.h

Clean up i915_reg.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_fbc.c | 1 + drivers/gpu/drm/i915/display/intel_fbc_regs.h | 152 ++ drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 + drivers/gpu/drm/i915/i915_reg.h | 142

[PATCH 2/6] drm/i915/color: move palette registers to intel_color_regs.h

For some reason the paletter registers were missed when adding intel_color_regs.h. Finish the job. Signed-off-by: Jani Nikula --- .../gpu/drm/i915/display/intel_color_regs.h | 30 +++ drivers/gpu/drm/i915/i915_reg.h | 30 --- 2 files changed, 30

[PATCH 1/6] drm/i915/audio: move LPE audio regs to intel_audio_regs.h

There are too few registers to warrant a dedicated file for LPE audio regs, but the audio reg file is better than i915_reg.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_audio_regs.h | 16 drivers/gpu/drm/i915/display/intel_lpe_audio.c | 2 +-

[PATCH 0/6] drm/i915: i915_reg.h cleanups

Continue the cleanup of i915_reg.h. Remove 1k lines from it this time around. Jani Nikula (6): drm/i915/audio: move LPE audio regs to intel_audio_regs.h drm/i915/color: move palette registers to intel_color_regs.h drm/i915/display: split out intel_fbc_regs.h from i915_reg.h

[CI-only 8/8] drm/xe/display: Re-use display vmas when possible

i915 has this really nice, infrastructure where everything becomes complicated, GGTT needs eviction, etc.. Lets not do that, and make the dumbest possible interface instead. Try to retrieve the VMA from old_plane_state, or intel_fbdev if kernel fb. Signed-off-by: Maarten Lankhorst ---

[CI-only 3/8] drm/i915: Use the same vblank worker for atomic unpin

In case of legacy cursor update, the cursor VMA needs to be unpinned only after vblank. This exceeds the lifetime of the whole atomic commit. Any trick I attempted to keep the atomic commit alive didn't work, as drm_atomic_helper_setup_commit() force throttles on any old commit that wasn't

[CI-only 6/8] drm/xe: Use simple xchg to cache DPT

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 33 +++--- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c index d967d00bbf9d..16a287cbebc5 100644

[CI-only 4/8] drm/xe/display: Preparations for preallocating dpt bo

The DPT bo should not be allocated when pinning, but in advance when creating the framebuffer. Split allocation from bo pinning and GGTT insertion. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 159 +++-- 1 file changed, 123 insertions(+), 36

[CI-only 7/8] drm/xe/display: Prevent overwriting original GGTT when taking over initial FB.

Instead of overwriting the original GGTT mapping accidentally, allocate a new GGTT mapping above the original GGTT mapping. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/xe/display/xe_fb_pin.c| 40 --- drivers/gpu/drm/xe/display/xe_fb_pin.h| 20 ++

[CI-only 5/8] drm/xe: Remove safety check from __xe_ttm_stolen_io_mem_reserve_stolen

This is invalid with display code when reworking DPT. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c b/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c index

[CI-only 1/8] drm: Add drm_vblank_work_flush_all().

In some cases we want to flush all vblank work, right before vblank_off for example. Add a simple function to make this possible. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_vblank_work.c | 22 ++ include/drm/drm_vblank_work.h | 2 ++ 2 files changed, 24

[CI-only 2/8] drm/i915: Use vblank worker to unpin old legacy cursor fb safely

From: Ville Syrjälä The cursor hardware only does sync updates, and thus the hardware will be scanning out from the old fb until the next start of vblank. So in order to make the legacy cursor fastpath actually safe we should not unpin the old fb until we're sure the hardware has ceased

Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

On Fri, 2024-04-12 at 10:30 +, Shankar, Uma wrote: > > > -Original Message- > > From: Coelho, Luciano > > Sent: Friday, April 12, 2024 3:12 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: intel...@lists.freedesktop.org; Shankar, Uma ; > > ville.syrj...@linux.intel.com; Nikula,

[PATCH] treewide: Fix common grammar mistake "the the"

Use `find . -type f -exec sed -i 's/\/the/g' {} +` to find all occurrences of "the the" and replace them with a single "the". Changes only comments and documentation - no code changes. Signed-off-by: Thorsten Blum --- Documentation/trace/histogram.rst | 2 +- arch/arm/Kconfig

Re: [PATCH] treewide: Fix common grammar mistake "the the"

On 2024-04-11 17:04:40, Thorsten Blum wrote: > Use `find . -type f -exec sed -i 's/\/the/g' {} +` to find all > occurrences of "the the" and replace them with a single "the". > > Changes only comments and documentation - no code changes. > > Signed-off-by: Thorsten Blum Reviewed-by: Tyler

Re: [PATCH] treewide: Fix common grammar mistake "the the"

On 11. Apr 2024, at 17:25, Dan Carpenter wrote: > > It's tricky to know which tree a patch like this would go through. The patch is based on the mainline tree. Should I have sent it directly to Linus then? I'm relatively new here and therefore only sent it to the corresponding mailing lists.

[PATCH v2] treewide: Fix common grammar mistake "the the"

Use `find . -type f -exec sed -i 's/\/the/g' {} +` to find all occurrences of "the the" and replace them with a single "the". In arch/arm/include/asm/unwind.h replace "the the" with "to the". Changes only comments and documentation - no code changes. Signed-off-by: Thorsten Blum Reviewed-by:

RE: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

> -Original Message- > From: Coelho, Luciano > Sent: Friday, April 12, 2024 3:12 PM > To: intel-gfx@lists.freedesktop.org > Cc: intel...@lists.freedesktop.org; Shankar, Uma ; > ville.syrj...@linux.intel.com; Nikula, Jani > Subject: [PATCH v5 1/4] drm/i915/display: add support for DMC

RE: [v2] drm/i915: Implement Audio WA_14020863754

> -Original Message- > From: Roper, Matthew D > Sent: Friday, April 12, 2024 4:07 AM > To: Shankar, Uma > Cc: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org; Borah, > Chaitanya Kumar ; > jani.nik...@linux.intel.com > Subject: Re: [v2] drm/i915: Implement Audio

[PATCH] drm/i915/vma: Fix UAF on reopen vs destroy race

We defer actually closing, unbinding and destroying a VMA until next idle point, or until the object is freed in the meantime. By postponing the unbind, we allow for the VMA to be reopened by the client, avoiding the work required to rebind the VMA. It was assumed that as long as a GT is held

Re: [PATCH 0/4] log2: make is_power_of_2() more generic

On Wed, 05 Apr 2023, Steven Price wrote: > On 31/03/2023 09:31, Jani Nikula wrote: >> On Thu, 30 Mar 2023, Andrew Morton wrote: >>> On Thu, 30 Mar 2023 21:53:03 + David Laight >>> wrote: >>> > But wouldn't all these issues be addressed by simply doing > > #define

[PATCH v5 3/4] drm/i915/display: add module parameter to enable DMC wakelock

This feature should be disabled by default until properly tested and mature. Add a module parameter to enable the feature for testing, while keeping it disabled by default for now. Reviewed-by: Uma Shankar Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_display_params.c | 5

[PATCH v5 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions

We only need DMC wakelocks when we allow DC5 and DC6 states. Add the calls to enable and disable DMC wakelock accordingly. Reviewed-by: Uma Shankar Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_display_power_well.c | 7 +++ drivers/gpu/drm/i915/display/intel_dmc.c

[PATCH v5 2/4] drm/i915/display: don't allow DMC wakelock on older hardware

Only allow running DMC wakelock code if the display version is 20 or greater. Also check if DMC is loaded before enabling. Reviewed-by: Uma Shankar Signed-off-by: Luca Coelho --- .../drm/i915/display/intel_display_driver.c | 1 + drivers/gpu/drm/i915/display/intel_dmc_wl.c | 26

[PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks

In order to reduce the DC5->DC2 restore time, wakelocks have been introduced in DMC so the driver can tell it when registers and other memory areas are going to be accessed and keep their respective blocks awake. Implement this in the driver by adding the concept of DMC wakelocks. When the driver

[PATCH v5 0/4] drm/i915/display: DMC wakelock implementation

Hi, This is the seventh version of my series, the fifth as a proper patchset. These are the changes: In v5: * add DOC to i915.rst; * Removed duplicate paragraph in main DOC section; * Fixed comment-style in intel_dmc_wl_get(). In v4: * removed the call to init from the first patch

Re: [PATCH] drm/edid: Parse topology block for all DispID structure v1.x

On Wed, 10 Apr 2024, Ville Syrjala wrote: > From: Ville Syrjälä > > DisplayID spec v1.3 revision history notes do claim that > the toplogy block was added in v1.3 so requiring structure > v1.2 would seem correct, but there is at least one EDID in > edid.tv with a topology block and structure

Re: [PATCH v4 1/4] drm/i915/display: add support for DMC wakelocks

On Thu, 2024-04-11 at 09:40 +, Shankar, Uma wrote: > > -Original Message- > > From: Coelho, Luciano > > Sent: Thursday, April 4, 2024 5:12 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: intel...@lists.freedesktop.org; Shankar, Uma ; > > ville.syrj...@linux.intel.com; Nikula, Jani

Re: ✗ Fi.CI.IGT: failure for drm/edid & drm/i915: vendor and product id logging improvements (rev3)

On Thu, 11 Apr 2024, Patchwork wrote: > == Series Details == > > Series: drm/edid & drm/i915: vendor and product id logging improvements (rev3) > URL : https://patchwork.freedesktop.org/series/131414/ > State : failure [snip] > Possible regressions > > *

Re: linux-next: build warning after merge of the drm-misc tree

Hi all, On Fri, 12 Apr 2024 16:58:26 +1000 Stephen Rothwell wrote: > > After merging the drm-misc tree, today's linux-next build (htmldocs) > produced this warning: > > drivers/gpu/drm/drm_plane.c:1767: warning: expecting prototype for > drm_plane_add_size_hint_property(). Prototype was for

linux-next: build warning after merge of the drm-misc tree

Hi all, After merging the drm-misc tree, today's linux-next build (htmldocs) produced this warning: drivers/gpu/drm/drm_plane.c:1767: warning: expecting prototype for drm_plane_add_size_hint_property(). Prototype was for drm_plane_add_size_hints_property() instead Introduced by commit

Re: [PATCH] treewide: Fix common grammar mistake "the the"

On Fri, 12 Apr 2024, Thorsten Blum wrote: > On 11. Apr 2024, at 17:25, Dan Carpenter wrote: >> >> It's tricky to know which tree a patch like this would go through. > > The patch is based on the mainline tree. Should I have sent it directly to > Linus then? > > I'm relatively new here and

RE: [PATCH 1/6] drm/i915/dp: Make has_gamut_metadata_dip() non static

> -Original Message- > From: Kandpal, Suraj > Sent: Thursday, April 11, 2024 11:39 AM > To: intel-gfx@lists.freedesktop.org > Cc: Borah, Chaitanya Kumar ; Shankar, > Uma ; Nautiyal, Ankit K > ; Murthy, Arun R ; > Nikula, Jani ; Kumar, Naveen1 > ; Kandpal, Suraj > Subject: [PATCH 1/6]