RE: [kicad-users] Type Err(4) trace near pad issue in Kicad
I think you need to turn DRC (Design Rules Checking) off, but I'm a beginner too, so I'm not sure. Good luck, Cat To: kicad-users@yahoogroups.com From: mad...@free.fr ... I create a new project, open PCB new, place say a DIP-8_300 component, click on 'add traces and vias', start tracing... and get: Type Err(4) trace near pad ...
RE: [kicad-users] Re: Type Err(4) trace near pad issue in Kicad
Did you turn DRC off? That's the purpose of DRC, to NOT LET YOU do things that are not in the netlist (among other things). If you don't want to make a schematic, make a netlist. Cat To: kicad-users@yahoogroups.com From: mad...@free.fr Date: Fri, 20 Aug 2010 23:40:39 + Subject: [kicad-users] Re: Type Err(4) trace near pad issue in Kicad Well, I made a simple schematic with EEschema, passed the electrical check without trouble, made the netlist, did the CVpcb thing, and routed in PCBnew. All is fine, so my Kicad build seems to be working. I tried to add another module in the pcb. Fine. I tried to connect the new module with a trace... Type Err(4)! It doesn't agree to connect the trace to the new component. I still don't understand why I cannot route manually without a schematic or a netlist when the faq says I could? Axel
[kicad-users] Printing from eeSchema freezes it.
Hi, Using build 20100314 SVN-R2460 on XP, when I try to print (either from menu or button) it just freezes, like a print dialog would get all input but there is no print dialog. I use 2 monitors and multimon if it makes any difference. Help? Thanks, Cat
RE: [kicad-users] Recommended Zone Parameters
Nothing is perfect! Only Nadia was in Montreal! :-D ground plane parameters for a recent, perfect board of mine. I hope ...
RE: [kicad-users] DIY Solder mask?
There's a guy in Montreal that can cut the soldermask for you out of mylar at a very reasonable cost. It will take me a while to find his details so I'll only do it if there's interest. Cat To: kicad-users@yahoogroups.com From: anders.gustafs...@pedago.fi Date: Tue, 15 Jun 2010 14:41:45 + Subject: [kicad-users] DIY Solder mask? Anyone doing soldermasking themselves? I did some googling and found photosensitive laquers from www.peters.de, but thought I'd ask here for opinions first :) ...
RE: Sv: RE: [kicad-users] DIY Solder mask?
Yes, I was thinking stencil, sorry. To: kicad-users@yahoogroups.com From: anders.gustafs...@pedago.fi Date: Tue, 15 Jun 2010 21:18:26 +0300 Subject: Sv: RE: [kicad-users] DIY Solder mask? I think you are referring to masks for applying solder paste. I was thinking of the colour you use to stop solder from going where it should not. - Anders Gustafsson Engineer, CNE6, ASE Pedago, The Aaland Islands (N60 E20) www.pedago.fi phone +358 18 12060 mobile +358 40506 7099 fax +358 18 14060 Cat C catalin_c...@hotmail.com 2010-06-15 20:30 There's a guy in Montreal that can cut the soldermask for you out of mylar at a very reasonable cost. It will take me a while to find his details so I'll only do it if there's interest. Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
RE: [kicad-users] Preventing thermals on special pads of SM packages
Shouldn't there be more vias to take the heat to the bottom? T To: kicad-users@yahoogroups.com From: birmingham_spi...@gmx.net Date: Mon, 17 May 2010 09:57:50 +0100 Subject: Re: [kicad-users] Preventing thermals on special pads of SM packages I often have to work with MLF/QFN devices, which have a thermal pad on the bottom. There are two considerations here. Firstly there is the heatsinking requirement, and secondly if you get the copper design wrong the chip will float on a central blob of solder, resulting in unreliable soldering of the pins. For the thermal pad footprint for a 32 pin device I arrange 8 square pads around a central via, and I place solder resist over the via. I number all the (thermal) pads as 33, so I only end up with one extra pin in eeschema. I connect together the pads and the via with a grid of thick tracks. The use of a tented via in this way means that the via will be solidly connected to the heatsinking copper zone on the reverse side, whilst the tenting prevents solder wicking through the via. This arrangement has worked well for me. An alternative arrangement might be to use nine untented vias with very small drill holes in the same pattern. This would give better thermal contact between board and component, but I don't know how small the holes would have to be to prevent solder wicking, or whether they would end up so small that their heat transfer capability would be compromised. If that were the case I guess you could use more vias with a smaller annulus. However, whilst I would be interested to know if this is a better method, I've no idea what size the holes would have to be, I don't have the means to do the necessary experimentation, and the arrangement I use currently works well enough for me. Regards, Robert. On 15/05/2010 22:30, Karl Schmidt wrote: Today, there are many surface mount parts (MOSFETS, driver-chips etc.) that depend on a solid copper connection to aid in dissipating heat. Those pins should not have a thermal created to a ground plane. What is the best way to prevent the generation of this thermal? ( I think this should be an attribute of a pin type in eeschema - but it isn't there .. there might have been a 'T' attribute in PADS - might have been in the pad-stack definition? - if memory serves me right. I think it could default to T unless told not to do so). I think I can create a zone with thermals turned off - and kludge it up to work. This wasn't much of an issue in the past, but is rather common with the SM boards of today - probably should have some way to do this.. I want to write this up.. Karl Schmidt EMail k...@xtronics.com Transtronics, Inc. WEB http://xtronics.com 3209 West 9th Street Ph (785) 841-3089 Lawrence, KS 66049 FAX (785) 841-0434 Action speaks louder than words but not nearly as often. -- Mark Twain Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links No virus found in this incoming message. Checked by AVG - www.avg.com Version: 9.0.819 / Virus Database: 271.1.1/2878 - Release Date: 05/16/10 19:26:00 Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
RE: [kicad-users] 3 PCBs, 1 design
You might want to have connectors for wires/cables between those boards. So if the schematics show connectors instead of connections you might get what you want. Even if you won't populate connectors, you can still put some headers where you'll solder the wires. Cat To: kicad-users@yahoogroups.com From: j...@tmtcd.com Date: Mon, 10 May 2010 05:22:47 + Subject: [kicad-users] 3 PCBs, 1 design Hi, Still new to KiCAD. I hope there's a simple solution to my rather simple problem, since it must be very common. I haven't been able to find one in the docs or by poking at KiCAD. Can someone help? I have a design that will have three PCBs within a lot of other hand wiring, such as switches, panel connectors, a power module, and so on. I've created a hierarchical schematic that leads to each eventual PCB as a separate schematic sheet. I want to convert each of these three schematics to PCBs, one-by-one. KiCAD, however, seems to think that I want a PCB of the entire mess, not just the single sheet schematic. It compains that component numbers haven't been assigned to the higher items in the hierarchy (they haven't). So far, all I've figured out is to copy the schematic to another file and make a PCB from it. While this works, it's sloppy and automatic back-annotation seems impossble. Is there any way to force KiCAD to make a PCB of a single schematic sheet, even when buried within a larger hierarchical design? Thanks, Jim Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
RE: [kicad-users] Re: Gerber files
What kind of errors, if a PCB house can make the PCBs? Cat To: kicad-users@yahoogroups.com From: d...@andersson.co.uk Date: Wed, 5 May 2010 14:35:21 +0100 Subject: [kicad-users] Re: Gerber files The gerber files from KiCad might contain inconsistencies or gerber errors so do not blame yourself at the first instance it goes wrong with gerber data. Unfortunately, this shows mostly with larger gerber files... This sounds all a bit diffuse, I know. I just want to highlight the possibility of bad gerber output. //Dan, M0DFI
RE: [kicad-users] Merging outputs for double-sided boards
Just print on 2 separate pages, align them and staple/clip them on one side, then slip your board in. Cat To: kicad-users@yahoogroups.com From: susanmac...@optusnet.com.au Date: Sun, 2 May 2010 05:40:54 + Subject: [kicad-users] Merging outputs for double-sided boards I have designed a double-sided board that I now want to print out on to the transfer material for use in the toner transfer PC creation method. (I've used this in the past for single sided boards OK). To make sure both sides of the board are aligned, I want to print then at the same time onto the transfer material with a bit of a space in between so I can fold the material over, line up the top and bottom holes and then slip the board in between before running it through the laminator. To do this, I need to transfer the top and bottom images onto the same document page and this is where I'm running into some problems. I have tried to create plot files using both the PostScript and PostScript A4 options but they both create full page sized surrounding boxes when I try to import them into Pages so I can combine them into a single print document. I've also tried using photoshop to trim the images down to the right size (the board is about 5cm x 5cm) which results in a much smaller image but the rasterizing File (sic) process seems to result in jagged edges to some of the lines. (The funny thing is that these lines tend to be the vertical and horizontal lines so I don't think this is an anti-aliasing effect). All of this is done at 1200 pixels/inch. I've tried saving as TIFF and BMP formatted files I'm looking for help from others who have managed to combine the images of both sides successfully as to how to achieve this. I am using the Kicad OSX V 2505 build(but I don't this this is question is version related). Thanks Susan Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
RE: [kicad-users] PCBnew - Howto connect vias to zone
Hi Mirko, I don't know how (why even) to create a layout without a schematic so my workaround may not work if you do it that way. If you had a schematic, nets would have names and you would connect the zone (in properties) to the GND net (or whatever you called it), same as the pin of the componnent you want to connect to it. Without a schematic you can try to fill zone, place via, then do EDIT/Cleanup Tracks and Vias/ Unselect all but Merge Segments (maybe connect to pads?)/Clean PCB. Good luck, Cat To: kicad-users@yahoogroups.com From: mirko.sch...@gmail.com Date: Mon, 19 Apr 2010 10:36:48 +0200 Subject: [kicad-users] PCBnew - Howto connect vias to zone Hi, I am currently working on a double layer PCB where vias are used to connect all grounds together. All components are mounted on the top side. The grounds of the components are connected by using vias to zones on the bottom side of the PCB. When I ask to fill the zones I have always a cutout around the vias. The same happens with the vias of the SMA connectors on the same board. Also in the GERBER plots the cutouts are still there. What do I do wrong? When I define the zone parameters PCBnew gives the error message that I did choose the no connected option and this would create copper island. Maybe for additional explanation: I created the board without making a schematic in KiCAD. Thanks for your help, Mirko
RE: [kicad-users] How to restore/set Net Name to Tracks.
THANK YOU! Cat To: kicad-users@yahoogroups.com From: birmingham_spi...@gmx.net Date: Fri, 9 Apr 2010 10:30:56 +0100 Subject: Re: [kicad-users] How to restore/set Net Name to Tracks. Before you attempt any track operations select Edit...Cleanup Tracks and Vias. Deselect everything except Merge segments, and then hit the Clean pcb button. Regards, Robert. On 09/04/2010 10:23, Anders O wrote: The suggested approach works very well, though the track is now devided into two tracks, which disables drag segment, keep slope. Joining two tracks is a feature I miss. Sometimes, it's simply easier to delete and retrace :( From: Robertbirmingham_spi...@gmx.net To: kicad-users@yahoogroups.com Sent: Fri, April 9, 2010 10:56:07 AM Subject: Re: [kicad-users] How to restore/set Net Name to Tracks. Have you tried Rebuild Board Connectivity from the netlist import dialog? From memory you just turn off the DRC so you can connect the orphan track to the appropriate net, and then you hit this button. Then you can turn on the DRC again and carry on working as normal. Regards, Robert. On 08/04/2010 18:11, Cat C wrote: I don't know if I'm the only one, but quite often some tracks will loose their net name so I can't attach them to the desired pad. How can I restore, or set (if there never was) the net of a track, please? Thanks,
[kicad-users] How to restore/set Net Name to Tracks.
I don't know if I'm the only one, but quite often some tracks will loose their net name so I can't attach them to the desired pad. How can I restore, or set (if there never was) the net of a track, please? Thanks, Cat
RE: [kicad-users] Re: Is it possible to copy a block of layout and have pcbnew change the references automatically in a multi-channel design?
Thanks, that's worth looking into. I think I was able to get the refs to be consecutive, or I could be in the future. BUT: it would be nice if I could give it a step size to the r option, because I make sub-groups that would be nice to be able to copy... Thanks again, Cat To: kicad-users@yahoogroups.com From: ax...@yahoo.com Date: Wed, 7 Apr 2010 12:53:25 + Subject: [kicad-users] Re: Is it possible to copy a block of layout and have pcbnew change the references automatically in a multi-channel design? The perl script Kdupe.pl in the file area here might be coerced into helping. It is mostly intended to aid in duplicating a complete board into an array for a panel, and so by default it does not touch the reference numbers. However, it does have an option to adjust the ref des numbers of successive copies. What you would need to do would be to create a board layout with just one copy of the channel and then duplicate that .brd file using Kdupe.pl with the r option appended. Open the result and copy the new array back to the original layout (or use it as the starting point for the layout). That gets you an array of identical sections with unique ref des numbers BUT you may need to go back to the schematic if the algorithm used to assign successive ref des idents doesn't match the netlist. --- In kicad-users@yahoogroups.com, Cat C catalin_c...@... wrote: Hi There, I tried to make the subject descriptive, but here it is: If I have a design with 10 identical channels, can I lay one channel out and then copy and paste-it and somehoy get pcbnew to use the references of the next channel? Thanks, Cat
[kicad-users] Is it possible to copy a block of layout and have pcbnew change the references automatically in a multi-channel design?
Hi There, I tried to make the subject descriptive, but here it is: If I have a design with 10 identical channels, can I lay one channel out and then copy and paste-it and somehoy get pcbnew to use the references of the next channel? Thanks, Cat
RE: [kicad-users] Is it possible to copy a block of layout and have pcbnew change the references automatically in a multi-channel design?
No. I just have many channels that at some point connect together, etc. Think Audio Equalizer (just an example). Thanks, Cat To: kicad-users@yahoogroups.com From: atarillusionma...@yahoo.com.br Date: Tue, 6 Apr 2010 23:00:59 -0300 Subject: Re: [kicad-users] Is it possible to copy a block of layout and have pcbnew change the references automatically in a multi-channel design? Do you want create a panel of pcbs? C.A.P. Em 6/4/2010 16:49, Cat C escreveu: Hi There, I tried to make the subject descriptive, but here it is: If I have a design with 10 identical channels, can I lay one channel out and then copy and paste-it and somehoy get pcbnew to use the references of the next channel? Thanks, Cat
RE: [kicad-users] Re: Footprint for TI PowerPAD: SMD with holes.
Thanks Christophe, I was wondering if that would work. I did something similar, a big pad 11 that has the hole in the middle and 4 small-overlapping pads 12-15 with the holes in the corners. My worry (if I give them the same number) was... how will I choose between them when I right-click and I'd get a disambiguation dialog asking me to choose between pad 11 and pad 11 (if I need to edit something, for example)? I had to make them invisible in the symbol but give them the name of the net they-ll connect to... I'm not sure that's the best way. Thanks again, Cat To: kicad-users@yahoogroups.com From: chnico...@sbcglobal.net ... I created 2 or 3 power pad TI components. The way I did it is just creating extra standard pads with the same number on top of a rectangular smd pad with the same number Christophe --- In kicad-users@yahoogroups.com, catalin_cluj catalin_c...@... wrote: Hello, I'm trying to make a footprint for a thing that TI calls a PowerPad and is in fact an MSOP-10 with a thermal pad that has 5 holes going to the bottom where I think there is another pad. ...
