Hello.
The scenario:
PCI bus with 2 cards (sata_via)
Each card has 2 SATA ports connected.
Each disk does 40MB/s in hdparm -t read test.
First card has the sda and sdb
Second card has the sdc and sdd
verified by watching the led blinking on the card
ok - accessing two ports at same time but
This is Palmchip BK3710 IDE controller support for kernel version 2.6.24-rc8.
The IDE controller logic supports PIO, multiword DMA and ultra-DMA modes.
Supports interface to compact Flash (CF) configured in True-IDE mode.
Signed-off-by: Anton Salnikov [EMAIL PROTECTED]
---
drivers/ide/Kconfig
I will work on getting that log - is there anything non-kernel that
may have changed that could cause this? udev changes or something
like that? Just so odd for it to start failing after having worked
for so long.
...tom
On Jan 23, 2008 10:52 PM, Tejun Heo [EMAIL PROTECTED] wrote:
Thomas
Thomas Evans wrote:
I will work on getting that log - is there anything non-kernel that
may have changed that could cause this? udev changes or something
like that? Just so odd for it to start failing after having worked
for so long.
Nope, this is way before userland has any say in it. The
Tejun,
During testing with NCQ on sata_mv (patches coming shortly),
I found this gem in the syslog. This doesn't look like something
that a LLD could cause, but rather a race perhaps in libata-core.
System is a 2.4GHz 32-bit Core2Quad, 2GB RAM (during this test),
running 2.6.24-rc6-git12 +
Mark Lord wrote:
Tejun,
During testing with NCQ on sata_mv (patches coming shortly),
I found this gem in the syslog. This doesn't look like something
that a LLD could cause, but rather a race perhaps in libata-core.
Hmmm... This isn't supposed to happen.
System is a 2.4GHz 32-bit
Tejun Heo wrote:
Mark Lord wrote:
Tejun,
During testing with NCQ on sata_mv (patches coming shortly),
I found this gem in the syslog. This doesn't look like something
that a LLD could cause, but rather a race perhaps in libata-core.
Hmmm... This isn't supposed to happen.
System is a
That's what I thought - is there another chip that support the 4726
PMP that you think I could try?
...tom
On Jan 24, 2008 10:11 AM, Tejun Heo [EMAIL PROTECTED] wrote:
Thomas Evans wrote:
I will work on getting that log - is there anything non-kernel that
may have changed that could cause
Thomas Evans wrote:
That's what I thought - is there another chip that support the 4726
PMP that you think I could try?
JMicron SATA controllers are ahci and support PMP.
--
tejun
-
To unsubscribe from this list: send the line unsubscribe linux-ide in
the body of a message to [EMAIL
Hi,
On Jan 21, 2008 8:47 AM, Tejun Heo [EMAIL PROTECTED] wrote:
If you still have the old PSU lying around, please try to power one of
the failing drive with the old PSU. Just leave everything else as-is,
power-up old PSU by itself as described in the following web page and
connect only one
Anton Salnikov wrote:
This is Palmchip BK3710 IDE controller support for kernel version 2.6.24-rc8.
The IDE controller logic supports PIO, multiword DMA and ultra-DMA modes.
Supports interface to compact Flash (CF) configured in True-IDE mode.
Signed-off-by: Anton Salnikov [EMAIL PROTECTED]
Here is a set of 12 patches that gradually add working NCQ support to sata_mv.
The driver still has issues afterwards, but nothing new that wasn't broken
already.
I am working on additional patches to correct the interrupt and error handling
problems that still exist in the driver, as well as
sata_mv EH fixes.
A hard reset is necessary after hotplug events.
Only clear the error irq bits that were set on entry.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 10:40:11.0 -0500
+++ new/drivers/ata/sata_mv.c 2008-01-24 11:11:26.0
sata_mv Clear queue indexes on chip restart.
Force in/out queue pointer indexes back to zero on any (re)init.
This ensures things are in a consistent state after any chip/dev errors.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 11:17:42.0 -0500
sata_mv rename base to port_mmio.
Use naming consistent with elsewhere in this driver.
This will keep things less confusing when we later add hc_mmio in this
function.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 11:23:05.0 -0500
+++
sata_mv Add want_ncq parameter for EDMA configuration.
An extra EDMA config bit is required for NCQ operation.
So set/clear it as needed, and cache current setting in port_priv.
For now though, it will always be off (0).
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c
sata_mv Use hqtag instead of ioid.
Simplify tag handling by using the cid/hqtag field instead of ioid,
as recommended by Marvell.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 12:07:16.0 -0500
+++ new/drivers/ata/sata_mv.c 2008-01-24
sata_mv Ignore response status LSB on NCQ.
The lower 8 bits of response status are not valid for NCQ.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 12:35:14.0 -0500
+++ new/drivers/ata/sata_mv.c 2008-01-24 12:35:43.0 -0500
@@ -1587,13
sata_mv Use DMA memory pools for hardware memory tables.
Create module-owned DMA memory pools, for use in allocating/freeing per-port
command/response queues and SG tables. This gives us a way to guarantee we
meet the hardware address alignment requirements, and also reduces memory that
might
sata_mv Introduce per-tag SG tables.
In preparation for supporting NCQ, we must allocate separate SG tables
for each command tag, rather than just a single table per port as before.
Gen-I hardware cannot do NCQ, though, so we still allocate just a single
table for that, but populate it in all
sata_mv Enable NCQ operation.
Final changes to actually turn on NCQ in the driver for GEN II/IIE hardware.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 14:46:16.0 -0500
+++ new/drivers/ata/sata_mv.c 2008-01-24 14:49:28.0 -0500
@@
sata_mv No soft resets.
Soft resets rarely have significant effect with these chips,
so always do a hard reset instead.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 14:49:28.0 -0500
+++ new/drivers/ata/sata_mv.c 2008-01-24 14:51:53.0
sata_mv Comments and version bump.
Remove some obsolete comments, and bump up the driver version number.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
--- old/drivers/ata/sata_mv.c 2008-01-24 15:09:31.0 -0500
+++ new/drivers/ata/sata_mv.c 2008-01-24 15:41:17.0 -0500
@@ -29,8
Mark Lord wrote:
Here is a set of 12 patches that gradually add working NCQ support to
sata_mv.
..
Well, 14 patches, not 12.
But they're mostly very small. :)
-
To unsubscribe from this list: send the line unsubscribe linux-ide in
the body of a message to [EMAIL PROTECTED]
More majordomo info
Hi.
More through test revealed that only the second port of each card is failing.
Accessing (cat /dev/sdX /dev/null) just the sdb or sdd alone = one drive at
time produces the error message.
Switched data cables on the card. ata1 port for ata2 port. This should
eliminate defective power
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun,
During testing with NCQ on sata_mv (patches coming shortly),
I found this gem in the syslog. This doesn't look like something
that a LLD could cause, but rather a race perhaps in libata-core.
Hmmm... This isn't supposed to happen.
Tejun Heo wrote:
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun,
..
void ata_qc_issue(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc-ap;
struct ata_link *link = qc-dev-link;
/* Make sure only one non-NCQ command is outstanding. The
* check
Hmm.
Removed 3 drives. Both data and power.
Left only port1 connected
It's the drive and power cable that in the first test was port2 failing
and in second test was port1 and ok
both cards plugged in and initialized.
third test it's the port1 alone sda working ok
fourth test it's the port2 alone
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun,
..
void ata_qc_issue(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc-ap;
struct ata_link *link = qc-dev-link;
/* Make sure only one non-NCQ command is outstanding.
Tejun Heo wrote:
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun,
..
void ata_qc_issue(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc-ap;
struct ata_link *link = qc-dev-link;
/* Make sure only one non-NCQ command
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
Tejun,
..
void ata_qc_issue(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc-ap;
struct ata_link *link = qc-dev-link;
/* Make sure only
Mark Lord wrote:
sata_mv Add missing qc_defer op.
This is necessary now that we support NCQ in the driver.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
Acked-by: Tejun Heo [EMAIL PROTECTED]
--
tejun
-
To unsubscribe from this list: send the line unsubscribe linux-ide in
the body of a
Hello, Shane. Sorry about the delay. Got caught up in other stuff.
Shane Huang wrote:
Quoting Tejun:
Uh-oh, wait a bit. Nope. Until we figure out what the something
else
is
and positively verify 64bit DMA works fine, the quirk stays in.
Our HW engineer has confirmed that our SB600 SATA
sata_mv Add missing qc_defer op.
This is necessary now that we support NCQ in the driver.
Signed-off-by: Mark Lord [EMAIL PROTECTED]
---
Who says a 14-patch series cannot have a 15th patch? :)
--- old/drivers/ata/sata_mv.c 2008-01-24 18:55:12.0 -0500
+++ new/drivers/ata/sata_mv.c
[cc'ing linux-ide]
Thanks, hmmm... weird. The log is w/ MSI disabled, right? SB600 is
reporting MSI capability alright. I wonder why MSI is not enabled with
the quirk lifted. Can you please post full boot log and the result of
'lspci -nnvvvxxx' w/ the quirk removed?
Thanks.
--
tejun
-
To
Tejun Heo wrote:
Hello,
Jim MacBaine wrote:
A co-worker, to whom I explained my problem, asked me whether I had
properly grounded my drives. In fact I had not: The drives resided in
a vibration-absorbing frame through which their exterior had no
electrical contact with the grounded case.
Tejun Heo wrote:
Mark Lord wrote:
..
Super. And when I add FIS-based-switching PMP support on top of NCQ,
*then* what should it point at?
If the controller can do FIS-based switching w/o any other restrictions,
ata_std_qc_defer() can just stay. If there are restrictions, you need
to roll
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
..
Super. And when I add FIS-based-switching PMP support on top of NCQ,
*then* what should it point at?
If the controller can do FIS-based switching w/o any other restrictions,
ata_std_qc_defer() can just stay. If there are restrictions,
Tejun,
I have an SB600/RS690 here with SATA drives connected. I haven't been
following this thread, but I can help test something if it would help.
Thanks,
-Andrew
On Jan 24, 2008 7:21 PM, Tejun Heo [EMAIL PROTECTED] wrote:
Hello, Shane. Sorry about the delay. Got caught up in other stuff.
Tejun Heo wrote:
Mark Lord wrote:
..
Super! You've done a great job with this stuff, Tejun!
Thanks but I can't really say nice things about how sata_sil24's
qc_defer() is implemented or how we generally handle command deferring.
We really need the control at the higher level - request_queue
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
..
Super! You've done a great job with this stuff, Tejun!
Thanks but I can't really say nice things about how sata_sil24's
qc_defer() is implemented or how we generally handle command deferring.
We really need the control at the higher
Andrew Paprocki wrote:
I have an SB600/RS690 here with SATA drives connected. I haven't been
following this thread, but I can help test something if it would help.
We're trying to determine whether SB600 ahci controller can do 64bit DMA
or not. Srihari's couldn't but Shane's test result tells
Mark Lord wrote:
Tejun Heo wrote:
Mark Lord wrote:
..
Super! You've done a great job with this stuff, Tejun!
Thanks but I can't really say nice things about how sata_sil24's
qc_defer() is implemented or how we generally handle command deferring.
We really need the control at the higher
Tejun Heo wrote:
Mark Lord wrote:
Another one for those beers, is a way to tell the IOMMU code about
physical segment limitations -- so we can stop having to allocate
PRD tables 2X as big as necessary in drivers like sata_mv.
Hmmm... What's the restriction for sata_mv? The same as BMDMA? We
44 matches
Mail list logo
