On 06/30/2014 07:30 AM, Fredrik Noring wrote:
On Fri, Jun 27, 2014 at 04:16:57PM +, Fredrik Noring wrote:
Please find below a trace that appeared once with 3.16-rc2. Perhaps it
is of some interest?
It's not that serious... I know that the FEC ethernet driver is horrendously
racy (I have
On 06/30/2014 02:49 PM, Christopher Friedt wrote:
On Mon, Jun 30, 2014 at 8:39 AM, Thomas Hellstrom thellst...@vmware.com
wrote:
xf86-video-vmware in kms mode uses the kernel driver to set these registers.
FWIW, the modesetting part of the kernel driver uses SVGA_REG_PITCHLOCK
instead of
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Cc: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Mark Rutland mark.rutl...@arm.com
Acked-by: Alexandre Torgue
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Mark Rutland mark.rutl...@arm.com
Signed-off-by: Alexandre
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: Mark Rutland mark.rutl...@arm.com
Acked-by: Alexandre Torgue alexandre.tor...@st.com
Signed-off-by: Lee
---
drivers/phy/phy-miphy365x.c | 104
1 file changed, 75 insertions(+), 29 deletions(-)
diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c
index 1109f42..2c4ea6e 100644
--- a/drivers/phy/phy-miphy365x.c
+++
This provides the shared header file which will be reference from both
the MiPHY365x driver and its associated Device Tree node(s).
Cc: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Mark Rutland mark.rutl...@arm.com
Acked-by: Alexandre Torgue alexandre.tor...@st.com
Signed-off-by: Lee Jones
Hi Kishon,
This submission is the same as the last one, only each channel is
now represented by its own sub-node. The documentation has also
been updated accordingly.
Kind regards,
Lee
.../devicetree/bindings/phy/phy-miphy365x.txt | 76 +++
arch/arm/boot/dts/stih416-b2020-revE.dts
Hi Lee,
No description, no sign-off?
On 06/30/2014 03:01 PM, Lee Jones wrote:
---
drivers/phy/phy-miphy365x.c | 104
1 file changed, 75 insertions(+), 29 deletions(-)
diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c
This series adds the support for Berlin SoC AHCI controller. The
controller allows to use the SATA host interface and, for example, the
eSATA port on the BG2Q.
The series adds a PHY driver to control the two SATA ports available,
and adds a generic compatible to use the existing ahci_platform
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
.../devicetree/bindings/phy/berlin-sata-phy.txt| 34 ++
1 file changed, 34 insertions(+)
create mode
The BG2Q has an AHCI SATA controller. Add the corresponding nodes
(AHCI, PHY) into its device tree.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git
The libahci now allows to use multiple PHYs and to represent each port
as a sub-node. Add these bindings to the documentation.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
.../devicetree/bindings/ata/ahci-platform.txt | 37 ++
1 file changed, 37
The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
The mode selection can let us think this PHY can be configured to fit
other purposes. But there are reasons to think the SATA mode will be
the only one usable: the PHY registers are only accessible indirectly
through two
The current implementation of the libahci does not allow to use multiple
PHYs. This patch adds the support of multiple PHYs by the libahci while
keeping the old bindings valid for device tree compatibility.
This introduce a new way of defining SATA ports in the device tree, with
one port per
The ahci_platform driver is a generic driver using the libahci_platform
functions. Add a generic compatible to avoid having an endless list of
compatibles with no differences for the same driver.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
drivers/ata/ahci_platform.c | 2
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it.
Only enable the first port, the BG2Q DMP does not support the second one.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 8
1 file changed, 8
On Mon, Jun 30, 2014 at 08:50:47AM -0400, Prarit Bhargava wrote:
AMD defines a Package as the hardware processor itself. Each Package
contains
multiple Nodes, and each Node has multiple Compute Units. Each Compute Unit
can
have up to 2 cores that [with the 62xx and 63xx] do not have
This fixes the following build failure:
CC [M] arch/arm64/crypto/aes-glue-ce.o
ld: cannot find arch/arm64/crypto/aes-glue-ce.o: No such file or directory
scripts/Makefile.build:393: recipe for target 'arch/arm64/crypto/aes-ce-blk.o'
failed
make[1]: *** [arch/arm64/crypto/aes-ce-blk.o] Error 1
On 27/06/14 16:38, David Howells wrote:
Mimi Zohar zo...@linux.vnet.ibm.com wrote:
+if (strncmp(id, id:, 3) == 0)
Use memcmp() here.
'id' function parameter comes from keys_ownerid kernel parameter.
User can supply anything shorter than id:.
Though comparing 3 bytes should not produce
On Mon, Jun 30, 2014 at 8:49 AM, Christopher Friedt
chrisfri...@gmail.com wrote:
That sounds a bit more accurate. Should kms and fbdev be setting both
registers then?
I wonder if fbdev can use PITCHLOCK as well, rather than
BYTES_PER_LINE. I will only be able to run both kms and fbdev
On Monday 30 June 2014 12:30:51 Daniel Thompson wrote:
This patchset removes some single-platform compatibility tricks related
to DEBUG_LL and, as a result, allows multi_v7_defconfig derived builds
to enable DEBUG_LL. Currently the user selected kbuild setting is
ignored and the PL01X's
On Mon, Jun 30, 2014 at 01:33:24PM +0200, Steffen Klassert wrote:
Ccing netdev.
On Thu, Jun 26, 2014 at 02:12:30PM -0700, Evan Gilman wrote:
Hi all
We have a couple Ubuntu 10.04 hosts with kernel version 3.14.5 which are
experiencing TCP payload corruption when using IPSec in
On 06/30/2014 03:18 PM, Christopher Friedt wrote:
On Mon, Jun 30, 2014 at 8:49 AM, Christopher Friedt
chrisfri...@gmail.com wrote:
That sounds a bit more accurate. Should kms and fbdev be setting both
registers then?
I wonder if fbdev can use PITCHLOCK as well, rather than
BYTES_PER_LINE. I
Hi,
+Matteo
Am 30.06.2014 07:15, schrieb Olof Johansson:
On Sun, Jun 29, 2014 at 1:50 PM, Andreas Färber afaer...@suse.de wrote:
This allows to boot the Adapteva Parallella board to serial console.
Cc: Andreas Olofsson andr...@adapteva.com
Signed-off-by: Andreas Färber afaer...@suse.de
From: Anil Belur ask...@gmail.com
- this replaces jiffies comparision with safer function using
time_after_eq()
Signed-off-by: Anil Belur ask...@gmail.com
---
drivers/staging/speakup/speakup_dectlk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Sun, Jun 29, 2014 at 11:24:23PM +0200, Borislav Petkov wrote:
Btw, I thought you had that gcc 4.2.x from some distro or so. Because
if it is in some ancient distro, one could install it in kvm and test
and play with it.
Ok, I did dig out an ancient debian I had lying around here with gcc
Fix a NULL pointer exception when main exynos drm driver was probed
successfully but no components were added (e.g. by incomplete DTS). In
such case the exynos_drm_load() is never called and drvdata is NULL.
The NULL pointer exception may theoretically also happen as a effect of race
between
On Fri, 27 Jun 2014 19:01:16 +0200
Oleg Nesterov o...@redhat.com wrote:
Hello,
It took me several hours to realize that the strange bug I hit was
caused by the change I have nacked in the past ;)
But it appears that I should take the blame. I was cc'ed, but I missed
that email or forgot
On 06/30/2014 09:13 AM, Borislav Petkov wrote:
On Mon, Jun 30, 2014 at 08:50:47AM -0400, Prarit Bhargava wrote:
AMD defines a Package as the hardware processor itself. Each Package
contains
multiple Nodes, and each Node has multiple Compute Units. Each Compute Unit
can
have up to 2
The Allwinner A31 DMA controller is rather simple to describe in the DT. Add
the bindings documentation.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../devicetree/bindings/dma/sun6i-dma.txt | 45 ++
1 file changed, 45 insertions(+)
create mode
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to share the driver for these two.
The A31 Controller is
Hi,
This patchset adds support for the DMA controller found in the
Allwinner A31 and A23 SoCs.
This has been tested using the newly introduced SPI driver on an A31
EVK. Support for DMA-driven SPI transfers will be the subject of
another patch serie.
Thanks,
Maxime
Changes from v9:
- Rebased
On Sun, Jun 29, 2014 at 1:20 AM, Joe Perches j...@perches.com wrote:
The DEFINE_SIMPLE_ATTRIBUTE macro should not end in a ;
Fix the one use in the kernel tree that did not have a semicolon.
Signed-off-by: Joe Perches j...@perches.com
Acked-by: Luca Tettamanti kronos...@gmail.com
For my
On Saturday, June 28, 2014 11:32:21 AM Alan Stern wrote:
On Fri, 27 Jun 2014, Greg Kroah-Hartman wrote:
On Fri, Jun 27, 2014 at 04:11:35PM -0400, Alan Stern wrote:
On Fri, 27 Jun 2014, Greg Kroah-Hartman wrote:
One side point: The patch changes the string displayed for the
On Mon, Jun 30, 2014 at 11:40:54AM +0200, Sachin Kamat wrote:
‘all_lists’ and ‘orphan_list’ is accessed only when DEBUG_FS is defined.
Thus, make their compilation conditional to fix the below warnings introduced
by commit 27b8d5f723 (clk: flatten clk tree in debugfs):
drivers/clk/clk.c:40:27:
Am Montag, 30. Juni 2014, 13:31:26 schrieb Fengguang Wu:
Hi Fengguang,
Hi Stephan,
On Sun, Jun 29, 2014 at 09:45:48PM +0200, Stephan Mueller wrote:
Am Sonntag, 29. Juni 2014, 22:52:46 schrieb Fengguang Wu:
Hi Fengguang,
Greetings,
0day kernel testing robot got the below dmesg and
Hello.
On 06/30/2014 09:06 PM, Chen, Alvin wrote:
From: Bryan O'Donoghue bryan.odonog...@intel.com
The EHCI packet buffer in/out threshold is programmable for Intel Quark X1000
USB host controller, and the default value is 0x20 dwords. The in/out threshold
can be programmed to 0x80 dwords
On Mon, Jun 30, 2014 at 08:46:44AM +0200, Pavel Machek wrote:
:-). Aha, and I misremembered, it was block descriptor checksums, not
inode checksums:
One or more block group descriptor checksums are invalid. Fix? yes
Group descriptor 0 checksum is invalid. FIXED.
Group descriptor 1
On Mon, Jun 30, 2014 at 09:29:05AM -0400, Prarit Bhargava wrote:
Yes, I get that. But this doesn't uniquely identify *which* processor
it is.
What do you mean, which processor it is? You want to know which
processor on the motherboard, physically? When you look at the mobo and
if all is
On 30 June 2014 15:14, Andreas Schwab sch...@suse.de wrote:
This fixes the following build failure:
CC [M] arch/arm64/crypto/aes-glue-ce.o
ld: cannot find arch/arm64/crypto/aes-glue-ce.o: No such file or directory
scripts/Makefile.build:393: recipe for target
Peter,
On Fri, Jun 27, 2014 at 11:25:07AM +0800, Peter Chen wrote:
On Tue, Jun 24, 2014 at 12:35:16PM +0200, Antoine Ténart wrote:
ifneq ($(CONFIG_OF),)
obj-$(CONFIG_USB_CHIPIDEA) += usbmisc_imx.o ci_hdrc_imx.o
+ obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_generic.o
endif
On 27/06/14 20:44, Mimi Zohar wrote:
On Fri, 2014-06-27 at 14:55 +0100, David Howells wrote:
Mimi Zohar zo...@linux.vnet.ibm.com wrote:
This patch defines a new kernel parameter 'keys_ownerid' to identify
the owner's key which must be used for trust validation of certificates.
ca_keys or
On 27.05.2014 13:27, Jonghwa Lee wrote:
Exynos4 has saveral PPMUs and each of them has operation clock which
can be gated through CMU's SFR control.
New clocks are listed below. All clocks are added as a gate-typed clock.
CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUCAMIF, CLK_PPMUTV,
On 18.06.2014 11:52, Charles Keepax wrote:
In the move to this clock driver the hookups for the SPI clocks were
dropped, which causes my system Cragganmore (s3c6410 based) to be unable
to locate any spibus clocks. This patch adds them back in.
When taking the clock from the epll clock (SCLK)
On 05.06.2014 22:35, Doug Anderson wrote:
The aclk66_peric clock is a gate clock with a whole bunch of gates
underneath it. This big gate isn't very useful to include in our
clock tree. If any of the children need to be turned on then the big
gate will need to be on anyway. ...and there are
PUD 50a09067 PMD 0
[ 761.704089] Oops: [#1] PREEMPT SMP DEBUG_PAGEALLOC
[ 761.704089] Dumping ftrace buffer:
[ 761.704089](ftrace buffer empty)
[ 761.704089] Modules linked in:
[ 761.704089] CPU: 4 PID: 20723 Comm: trinity-c131 Tainted: GW
3.16.0-rc3-next-20140630-sasha
On 24.06.2014 15:57, Tomasz Figa wrote:
ISP special clocks have dedicated gating registers and so MUX SRC_MASK
register should not be used. This patch fixes the problem of
Exynos4x12-based boards freezing on system suspend, because those
mux outputs need not to be masked while suspending.
On 6/29/2014 5:52 AM, Randy Dunlap wrote:
On 06/23/14 05:15, Horia Geanta wrote:
Object-like macros are different than function-like macros:
https://gcc.gnu.org/onlinedocs/cpp/Object-like-Macros.html
https://gcc.gnu.org/onlinedocs/cpp/Function-like-Macros.html
They are not parsed correctly,
No description, no sign-off?
Ah bum. More haste, less speed. Will fix.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line unsubscribe
On 26/06/14 10:54, Daniel Thompson wrote:
Also bear in mind that svc_entry calls trace_hardirqs_off - is this
appropriate and safe for the FIQ to call?
I personally think it appropriate and it looked safe on the lockdep side
of things. However I will look a bit deeper at this since I don't
Hello,
On Tue, Jun 24, 2014 at 07:51:01PM +0900, Jingoo Han wrote:
On Tuesday, June 24, 2014 7:35 PM, Antoine Tenart wrote:
Add a generic ChipIdea driver, with optional PHY and clock, to support
ChipIdea controllers that doesn't need specific functions.
s/doesn't/don't
Needed
Ard Biesheuvel ard.biesheu...@linaro.org writes:
Out of curiosity, how did you trigger this failure? I have build this
code numerous times (and so have others) and I have never seen this
failure.
Did you ever start with a clean tree?
Andreas.
--
Andreas Schwab, SUSE Labs, sch...@suse.de
On Mon, 2014-06-30 at 16:47 +0300, Dmitry Kasatkin wrote:
On 27/06/14 20:44, Mimi Zohar wrote:
On Fri, 2014-06-27 at 14:55 +0100, David Howells wrote:
Mimi Zohar zo...@linux.vnet.ibm.com wrote:
This patch defines a new kernel parameter 'keys_ownerid' to identify
the owner's key which
On Mon, 2014-06-30 at 11:54 +0530, Preeti U Murthy wrote:
Commit 8d6f7c5a: powerpc/powernv: Make it possible to skip the IRQHAPPENED
check in power7_nap() added code that prevents even cores which enter sleep
on idle, from checking for pending interrupts. Fix this.
Signed-off-by: Preeti U
On 30 June 2014 15:56, Andreas Schwab sch...@suse.de wrote:
Ard Biesheuvel ard.biesheu...@linaro.org writes:
Out of curiosity, how did you trigger this failure? I have build this
code numerous times (and so have others) and I have never seen this
failure.
Did you ever start with a clean
On 06/30/2014 09:38 AM, Borislav Petkov wrote:
On Mon, Jun 30, 2014 at 09:29:05AM -0400, Prarit Bhargava wrote:
Yes, I get that. But this doesn't uniquely identify *which* processor
it is.
What do you mean, which processor it is? You want to know which
processor on the motherboard,
On Sun, 29 Jun 2014 23:20:23 +0200
Helge Deller del...@gmx.de wrote:
Sadly the arch-related tracing code in parisc is really broken.
It doesn't even compile cleanly on parisc (at least on 64bit), and as I wrote
you in another mail
I really need to fix this soon (which I already started on).
On Mon, 30 Jun 2014 12:13:08 +0900
Masami Hiramatsu masami.hiramatsu...@hitachi.com wrote:
Uh, from the same reason, I must list it in the kprobe blacklist too...
Ah yes!
BTW, as far as I can review, x86 and generic parts of the series seems
OK to me. :)
Can you post a Acked-by or
Applied to cgroup/for-3.16-fixes with minor updates. Thanks.
-- 8 --
From 3a32bd72d77058d768dbb38183ad517f720dd1bc Mon Sep 17 00:00:00 2001
From: Li Zefan lize...@huawei.com
Date: Mon, 30 Jun 2014 11:50:59 +0800
Subject: [PATCH 3/3] cgroup: fix a race between cgroup_mount() and
Hi Maxime,
On Mon, Jun 30, 2014 at 02:20:54PM +0100, Maxime Ripard wrote:
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect
Hello, Li.
I applied the three patches with some updates (mostly comments).
Dynamic root management is turning out to be pretty ugly but I think
we can clean it up a bit.
On Mon, Jun 30, 2014 at 11:50:59AM +0800, Li Zefan wrote:
@@ -1790,6 +1795,17 @@ out_free:
dentry =
We cannot register supply alias in mfd_add_device before calling
platform_add_device because platform-dev's name must be set before registering
the aliases which happens from platform_add_device.
So stop registering supply aliases from mfd_add_device, and add a
mfd_register_supply_aliases helper
The mfd-core no longer registers the supply aliases, instead the platform
driver probe method must now call mfd_register_supply_aliases().
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/regulator/axp20x-regulator.c | 5 +
1 file changed, 5 insertions(+)
diff --git
The mfd-core no longer registers the supply aliases, instead the platform
driver probe method must now call mfd_register_supply_aliases().
Signed-off-by: Hans de Goede hdego...@redhat.com
---
sound/soc/codecs/wm5102.c | 5 +
sound/soc/codecs/wm5110.c | 5 +
sound/soc/codecs/wm8997.c | 7
Applied with minor updates.
Thanks.
--- 8 ---
From 970317aa48c6ef66cd023c039c2650c897bad927 Mon Sep 17 00:00:00 2001
From: Li Zefan lize...@huawei.com
Date: Mon, 30 Jun 2014 11:49:58 +0800
Subject: [PATCH 1/3] cgroup: fix mount failure in a corner case
# cat test.sh
#! /bin/bash
Applied to cgroup/for-3.16-fixes with minor updates. Thanks.
-- 8 --
From 4e26445faad366d67d7723622bf6a60a6f0f5993 Mon Sep 17 00:00:00 2001
From: Li Zefan lize...@huawei.com
Date: Mon, 30 Jun 2014 11:50:28 +0800
Subject: [PATCH 2/3] kernfs: introduce kernfs_pin_sb()
kernfs_pin_sb() tries
Hi all,
I already send this series before (in time for 3.16) and AFAIK we agreed
on going with this series instead of the incomplete fix for the related oops
which now has been merged as commit d137be00ee017bc40e6027cb66d667a2e0b450fd
I still believe that this series is the more correct fix, as
On Mon, Jun 30, 2014 at 02:53:11PM +0300, Kirill A. Shutemov wrote:
On Fri, Jun 20, 2014 at 04:11:28PM -0400, Naoya Horiguchi wrote:
Current implementation of page table walker has a fundamental problem
in vma handling, which started when we tried to handle vma(VM_HUGETLB).
Because it's
On Mon, Jun 30, 2014 at 03:20:16PM +0300, Kirill A. Shutemov wrote:
On Fri, Jun 20, 2014 at 04:11:35PM -0400, Naoya Horiguchi wrote:
pagewalk.c can handle vma in itself, so we don't have to pass vma via
walk-private. And both of mem_cgroup_count_precharge() and
mem_cgroup_move_charge() walk
Signed-off-by: Paul Bolle pebo...@tiscali.nl
---
Compile tested. polling is unused since commit f80c5b39b80a
(sched/idle, x86: Switch from TS_POLLING to TIF_POLLING_NRFLAG).
Apparently this trivial cleanup isn't yet queued anywhere.
arch/x86/kernel/apm_32.c | 1 -
1 file changed, 1 deletion(-)
On Fri, 20 Jun 2014, Nicholas Krause wrote:
In for loop of function appleir_input_configured we hit
a Null pointer after the for loop due to array_size not
being correct needs to be changed to input_dev-keycodemax.
Signed-off-by: Nicholas Krause xerofo...@gmail.com
---
On Mon, Jun 30, 2014 at 09:22:47AM +0200, Richard Weinberger wrote:
This was introduced by:
commit 206a81c18401c0cde6e579164f752c4b147324ce
Author: Greg Kroah-Hartman gre...@linuxfoundation.org
Date: Fri Jun 20 22:00:53 2014 -0700
lzo: properly check for overruns
Thanks,
//richard
On 06/30/2014 11:59 AM, Antoine Ténart wrote:
On Wed, Jun 25, 2014 at 11:03:25PM +0400, Sergei Shtylyov wrote:
On 06/23/2014 05:39 PM, Antoine Ténart wrote:
+ /* set the controller speed */
+ writel(0x31, ctrl_reg + PORT_SCR_CTL);
Value undocumented? Or is this the SATA
phy: miphy365x: Represent each PHY channel as a DT subnode
This has the added advantages of being able to enable/disable each
of the channels as simply as enabling/disabling the DT node.
Suggested-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
diff --git
On Mon, 30 Jun 2014, Chen, Alvin wrote:
From: Bryan O'Donoghue bryan.odonog...@intel.com
The EHCI packet buffer in/out threshold is programmable for Intel Quark X1000
USB host controller, and the default value is 0x20 dwords. The in/out
threshold
can be programmed to 0x80 dwords (512
On Fri, Jun 27, 2014 at 08:25:37PM +0100, Mel Gorman wrote:
On Fri, Jun 27, 2014 at 02:57:00PM -0400, Johannes Weiner wrote:
On Fri, Jun 27, 2014 at 09:14:39AM +0100, Mel Gorman wrote:
And the number of pages allocated from each zone is comparable
On Mon, 30 Jun 2014, Rafael J. Wysocki wrote:
Do you know of any tools that actually look at these files?
I don't. Of course, that doesn't mean much.
The only tool I'm aware of that may be looking at them is powertop, so
if the change doesn't affect powertop adversely, it should be
On Mon, Jun 30, 2014 at 01:23:27PM +0200, Richard Leitner wrote:
Hi,
On Mon, 30 Jun 2014 09:08:01 +
David Laight david.lai...@aculab.com wrote:
From: Of Richard Leitner
Replaces all hardcoded ttyGS strings with the PREFIX macro.
Due to the fact the strings are spread over
On Mon, Jun 30, 2014 at 04:50:51PM +0800, Yan, Zheng wrote:
If a task specific event wants user space callchain but does not want
branch stack sampling, enable the LBR call stack facility implicitly.
The LBR call stack facility can help perf to get user space callchain
in case of there is no
This patch fixes the SNB-EP and IVT Cbox filter mapping
table. The table controls which filters are supported by
which events. There were several mistakes in those tables
causing some filters to be ignored, such as NID on
TOR_INSERTS.
Signed-off-by: Stephane Eranian eran...@google.com
---
On Jun 30, 2014 3:36 AM, David Drysdale drysd...@google.com wrote:
Add a new O_BENEATH_ONLY flag for openat(2) which restricts the
provided path, rejecting (with -EACCES) paths that are not beneath
the provided dfd. In particular, reject:
- paths that contain .. components
- paths that
On 30.06.14 12:01:15, Borislav Petkov wrote:
Well, do you have it as a standalong program? If so, you can put it in
a repo somewhere and we can start hacking away and playing with it. If
not, we will have to copy the perf code *into* the RAS daemon first so
that we can have a separate source
-Original Message-
From: Jason Wang [mailto:jasow...@redhat.com]
Sent: Sunday, June 29, 2014 11:15 PM
To: KY Srinivasan; Haiyang Zhang; de...@linuxdriverproject.org; linux-
ker...@vger.kernel.org
Cc: Jason Wang
Subject: [PATCH] hyperv: remove meaningless pr_err() in
Felipe,
On Fri, Jun 27, 2014 at 06:04:33PM -0500, Felipe Balbi wrote:
On Fri, Jun 27, 2014 at 06:05:57PM +0200, Antoine Ténart wrote:
Hi Felipe,
On Fri, Jun 27, 2014 at 10:56:22AM -0500, Felipe Balbi wrote:
On Tue, Jun 24, 2014 at 12:35:14PM +0200, Antoine Ténart wrote:
Add the
On Mon, Jun 30, 2014 at 3:28 AM, David Drysdale drysd...@google.com wrote:
Signed-off-by: David Drysdale drysd...@google.com
---
man2/cap_rights_limit.2 | 171
1 file changed, 171 insertions(+)
create mode 100644 man2/cap_rights_limit.2
Em Mon, Jun 30, 2014 at 04:50:31PM +0200, Robert Richter escreveu:
On 30.06.14 12:01:15, Borislav Petkov wrote:
Well, do you have it as a standalong program? If so, you can put it in
a repo somewhere and we can start hacking away and playing with it. If
not, we will have to copy the perf
On 26/06/14 14:54, Mimi Zohar wrote:
On Thu, 2014-06-19 at 18:20 +0300, Dmitry Kasatkin wrote:
Async hash API allows to use HW acceleration for hash calculation.
It may give significant performance gain or/and reduce power consumption,
which might be very beneficial for battery powered
Em Sun, Jun 29, 2014 at 10:50:24AM -0600, David Ahern escreveu:
On 6/29/14, 10:39 AM, Jiri Olsa wrote:
On Fri, Jun 27, 2014 at 05:06:36PM -0600, David Ahern wrote:
On 6/18/14, 8:58 AM, Jiri Olsa wrote:
+static struct ordered_event*
+ordered_events_get(struct ordered_events_queue *q, u64
Il 29/06/2014 17:12, Jan Kiszka ha scritto:
From: Jan Kiszka jan.kis...@siemens.com
We import the CPL via SS.DPL since ae9fedc793. However, we fail to
export it this way so far. This caused spurious guest crashes, e.g. of
Linux when accessing the vmport from guest user space which triggered
Stephen Boyd sb...@codeaurora.org writes:
It looks like this code is missing braces, otherwise the if
statement shouldn't have been indented. Fix it.
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
drivers/thermal/of-thermal.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Em Sun, Jun 29, 2014 at 06:39:33PM +0200, Jiri Olsa escreveu:
On Fri, Jun 27, 2014 at 05:06:36PM -0600, David Ahern wrote:
On 6/18/14, 8:58 AM, Jiri Olsa wrote:
+static struct ordered_event*
+ordered_events_get(struct ordered_events_queue *q, u64 timestamp)
Also I don't think that it
Kernels v3.16-rc2 and v3.16-rc3 trigger a new (for me) warning. (I never
booted v3.16-rc1). Machine is a, rather outdated, ThinkPad X41 (ie,
single core i686).
WARNING: CPU: 0 PID: 221 at drivers/gpu/drm/i915/intel_display.c:1274
assert_planes_disabled+0xf9/0x100 [i915]()
plane B assertion
On 2014-06-30 17:01, Paolo Bonzini wrote:
Il 29/06/2014 17:12, Jan Kiszka ha scritto:
From: Jan Kiszka jan.kis...@siemens.com
We import the CPL via SS.DPL since ae9fedc793. However, we fail to
export it this way so far. This caused spurious guest crashes, e.g. of
Linux when accessing the
On Sun, Jun 29, 2014 at 08:49:16PM -0700, John Hubbard wrote:
On Fri, 27 Jun 2014, Jérôme Glisse wrote:
From: Jérôme Glisse jgli...@redhat.com
Several subsystem require a callback when a mm struct is being destroy
so that they can cleanup there respective per mm struct. Instead of
On Sun, 29 Jun 2014, Himangi Saraogi wrote:
This patch moves resources allocated using ioremap or
dma_declare_coherent_memory to the corresponding managed interface. The
function calls to free the allocated resources are removed in the probe
and remove functions as they are no longer
On Sat, 28 Jun 2014 19:10:00 +0800
Xie XiuQi xiexi...@huawei.com wrote:
/*
- * trace_jiffy_clock(): Simply use jiffies as a clock counter.
+ * trace_clock_uptime(): Use lockless version __current_kernel_time,
+ * so it's safe in NMI context.
*/
-u64 notrace trace_clock_jiffies(void)
On Sat, Jun 28, 2014 at 10:07 AM, Pavel Machek pa...@ucw.cz wrote:
On Thu 2014-06-26 13:47:32, Andy Lutomirski wrote:
On Thu, Jun 26, 2014 at 1:12 PM, H. Peter Anvin h...@zytor.com wrote:
The real question is if we care that sysret and iter don't match. On 32
bits the situation is even
On Mon, Jun 30, 2014 at 05:03:57PM +0200, Jan Kiszka wrote:
15.5.1:
When examining segment attributes after a #VMEXIT:
[...]
• Retrieve the CPL from the CPL field in the VMCB, not from any segment
DPL.
Heey, it is even documented! :-P
--
Regards/Gruss,
Boris.
Sent from a fat crate
On Mon, Jun 30, 2014 at 11:58:31AM -0300, Arnaldo Carvalho de Melo wrote:
Yeap, guess its the most sensible to do given how things went so far.
Please submit patches when you fix things on code copied from
tools/perf/ and generally when improving it.
Sure.
Btw, should I still be working on
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