Hi,
On 07/07/2016 05:53 AM, Joseph Salisbury wrote:
> BugLink: http://bugs.launchpad.net/bugs/1498667
>
> As reported in BugLink, this device has an issue with Linux Power Management
> so
s/"Linux Power Management"/"USB Link Power Management"
Best regards,
Lu Baolu
> adding a quirk. This qui
On 2016年06月27日 20:57, Joerg Roedel wrote:
On Fri, Jun 24, 2016 at 10:13:25AM +0800, Shunqian Zheng wrote:
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 100 +++--
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 3 +
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 221 ++
On 2016年06月24日 10:13, Shunqian Zheng wrote:
From: Tomasz Figa
The API is not suitable for subsystems consisting of multiple devices
and requires severe hacks to use it. To mitigate this, this patch
implements allocation and address space management locally by using
helpers provided by DRM frame
On 2016年06月24日 10:13, Shunqian Zheng wrote:
Rockchip DRM used the arm special API, arm_iommu_*(), to attach
iommu for ARM32 SoCs. This patch convert to common iommu API
so it would support ARM64 like RK3399.
Since previous patch added support for direct IOMMU address space
management, there is n
On 07/06/2016 05:30 PM, Andy Lutomirski wrote:
On Wed, Jun 29, 2016 at 3:57 AM, Dmitry Safonov wrote:
Add API to change vdso blob type with arch_prctl.
As this is usefull only by needs of CRIU, expose
this interface under CONFIG_CHECKPOINT_RESTORE.
+#ifdef CONFIG_CHECKPOINT_RESTORE
+ c
On Sat, Jul 02, 2016 at 04:55:49PM -0700, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> Hi All,
>
> This is version 2 of this email.
>
> Changes from version 1:
>
> - some rewording of the text
> - removed new (theoretical) dtc directive "/connector/"
> - added compatibility bet
2016-07-07 22:11 GMT+08:00 Paolo Bonzini :
>
>
> On 07/07/2016 15:23, Wanpeng Li wrote:
>>
>> if (kvm_lapic_hv_timer_in_use(vcpu) &&
>> + (is_guest_mode(vcpu) ||
>> kvm_x86_ops->set_hv_timer(vcpu,
>> -
Hi Kalle,
On Thu, 07 Jul 2016 19:10:24 +0300 Kalle Valo wrote:
>
> Stephen, if it's not too much trouble for you it would be good to CC
> linux-wireless on wireless related problems. Not everyone follow lkml
> (or linux-next).
I have added linux-wirel...@vger.kernel.org as a contact for the
wire
On Tue, Jul 05 2016, Markus Mayer wrote:
> Add a collection of generic functions to convert strings to lowercase
> or uppercase.
>
> Changing the case of a string (with or without copying it first) seems
> to be a recurring requirement in the kernel that is currently being
> solved by several dup
From: Dave Hansen
The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights
Landing) has an erratum where a processor thread setting the Accessed
or Dirty bits may not do so atomically against its checks for the
Present bit. This may cause a thread (which is about to page fault)
to set
From: Dave Hansen
The page table manipulation code seems to have grown a couple of
sites that are looking for empty PTEs. Just in case one of these
entries got a stray bit set, use pte_none() instead of checking
for a zero pte_val().
The use pte_same() makes me a bit nervous. If we were doing
From: Dave Hansen
The erratum we are fixing here can lead to stray setting of the
A and D bits. That means that a pte that we cleared might
suddenly have A/D set. So, stop considering those bits when
determining if a pte is pte_none(). The same goes for the
other pmd_none() and pud_none(). p
This patch survived a bunch of testing over the past week, including
on hardware affected by the issue. A debugging patch showed the
"stray" bits being set, and no ill effects were noticed.
Barring any heartburn from folks, I think this is ready for the tip
tree.
--
The Intel(R) Xeon Phi(TM) Pr
From: Dave Hansen
This erratum can result in Accessed/Dirty getting set by the hardware
when we do not expect them to be (on !Present PTEs).
Instead of trying to fix them up after this happens, we just
allow the bits to get set and try to ignore them. We do this by
shifting the layout of the b
Please pull.
Note: it may be possible to get a local privilege escalation out of this
bug.
The following changes since commit ac904ae6e6f0a56be7b9a1cf66fbd50dd025fb06:
Merge branch 'for-linus' of git://git.kernel.dk/linux-block (2016-07-07
15:34:09 -0700)
are available in the git repositor
Hi Russell
> > > > +struct clk *devm_of_clk_get(struct device *dev,
> > > > + struct device_node *np, int index)
> > >
> > > Any reason not to use devm_clk_get? Why do we need this helper?
> >
> > Because of_clk_get() can parse "clocks", "#clock-cells" on DT.
>
> clk_
On Wed, Jul 06, 2016 at 06:07:18PM -0400, Jeff Layton wrote:
> On Wed, 2016-07-06 at 12:46 -0500, Seth Forshee wrote:
> > We're seeing a hang when freezing a container with an nfs bind mount while
> > running iozone. Two iozone processes were hung with this stack trace.
> >
> > [] schedule+0x35/0
+++ Petr Mladek [07/07/16 17:56 +0200]:
On Tue 2016-07-05 22:34:58, Jessica Yu wrote:
Hi,
A few months ago, Chris Arges reported a bug involving alternatives/paravirt
patching that was discussed here [1] and here [2]. To briefly summarize the
bug, patch modules that contained .altinstructions o
On Thu, Jul 7, 2016 at 4:06 PM, Joel Fernandes wrote:
>>> Digging in further, I found that the softlockup watchdog is touched
>>> 1000s of times per second by the NOHZ code.
>>> prints revealed the following 2 functions calling touch_softlockup_watchdog:
>>> [ 165.960292] CPU0 touch: tick_nohz_re
On Thu, 7 Jul 2016, Kees Cook wrote:
> Hi,
>
> Please pull these seccomp changes for next.
Pulled, thanks.
--
James Morris
Hi Linus,
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
acpi-4.7-rc7
to receive ACPI fixes for v4.7-rc7 with top-most commit
b6d90158c935d4a22e56f41647b479ab5ea449d4
Merge branches 'acpica-fixes', 'acpi-pci-fixes' and 'acpi-debug-fixes'
on top of commi
Hi Linus,
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm-4.7-rc7
to receive power management fixes for v4.7-rc7 with top-most commit
7fe39a21557b251e101671f2c3f79558a756afef
Merge branches 'pm-cpuidle-fixes' and 'pm-sleep-fixes'
on top of commit a99c
From: Niklas Cassel
- Increase config size. When using a PCIe switch,
the previous config size only had room for one device.
- Add bus range. Inherited optional property.
- Map downstream I/O to PCI address 0. We can map it to any
address, but let's be consistent with other drivers.
Sig
On Fri, Jul 01, 2016 at 04:37:15PM +0100, Mel Gorman wrote:
> Previous releases double accounted LRU stats on the zone and the node
> because it was required by should_reclaim_retry. The last patch in the
> series removes the double accounting. It's not integrated with the series
> as reviewers may
Rename the CSI client device in the client_reg[] table to
"imx-ipuv3-csi".
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 374100e..
On Wed, 2016-06-29 at 19:28 +1000, Peter Hutterer wrote:
> If the 0x1000 Unified Battery Level Status feature exists, expose the
> battery
> level.
>
> The main drawback is that while a device is plugged in its battery
> level is 0.
> To avoid exposing that as 0% charge we make up a number based o
The image converter kernel API supports conversion contexts and
job queues, so we should allow more than one handle to the IC, so
that multiple users can add jobs to the queue.
Note however that users that control the IC manually (that do not
use the image converter APIs but setup the IC task by h
This patch implements complete image conversion support to ipu-ic,
with tiling to support scaling to and from images up to 4096x4096.
Image rotation is also supported.
The internal API is subsystem agnostic (no V4L2 dependency except
for the use of V4L2 fourcc pixel formats).
Callers prepare for
On Thu, Jul 07, 2016 at 03:01:40PM -0700, Roland Dreier wrote:
> The reason we moved to the cb storage is that in the past, trying to
> hide some data in the actual skb buffer that we don't actually send
We have neighbour_priv, and ndo_neigh_construct/destruct now ..
A first blush that would see
Hi Stephen,
On jeu., juin 30 2016, Stephen Boyd wrote:
>> +
>> +spin_lock_init(&driver_data->lock);
>> +
>> +for (i = 0; i < num_periph; i++) {
>> +struct clk *clk = driver_data->clk_data.clks[i];
>> +
>> +if (armada_3700_add_composite_clk(&data[i], parent_name,
Move the BCMA MDIO phy into a separate file, as it is very tightly
coupled with the BCMA bus. This will help with the upcoming BCMA
removal from the bgmac driver. Optimally, this should be moved into
phy drivers, but it is too tightly coupled with the bgmac driver to
effectively move it without m
The bcma portion of the driver has been split off into a bcma specific
driver. This has been mirrored for the platform driver. The last
references to the bcma core struct have been changed into a generic
function call. These function calls are wrappers to either the original
bcma code or new pla
This improves on the code I posted earlier, and you can find
here:
http://git.kernel.org/cgit/linux/kernel/git/daveh/x86-pkeys.git/log/?h=pkeys-v039
More details on pkey_get/set() can be found here:
https://www.sr71.net/~dave/intel/manpages/pkey_get.2.html
This is in response
The bgmac driver is using the bcma provides device ID and revision, as
well as the SoC ID and package, to determine which features are
necessary to enable, reset, etc in the driver. In anticipation of
removing the bcma requirement for this driver, these must be changed to
not reference that struc
Signed-off-by: Jon Mason
---
.../devicetree/bindings/net/brcm,amac.txt | 24 ++
.../devicetree/bindings/net/brcm,bgmac-nsp.txt | 24 ++
2 files changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/brcm,amac.txt
c
The dma buffer allocation, etc references a dma_dev device pointer from
the bcma core. In anticipation of removing the bcma requirement for
this driver, these must be changed to not reference that struct. Add a
dma_dev device pointer to the bgmac stuct and reference that instead.
Signed-off-by:
The bgmac_* print wrappers call dev_* prints with the dev pointer from
the bcma core. In anticipation of removing the bcma requirement for
this driver, these must be changed to not reference that struct. So,
simply change all of the bgmac_* prints to their dev_* counterparts. In
some cases netde
David Miller, Please consider including patches 1-5 in net-next
Florian Fainelli, Please consider including patches 6 & 7 in
devicetree/next
Changes in v2:
* Made device tree binding changes suggested by Sergei Shtylyov,
Ray Jui, Rob Herring, Florian Fainelli, and Arnd Bergmann
* Removed devm
Hi Thomas,
Thanks a lot for your reply.
On Thu, Jul 7, 2016 at 8:17 AM, Thomas Gleixner wrote:
> On Wed, 6 Jul 2016, Joel Fernandes wrote:
>> In a system running a recent kernel, I am trying to use soft lockup
>> detector to detect soft lockups in the system.
>> During this exercise, I see that
Adds ipu_set_vdi_src_mux() that selects the VDIC input
(from CSI or memory).
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-common.c | 20
include/video/imx-ipu-v3.h | 1 +
2 files changed, 21 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/dr
Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 7 +++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 64
There can be multiple IC tasks using the IRT, so the IRT needs
a separate use counter. Create a private ipu_irt_enable() to
enable the IRT module when any IC task requires rotation, and
ipu_irt_disable() when a task no longer needs the IRT.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/
Adds functions to link and unlink IDMAC source channels to sink
channels.
So far the following links are supported:
IPUV3_CHANNEL_IC_PRP_ENC_MEM -> IPUV3_CHANNEL_MEM_ROT_ENC
PUV3_CHANNEL_IC_PRP_VF_MEM -> IPUV3_CHANNEL_MEM_ROT_VF
IPUV3_CHANNEL_IC_PP_MEM -> IPUV3_CHANNEL_MEM_ROT_PP
More lin
Adds the Video Deinterlacer (VDIC) unit.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/Makefile | 2 +-
drivers/gpu/ipu-v3/ipu-common.c | 11 ++
drivers/gpu/ipu-v3/ipu-prv.h| 6 +
drivers/gpu/ipu-v3/ipu-vdi.c| 266
include/video/
Adds ipu_csi_set_src() which is just a wrapper around
ipu_set_csi_src_mux().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-csi.c | 8
include/video/imx-ipu-v3.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi
Adds the VDIC field input IDMAC channels. These channels
transfer fields F(n-1), F(n), and F(N+1) from memory to
the VDIC (channels 8, 9, 10 respectively).
Signed-off-by: Steve Longerbeam
---
include/video/imx-ipu-v3.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/video/imx-ipu-
Set the sensor full frame based on whether the passed in mbus_fmt
is 720x480 (NTSC) or 720x576 (PAL).
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-csi.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/
Adds of-alias id to ipu_soc and retrieve with ipu_get_num().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-common.c | 8
drivers/gpu/ipu-v3/ipu-prv.h| 1 +
include/video/imx-ipu-v3.h | 1 +
3 files changed, 10 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-comm
Adds ipu_ic_set_src() which is just aa wrapper around
ipu_set_ic_src_mux().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-ic.c | 10 ++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic
The CSI data format was being programmed incorrectly for the
1x16 media bus formats. The CSI data format for 16-bit must
be bayer/generic (CSI_SENS_CONF_DATA_FMT_BAYER).
Suggested-by: Carsten Resch
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-csi.c | 6 +-
1 file changed, 1 in
From: Suresh Dhandapani
This patch will change the register IPU_CSI0_CCIR_CODE_2 value from
0x40596 to 0x405A6. The change is related to the Start of field 1
first blanking line command bit[5-3] for NTSC format only. This
change is dependent with ADV chip where the NEWAVMODE is set to 0
in regist
Adds ipu_cpmem_get_burstsize().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 6 ++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index a36c35e..fcb7dc8 100644
--- a/
These updates to IPUv3 are needed for media staging drivers
for i.MX5/6 video capture and mem2mem.
Steve Longerbeam (15):
gpu: ipu-v3: Add Video Deinterlacer unit
gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()
gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()
gpu: ipu-v3: Add ipu_get_num()
gp
On Thu, Jul 7, 2016 at 4:36 PM, Jiri Kosina wrote:
> From: Jiri Kosina
>
> Convert the per-device linked list into a hashtable. The primary
> motivation for this change is that currently, we're not tracking all the
> qdiscs in hierarchy (e.g. excluding default qdiscs), as the lookup
> performed o
On Thu, Jul 7, 2016 at 3:01 PM, Roland Dreier wrote:
>>> struct skb_gso_cb {
>>> int mac_offset;
>>> int encap_level;
>>> __u16 csum_start;
>>> };
>
>> This is based on an out-dated version of this struct. The 4.7 RC
>> kernel has a few more fields that were adde
Hi
This patch works, I've had no tty crashes since applying it.
I've seen that you haven't sent this patch yet to Linux-4.7-rc and
Linux-4.6-stable. Will you? Or did you create a different patch?
Mikulas
On Tue, 17 May 2016, Peter Hurley wrote:
> On 05/17/2016 08:57 AM, Peter Hurley wrote:
>
On Thu, Jul 07, 2016 at 05:56:33PM +0200, Petr Mladek wrote:
> On Tue 2016-07-05 22:34:58, Jessica Yu wrote:
> > Hi,
> >
> > A few months ago, Chris Arges reported a bug involving alternatives/paravirt
> > patching that was discussed here [1] and here [2]. To briefly summarize the
> > bug, patch m
2016-07-07 21:00 GMT+09:00 Byungchul Park :
> On Mon, Jul 04, 2016 at 08:27:08AM +0900, SeongJae Park wrote:
>> +===
>> +이 문서는
>> +Documentation/memory-barriers.txt
>> +의 한글 번역입니다.
>> +
>> +역자： 박성재
>> +===
>> +
>> +
>> +
On Thu, Jul 7, 2016 at 3:35 PM, Tanmay Inamdar wrote:
>
>
> On Sat, Jul 2, 2016 at 4:13 PM, Paul Gortmaker
> wrote:
>>
>> The Kconfig currently controlling compilation of this code is:
>>
>> drivers/pci/host/Kconfig:config PCI_XGENE
>> drivers/pci/host/Kconfig: bool "X-Gene PCIe controller"
Am Donnerstag, 7. Juli 2016, 18:01:12 schrieb Xing Zheng:
> This adds support for RK3288-Fennec boards. Currently supported
> are serial console, wired networking, hdmi output and USB.
>
> Signed-off-by: Xing Zheng
applied, thanks
Heiko
On Wed, Jul 6, 2016 at 3:34 AM, Arnd Bergmann wrote:
> On Tuesday, July 5, 2016 7:18:45 PM CEST Jon Mason wrote:
>> >
>> > Ok, then I'd suggest making the compatible string here
>> >
>> > compatible = "brcm,nsp-amac", "brcm,amac";
>>
>> It is called GMAC in the NS and NSP documentation, bu
On Thu, Jul 07 2016, Mike Snitzer wrote:
> On Thu, Jul 07 2016 at 1:35am -0400,
> NeilBrown wrote:
>
>> On Wed, Jun 22 2016, Lars Ellenberg wrote:
>>
>> > For a long time, generic_make_request() converts recursion into
>> > iteration by queuing recursive arguments on current->bio_list.
>> >
>>
This commit adds the DT binding documentation for the peripheral clocks
used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT
Acked-by: Rob Herring
---
.../bindings/clock/armada3700-periph-clock.txt | 70 ++
1 file changed, 70 insertions(+)
create mode 10
These clocks are the ones which will be used as source for the
peripherals of the Armada 3700 SoC. On this SoC there is two blocks of
clocks: the North bridge one and the South bridge one.
Most of them are gatable. Most of the time their rate are their parent
rated divided by a ratio depending of
Variable "now" seems to be genuinely used unintialized
if branch
if (CPUCLOCK_PERTHREAD(timer->it_clock)) {
is not taken and branch
if (unlikely(sighand == NULL)) {
is taken.
I don't know this code to judge what should be done, could someone
please look at it?
Signed-off-by: A
This clock is the parent of all the Armada 3700 clocks. It is a fixed
rate clock which depends on the gpio configuration read when resetting
the SoC.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/Kconfig| 3 ++
drivers/clk/mvebu/Makefile | 1 +
drivers/clk/mvebu/ar
These clocks are children of the xtal clock and each one can be selected
as a source for the peripheral clocks.
According to the datasheet it should be possible to modify their rate,
but currently it is not supported.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/Makefile | 1
This commit adds the DT binding documentation for the Time Base Generator
clock used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT
Acked-by: Rob Herring
---
.../bindings/clock/armada3700-tbg-clock.txt| 27 ++
1 file changed, 27 insertions(+)
create
Hi,
eventually this is the second version of the series adding clock
support for the Armada 37xx SoCs.
The design of the drivers is as close as possible as the hardware is,
with some clocks made of several layers: muxing, divider and gating.
The device tree binding was written in a way that even
This commit adds the DT binding documentation for the the Xtal clock on
Armada 3700 used in the Marvell Armada 3700 SoCs.
Signed-off-by: Gregory CLEMENT
Acked-by: Rob Herring
---
.../bindings/clock/armada3700-xtal-clock.txt | 28 ++
1 file changed, 28 insertions(+)
cr
Am Dienstag, 28. Juni 2016, 12:51:24 schrieb Yakir Yang:
> Panel regulator is controller by a normal GPIO, so we need to
> write a regulator-fixed node for it.
>
> Signed-off-by: Yakir Yang
applied after rewording the commit message a bit.
On the rk808-evb vcc_lcd comes from the rk808 directly a
Am Dienstag, 28. Juni 2016, 12:51:21 schrieb Yakir Yang:
> Panel regulator is controller by a normal GPIO, so we need to
> write a regulator-fixed node for it.
>
> Signed-off-by: Yakir Yang
applied, thanks.
Heiko
Am Dienstag, 28. Juni 2016, 12:51:18 schrieb Yakir Yang:
> The default eDP panel on RK3288 EVB board is LG LP079QX1-SP0V TFT LCD,
> we haven't declared the panel regulator in the 'panel-simple' device
> node here, so the specific board like ACT8846 / RK8080 need to support
> the panel power supply.
The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
Signed-off-by: Stephen
We need to pick the correct phy at runtime based on how the SoC
has been wired onto the board. If the secondary phy is used, take
it out of reset and mux over to it by writing into the TCSR
register. Make sure to do this on reset too, because this
register is reset to the default value (primary phy
The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to
the wrapper drivers when it calls hw_device_reset(), but that
function is not called from chipidea/host.c. And the udc.c file
sends the CI_HDRC_CONTROLLER_STOPPED_EVENT but the host.c file
doesn't do anything.
The intent of the rese
The qcom HSIC ULPI phy doesn't have any bits set in the vendor or
product ID registers. This makes it impossible to make a ULPI
driver match against the ID registers. Add support to discover
the ULPI phys via DT/device properties to help alleviate this
problem. In the DT case, we'll look for a ULPI
Force the OTG state machine to go forward when we're using an
extcon for vbus detection. In this case, the controller may never
raise an interrupt for AVVIS, so we need to simulate the event by
toggling the appropriate OTG fsm bits and kicking the state
machine again.
Cc: Peter Chen
Cc: Greg Kroa
If something fails in ci_hdrc_add_device() due to probe defer, we
shouldn't print an error message. Be silent in this case as we'll
try probe again later.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
Signed-off-by: Stephen Boyd
---
drivers/usb/chipidea/ci_hdrc_msm.c | 3 ++-
1 file changed, 2 inserti
Hi,
[auto build test ERROR on shawnguo/for-next]
[also build test ERROR on v4.7-rc6]
[cannot apply to next-20160707]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Sanchayan-Maity/Implement-SoC
We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't en
The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.
Cc: Kishon Vijay Abraham I
Cc:
Signed-off-by: Stephen Boyd
---
.../devicetree/bindings/phy/qcom,usb-hsic-phy.txt | 72 +
drivers/phy/Kconfig| 7 +
The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly.
Therefore, add a flag to skip any phy power management in the
core layer, leaving it up to the glue driver to manage.
With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC regis
When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's co
The msm chipidea controller uses two main clks, an AHB clk to
read/write the MMIO registers and a core clk called the system
clk that drives the controller itself. Add support for these clks
as they're required in all designs.
Also add support for an optional third clk that we need to turn
on to r
The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly. Hook
the phy initialization into the RESET event and the phy power off
into the STOPPED event.
Cc: Peter Chen
Cc: G
The MSM_USB_BASE macro trick is not very clear, and we're using
it for only one register write so let's just move to using
hw_write_id_reg() and passing the ci pointer instead. That
clearly shows what offset we're using and avoids needing to
include the msm_hsusb_hw.h file when we're going to delet
The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.
Cc: Kishon Vijay Abraham I
Cc:
Signed-off-by: Stephen Boyd
---
.../devicetree/bindings/phy/qcom,usb-hs-phy.txt| 83 ++
drivers/phy/Kconfig| 8 +
drivers/phy/Makefile
We don't call hw_device_reset() with the ci->lock held, so it
doesn't seem like this lock here is protecting anything. Let's
just remove it. This allows us to call sleeping functions like
phy_init() from within the CI_HDRC_CONTROLLER_RESET_EVENT hook.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
Signed
The core framework already handles setting this parameter with a
platform quirk. Add the appropriate flag so that we always set
AHBBURST to 0. Technically DT should be doing this, but we always
do it for msm chipidea devices so setting the flag in the driver
works just as well.
Cc: Peter Chen
Cc:
If two devices are probed with this same driver, they'll share
the same platform data structure, while the chipidea core layer
writes and modifies it. This can lead to interesting results
especially if one device is an OTG type chipidea controller and
another is a host. Let's create a copy of this
On Tue, Jun 21, 2016 at 8:46 PM, Kees Cook wrote:
> This is v7 of Thomas Garnier's KASLR for memory areas (physical memory
> mapping, vmalloc, vmemmap). It expects to be applied on top of the
> x86/boot tip.
>
> The current implementation of KASLR randomizes only the base address of
> the kernel a
In the case of ULPI devices, we want to be able to load the
driver before registering the device so that we don't get stuck
in a loop waiting for the phy module to appear and failing usb
controller probe. Currently we request the ulpi module via the
ulpi ids, but in the DT case we might need to req
The ULPI bus can be built as a module, and it will soon be
calling these functions when it supports probing devices from DT.
Export them so they can be used by the ULPI module.
Signed-off-by: Stephen Boyd
---
drivers/of/device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/of/de
Some phys for the chipidea controller are controlled via the ULPI
viewport. Add support for the ULPI bus so that these sorts of
phys can be probed and read/written automatically without having
to duplicate the viewport logic in each phy driver.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
Cc: Heikki Kr
We're not properly marking the glue layer/wrapper device as
runtime active, so runtime PM believes that the hardware state is
inactive when we call pm_runtime_enable() in this driver. This
causes a problem when the glue layer has a power domain
associated with it, because runtime PM will go and dis
Greg Kroah-Hartman writes:
> On Thu, Jul 07, 2016 at 09:53:10AM -0700, Kevin Hilman wrote:
>> Greg Kroah-Hartman writes:
>>
>> > This is the start of the stable review cycle for the 4.4.15 release.
>> > There are 32 patches in this series, all will be posted as a response
>> > to this one. If
The state of USB ChipIdea support on Qualcomm's platforms is not great.
The DT description of these devices requires up to three different nodes
for what amounts to be the same hardware block, when there should really
only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
du
Currently WRITE_ONCE is used as if it returns void. Let's codify this
before somebody tries to be smarter than necessary.
Signed-off-by: Alexey Dobriyan
---
include/linux/compiler.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/include/linux/compiler.h
+++ b/include/linux/comp
101 - 200 of 959 matches
Mail list logo
