Hi Stephen,
El 03/04/13 20:34, Stephen Warren escribió:
> From: Stephen Warren
>
> Replace cmd_dtc with cmd_dtc_cpp, and delete the latter.
>
> Previously, a special file extension (.dtsp) was required to trigger
> the C pre-processor to run on device tree files. This was ugly. Now that
> previ
Hello Maxime,
El 26/01/13 06:31, Maxime Ripard escribió:
> The IP responsible for the muxing on the Allwinner SoCs are also
> handling the GPIOs on the system. This patch adds the needed driver that
> relies on the pinctrl driver for most of its operations.
>
> The number of pins available for GP
As uninitialized array members will be initialized to zero, we can
avoid using a for loop by setting a value to it.
Signed-off-by: Emilio López
---
Note that I don't own any device using this driver, it has only been compile
tested, but it shouldn't cause any issues.
drivers/cpufre
Hello,
El 25/02/13 00:41, Viresh Kumar escribió:
> On Sun, Feb 24, 2013 at 10:31 PM, Emilio López wrote:
>> As uninitialized array members will be initialized to zero, we can
>> avoid using a for loop by setting a value to it.
>>
>> Signed-off-by: Emilio López
>
As uninitialized array members will be initialized to zero, we can
avoid using a for loop by setting a value to it.
Signed-off-by: Emilio López
---
Note that I don't own any device using this driver, it has only been compile
tested, but it shouldn't cause any issues.
Changes v1 ->
Hello Russell,
El 15/03/13 19:39, Russell King - ARM Linux escribió:
> On Fri, Mar 15, 2013 at 09:06:23PM +0100, Maxime Ripard wrote:
>> +/* clock got configured through clk api, all done */
>> +if (p->uartclk)
>
> if (IS_ERR(p->uartclk))
>
Isn't IS_ERR for pointers? p->uartclk is
El 15/03/13 21:29, Russell King - ARM Linux escribió:
> On Fri, Mar 15, 2013 at 09:15:11PM -0300, Emilio López wrote:
>> Hello Russell,
>>
>> El 15/03/13 19:39, Russell King - ARM Linux escribió:
>>> On Fri, Mar 15, 2013 at 09:06:23PM +0100, Maxime Ripard wrote:
&
This driver's only job is to claim and ensure the necessary clock
for memory operation on a DT-powered machine remains enabled.
Signed-off-by: Emilio López
---
I believe this new patch should resolve all the concerns raised; as
always, all feedback is welcome :)
Changes from RFC:
- Move
Hi Olof,
El 12/09/13 21:57, Olof Johansson escribió:
On Thu, Sep 12, 2013 at 5:30 PM, Emilio López wrote:
This driver's only job is to claim and ensure the necessary clock
for memory operation on a DT-powered machine remains enabled.
Signed-off-by: Emilio López
---
I believe this new
Hi Oliver,
Most of my comments on this are nitpicks, overall it looks good to me
El 01/09/13 08:30, oliver+l...@schinagl.nl escribió:
From: Oliver Schinagl
Allwinner has electric fuses (efuse) on their line of chips. This driver
reads those fuses, seeds the kernel entropy and exports them as
Hi Maxime,
El 25/09/13 11:03, Maxime Ripard escribió:
Most of the Allwinner SoCs (at this time, all but the A10) also have a
High Speed timers that are not using the 24MHz oscillator as a source
but rather the AHB clock running much faster.
The IP is slightly different between the A10s/A13 and
Hi Maxime,
El 26/09/13 10:13, Maxime Ripard escribió:
On Wed, Sep 25, 2013 at 08:23:14PM -0300, Emilio López wrote:
El 25/09/13 11:03, Maxime Ripard escribió:
Most of the Allwinner SoCs (at this time, all but the A10) also have a
High Speed timers that are not using the 24MHz oscillator as a
Hello everyone,
I would like to write a driver to support the "Security System" hardware
block on some Allwinner ARM SoCs. The hardware supports AES, DES, 3DES,
SHA-1, MD5 and has a PRNG. Data passing is done via two FIFOs. You can
find some ugly userspace code to calculate a SHA1 hash here, s
river
ARM: sun5i: a10s: Add support for the High Speed Timers
ARM: sun5i: a13: Add support for the High Speed Timers
ARM: sun7i: a20: Add support for the High Speed Timers
I tested these 5 patches on my Cubieboard2 (A20) and it boots and seems
to work fine, so
Tested-by: Emilio López
# u
wer' led already that is
hard-wired to 3.3v, and this led node that you are declaring is referred
as 'led1' there. I suppose 'green' would be a suitable name to keep
consistency with other sunxi boards (namely cubieboard).
Other than that, my OLinuXino worked just fin
Hi Maxime,
El 17/06/13 05:45, Maxime Ripard escribió:
> Signed-off-by: Maxime Ripard
> Tested-by: Emilio López
Looks good now,
Acked-by: Emilio López
Thanks!
Emilio
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/sun5i-a10s-olinuxino
had another quick look at it and overall it looks good to go,
Reviewed-by: Emilio López
---
Documentation/devicetree/bindings/clock/sunxi.txt | 6 +
.../bindings/clock/sunxi/sun6i-a31-gates.txt | 83 ++
drivers/clk/sunxi/clk-sunxi.c | 124
ially when it comes to the gated clocks
available. We thus need to register different clock gates for the A20.
Signed-off-by: Maxime Ripard
Code wise it looks good to me, I just have some small comments.
Reviewed-by: Emilio López
---
Documentation/devicetree/bindings/clock/sunxi.txt
apb1_gates_data,},
> + {
> + .compatible = "allwinner,sun4i-axi-gates-clk",
> + .data = &sun4i_axi_gates_data,
> + },
> + {
> + .compatible = "allwinner,sun4i-ahb-gates-clk",
> + .data = &sun4i_ahb_gates_data
e,
Reviewed-by: Emilio López
> ---
> drivers/clk/sunxi/clk-sunxi.c | 24 +---
> 1 file changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index 3c91888..6e9cbc9 100644
> --- a/drivers/c
Hi Maxime,
El 30/07/13 11:44, Maxime Ripard escribió:
> The A31 has a mostly different clock set compared to the other older
> SoCs currently supported in the Allwinner clock driver.
>
> Add support for the basic useful clocks. The other ones will come in
> eventually.
>
> Signed-off-by: Maxime
Hi Maxime,
Overall this looks good to me, but I have some small comments:
El 30/07/13 11:44, Maxime Ripard escribió:
> Now that the clock driver has support for the A31 clocks, we can add
> them to the DTSI and start using them in the relevant hardware blocks.
>
> Signed-off-by: Maxime Ripard
>
Hi,
El 31/07/13 05:11, kevin.z.m escribió:
> Hi, Maxime,
>
>> The problem is a bit more complex than that.
>
>> On the A31, the losc clock is actually a mux between an external
>> oscillator running at 32kHz, and the internal oscillator running at
>> 667MHz, that would be scaled down.
>
>> S
Hi Maxime,
El 23/07/13 19:28, Maxime Ripard escribió:
> The Allwinner A10s has a slightly different gates set than the A10 and
> A13, so add these gates to the clk driver.
>
> Signed-off-by: Maxime Ripard
Looks good to me, and my A10S board still boots, so
Tested-by: Emilio López
Hi Maxime,
El 23/07/13 19:28, Maxime Ripard escribió:
> The A10s has only a subset of the A10 gates. Now that the clock driver
> has support for this gates set, switch to it in the DTSI.
>
> Signed-off-by: Maxime Ripard
As I mentioned on the other patch, my board boots, so
Teste
The documentation mentions a "name" parameter, which does not exist.
This commit removes such mention from the function documentation.
Signed-off-by: Emilio López
---
lib/genalloc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/lib/genalloc.c b/lib/genalloc.c
index b35cfa9..1d1f
El 12/08/13 09:53, Mark Rutland escribió:
> On Tue, Jul 30, 2013 at 03:44:21PM +0100, Maxime Ripard wrote:
>> The A31 has a mostly different clock set compared to the other older
>> SoCs currently supported in the Allwinner clock driver.
>>
>> Add support for the basic useful clocks. The other ones
Hi,
El 10/05/13 15:15, Sören Brinkmann escribió:
> Hi Emilio,
>
> On Fri, May 10, 2013 at 02:44:44PM -0300, Emilio López wrote:
>> Hi,
>>
>> El 10/05/13 14:31, Soren Brinkmann escribió:
>>> The userspace clock driver can be used to expose clock controls throug
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
drivers/usb/storage/sddr09.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/usb/storage/sddr09.c b
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
drivers/usb/storage/alauda.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/usb/storage/alauda.c b
@@
> config ARCH_SUNXI
> bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
> + select ARCH_REQUIRE_GPIOLIB
> select CLKSRC_MMIO
> select CLKSRC_OF
> select COMMON_CLK
>
Tested-by: Emilio López
This fixes the build breakage I was seeing.
Than
Hi Maxime,
El 30/04/13 06:56, Maxime Ripard escribió:
> The A13 has a lot less clocks than the one found in the Allwinner A10.
> Add these stripped down clocks to the clock driver and in the
> documentation.
>
> Signed-off-by: Maxime Ripard
This patch looks good to me.
Acked-b
Hi Maxime,
El 30/04/13 06:56, Maxime Ripard escribió:
> The Allwinner A13 has a smaller clock set than the one found in the A10.
> Fix the A13 device tree and documentation to reflect this.
>
> Signed-off-by: Maxime Ripard
The patch looks fine to me.
Acked-by: Emilio López
>
Hi,
El 10/05/13 14:31, Soren Brinkmann escribió:
> The userspace clock driver can be used to expose clock controls through
> sysfs to userspace. The driver creates entries in /sys/class/clk.
>
> Signed-off-by: Soren Brinkmann
> ---
> .../devicetree/bindings/clock/clk-userspace.txt| 7 +
>
From: "Giacomo A. Catenazzi"
In some architectures, the #define cpu_data is not a "macro-function",
so the compiler will substitute the identifier with probably something
wrong.
Signed-off-by: Giacomo A. Catenazzi
Signed-off-by: Emilio López
[emi...@elopez.com.ar: use cpu
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
drivers/net/ethernet/sun/sunbmac.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/sun
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
drivers/net/ethernet/apple/bmac.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/apple/bmac.c
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
drivers/net/ethernet/davicom/dm9000.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/net/ethernet
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
drivers/net/ethernet/korina.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/korina.c b
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
Changes from v1:
- {0} -> { 0 } as suggested by David Miller
drivers/net/ethernet/sun/sunbmac.c | 5 +
1 file changed, 1 insert
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
Changes from v1:
- {0} -> { 0 } as suggested by David Miller
drivers/net/ethernet/apple/bmac.c | 4 +---
1 file changed, 1 insert
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
Changes from v1:
- {0} -> { 0 } as suggested by David Miller
drivers/net/ethernet/davicom/dm9000.c | 9 +
1 file changed
Clean up the code a bit to initialize the variables directly when
defining them.
Signed-off-by: Emilio López
---
Please note that this patch is untested.
Changes from v1:
- {0} -> { 0 } as suggested by David Miller
drivers/net/ethernet/korina.c | 5 +
1 file changed, 1 insertion(+)
Hi Stephen,
El 22/05/13 02:55, Stephen Rothwell escribió:
> Hi all,
>
> After merging the final tree, today's linux-next build (sparc32 defconfig)
> produced this warning:
>
> drivers/net/ethernet/sun/sunbmac.c: In function 'bigmac_set_multicast':
> drivers/net/ethernet/sun/sunbmac.c:998:6: warn
Commit 3b0aaef ("net: ethernet: apple: initialize variables directly")
dropped the only loop that was using i but did not remove the actual
variable, therefore causing a warning when building. This patch drops
the now redundant line.
Signed-off-by: Emilio López
---
drivers/net/ethe
Commit e998fd4 ("net: ethernet: korina: initialize variables directly")
dropped the only loop that was using i but did not remove the actual
variable, therefore causing a warning when building. This patch drops
the now redundant line.
Signed-off-by: Emilio López
---
drivers/ne
Commit bfd428d ("net: ethernet: sun: initialize variables directly")
dropped the only loop that was using i but did not remove the actual
variable, therefore causing a warning when building. This patch drops
the now redundant line.
Reported-by: Stephen Rothwell
Signed-off-by: Em
Hi David,
El 23/05/13 03:43, David Miller escribió:
> From: Emilio López
> Date: Wed, 22 May 2013 20:57:37 -0300
>
>> Commit bfd428d ("net: ethernet: sun: initialize variables directly")
>> dropped the only loop that was using i but did not remove the actual
&
El 24/05/13 06:23, Maxime Ripard escribió:
> From: Stefan Roese
>
> The Allwinner A10 has an ethernet controller that seem to be developped
> internally by them.
>
> The exact feature set of this controller is unknown, since there is no
> public documentation for this IP, and this driver is most
Hi,
El 24/05/13 06:23, Maxime Ripard escribió:
> From: Stefan Roese
>
> Signed-off-by: Stefan Roese
> ---
> arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
> b/arch/arm/boot/dts/su
Hello Arnd,
El 14/02/13 10:49, Arnd Bergmann escribió:
> We are getting a number of warnings about the use of the deprecated
> bus_to_virt function in drivers using the ARM ISA DMA API:
>
> drivers/parport/parport_pc.c: In function 'parport_pc_fifo_write_block_dma':
> drivers/parport/parport_pc.c
mments are welcome.
Cheers!
Emilio
[0]
http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2016-March/086932.html
Emilio López (7):
selftest: sync: basic tests for sw_sync framework
selftest: sync: fence tests for sw_sync framework
selftest: sync: merge tests for sw_sync framework
These tests are based on the libsync test suite from Android.
This commit lays the ground for future tests, as well as includes
tests for a variety of basic allocation commands.
Signed-off-by: Emilio López
---
tools/testing/selftests/Makefile | 1 +
tools/testing/selftests/sync
These tests are based on the libsync test suite from Android.
This commit includes tests for basic fence creation.
Signed-off-by: Emilio López
---
tools/testing/selftests/sync/Makefile | 1 +
tools/testing/selftests/sync/sync_fence.c | 132 ++
tools/testing
This test is based on the libsync test suite from Android.
This commit includes a test to stress merge operations.
Signed-off-by: Emilio López
---
tools/testing/selftests/sync/Makefile| 1 +
tools/testing/selftests/sync/sync_stress_merge.c | 116 +++
tools
These tests are based on the libsync test suite from Android.
This commit includes tests for waiting on fences.
Signed-off-by: Emilio López
---
tools/testing/selftests/sync/Makefile| 1 +
tools/testing/selftests/sync/sync_test.c | 1 +
tools/testing/selftests/sync/sync_wait.c | 91
These tests are based on the libsync test suite from Android.
This commit includes tests for basic merge operations.
Signed-off-by: Emilio López
---
tools/testing/selftests/sync/Makefile | 1 +
tools/testing/selftests/sync/sync_merge.c | 60 +++
tools/testing
This test is based on the libsync test suite from Android.
This commit includes a stress test that invokes operations
in parallel.
Signed-off-by: Emilio López
---
tools/testing/selftests/sync/Makefile | 1 +
.../selftests/sync/sync_stress_parallelism.c | 111
This test is based on the libsync test suite from Android.
This commit includes a stress test that replicates a
consumer/producer pattern.
Signed-off-by: Emilio López
---
tools/testing/selftests/sync/Makefile | 1 +
.../testing/selftests/sync/sync_stress_consumer.c | 185
Hi Michael,
El 22/09/16 a las 06:43, Michael Ellerman escribió:
Emilio López writes:
+CFLAGS += -I../../../../include/uapi/
Please don't include the unprocessed uapi headers, they are not meant to
be directly included in userspace programs.
They even say so:
include/uapi/linux/ty
s")
Reported-by: Michael Ellerman
Signed-off-by: Emilio López
---
I don't know if this is worth cc'ing stable, the patch has been
there since v4.7. I spotted this while reflecting on Michael's
review[0] on my kselftest series, and he later independently
confirmed so[1].
[0]
Hi,
El 27/09/16 a las 01:23, Michael Ellerman escribió:
Emilio López writes:
El 22/09/16 a las 06:43, Michael Ellerman escribió:
Emilio López writes:
Please don't include the *kernel* headers, they're really not meant to
be used in userspace programs :)
+CFLAGS += -I../..
ntext.
The series was tested on a peach pi and was found to work OK there. As
always, all comments and further tests are welcome :)
Cheers!
Emilio
Emilio López (3):
sysfs: Fix is_visible() support for binary attributes
platform/chrome: Support reading/writing the vboot context
ARM: dts: Enab
port is_visible() on binary attributes.
Signed-off-by: Emilio López
---
fs/sysfs/group.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/fs/sysfs/group.c b/fs/sysfs/group.c
index 39a0199..eb6996a 100644
--- a/fs/sysfs/group.c
+++ b/fs/sysfs/group.c
@
The Peach boards use the EC to store the vboot context information,
so add the corresponding properties on the EC node to indicate so.
Signed-off-by: Emilio López
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 1 +
arch/arm/boot/dts/exynos5800-peach-pi.dts | 1 +
2 files changed, 2
Some EC implementations include a small nvram space used to store
verified boot context data. This patch offers a way to expose this
data to userspace.
Signed-off-by: Emilio López
---
Documentation/devicetree/bindings/mfd/cros-ec.txt | 4 +
drivers/platform/chrome/Makefile
Hi Greg & Guenter,
On 08/09/15 16:30, Guenter Roeck wrote:
On Tue, Sep 08, 2015 at 12:10:02PM -0700, Greg KH wrote:
On Tue, Sep 08, 2015 at 08:30:13AM -0700, Guenter Roeck wrote:
Emilio,
On Tue, Sep 08, 2015 at 09:07:44AM -0300, Emilio López wrote:
According to the sysfs header
On 09/09/15 01:12, Guenter Roeck wrote:
On 09/08/2015 08:58 PM, Greg KH wrote:
On Tue, Sep 08, 2015 at 06:10:16PM -0700, Guenter Roeck wrote:
Hi Emilio,
On 09/08/2015 05:51 PM, Emilio López wrote:
Hi Greg & Guenter,
[ ... ]
Unless I am missing something, this is not explained anyw
Hello Russell,
El 24/02/14 13:30, Russell King - ARM Linux escribió:
On Mon, Feb 24, 2014 at 05:22:43PM +0100, Maxime Ripard wrote:
Right now, AHB is an indirect child clock of the CPU clock. If that happens to
change, since the CPU clock has no other consumers declared in Linux, it would
be sh
Hi Russell,
El 24/02/14 21:01, Russell King - ARM Linux escribió:
Hi Emilio.
On Mon, Feb 24, 2014 at 08:38:44PM -0300, Emilio López wrote:
Why is this so? Can't a clock be left enabled while nobody has a
reference to it? I have looked around in Documentation/ (rather quickly
I must say
Hi Maxime,
El 28/02/14 13:37, Maxime Ripard escribió:
In order for the DMA controller to work for SDRAM to devices transfers, the AHB
clock should be reparented on the PLL6.
Force that parenting in the clock driver.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/clk-sunxi.c | 18 +++
Hi Arnd,
El 19/03/14 11:58, Arnd Bergmann escribió:
(snip)
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt
b/Documentation/devicetree/bindings/net/stmmac.txt
index 5748351..19d5648 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/binding
Hi Gregory,
El 18/02/14 06:47, Gregory CLEMENT escribió:
(snip)
(...) what would be an acceptable
version would be the something like the patch attached. There will be still
an issue if old dtb is used with recent kernel, but at least the user will
be warned.
The patch you attached is similar
Hi Bjorn,
El 20/02/14 21:38, Bjorn Andersson escribió:
This bus driver supports the QUP i2c hardware controller in the Qualcomm SOCs.
The Qualcomm Universal Peripheral Engine (QUP) is a general purpose data path
engine with input/output FIFOs and an embedded i2c mini-core. The driver
supports FI
Hello Sebastian,
El 25/01/14 15:19, Sebastian Hesselbarth escribió:
This patch set fixes clk init order that went upside-down with
v3.14. I haven't really investigated what caused this, but I assume
it is related with DT node reordering by addresses.
The framework should be able to deal with u
Sebastian,
El 25/01/14 18:44, Sebastian Hesselbarth escribió:
On 01/25/2014 10:32 PM, Emilio López wrote:
El 25/01/14 15:19, Sebastian Hesselbarth escribió:
This patch set fixes clk init order that went upside-down with
v3.14. I haven't really investigated what caused this, but I assume
rootfs was missing its f.
Signed-off-by: Emilio López
---
drivers/base/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index e373671..ec36e77 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -49,7 +49,7
El 02/12/13 10:59, Emilio López escribió:
rootfs was missing its f.
Signed-off-by: Emilio López
---
drivers/base/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index e373671..ec36e77 100644
--- a/drivers/base/Kconfig
Hi Boris,
El 28/04/14 11:58, Boris BREZILLON escribió:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk
Add support for these clks in
Hi Maxime,
El 24/04/14 11:22, Maxime Ripard escribió:
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to sh
Hi Gregory, Ezequiel,
>> Are we still in time to consider Emilio's oneline proposal?
(Emilio: would you mind preparing a suitable patch against dove,
kirkwood, armada370/xp, so we can see the real thing?).
The patch is in a common file, so it does not need patching anything for
each platform.
Hi,
El 17/02/14 12:04, Gregory CLEMENT escribió:
(snip)
Please read what I have written: "if there is no output-name, which is our
default case) this proposal just ignored the parent clock given by the device
tree".
Extract of your code from the link you pointed:
const char *default_parent = "
El 05/02/14 10:05, Maxime Ripard escribió:
The A31 has a slightly different PLL6 clock. Add support for this new clock in
our driver.
Signed-off-by: Maxime Ripard
Taken via sunxi-clk-for-mike.
Thanks!
Emilio
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El 10/02/14 16:47, Maxime Ripard escribió:
Hi Chen-Yu,
On Mon, Feb 10, 2014 at 06:35:46PM +0800, Chen-Yu Tsai wrote:
Hi,
This is the v4 of the remaining Allwinner A20 GMAC glue layer patches.
The stmmac driver changes have been merged through net-next. The
remaining bits are clock and DT patch
Hi,
El 30/04/14 05:25, Александр Берсенев escribió:
This patch enables to use devm_clk_get function to get gate clocks by name.
Signed-off-by: Alexander Bersenev
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 31584ee..3617681 100644
--- a/drivers/clk/sunxi/clk
Hi Boris,
First of all, thanks for working on this :)
While reading the code below I noticed a complete lack of comments. I
think it would be good to have at least some to aid readability,
considering these clocks are poorly documented on AW's material.
El 09/05/14 08:11, Boris BREZILLON esc
Hi Boris,
El 09/05/14 08:11, Boris BREZILLON escribió:
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sun6i-a31.dtsi | 37 +
1 file changed, 37 inserti
een recently added
using a new compatible, so let's document it here.
Signed-off-by: Emilio López
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
b/Documentation/devicetree/bindin
Hi Rob,
For 3/7 (with the mentioned fix) and 4/7 my Cubietruck still boots, so
Acked-by: Emilio López
Tested-by: Emilio López
El 13/05/14 12:12, Rob Herring escribió:
On Mon, May 12, 2014 at 7:29 PM, Rob Herring wrote:
From: Rob Herring
Use for_each_matching_node_and_match instead of
"coherent" is written twice when it should be just once
Signed-off-by: Emilio López
---
The sentence still doesn't sound entirely correct in my head, maybe
someone can propose a better rewording.
Documentation/DMA-API-HOWTO.txt | 2 +-
1 file changed, 1 insertion(+), 1 de
Hi Boris,
El 09/04/14 10:51, Boris BREZILLON escribió:
Define the APB0 clk gates controlled by the PRCM (Power/Reset/Clock
Management) block.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts
Hi,
El 28/07/14 a las 10:27, weiyj...@163.com escibió:
From: Wei Yongjun
Fixes the following sparse warnings:
drivers/clk/sunxi/clk-sun6i-apb0.c:60:27: warning:
symbol 'sun6i_a31_apb0_clk_dt_ids' was not declared. Should it be static?
Signed-off-by: Wei Yongjun
I sent patches earlier t
It should be request_threaded_irq, not request_irq
Signed-off-by: Emilio López
---
kernel/irq/devres.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/irq/devres.c b/kernel/irq/devres.c
index 1ef0606..d5d0f73 100644
--- a/kernel/irq/devres.c
+++ b/kernel/irq/devres.c
Hi,
El 28/06/14 14:58, Boris BREZILLON escribió:
Hello,
On 28/06/2014 19:23, Himangi Saraogi wrote:
devm_ioremap_resource returns an ERR_PTR value, not NULL, on failure.
A simplified version of the semantic match that finds this problem is as
follows:
//
@@
expression e,e1;
statement S;
@@
Hi Maxime,
El 30/06/14 10:20, Maxime Ripard escribió:
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to sh
Hi,
I had a quick look and spotted a couple of things here, see inline.
El 31/03/14 09:07, Alexandre Belloni escribió:
This adds a generic PWM framework driver for the PWM controller
found on Allwinner SoCs.
Signed-off-by: Alexandre Belloni
---
drivers/pwm/Kconfig | 9 ++
drivers/pwm
Hi,
El 23/05/14 04:51, Chen-Yu Tsai escribió:
The N factor for PLL6 counts from 1 to 32, as specified in the A23
manual, and shown in Allwinner's original code.
Are you sure about this? The A23 manual I'm looking at has a 5-bit field
(so 0-31) on 12:8, and the examples count from 0 (eg Factor
Hi,
El 13/06/14 22:47, Nick escribió:
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 4264834..07b45d1 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -41,9 +41,11 @@ static void __init sun4i_osc_clk_setup(struct device_node
*no
Hi,
El 14/06/14 22:15, Nick escribió:
Signed-off-by: Nick
---
drivers/clk/sunxi/clk-sunxi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 6f4fc51..c2ce538 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
Hi Maxime,
El 29/01/14 08:10, Maxime Ripard escribió:
The Allwinner A31 has a new SPI controller IP compared to the older Allwinner
SoCs.
It supports DMA, but the driver only does PIO for now, and DMA will be
supported eventually.
Signed-off-by: Maxime Ripard
---
(snip)
+ struct sun6i
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