On Fri, Jul 24, 2020 at 03:15:53PM +0800, Frank Lee wrote:
> From: Yangtao Li
>
> Add a binding for A100's nmi controller.
>
> Signed-off-by: Yangtao Li
> Acked-by: Rob Herring
Applied, thanks!
Maxime
signature.asc
Description: PGP signature
On Fri, Jul 24, 2020 at 03:00:31PM +0800, Frank Lee wrote:
> From: Yangtao Li
>
> Rather than a continual nesting of 'else' clauses, just make
> each 'if' a new entry under 'allOf' and get rid of the else.
>
> Signed-off-by: Yangtao Li
>
ob Herring
Acked-by: Maxime Ripard
Thanks!
Maxime
signature.asc
Description: PGP signature
On Fri, Jul 24, 2020 at 03:11:43PM +0800, Frank Lee wrote:
> From: Yangtao Li
>
> This patch add thermal sensor controller support for A100,
> which is similar to the previous ones.
>
> Signed-off-by: Yangtao Li
Acked-by: Maxime Ripard
Thanks!
Maxime
signature.as
Hi,
On Fri, Aug 21, 2020 at 04:59:30PM +0200, Kévin L'hôpital wrote:
> Add a documentation for the sensor ov8865 from Omnivision.
>
> Signed-off-by: Kévin L'hôpital
In order to ease the submission of both drivers, you should probably
split this series into two, one with the MIPI-CSI driver, and
On Mon, Aug 24, 2020 at 09:36:49PM +0200, Jernej Skrabec wrote:
> DCDC1 regulator powers many different subsystems. While some of them can
> work at 3.0 V, some of them can not. For example, VCC-HDMI can only work
> between 3.24 V and 3.36 V. According to OS images provided by the board
> manufactu
Hi,
On Wed, Jul 29, 2020 at 03:09:21PM +0100, Dave Stevenson wrote:
> On Wed, 8 Jul 2020 at 18:43, Maxime Ripard wrote:
> >
> > In order to avoid pixels getting stuck in the (unflushable) FIFO between
> > the HVS and the PV, we need to add some delay after disabling the PV
Hi,
On Sat, Jul 25, 2020 at 02:18:39PM -0500, Samuel Holland wrote:
> On 7/17/20 11:07 AM, Maxime Ripard wrote:
> > Hi!
> >
> > On Wed, Jul 15, 2020 at 07:54:12PM +0800, Frank Lee wrote:
> >> From: Yangtao Li
> >>
> >> The sunxi gpio binding d
Hi!
On Sat, Jul 25, 2020 at 01:08:12PM +0200, Luca Weiss wrote:
> All revisions of the PinePhone have an SGM3140 LED flash. The gpios were
> swapped on v1.0 of the board but this was fixed in later revisions.
>
> Signed-off-by: Luca Weiss
> ---
> .../boot/dts/allwinner/sun50i-a64-pinephone-1.0.
Hi,
On Mon, Jul 27, 2020 at 11:39:12AM -0300, Ezequiel Garcia wrote:
> On Sat, 2020-07-25 at 23:34 +0900, Alexandre Courbot wrote:
> > On Thu, Jul 16, 2020 at 5:23 AM Ezequiel Garcia
> > wrote:
> > > The H.264 specification requires in its "Slice header semantics"
> > > section that the followin
Hi,
On Fri, Jul 24, 2020 at 10:35:49PM +0200, Jernej Skrabec wrote:
> It was discovered in the past by Ondrej Jirman that mixer register read
> may occasionally return wrong value, most likely zero. It turns out
> that all mixer units are affected by this issue. This becomes especially
> obvious w
ixes: 196737912da5 ("spi: sun4i: Allow transfers larger than FIFO size")
> Signed-off-by: Jonathan Liu
Acked-by: Maxime Ripard
Thanks!
Maxime
signature.asc
Description: PGP signature
On Fri, Jul 24, 2020 at 02:25:33PM +0800, Frank Lee wrote:
> HI,
>
> On Fri, Jul 24, 2020 at 12:54 AM Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Tue, Jul 14, 2020 at 03:20:29PM +0800, Frank Lee wrote:
> > > From: Yangtao Li
> > >
> >
On Mon, Jul 20, 2020 at 12:38:10PM +0200, Daniel Lezcano wrote:
> On 20/07/2020 11:27, Frank Lee wrote:
> > HI,
> > On Fri, Jul 17, 2020 at 3:56 PM Daniel Lezcano
> > wrote:
> >>
> >> On 17/07/2020 09:35, Frank Lee wrote:
> >>> On Fri, Jul 17, 2020 at 12:26 PM Daniel Lezcano
> >>> wrote:
>
>
Hi,
On Tue, Jul 14, 2020 at 03:20:29PM +0800, Frank Lee wrote:
> From: Yangtao Li
>
> Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds
> the basical DTSI file of it, including the clock, i2c, pins, sid, ths,
> nmi, and UART support.
>
> Signed-off-by: Yangtao Li
> ---
> ...
On Mon, Jul 13, 2020 at 01:29:42AM +0200, Ondřej Jirman wrote:
> Hi Maxime,
>
> On Wed, Jul 08, 2020 at 03:57:48PM +0200, Maxime Ripard wrote:
> > On Wed, Jul 08, 2020 at 03:44:41PM +0200, Ondřej Jirman wrote:
> > > >
>
> [...]
>
> > > > Yeah,
On Sat, Jul 18, 2020 at 12:00:45AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai
>
> Hi everyone,
>
> This is v2 of my Allwinner H5 SoC cpufreq support series from way
> back [1]. The series enables DVFS for the CPU cores (aka cpufreq)
> on the Allwinner H5 SoC. The OPP table was taken from Ar
On Wed, Jul 15, 2020 at 07:55:29PM +0800, Frank Lee wrote:
> From: Yangtao Li
>
> Convert gpio.h to sunxi-gpio.h, and convert to use gpio bank name macro.
> This is done using the following command.
>
> sed -i 's/r_pio 0/r_pio PL/g' arch/arm64/boot/dts/allwinner/*
> sed -i 's/r_pio 1/r_pio PM/g'
On Wed, Jul 15, 2020 at 07:55:07PM +0800, Frank Lee wrote:
> From: Yangtao Li
>
> Use names instead of numbers to describe GPIO. We clean arm64 first.
> Since H5 uses the DTS file in arm directory, we need to modify the
> header file in advance.
>
> Signed-off-by: Yangtao Li
>
> ---
> arch/ar
Hi!
On Wed, Jul 15, 2020 at 07:54:12PM +0800, Frank Lee wrote:
> From: Yangtao Li
>
> The sunxi gpio binding defines a few custom cells for its gpio specifier.
> Provide bank name for those.
>
> Signed-off-by: Yangtao Li
Thanks for working on this, I wanted to do it at some point but it kept
On Sat, Jul 11, 2020 at 09:10:30AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai
>
> When the extra HPD polling in sun4i_hdmi was removed, the result of
> HPD was accidentally inverted.
>
> Fix this by inverting the check.
>
> Fixes: bda8eaa6dee7 ("drm: sun4i: hdmi: Remove extra HPD polling")
Hi,
On Wed, Jul 08, 2020 at 03:19:26PM +0800, Frank Lee wrote:
> This patch set adds initial support for allwinner a100 soc,
> which is a 64-bit tablet chip.
>
> v3:
> -Add pmu and nmi support
> -Add read data mask for calibration
> -Code style
> -Some trivial things in yaml files
>
> v2:
> -Som
Hi,
On Thu, Jul 09, 2020 at 07:17:13PM +0200, Ondřej Jirman wrote:
> Hello,
>
> On Wed, Jul 08, 2020 at 03:19:30PM +0800, Frank Lee wrote:
> > Since we don't really have to care about the existing DT for boards,
> > it would be great to make the gpio banks supplies required.
>
> What if the bora
Hi,
On Wed, Jul 08, 2020 at 04:28:21PM +0800, Frank Lee wrote:
> A100 perf1 is an Allwinner A100-based SBC, with the following features:
>
> - 1GiB DDR3 DRAM
> - AXP803 PMIC
> - 2 USB 2.0 ports
> - MicroSD slot and on-board eMMC module
> - on-board Nand flash
> - ···
>
> Adds initial support for
Hi,
Thanks for sending a new series
On Wed, Jul 08, 2020 at 04:25:05PM +0800, Frank Lee wrote:
> + thermal-zones {
> + cpu_thermal_zone {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = <&t
Hi Eric,
On Tue, Jul 07, 2020 at 09:48:45AM -0700, Eric Anholt wrote:
> On Tue, Jul 7, 2020 at 3:26 AM Maxime Ripard wrote:
> >
> > If the DSI driver is the last to probe, component_add will try to run all
> > the bind callbacks straight away and return the error code.
>
The HVS found in the BCM2711 is slightly different from the previous
generations, let's add a compatible for it.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml | 18 ++-
1 file changed, 17 insertions(+), 1 del
Some of the HDMI pixelvalves in vc5 output two pixels per clock cycle.
Let's put the number of pixel output per clock cycle in the CRTC data and
update the various calculations to reflect that.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c
The previous generations were only supporting a single HDMI controller, but
that's about to change, so put an index as well to differentiate between
the two controllers.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
drivers/gpu/dr
Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 4 +-
drivers/gpu/drm/vc4/vc4_hvs.c | 34 --
drivers/gpu/drm/vc4/vc4_plane.c | 194 -
drivers/gpu/drm/vc4/vc4_regs.h | 67 +++-
4 files changed, 240 insertions(+
y DRM.
Using 16 seems like a good tradeoff between staying under 32 and yet
providing enough planes.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_plane.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/dr
ned-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 284a85b9d7d4..2eda2e6429ec 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/
The BCM2711 sports a second HDMI controller, so let's add that second HDMI
encoder type.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_
In order to clear our intermediate FIFOs that might end up with a stale
pixel, let's make sure our FIFO channel is reset everytime our channel is
setup.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hvs.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/dr
el to hvs_output in the
vc4_crtc_data, since a pixelvalve is really connected to an output, and
not to a FIFO.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 8
drivers/gpu/drm/vc4/vc4_drv.h | 4 ++--
drivers/gpu/drm/vc4/vc4_hvs.c | 2 +-
drivers/gpu/drm/vc4/vc4_txp.c
The vc4_crtc_handle_page_flip already has a local variable holding the
value of vc4_crtc->channel, so let's use it instead.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_
no longer
have that luxury.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_plane.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index d0771ebd5f75
The driver resets the pixelvalve FIFO in a number of occurences without
always using the same sequence.
Since this will be critical for BCM2711, let's move that sequence to a
function so that we are consistent.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/dr
Since most of the HVS channel is setup in the init function, let's move the
gamma setup there too. As this makes the HVS mode_set function empty, let's
remove it in the process.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
drivers/gpu/drm/vc4/vc4_d
Now that we only configure the PixelValve in vc4_crtc_config_pv, it doesn't
really make much sense to dump its register content in its caller.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
7;s remove the first call.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 2eda2e6429ec..2c5ff45dc315 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/g
In the BCM2711, the setup of the HVS, pixelvalve and HDMI controller
requires very precise ordering and timing that the regular atomic callbacks
don't provide. Let's add new callbacks on top of the regular ones to be
able to split the configuration as needed.
Signed-off-by: Max
ff-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +-
drivers/gpu/drm/vc4/vc4_hvs.c | 54 -
2 files changed, 55 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 554c2e29b23d..860be019d8e3 100644
--- a/dr
ed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
drivers/gpu/drm/vc4/vc4_hvs.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 251fcc35530c..554c2e29b23d 100644
In order to avoid a stale pixel getting stuck on mode change or a disable
/ enable cycle, we need to make sure to flush the PV FIFO on disable.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
The driver isn't consistent with the name given to the vc4_hdmi
structure pointer in its functions. Make sure to use a consistent name.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 283 +-
1 file changed
,
and we'll fix the local variable later.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 89
-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 41 ++-
drivers/gpu/drm/vc4/vc4_hdmi.h | 16 ++-
2 files changed, 28 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index a3fb93322ebb
n.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 61 +++
drivers/gpu/drm/vc4/vc4_hdmi.h | 10 ++-
2 files changed, 51 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index ec
y the vc4_hdmi structure so
that we can eventually get rid of that single global pointer.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 22 --
drivers/gpu/drm/vc4/vc4_hdmi.h | 8
2 files changed, 12 insertions(+), 18 dele
The vc4_hdmi_connector was only used to switch between drm_connector to
drm_encoder. However, we can now use vc4_hdmi to do the switch, so that
structure is redundant.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 19 ---
drivers/gpu
In order to prevent issues during the firmware to KMS transition, we need
to make sure the pixelvalve are disabled at boot time so that the DRM state
matches the hardware state.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 25
Let's continue the implementation of hooks for the parts that change in the
BCM2711 SoC with the PHY RNG setup.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 15 +--
drivers/gpu/drm/vc4/vc4_hdmi.h | 8
drivers/gpu/drm/vc4/vc4_hdmi_phy.c
flict.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 5 -
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index c50241170d7e..ef51eedaf75a 100644
--- a/driver
The BCM2711 comes with other pixelvalves that have different requirements
and capabilities. Let's document their compatible.
Reviewed-by: Rob Herring
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml | 5
+++
We'll need to reuse the part that disables the HVS and PixelValve during
boot too, so let's create a separate function.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 34 ++
1 file changed, 22 inserti
vc4_hdmi and update the code
accordingly.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 87 ---
drivers/gpu/drm/vc4/vc4_hdmi.h | 64 +-
2 files changed, 72 insertions(+), 79 deletions(-)
diff --git a/drivers/gpu/drm/vc4
Similarly to the previous patches, the CSC setup is slightly different in
the BCM2711 than in the previous generations. Let's add a callback for it.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 142 +++---
drivers/gpu/drm/vc4/vc4_hdmi.h
de as much as
possible.
Let's implement some indirection to wrap around a register and depending on
the variant will lookup the associated register on that particular variant.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 427 ++---
drivers/g
The HDMI PHY in the BCM2711 HDMI controller is significantly more
complicated to setup than in the older BCM283x SoCs.
Let's add hooks to enable and disable the PHY.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/Makefile | 1 +
drivers/gpu/drm/vc4/vc4_hdmi.c
Now that we are passing the vc4_hdmi structure to the connector init
function, we can simply use the pointer in that structure instead of
having the pointer as an argument.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 7 +++
1 file changed, 3
The CEC init code was put directly into the bind function, which was quite
inconsistent with how the audio support was done, and would prevent us from
further changes to skip that initialisation entirely.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 108
From: Dave Stevenson
The audio configuration has changed for the BCM2711, with notably a
different parent clock and a different channel configuration.
Make that modular to be able to support the BCM2711.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4
From: Dave Stevenson
If the encoder is disabled and re-enabled (eg mode change) all infoframes
are reset, whilst the audio subsystem know nothing about this change.
The driver therefore needs to reinstate the audio infoframe for
itself.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime
In order to avoid pixels getting stuck in an unflushable FIFO, we need when
we disable the HDMI controller to switch away from getting our pixels from
the pixelvalve and instead use blank pixels, and switch back to the
pixelvalve when we enable the HDMI controller.
Signed-off-by: Maxime Ripard
ither constraints, so we need to roll our own callbacks so that we can
provide those guarantees.
Since those callbacks have been implemented and called in the CRTC code, we
can just implement them in the HDMI driver now.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c
igned-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ++-
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 1b6f51849d6c..0a9a323e03d8 100644
--- a/drivers/gpu/dr
has a clock that can provide it,
but we still have to take care of a 4k panel plugged on a BCM283x SoCs
that wouldn't be able to use those modes, so let's define the limit in
the variant.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 79 -
From: Dave Stevenson
ALSA's iec958 plugin by default sets the block start preamble
to 8, whilst this driver was programming the hardware to expect
0xF.
Amend the hardware config to match ALSA.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.
, the first HDMI controller will end up with a smaller than
expected clock rate.
Since we don't really need an exact frequency there, we can simply change
the minimum rate we expect instead.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
1 file changed, 1 inser
In order to avoid a pixel getting stuck in an unflushable FIFO, we need to
recenter the FIFO every time we're doing a modeset and not only if we're
connected to an HDMI monitor.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 46 +++--
The VID_CTL setup is done in several places in the driver even though it's
not really required. Let's simplify it a bit to do the configuration in one
go.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 14 ++
1 file changed, 6 insertions(+), 8 deletion
fallback.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index d99188c90ff9..8b94b920be43 100644
--- a/drivers
The BCM2711 has a reworked display pipeline, and the load tracker needs
some adjustement to operate properly. Let's add a compatible for BCM2711
and disable the load tracker until properly supported.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.c | 1 +-
drivers/gpu/dr
sense.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 0a9a323e03d8..4058985940e6 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/dr
The HDMI controllers found in the BCM2711 SoC need some adjustments to the
bindings, especially since the registers have been shuffled around in more
register ranges.
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml
Now that the driver is ready for it, let's bring in the HDMI controllers
variants for the BCM2711.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 278 +-
drivers/gpu/drm/vc4/vc4_hdmi.h | 36 ++-
drivers/gpu/drm/vc4/vc4_hdmi_phy.c
Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 46 +++-
arch/arm/boot/dts/bcm2711.dtsi| 115 ++-
2 files changed
The BCM2711 comes with a new VideoCore. Add a compatible for it.
Reviewed-by: Rob Herring
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index d9e48fbd7519..f6b4a05a7d96 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm
Our CEC code also retrieves the associated vc4_hdmi by setting the
vc4_dev pointer as its private data, and then dereferences its vc4_hdmi
pointer.
In order to eventually get rid of that pointer, we can simply pass the
vc4_hdmi pointer directly.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime
The BCM2711 and BCM283x HDMI controllers use a slightly different reset
sequence, so let's add a callback to reset the controller.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 31 ++-
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files change
We will need to share the vc4_hdmi and related structures with multiple
files, so let's create a header for it.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 76 +---
drivers/gpu/drm/vc4/vc4_hdmi.h
The BCM2711 has 5 pixelvalves, so now that our driver is ready, let's add
support for them.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 95 ++-
drivers/gpu/drm/vc4/vc4_regs.h | 7 +++-
2 files changed
obviously won't if we don't
use it.
Let's make sure the fields are at the proper offset to be able to cast
between the snd_soc_card structure and the vc4_hdmi structure
transparently so we can support both cases.
Signed-off-by: Maxime Ripard
---
drivers/gp
The vc4 CRTC will use the encoder type to control its output clock
muxing. However, this will be different from HDMI0 to HDMI1, so let's
store our type in the variant structure so that we can support multiple
controllers later on.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_h
Now that we don't have any users anymore, we can kill that pointer.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
drivers/gpu/drm/vc4/vc4_hdmi.c | 7 ---
2 files changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/dr
Similarly to the audio support, CEC support is not there yet for the
BCM2711, so let's skip entirely the CEC initialization through a variant
flag.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 4
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
2 files changed, 7 inser
The mode_valid hook on the encoder uses a pointer to a drm_encoder called
crtc, which is pretty confusing. Let's rename it to encoder to make it
clear what it is.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
Even though it's not really clear why we need to flush the PV FIFO during
the configuration even though we started by flushing it, experience shows
that without it we get a stale pixel stuck in the FIFO between the HVS and
the PV.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_c
In order to avoid pixels getting stuck in the (unflushable) FIFO between
the HVS and the PV, we need to add some delay after disabling the PV output
and before disabling the HDMI controller. 20ms seems to be good enough so
let's use that.
Signed-off-by: Maxime Ripard
---
drivers/gpu/dr
The CEC_CLOCK_DIV define is not used anywhere in the driver, let's remove
it.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 86e21de6c578..a01562a
ne if the pixelvalve is disabled though.
In order to overcome this, we can configure the pixelvalve during
mode_set_no_fb, but only enable it in atomic_enable and flush the FIFO
there, and in atomic_disable disable the pixelvalve again.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_c
m/vc4: plane: Optimize the LBM allocation size
drm/vc4: hdmi: Use reg-names to retrieve the HDMI audio registers
drm/vc4: hdmi: Reset audio infoframe on encoder_enable if previously streaming
drm/vc4: hdmi: Set the b-frame marker to the match ALSA's default.
drm/vc4: hdmi: Add audio-related
In order to prevent timeouts and stalls in the pipeline, the core clock
needs to be maxed at 500MHz during a modeset on the BCM2711.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.h | 2 ++
drivers/gpu/drm/vc4/vc4_hvs.c | 9 +
drivers/gpu/drm
Not all pixelvalve FIFOs in vc5 have the same depth, so we need to add that
to our vc4_crtc_data structure to be able to compute the fill level
properly later on.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 20 +---
drivers/gpu/drm
FIFOs each output can be
assigned to in the vc4_crtc_data, and use that information at atomic_check
time to iterate over all the CRTCs enabled and assign them FIFOs.
The channel assigned is then set in the vc4_crtc_state so that the rest of
the driver can use it.
Signed-off-by: Maxime R
In order to avoid stale pixels getting stuck in an intermediate FIFO
between the HVS and the pixelvalve on BCM2711, we need to configure the HVS
channel before the pixelvalve is reset and configured.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 8
1 file changed, 4
In order to make further refactoring easier, let's move the HVS channel
setup / teardown to their own function.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hvs.c | 104 +++
1 file changed, 58 insertions(+), 46 deletions(-)
diff --git a/driver
Some pixelvalves in vc5 use the same interrupt line so let's register our
interrupt handler as a shared one.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
701 - 800 of 4121 matches
Mail list logo
