Hi,
Just wanted to enquire,
if someone has used following configuration with earlier OMAP devices.
ti,nand-ecc-opt = hw-romcode;
Documentation/devicetree/bindings/mtd/gpmc-nand.txt
hw-romcodegpmc hamming mode method romcode layout
which in earlier non-DT kernels would map to:
From: avinash philip avinashphi...@ti.com
From: Philip, Avinash avinashphi...@ti.com
Add ELM data node to AM33XX device tree file.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
Tested-by: Pekon Gupta pe...@ti.com
---
Changes since v2:
-
From: avinash philip avinashphi...@ti.com
From: Philip, Avinash avinashphi...@ti.com
Add GPMC data node to AM33XX device tree file.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
Tested-by: Pekon Gupta pe...@ti.com
---
Changes since v2:
-
From: avinash philip avinashphi...@ti.com
NAND flash connected in am335x-evm on GPMC controller. This patch adds
device tree node in am3355-evm with GPMC contoller timing for NAND flash
interface, NAND partition table, ECC scheme, elm handle id.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Signed-off-by: Gupta, Pekon pe...@ti.com
---
arch/arm/boot/dts/am335x-evm.dts | 95
1 file changed, 95 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index d649644..07761fd 100644
--- a/arch/arm/boot/dts
Signed-off-by: Gupta, Pekon pe...@ti.com
---
Changes in v3:
- moved GPMC pin-mux config to nand node
arch/arm/boot/dts/am335x-evm.dts | 95
1 file changed, 95 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = default;
- pinctrl-0 = matrix_keypad_s0 volume_keys_s0;
+ pinctrl-0 = matrix_keypad_s0 volume_keys_s0
+ nandflash_pins_s0;
Why add this to the board level fallback (called pinctrl
Acked-by: Pekon Gupta pe...@ti.com
OMAP devices support various NAND transfer modes.
Currently all device-tree definitions will use the default prefetch
polled mode, so this patch enables the transfer mode to be specified
in the device-tree.
---
.../devicetree/bindings/mtd/gpmc-nand.txt
From: Gupta, Pekon pe...@ti.com
This patch series makes ECC scheme selection for omap2-nand driver more
user-friendly.It also adds scalability for large page-sized NAND devices,
and adding new ECC schemes in future.
[PATCH 1/2]
- clean-up and optimization for supported ECC schemes
From: Gupta, Pekon pe...@ti.com
ECC scheme on NAND devices can be implemented in multiple ways.Some using
Software algorithm, while others using in-build Hardware engines.
omap2-nand driver currently supports following flavours of ECC schemes,
selectable via DTB
From: Gupta, Pekon pe...@ti.com
ECC scheme on NAND devices can be implemented in multiple ways.Some using
Software algorithm, while others using in-build Hardware engines.
omap2-nand driver currently supports following flavours of ECC schemes
OMAP_ECC_BCH4_CODE_HW_DETECTION_SW and
OMAP_ECC_BCH4_CODE_HW
seems to exist in the code, but are not in the changelog, and not in
the device tree binding documentation.
Yes, I plan to omit them from code also, in next series as it does not
make sense to support both BCH4 and BCH8 at
2013/5/16 Gupta, Pekon pe...@ti.com:
OMAP_ECC_BCH4_CODE_HW_DETECTION_SW and
OMAP_ECC_BCH4_CODE_HW
seems to exist in the code, but are not in the changelog, and not in
the device tree binding documentation.
Yes, I plan to omit them from code also, in next series as it does
From: Gupta, Pekon pe...@ti.com
[Change v1 - v2]
added [PATCH 3/4] and [PATCH 4/4]
[PATCH 1/4]: clean-up and optimization for supported ECC schemes.
[PATCH 2/4]: add separate DT options each supported ECC scheme.
[PATCH 3/4]: update BCH4 ECC implementation (using ELM or using lib/bch.h
From: Gupta, Pekon pe...@ti.com
Updates ECC scheme selection string same to same as used in omap2-driver code.
This makes the DT configurations easy to understand and map to actual code.
Signed-off-by: Gupta, Pekon pe...@ti.com
---
.../devicetree/bindings/mtd/gpmc-nand.txt | 47
From: Gupta, Pekon pe...@ti.com
ECC scheme on NAND devices can be implemented in multiple ways.Some using
Software algorithm, while others using in-build Hardware engines.
omap2-nand driver currently supports following flavours of ECC schemes,
selectable via DTB
From: Gupta, Pekon pe...@ti.com
This patch adds following two flavours of BCH4 ECC scheme in omap2-nand driver
- OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
- uses GPMC H/W engine for calculating ECC.
- uses software library (lib/bch.h nand_bch.h) for error correction
From: Gupta, Pekon pe...@ti.com
ECC scheme on NAND devices can be implemented in multiple ways.Some using
Software algorithm, while others using in-build Hardware engines.
omap2-nand driver currently supports following flavours of ECC schemes
On Friday 17 May 2013, Gupta, Pekon wrote:
From: Gupta, Pekon pe...@ti.com
Updates ECC scheme selection string same to same as used in omap2-
driver code.
This makes the DT configurations easy to understand and map to actual
code.
Signed-off-by: Gupta, Pekon pe...@ti.com
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = default;
- pinctrl-0 = matrix_keypad_s0 volume_keys_s0;
+ pinctrl-0 = matrix_keypad_s0 volume_keys_s0
+ nandflash_pins_s0;
Why add this to the
Signed-off-by: Gupta, Pekon pe...@ti.com
---
arch/arm/boot/dts/am335x-evm.dts | 105 +++
1 file changed, 105 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 0423298..7d2be9c 100644
--- a/arch/arm/boot/dts
From: Gupta, Pekon pe...@ti.com
Changes v3-v4
- rebased to linux-3.10-rc3
- updated newly supported DT properties based on following commits
[d36b4cd] jon-hun...@ti.com ARM: OMAP2+: Add additional GPMC timing ...
[8c8a777] jon-hun...@ti.com ARM: OMAP2+: Add
From: Philip, Avinash avinashphi...@ti.com
Add ELM data node to AM33XX device tree file.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
Signed-off-by: Pekon Gupta pe...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 8
1 file changed, 8
From: Gupta, Pekon pe...@ti.com
add prefix to 'gpmc' specific properties
Signed-off-by: Gupta, Pekon pe...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 0425af8
Lars == Lars Poeschel la...@wh2.tu-dresden.de writes:
Lars From: Lars Poeschel poesc...@lemonage.de
Lars The gpmc driver is actually looking for gpmc,num-cs and
Lars gpmc,num-waitpins properties in DT. The binding doc also states
Lars this.
Lars Correct the properties in the dts to
Sorry, I missed that series.
I'm applying it right now.
No issues.. Please pick newer v4 versions of this series.
Following are rebased, updated and tested on linux-3.10-rc3
[PATCH v4,0/3] http://www.spinics.net/lists/linux-omap/msg91165.html
[PATCH v4,1/3]
Sorry, I missed that series.
I'm applying it right now.
No issues.. Please pick newer v4 versions of this series.
Following are rebased, updated and tested on linux-3.10-rc3
[PATCH v4,0/3] http://www.spinics.net/lists/linux-omap/msg91165.html
[PATCH v4,1/3]
partition table, ECC scheme, elm handle id.
- updates GPMC node for newer GPMC DT properties added in linux-3.10.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Signed-off-by: Gupta, Pekon pe...@ti.com
---
arch/arm/boot/dts/am335x-evm.dts | 105 +++
1 file
From: Lars Poeschel poesc...@lemonage.de
The gpmc driver is actually looking for gpmc,num-cs and
gpmc,num-waitpins properties in DT. The binding doc also states
this.
Correct the properties in the dts to provide the right values for the
gpmc driver.
Signed-off-by: Lars Poeschel
From: Philip, Avinash avinashphi...@ti.com
ELM hardware engine is used for locating bit-flips in NAND data
This patch is required for working of hardware based NAND ECC schemes
with DT support.
Signed-off-by: Philip Avinash avinashphi...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
From: Gupta, Pekon pe...@ti.com
Changes v4-v5
- updated commit descriptions.
- included patch by Lars Poeschel instead of [Patch 2/3]
Changes v3-v4
- rebased to linux-3.10-rc3
- updated newly supported DT properties based on following commits
[d36b4cd] jon
From: Gupta, Pekon pe...@ti.com
GPMC supports multiple types of child devices like NAND, NOR, OneNand, Ethernet
This patch removes 'gpmc,device-nand', used explicitely to specify NAND type
gpmc-child. Instead gpmc-child type can be inferred from gpmc-child-name.
Signed-off-by: Gupta, Pekon pe
From: Gupta, Pekon pe...@ti.com
This patch enables usage of DT property 'gpmc,num-cs' as already documented in
Documentation/devicetree/bindings/bus/ti-gpmc.txt
Though GPMC hardware supports upto 8 chip-selects, but all chip-selects may
not be available for use because:
- chip-select pin may
From: Gupta, Pekon pe...@ti.com
GPMC supports multiple types of child devices like NAND, NOR, OneNand,
Ethernet
This patch removes 'gpmc,device-nand', used explicitely to specify NAND
type
gpmc-child. Instead gpmc-child type can be inferred from gpmc-child-
name.
This does not seem
-- accepted by
Benoit (follow-up)
[PATCH 3/3] ARM: dts: AM33XX: Add NAND flash device tree data to am335x-evm
--awaiting --
with regards, pekon
-Original Message-
From: Gupta, Pekon
Sent: Friday, May 31, 2013 1:19 PM
To: Tony Lindgren; linux-omap@vger.kernel.org
Cc: Gupta, Pekon
From: Gupta, Pekon pe...@ti.com
Can you fix your From address ? I guess:
git config --global user.name Pekon Gupta
should do it, but you'll have to recommit those commits with:
git commit --amend --reset-author
[Pekon]: Thanks for pointing it out. I had missed this.
I updated my global
of omap2-nand driver.
with regards, pekon
-Original Message-
From: Gupta, Pekon
Sent: Sunday, June 23, 2013 11:28 PM
To: t...@atomide.com; artem.bityuts...@linux.intel.com; Cousson, Benoit
Cc: a...@arndb.de; Philip, Avinash; Balbi, Felipe; linux-
m...@lists.infradead.org; linux-omap
From: avinash philip avinashphi...@ti.com
ELM is used for locating bit-flip errors in when using BCH ECC scheme.
This patch adds suspend/resume support for leaf level ELM driver,
And also provides ELM register context save restore support, so that
configurations are preserved across
Hi Pekon,
On Sun, 2013-06-23 at 23:28 +0530, Pekon Gupta wrote:
+---+---+---+
| ECC scheme|ECC calculation|Error
detection|
This does not apply to l2-mtd.git, could you please re-base?
[Pekon]: rebased to l2-mtd.git
- updated [Patch 3/4] which conflicted with commit '26331c04' which
touched omap2.c.
- Please ignore [Patch 4/4] as it’s a DT update, which adds on top of
Benoit's
tree (which has NAND node
On Tuesday 02 July 2013, Pekon Gupta wrote:
(+ CC: devicetree-disc...@lists.ozlabs.org)
Changes v3 - v4
- [Patch 1/3] removed MTD_NAND_OMAP_BCH8
MTD_NAND_OMAP_BCH4 from nand/Kconfig
ECC scheme selectable via nand DT (nand-ecc-opt).
- [*] rebased for l2-mtd.git
Do you also
On Wednesday 03 July 2013, Artem Bityutskiy wrote:
On Wed, 2013-07-03 at 13:16 +, Gupta, Pekon wrote:
[Pekon]: Yes, I'm not seeing these build issues, as I'm cleanly
returning from probe with pr_err(), if the required libraries (/lib/bch.c)
are not build-in the system
On 7/3/2013 11:34 PM, Gupta, Pekon wrote:
On Wednesday 03 July 2013, Artem Bityutskiy wrote:
On Wed, 2013-07-03 at 13:16 +, Gupta, Pekon wrote:
[Pekon]: Yes, I'm not seeing these build issues, as I'm cleanly
returning from probe with pr_err(), if the required libraries
(/lib
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index 6a983c1..690070e 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -17,20 +17,42 @@
4. pka
5. des
6. Rng
Needs some re-wording..
PKA, DES, RNG are there on AM335x silicon.
with regards, pekon
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Changes v4 - v5
- Rebased to linux-next
IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous
version
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047441.html
- Swapped PATCH-1 PATCH-2 to maintain bisectibility compilation
dependency
Hi Pekon,
On Mon, Jul 15, 2013 at 8:25 PM, Pekon Gupta pe...@ti.com wrote:
chip-ecc.correct() is used for detecting and correcting bit-flips during
read
operations. In omap2-nand driver this is done usingt following functions:
- omap_correct_data(): for H/W based HAM1_ECC schemes
The calculation of the oobfree[0].offset is wrong when using BCH8
and elm.
The layout-eccbytes is already steps*info-nand.ecc.bytes. The second
multiplication with steps is too much and will create a value
larger than the oob area.
Fixed the calculation.
This is already fixed in
Hi Olof,
fb1585bc13b (mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC
configurations in device_probe) introduced a warning when the new option
is disabled, i.e. with omap2plus_defconfig:
drivers/mtd/nand/omap2.c:1075:13: warning: 'omap3_enable_hwecc_bch'
defined but not used
Hi Artem, Brian,
Changes v4 - v5
- Rebased to linux-next
IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous
version
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047441.html
- Swapped PATCH-1 PATCH-2 to maintain bisectibility compilation
On Sun, Jul 14, 2013 at 02:24:48AM +0530, Pekon Gupta wrote:
ECC scheme on NAND devices can be implemented in multiple ways.Some
using
Software algorithm, while others using in-build Hardware engines.
omap2-nand driver currently supports following flavours of ECC schemes,
selectable
On Friday 23 August 2013 10:26 PM, Santosh Shilimkar wrote:
On Friday 23 August 2013 12:30 PM, Daniel Mack wrote:
On 23.08.2013 16:23, Santosh Shilimkar wrote:
On Friday 23 August 2013 10:16 AM, Daniel Mack wrote:
+static const struct of_device_id cpsw_of_mtable[] = {
+{
+
On Thu, Aug 22, 2013 at 07:56:57AM +, Gupta, Pekon wrote:
If anything, the device entry should somehow describe the various ecc
options
that the hardware implements (if you can't derive that from the compatible
value, which I think you can?).
Also I'll try to explain how below ecc
Hi,
[...]
You might also consider a future patch for utilizing devm_* functions
for the probe/remove routines in drivers/mtd/nand/omap2.c. That could
improve some of the stuff I looked at in this series.
Thanks for feedback.
I have not incorporated this particular update in v6, as I do
This patch
- updates DT binding for selection of ecc-scheme
- updates DT binding for detection of ELM h/w engine
- removes following obselete ECC schemes
OMAP_ECC_HAMMING_CODE_DEFAULT (S/W based 1-bit Hamming
ECC)
OMAP_ECC_HAMMING_CODE_HW_ROMCODE (H/W based 1-bit
Hamming ECC
Hi Brian,
Hi Pekon,
On Wed, Sep 25, 2013 at 08:46:19AM -0500, Felipe Balbi wrote:
+ akpm
On Tue, Sep 24, 2013 at 01:04:05PM -0500, Gupta, Pekon wrote:
[snip]
Dear Olof and other DT Maintainers,
This patch series has missed multiple merge windows, and
much of the other
Hi,
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index df338cb..958e5d5 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -21,11 +21,8
Anyway, at this point I think your patch series should be nearly
complete. I made a few comments on your patches, and I'd imagine you
only should need one more revision (v7) before I can accept it to the
l2-mtd.git tree.
Yes surely I will send next version (v7), but it might take few
Hi Mark,
Pekon, could you please re-send this version of the patches?
As already there are feedbacks on the patches, so re-sending the
Patch series might clutter someone else's mailbox.
Will it be possible for you to fetch the patches from MTD archives?
else I would send you the patches
From: Rob Herring [mailto:robherri...@gmail.com]
From: Pekon Gupta [mailto:pe...@ti.com]
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index df338cb..958e5d5 100644
---
*Changes v5 - v6*
[PATCH 1/4]:
- updated DT binding for gpmc-nand based on 'Olof Johansson's
feedbacks
http://lists.infradead.org/pipermail/linux-mtd/2013-
August/048394.html
- detection of ELM device via ti,elm-id DT node, moved to gpmc.c
driver
[PATCH 2/4]
-
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Thu, Sep 12, 2013 at 05:20:19PM +0530, Pekon Gupta wrote:
DT property values for OMAP based gpmc-nand have been updated
to match changes in commit:
6faf096 ARM: OMAP2+: cleaned-up DT support of various ECC
schemes
Whose
Hi All,
So, based on feedbacks from everyone, I could come to following
conclusions. Please confirm, if those are acceptable ?
From: Mark Rutland [mailto:mark.rutl...@arm.com]
On Thu, Sep 26, 2013 at 11:54:39AM +0100, Gupta, Pekon wrote:
From: Rob Herring [mailto:robherri...@gmail.com
Hi,
From: Mark Rutland [mailto:mark.rutl...@arm.com]
On Fri, Oct 04, 2013 at 08:49:43PM +0100, Pekon Gupta wrote:
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
1-bit hamming ecc code using software library
From: Mark Rutland [mailto:mark.rutl...@arm.com]
On Fri, Oct 04, 2013 at 08:49:47PM +0100, Pekon Gupta wrote:
DT property values for OMAP based gpmc-nand have been updated
to match changes in commit:
6faf096 ARM: OMAP2+: cleaned-up DT support of various ECC
schemes
Refer:
From: Mark Rutland [mailto:mark.rutl...@arm.com]
On Fri, Oct 04, 2013 at 08:49:44PM +0100, Pekon Gupta wrote:
[snip]
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-
omap2/gpmc.c
index 1c45b72..5a607fa 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++
Dear MTD Maintainers,
If I have my NAND formatted with one of the existing ECC schemes (e.g.
OMAP_ECC_HAMMING_CODE_DEFAULT) will it work with the new
OMAP_ECC_HAM1_CODE_HW scheme?
Are they all compatible?
Yes, they all are 1-bit hamming code, the only difference between
xx_Default
Hi Brain,
Hi Pekon,
I will try to summarize the standing of your patch series.
Patches 1 and 2 look good and have addressed all of the DT maintainers'
comments, AFAICT. They are ready to go in, except that the following
patches are not ready; they should probably go in together.
You
Hi Brian,
Thanks for such detailed review, please see some replies below..
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Fri, Oct 11, 2013 at 07:06:40PM +0530, Pekon Gupta wrote:
[...]
Why do you even need the #ifdef's for the #include's? It is not harmful
to include headers
Hi Brian,
*changes v8 - v9*
[PATCH 1/9] no update from [PATCH v8 1/6]
[PATCH 2/9] only commit log updated from [PATCH v8 2/6]
As per feedbacks from Brian Norris computersforpe...@gmail.com
previous
revision [PATCH v8 3/6] and [PATCH 4/6] are split into following sub-patches:
- [PATCH
Hi Brian,
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Tue, Oct 15, 2013 at 11:19:52AM +0530, Pekon Gupta wrote:
Autodetection of NAND device bus-width was added in generic NAND
driver as
[...]
@@ -1904,6 +1903,21 @@ static int omap_nand_probe(struct
platform_device *pdev)
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Tue, Oct 15, 2013 at 11:19:55AM +0530, Pekon Gupta wrote:
[snip]
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index d885298..5836039 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@
Hi Brain,
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Thu, Oct 17, 2013 at 04:42:23AM +, Pekon Gupta wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Tue, Oct 15, 2013 at 11:19:52AM +0530, Pekon Gupta wrote:
[snip]
So this approach is other way
Hi Brain,
Oop sorry ..
s/Brain/Brian
synonymous though :-)
with regards, pekon
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Hi Mark,
From: Mark Rutland
[...]
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-
omap2/gpmc.c
index 579697a..c9fb353 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1342,9 +1342,7 @@ static void __maybe_unused
gpmc_read_timings_dt(struct
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Tue, Oct 15, 2013 at 11:19:51AM +0530, Pekon Gupta wrote:
This patch updates following in omap_nand_probe() and
omap_nand_remove()
- replaces info-nand with nand_chip (struct nand_chip *nand_chip)
- replaces info-mtd with mtd
Hi Brian,
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Thu, Oct 17, 2013 at 09:00:27PM +, Pekon Gupta wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Thu, Oct 17, 2013 at 04:42:23AM +, Pekon Gupta wrote:
[...]
But the real point: you need to
Hi Brian,
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Sat, Oct 19, 2013 at 02:14:08PM +0530, Pekon Gupta wrote:
[...]
Thus this patch run nand_scan_ident() with driver configured as x8 device.
So are you saying that the driver currently doesn't work if you started
in x16
Hi Brian,
From: Brian Norris [mailto:computersforpe...@gmail.com]
[PATCH 4/10]
dropped [PATCH v9 4/9] introducing NAND_BUSWIDTH_AUTO, instead
using DT 'nand-bus-width' for device bus-width
As mentioned in reply to the patch, I don't think this patch belongs in
this series now, and
Hi Brian,
From: Brian Norris [mailto:computersforpe...@gmail.com]
On 10/22/2013 10:07 PM, Gupta, Pekon wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Sat, Oct 19, 2013 at 02:14:08PM +0530, Pekon Gupta wrote:
[...]
So are you saying that the driver currently doesn't
Hi,
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
[...]
FWIW, I have a Beaglebone with a 16-bit bus NAND attached to it.
Coincidentally, yesterday I was doing some tests as I'm ramping up the
NAND and I found that weird double nand_scan_ident() call.
The whole thing
Hi Ezequiel,
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
I won't be able to make too much progress without some help or without
squeezing my brains out :P
Care to push some git branch on some random repo with DT support for
the NAND cape in the Beaglebone?
Apologies
Hi,
This simplifies the error path and makes the code less error-prone.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/mtd/nand/omap2.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
Hm.. well the problem with that patch is that it's in the middle of an
unrelated series. As I already told you, I think you should have pushed
that as a one-patch fix. Have you seen that suggestion?
Yes, I know.. actually
Hi,
-Original Message-
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
[...]
Pekon, Brian: Do you think this solution might work for 8-bit and 16-bit
devices?
I think NAND_BUSWIDTH_AUTO (without GPMC changes) would fail in
following scenarios..
Case-1:
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
Subject: [PATCH v2 3/5] mtd: nand: omap2: Fix OMAP_BCH option
dependency
This option does not need to depend in MTD_NAND, for it's enclosed
under it. Also, it's wrong to make it depend in ARCH_OMAP3 only
since the controller
Hi Ezequiel Garcia,
Sorry I'm bit out of my place.. so not able to sync often with mails..
However plz see my replies below..
[...]
Pekon, Brian: Do you think this solution might work for 8-bit and 16-bit
devices?
I think NAND_BUSWIDTH_AUTO (without GPMC changes) would fail in
Hi Brian, Ezequiel Garcia,
Some replies to your queries...
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Wed, Oct 30, 2013 at 06:53:07AM -0300, Ezequiel Garcia wrote:
[...]
I do have one curiosity here: omap2.c looks like it's essentially
defaulting to the NAND_OMAP_POLLED
From: Brian Norris [mailto:computersforpe...@gmail.com]
[...]
I agree with Ezequiel's thoughts, since the excessive amount of noise
in this patch series has delayed it significantly. But at this point,
I think it has stabilized; we have reviews from the DT folks (thanks
guys; please comment
Hi Tony,
From: Tony Lindgren
* Brian Norris computersforpe...@gmail.com [131029 21:00]:
Tony, you mentioned the DTS update in patch 8 going in via an ARM
tree? This patch is not urgent, and it should probably wait until we
know what release the rest of the series makes it into. This may
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
On Wed, Oct 30, 2013 at 09:18:53PM +, Gupta, Pekon wrote:
I'm not sure, of course, but I don't see why not. It's more likely to
break for x16 than it is for x8.
Another question here is ..
The above patch
From: Ezequiel Garcia
[...]
But: on the other hand, I'd really like you to convince me as to
why is it so bad to require the DTB to have the proper GPMC bus width.
No its not at all bad, all I want is either of the one way (not mixture of
both).
- Either depend on DT completely (which is
Hi Brian, Ezequiel,
Sorry Im bit confused on below, so few queries ..
From: Brian Norris [computersforpe...@gmail.com]
So I think the problem may need to be divided into 2 parts:
1) How do we best handle ONFI transactions, so that they are always
performed on the lower 8 bits of the bus
Hi,
From: Enric Balletbo Serra [mailto:eballe...@gmail.com]
CCing Pekon Gupta pe...@ti.com
2013/12/2 Thomas Petazzoni thomas.petazz...@free-electrons.com:
Dear Javier Martinez Canillas,
On Sun, 1 Dec 2013 13:27:25 +0100, Javier Martinez Canillas wrote:
diff --git
From: Thomas Petazzoni [mailto:thomas.petazz...@free-electrons.com]
On Mon, 2 Dec 2013 14:56:09 +, Gupta, Pekon wrote:
A query Why are you going backward from BCH8 to HAM1 ?
HAM1 is just kept for legacy reasons, it's not at all recommended for new
development. As some field results have
From: Thomas Petazzoni [mailto:thomas.petazz...@free-electrons.com]
On Mon, 2 Dec 2013 11:00:35 -0500, Tom Rini wrote:
Although the new ECC schema breaks the compatibility between the board
files and new DT based kernel, I think we should use BCH8 scheme.
Sorry, because I had not realized
From: Thomas Petazzoni [mailto:thomas.petazz...@free-electrons.com]
Dear Gupta, Pekon,
On Mon, 2 Dec 2013 16:13:56 +, Gupta, Pekon wrote:
Yes, at-least OMAP3 arch u-boot should still supports 'nandecc'.
The infrastructure is still in place, however the command 'nandecc' is
deprecated
So coming back to the specific problem here.
I think we need 'nandecc' back in u-boot till atleast all systems have
migrated to BCH16 or whatever highest ecc-scheme which can be
supported on OMAP devices.
Forgot to mention, one more way of updating boot-loaders with
different ecc-scheme via
Hi Ezequiel,
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
[...]
AFAIK, there's no hardware limitation that would prevent us from setting
a per-partition ECC, keep in mind this effort is not reduced to make
devicetree accept ECC on the partitions.
I had some reservations in
Hi,
From: Thomas Petazzoni [mailto:thomas.petazz...@free-electrons.com]
On Thu, 5 Dec 2013 11:24:18 -0800, Brian Norris wrote:
[...]
Using 1-bit ECC on NAND is not a long-term solution. Given that fact,
I think your ROM code is what may need to change, not the entire MTD
subsystem.
As
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