Hi Geert,
Thanks for your work.
On 2017-04-19 11:15:45 +0200, Geert Uytterhoeven wrote:
> Add support for the R-Car H3 System-in-Package (r8j7795), which contains:
> - an R-Car H3 SoC (r8a7795),
> - 4 channels of 1 GiB of RAM (4 GiB total),
> - HyperFlash (not yet described).
>
>
On 04/21/2017 02:41 AM, Kuninori Morimoto wrote:
>
> From: Marek Vasut
>
> 25165f79adc76b812bfb4d8f2ab120aafb28d0e6
> ("ASoC: rsnd: enable clock-frequency for both 44.1kHz/48kHz")
> supports both 44.1kHz/48kHz clock-frequency settings for ADG
> which will be used
From: Marek Vasut
25165f79adc76b812bfb4d8f2ab120aafb28d0e6
("ASoC: rsnd: enable clock-frequency for both 44.1kHz/48kHz")
supports both 44.1kHz/48kHz clock-frequency settings for ADG
which will be used for AUDIO_OLKOUTn.
But some board doesn't need it, thus, it is
On 04/21/2017 02:14 AM, Kuninori Morimoto wrote:
>
> Hi Marek
Hi!
>> In case the "clock-frequency" DT property is not present, the
>> of_find_property(np, "clock-frequency", NULL) will return NULL
>> and the subsequent req_size = prop->length / sizeof(u32); will
>> trigger a NULL pointer
Hi Marek
> In case the "clock-frequency" DT property is not present, the
> of_find_property(np, "clock-frequency", NULL) will return NULL
> and the subsequent req_size = prop->length / sizeof(u32); will
> trigger a NULL pointer dereference.
>
> This patch adds check for the NULL return value
Hi Wolfram
> PM handling is correct but might be a bit subtle. Add some comments for
> clarification.
>
> Signed-off-by: Wolfram Sang
> ---
It become more understandable, I think :)
Acked-by: Kuninori Morimoto
Best
On Tue, Apr 18, 2017 at 08:57:04PM +0200, Geert Uytterhoeven wrote:
> On Tue, Apr 18, 2017 at 8:33 PM, Mark Rutland wrote:
> > I'm somewhat surprised that this patch would have that
> > effect -- I would imagine that the rework this is based on is more
> > likely to. e.g.
Hello.
Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20170420-v4.11-rc7' tag. We're adding the R8A7743 PFC node
and then describing the pins for SCIF0 and Ether devices declared earlier.
These patches depend on the R8A7743 PFC suport in order to work
Define the generic R8A7743 part of the PFC device node.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
---
Changes in version 2:
- added Geert's tag.
arch/arm/boot/dts/r8a7743.dtsi |7 ++-
1 file changed, 6
Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's
device tree.
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
- refreshed the patch.
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 13 +
1 file changed, 13
Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's
device tree.
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
- fixed the SCIF0 data group inside the PFC node.
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 12 +++-
1 file
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch supports the clock of USB-DMAC ch3 module added from R8A7795
> ES2.0 SoC.
>
> Signed-off-by: Takeshi Kihara
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch adds valid HS-USB ch3 clock from R8A7795 ES2.0 SoC.
>
> Signed-off-by: Takeshi Kihara
>
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Koji Matsuoka
>
> This patch adds HDMI-IF0 clock for R8A7796 SoC.
>
> Signed-off-by: Koji Matsuoka
> Signed-off-by: Takeshi Kihara
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Kazuya Mizuguchi
>
> This patch adds HS-USB-IF clock for R8A7796 SoC.
>
> Signed-off-by: Kazuya Mizuguchi
> Signed-off-by:
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Harunobu Kurokawa
>
> This patch adds PCIEC{0,1} clocks for R8A7796 SoC.
>
> Signed-off-by: Harunobu Kurokawa
> Signed-off-by: Takeshi
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Kazuya Mizuguchi
>
> This patch adds adds SCU(DVC{0,1}) clocks for R8A7796 SoC.
>
> Signed-off-by: Kazuya Mizuguchi
> Signed-off-by: Takeshi
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Kazuya Mizuguchi
>
> This patch adds SCU(all), SCU(SRC{0,1,2,3,4,5,6,7,8,9}), SCU(CTU00,
> CTU01, CTU02, CTU03, MIX0) and SCU (CTU10, CTU11, CTU12, CTU13,
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Kazuya Mizuguchi
>
> This patch adds SSI(all) and SSI{0,1,2,3,4,5,6,7,8,9} clocks for R8A7796
> SoC.
>
> Signed-off-by: Kazuya Mizuguchi
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Hiromitsu Yamasaki
>
> This patch adds USB-DMAC{0,1} clocks for R8A7796 SoC.
>
> Signed-off-by: Hiromitsu Yamasaki
> Signed-off-by:
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Hiromitsu Yamasaki
>
> This patch adds A-DMAC{0,1} clocks for R8A7796 SoC.
>
> Signed-off-by: Hiromitsu Yamasaki
>
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Kazuya Mizuguchi
>
> This patch adds EHCI/OHCI{0,1} clocks for R8A7796 SoC.
>
> Signed-off-by: Kazuya Mizuguchi
>
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch supports the clock of EHCI/OHCI ch3 module added from R8A7795
> ES2.0 SoC.
>
> Signed-off-by: Takeshi Kihara
>
Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> Add the "intc-ex" clock to the R8A7796 CPG MSSR driver.
>
> According to information from the hardware team the INTC-EX
> parent clock is CP.
Catching up with these threads, so replying to a patch I already
applied.
On Tue, Mar 07, 2017 at 06:43:32PM +0100, Geert Uytterhoeven wrote:
> --- a/arch/arm64/mm/dma-mapping.c
> +++ b/arch/arm64/mm/dma-mapping.c
> @@ -584,20 +584,7 @@ static void *__iommu_alloc_attrs(struct device *dev,
>
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko wrote:
> From: Ryo Kodama
>
> This patch adds PWM clock for PWM.
>
> Signed-off-by: Ryo Kodama
> Signed-off-by: Takeshi Kihara
>
On Wed, Apr 19, 2017 at 3:24 PM, Ulrich Hecht
wrote:
> From: Ryo Kodama
>
> This patch adds support of PWM{1,2} device for Salvator-X board on
> R8A7796 SoC.
>
> Signed-off-by: Ryo Kodama
> Signed-off-by:
Hi Uli,
On Wed, Apr 19, 2017 at 3:24 PM, Ulrich Hecht
wrote:
> From: Takeshi Kihara
>
> This patch enables PWM{1,2} for Salvator-X board on R8A7795 SoC.
>
> Signed-off-by: Takeshi Kihara
>
Hi Uli,
On Wed, Apr 19, 2017 at 3:24 PM, Ulrich Hecht
wrote:
> From: Takeshi Kihara
>
> This patch adds PWM{0,1,2,3,4,5,6} device nodes for R8A7796 SoC.
>
> Signed-off-by: Takeshi Kihara
>
On Thu, Apr 20, 2017 at 5:43 PM, Marek Vasut wrote:
> The "if" interface clock speed is actually derived from the "fck"
> block clock, as in the hardware they are the same clock. Drop the
> incorrect second "if" clock and get the clock speed from "fck".
>
> Signed-off-by:
On Thu, Apr 20, 2017 at 5:42 PM, Marek Vasut wrote:
> The "if" interface clock speed is actually derived from the "fck"
> block clock, as in the hardware they are the same clock. Drop the
> incorrect second "if" clock and retain only the "fck" clock.
>
> Signed-off-by:
On 04/20/2017 03:20 PM, Geert Uytterhoeven wrote:
Renesas RZ/G1E (R8A7745) is pin compatible with R-Car E2 (R8A7794),
however it doesn't have several automotive specific peripherals.
Annotate all the items that only exist on the R-Car SoCs and only
supply the pin groups/functions existing on
On 04/20/2017 01:46 AM, Rob Herring wrote:
Renesas RZ/G1E (R8A7745) is pin compatible with R-Car E2 (R8A7794),
however it doesn't have several automotive specific peripherals.
Is a single space between words really so hard for you? You've been told
to write proper sentences multiple times.
On 04/20/2017 11:00 AM, Simon Horman wrote:
> On Tue, Apr 18, 2017 at 03:42:25PM +0200, Geert Uytterhoeven wrote:
>> On Sun, Apr 16, 2017 at 6:57 PM, Marek Vasut wrote:
>>> Add the GyroADC clock to the R8A7791 device tree.
>>>
>>> Signed-off-by: Marek Vasut
On 04/20/2017 05:19 PM, Geert Uytterhoeven wrote:
Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's
device tree.
Signed-off-by: Sergei Shtylyov
---
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 12 +++-
1 file changed, 11
Add node for the GyroADC block and it's associated clock.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Simon Horman
To: linux-renesas-soc@vger.kernel.org
---
V2: - Drop the _clk suffix for ADC clock
The "if" interface clock speed is actually derived from the "fck"
block clock, as in the hardware they are the same clock. Drop the
incorrect second "if" clock and get the clock speed from "fck".
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
The "if" interface clock speed is actually derived from the "fck"
block clock, as in the hardware they are the same clock. Drop the
incorrect second "if" clock and retain only the "fck" clock.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
From: Magnus Damm
r8a7792 Blanche has depending on dip switch and jumper settings
either HSCIF0 or CAN0 exposed on the on-board CN5 connector.
This patch adds HSCIF0 to the Blanche dts as serial2.
Signed-off-by: Magnus Damm
---
In case the "clock-frequency" DT property is not present, the
of_find_property(np, "clock-frequency", NULL) will return NULL
and the subsequent req_size = prop->length / sizeof(u32); will
trigger a NULL pointer dereference.
This patch adds check for the NULL return value and propagates
the error
On Wed, Apr 19, 2017 at 3:24 PM, Ulrich Hecht
wrote:
> From: Ryo Kodama
>
> This patch adds PWM clock for PWM.
>
> Signed-off-by: Ryo Kodama
> Signed-off-by: Takeshi Kihara
>
On Wed, Apr 19, 2017 at 3:24 PM, Ulrich Hecht
wrote:
> From: Takeshi Kihara
>
> This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to
> R8A7796 SoC.
>
> Signed-off-by: Takeshi Kihara
>
Hi Uli,
On Wed, Apr 19, 2017 at 3:24 PM, Ulrich Hecht
wrote:
> This is a straight port from the BSP, enabling PWM1 and PWM2 on the
> Salvator-X boards. For r8a7796 it also adds the required infrastructure
> (clock and pins).
>
> Not fully tested because I cannot
Hi Sergei,
On Fri, Apr 14, 2017 at 11:09 PM, Sergei Shtylyov
wrote:
> Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's
> device tree.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
>
On Thu, Apr 20, 2017 at 02:51:40PM +0200, Marek Vasut wrote:
> On 04/20/2017 02:35 PM, Geert Uytterhoeven wrote:
> > Hi Marek,
>
> Hi!
>
> > On Sun, Apr 16, 2017 at 8:07 PM, Marek Vasut wrote:
> >> Add DT bindings for the ROHM BD9571MWV-M PMIC. This PMIC has
> >> the
On Sat, Apr 15, 2017 at 10:18 PM, Sergei Shtylyov
wrote:
> Define the generic R8A7745 part of the PFC device node.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
On Fri, Apr 14, 2017 at 11:09 PM, Sergei Shtylyov
wrote:
> Define the generic R8A7743 part of the PFC device node.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
On Sun, Apr 16, 2017 at 08:01:11PM +0200, Marek Vasut wrote:
> ROHM Semiconductor Co., Ltd. offer PMICs, touchscreen controllers etc.
> http://www.rohm.com/web/global/
>
> Signed-off-by: Marek Vasut
> Cc: Rob Herring
> Cc: Geert Uytterhoeven
From: Magnus Damm
Fix comman-instead-of-semicolon typo error present
in the latest version of the IPMMU driver.
Will in the future be rolled into next driver update.
Signed-off-by: Magnus Damm
---
Applies on top of
On 04/20/2017 02:35 PM, Geert Uytterhoeven wrote:
> Hi Marek,
Hi!
> On Sun, Apr 16, 2017 at 8:07 PM, Marek Vasut wrote:
>> Add DT bindings for the ROHM BD9571MWV-M PMIC. This PMIC has
>> the following features:
>> - multiple voltage monitors for 1V8, 2V5, 3V3 voltage rail
Hi Marek,
On Sun, Apr 16, 2017 at 8:07 PM, Marek Vasut wrote:
> Add DT bindings for the ROHM BD9571MWV-M PMIC. This PMIC has
> the following features:
> - multiple voltage monitors for 1V8, 2V5, 3V3 voltage rail
> - one voltage regulator for DVFS
> - two GPIOs
>
>
Hello.
On 04/20/2017 11:51 AM, Simon Horman wrote:
Define the generic R8A7743 part of the PFC device node.
Signed-off-by: Sergei Shtylyov
---
arch/arm/boot/dts/r8a7743.dtsi |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
Index:
Hi Sergei,
On Thu, Apr 13, 2017 at 10:19 PM, Sergei Shtylyov
wrote:
> Renesas RZ/G1E (R8A7745) is pin compatible with R-Car E2 (R8A7794),
> however it doesn't have several automotive specific peripherals.
> Annotate all the items that only exist on the R-Car
uart_register_driver call binds the driver to a specific device
node through tty_register_driver call. This should typically
happen during device probe call.
In a multiplatform scenario, it is possible that multiple serial
drivers are part of the kernel. Currently the driver registration fails
if
uart_register_driver call binds the driver to a specific device
node through tty_register_driver call. This should typically
happen during device probe call.
In a multiplatform scenario, it is possible that multiple serial
drivers are part of the kernel. Currently the driver registration fails
if
When testing on a Renesas board with the PL010 serial driver enabled
serial output broke. Turns out the minor device numbers for both
drivers happen to overlap, causing whichever driver happened to be the
second one to register to fail.
The attached patches move the uart_register_driver call to
On Thu, Apr 20, 2017 at 11:50:47AM +0200, Geert Uytterhoeven wrote:
> The EthernetAVB should not depend on the bootloader to setup correct
> drive-strength values. Values for drive-strength where found by
> examining the registers after the bootloader has configured the
> registers and
Hi Laurent,
On Thu, Apr 20, 2017 at 1:44 PM, Laurent Pinchart
wrote:
> On Thursday 20 Apr 2017 13:37:27 Geert Uytterhoeven wrote:
>> On Thu, Apr 20, 2017 at 12:18 PM, Laurent Pinchart wrote:
>> > On Thursday 20 Apr 2017 12:11:41 Geert Uytterhoeven wrote:
>> >>
On Thu, Apr 20, 2017 at 11:46:44AM +0200, Geert Uytterhoeven wrote:
> Cfr. commit b2407c566ba29215 ("arm64: dts: r8a7795: enable nfs root on
> Salvator-X board").
>
> Signed-off-by: Geert Uytterhoeven
Thanks, I have queued this up.
It looks like we should also do
Hi Laurent,
(this time reply to all)
On Thu, Apr 20, 2017 at 12:18 PM, Laurent Pinchart
wrote:
> On Thursday 20 Apr 2017 12:11:41 Geert Uytterhoeven wrote:
>> On Thu, Apr 20, 2017 at 12:02 PM, Laurent Pinchart wrote:
>> > On Thursday 20 Apr 2017 11:49:06 Geert
Hi Laurent,
On Thu, Apr 20, 2017 at 1:24 PM, Laurent Pinchart
wrote:
> On Thursday 20 Apr 2017 12:55:28 Geert Uytterhoeven wrote:
>> On Thu, Apr 20, 2017 at 12:42 PM, Laurent Pinchart wrote:
>> > On Thursday 20 Apr 2017 11:36:59 Geert Uytterhoeven wrote:
>> >>
Hi Sergei,
On Thu, Apr 13, 2017 at 10:13 PM, Sergei Shtylyov
wrote:
> Renesas RZ/G1M (R8A7743) is pin compatible with R-Car M2-W/N (R8A7791/3),
> however it doesn't have several automotive specific peripherals. Annotate
> all the items that only exist on the
Hi Geert,
On Thursday 20 Apr 2017 12:55:28 Geert Uytterhoeven wrote:
> On Thu, Apr 20, 2017 at 12:42 PM, Laurent Pinchart wrote:
> > On Thursday 20 Apr 2017 11:36:59 Geert Uytterhoeven wrote:
> >> On Mon, Mar 27, 2017 at 10:48 AM, Laurent Pinchart wrote:
> >>> On Friday 24 Mar 2017 14:37:44 Geert
Hi Rob,
On Thu, Apr 20, 2017 at 12:46 AM, Rob Herring wrote:
> On Thu, Apr 13, 2017 at 11:19:24PM +0300, Sergei Shtylyov wrote:
>> Renesas RZ/G1E (R8A7745) is pin compatible with R-Car E2 (R8A7794),
>> however it doesn't have several automotive specific peripherals.
>
> Is a
Hi Laurent,
On Thu, Apr 20, 2017 at 12:42 PM, Laurent Pinchart
wrote:
> On Thursday 20 Apr 2017 11:36:59 Geert Uytterhoeven wrote:
>> On Mon, Mar 27, 2017 at 10:48 AM, Laurent Pinchart wrote:
>> > On Friday 24 Mar 2017 14:37:44 Geert Uytterhoeven wrote:
>> >>
Hi Geert,
On Thursday 20 Apr 2017 11:36:59 Geert Uytterhoeven wrote:
> On Mon, Mar 27, 2017 at 10:48 AM, Laurent Pinchart wrote:
> > On Friday 24 Mar 2017 14:37:44 Geert Uytterhoeven wrote:
> >> Update r8a7795.dtsi so it corresponds to R-Car H3 ES2.0 or later:
> >> - The following devices no
Hi Geert,
On Thursday 20 Apr 2017 12:11:41 Geert Uytterhoeven wrote:
> On Thu, Apr 20, 2017 at 12:02 PM, Laurent Pinchart wrote:
> > On Thursday 20 Apr 2017 11:49:06 Geert Uytterhoeven wrote:
> >> Group the AVB pins into similar groups as found in other sh-pfc drivers.
> >> The pins can not be
Hi Laurent,
On Thu, Apr 20, 2017 at 12:02 PM, Laurent Pinchart
wrote:
> On Thursday 20 Apr 2017 11:49:06 Geert Uytterhoeven wrote:
>> Group the AVB pins into similar groups as found in other sh-pfc drivers.
>> The pins can not be muxed between functions other
PM handling is correct but might be a bit subtle. Add some comments for
clarification.
Signed-off-by: Wolfram Sang
---
drivers/i2c/busses/i2c-rcar.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-rcar.c
Hi Geert,
Thank you for the patch.
On Thursday 20 Apr 2017 11:49:06 Geert Uytterhoeven wrote:
> Group the AVB pins into similar groups as found in other sh-pfc drivers.
> The pins can not be muxed between functions other than AVB, but their
> drive strengths can be controlled.
>
> The group
Group the AVB pins into similar groups as found in other sh-pfc drivers.
The pins can not be muxed between functions other than AVB, but their
drive strengths can be controlled.
The group avb_mdc containing ADV_MDC and ADV_MDIO is called avb_mdio on
other SoCs. In pfc-r8a7796 the avb_mdc group
Cfr. commit b2407c566ba29215 ("arm64: dts: r8a7795: enable nfs root on
Salvator-X board").
Signed-off-by: Geert Uytterhoeven
---
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi Laurent,
On Mon, Mar 27, 2017 at 10:48 AM, Laurent Pinchart
wrote:
> On Friday 24 Mar 2017 14:37:44 Geert Uytterhoeven wrote:
>> Update r8a7795.dtsi so it corresponds to R-Car H3 ES2.0 or later:
>> - The following devices no longer exist on ES2.0, and are
On Wed, Apr 19, 2017 at 06:55:56AM -0700, Olof Johansson wrote:
> Hi,
>
> On Fri, Apr 07, 2017 at 02:14:07PM -0400, Simon Horman wrote:
> > Hi Olof, Hi Kevin, Hi Arnd,
> >
> > Please consider these Renesas ARM based SoC sysc updates for v4.12.
> >
> > This pull request is based on the
On Wed, Apr 19, 2017 at 10:40:21AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Thu, Apr 6, 2017 at 4:20 PM, Jacopo Mondi
> wrote:
> > [PATCH v5 4/4] arm64: dts: salvator-x: Add current sense amplifiers
>
> This should be "arm64: dts: r8a7796: salvator-x: Add
On Thu, Apr 20, 2017 at 06:10:19PM +0900, Simon Horman wrote:
> On Wed, Apr 19, 2017 at 10:37:37AM +0200, Geert Uytterhoeven wrote:
> > Add device nodes for two Maxim max961x current sense amplifiers
> > sensing the VDD_0.8V and DVFS_0.8V lines.
> >
> > Based on a patch for r8a7796-salvator-x.dts
On Wed, Apr 19, 2017 at 10:37:37AM +0200, Geert Uytterhoeven wrote:
> Add device nodes for two Maxim max961x current sense amplifiers
> sensing the VDD_0.8V and DVFS_0.8V lines.
>
> Based on a patch for r8a7796-salvator-x.dts by Jacopo Mondi.
>
> Signed-off-by: Geert Uytterhoeven
On Tue, Apr 18, 2017 at 12:20:20PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 4/18/2017 10:02 AM, Simon Horman wrote:
>
> >In the case where power is cut on suspend the SATA PHY state needs to be
> >suspended on resume.
> >
> >This is the case on the Salvator-X board with the r8a7795 or
On Tue, Apr 18, 2017 at 12:26:25PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 4/18/2017 4:06 AM, Simon Horman wrote:
>
> >Set PHY rxc-skew-ps to 1500 and all other values to their default values.
> >
> >This is intended to to address failures in the case of 1Gbps communication
> >using the by
On Tue, Apr 18, 2017 at 03:42:25PM +0200, Geert Uytterhoeven wrote:
> On Sun, Apr 16, 2017 at 6:57 PM, Marek Vasut wrote:
> > Add the GyroADC clock to the R8A7791 device tree.
> >
> > Signed-off-by: Marek Vasut
>
> Reviewed-by: Geert
On Sat, Apr 15, 2017 at 12:09:41AM +0300, Sergei Shtylyov wrote:
> Hello.
>
> Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-20170410-v4.11-rc6' tag. We're adding the R8A7743 PFC node and
> then describe the pins for SCIF0 and Ether devices described
On Sat, Apr 15, 2017 at 12:09:42AM +0300, Sergei Shtylyov wrote:
> Define the generic R8A7743 part of the PFC device node.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> arch/arm/boot/dts/r8a7743.dtsi |7 ++-
> 1 file changed, 6 insertions(+), 1
On Wed 19-04-17 15:50:01, Linus Torvalds wrote:
> On Wed, Apr 19, 2017 at 1:17 AM, Michal Hocko wrote:
> >
> > Thanks for the testing. Linus will you take the patch from this thread
> > or you prefer a resend?
>
> I'll take it from this branch since I'm looking at it now, but
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